A three-level six-switch DC-DC converter

By designing a three-level six-switch DC-DC converter, and adopting a three-level half-bridge topology and segmented modulation method, the poor performance of four-switch buck-boost DC-DC converters in high-voltage applications is solved, achieving efficient and stable voltage conversion and soft switching, suitable for photovoltaic systems and integrated chips.

CN116667676BActive Publication Date: 2026-07-03HUAZHONG UNIV OF SCI & TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUAZHONG UNIV OF SCI & TECH
Filing Date
2023-05-11
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing four-switch buck-boost DC-DC converters have poor performance under high input voltage and wide gain range conditions, with soft switching loss and increased conduction losses, making them unsuitable for high-voltage applications.

Method used

A three-level six-switch DC-DC converter is designed, employing a three-level half-bridge topology and control unit. Combining two-level and three-level modulation methods, soft switching and high-efficiency conversion are achieved by controlling the conduction and duty cycle of the switching transistors.

Benefits of technology

It improves the peak input voltage applicability of the converter, optimizes efficiency under wide input voltage conditions, reduces the current stress of the switching transistor, and realizes soft switching across the entire operating range, making it suitable for wide voltage range applications such as photovoltaic systems and integrated chips.

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Abstract

This invention discloses a three-level six-switch DC-DC converter, belonging to the field of power electronics, comprising: a three-level unit, a DC-DC conversion half-bridge, and a control unit; the three-level unit adopts a three-level half-bridge topology; the DC-DC conversion half-bridge includes a half-bridge structure composed of a fifth switch Q1 and a sixth switch Q2; the midpoint of the three-level half-bridge topology is connected to the midpoint of the bridge arm of the half-bridge structure through an inductor L1; an input capacitor C is connected in parallel on the input side of the three-level unit. in A parallel output capacitor C is connected to the output side of the DC-DC converter half-bridge. o The control unit is used to control the three-level six-switch DC-DC converter using a two-level modulation method when the voltage of the input three-level unit is less than the set value; otherwise, it controls the three-level six-switch DC-DC converter using a three-level modulation method. It can achieve soft-switching and low-current ripple operation under high input voltage and wide gain range conditions, and is suitable for photovoltaic power generation systems, centralized energy storage, integrated chips, and other applications.
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Description

Technical Field

[0001] This invention belongs to the field of power electronics, and more specifically, relates to a three-level six-switch DC-DC converter. Background Technology

[0002] Photovoltaic power generation, as an important form of renewable energy generation, has significant application prospects. However, photovoltaic power generation suffers from large voltage fluctuations. Centralized photovoltaic power plants often use series connection of photovoltaic modules to improve power generation efficiency; however, this series connection leads to a higher peak output voltage, further expanding the output voltage range. The peak output voltage of photovoltaic power plants can typically reach over 1700V, while the lowest output voltage can reach 250V. Voltages above 1700V exceed the withstand voltage of common silicon or silicon carbide devices.

[0003] Four-switch buck-boost DC-DC converters are widely used due to their ability to perform bidirectional boost and buck conversions and their excellent soft-switching capabilities. However, because four-switch buck-boost DC-DC converters use a two-level topology, their application is limited by the voltage withstand capability of the switching devices, making them unsuitable for higher operating voltage conditions. Furthermore, when the gain value deviates significantly from 1, four-switch buck-boost DC-DC converters may experience problems such as soft-switching loss and increased conduction losses. Summary of the Invention

[0004] In view of the shortcomings of the existing technology and the need for improvement, the present invention provides a three-level six-switch DC-DC converter, which aims to solve the problem of poor performance of the existing four-switch buck-boost DC-DC converter under the conditions of high input voltage and wide gain range.

[0005] To achieve the above objectives, the present invention provides a three-level six-switch DC-DC converter, comprising: a three-level unit, a DC-DC conversion half-bridge, and a control unit; the three-level unit adopts a three-level half-bridge topology; the DC-DC conversion half-bridge includes a half-bridge structure composed of a fifth switch Q1 and a sixth switch Q2; the midpoint of the three-level half-bridge topology is connected to the midpoint of the bridge arm of the half-bridge structure through an inductor L1; an input capacitor C is connected in parallel on the input side of the three-level unit. in The output capacitor C is connected in parallel on the output side of the DC-DC converter half-bridge. o The control unit is used to control the three-level six-switch DC-DC converter using a two-level modulation method when the voltage input to the three-level unit is less than a set value; otherwise, it controls the three-level six-switch DC-DC converter using a three-level modulation method.

[0006] Furthermore, the three-level half-bridge topology includes a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4 connected in sequence, and the connection point between the second switch S2 and the third switch S3 is the midpoint of the three-level half-bridge topology.

[0007] Furthermore, the two-level modulation method includes: controlling the first switch S1 and the fourth switch S4 to be in the on state, controlling the second switch S2 and the third switch S3 to be alternately turned on, and controlling the three-level six-switch DC-DC converter to realize the DC-DC buck-boost conversion function; controlling T s1 =T s2 , among which, T s1 T s2 These are the switching cycles of the switching transistors whose switching states change in the three-level half-bridge topology and the DC-DC conversion half-bridge, respectively.

[0008] Furthermore, the three-level modulation method includes: controlling the first switch S1 and the fourth switch S4 to conduct complementaryly, controlling the second switch S2 and the third switch S3 to conduct complementaryly, controlling the duty cycles of the first switch S1 and the second switch S2 to be the same, and the phase shift duty cycle between them to be 0.5, controlling the three-level six-switch DC-DC converter to realize the DC-DC buck-boost conversion function; controlling T s1 =2T s2 , among which, T s1 T s2 These are the switching cycles of the switching transistors whose switching states change in the three-level half-bridge topology and the DC-DC conversion half-bridge, respectively.

[0009] Furthermore, the control unit is also used to: control the phase shift duty cycle between the DC-DC converter half-bridge and the three-level half-bridge, so as to adjust the freewheeling current of the inductor L1, making the freewheeling current equal to the soft-switching critical current.

[0010] Furthermore, the control unit is also configured to: control the duty cycle of the three-level half-bridge and the duty cycle of the DC-DC converter half-bridge, so that the output capacitor C... o The output voltage at both ends is equal to the output voltage command value.

[0011] Furthermore, the three-level half-bridge topology is a diode-clamped three-level topology, a switch-clamped three-level topology, a flying capacitor-type three-level topology, or a hybrid three-level topology of clamping and flying capacitor.

[0012] Furthermore, the source of the fifth switch Q1 is connected to the drain of the sixth switch Q2, and the drain of the fifth switch Q1 is connected to the output capacitor C.o The positive terminal of the sixth switch Q2 is connected to the source of the output capacitor C. o The negative electrode.

[0013] In summary, the above-described technical solutions conceived in this invention can achieve the following beneficial effects:

[0014] (1) A three-level six-switch DC-DC converter was designed, which can perform multi-level conversion and improve the peak input voltage of the converter. Furthermore, two different modulation methods were proposed for different operating conditions to optimize its efficiency under wide input voltage conditions, maintain extremely high DC-DC conversion accuracy under low input voltage conditions, and reduce the voltage applied across the switching transistor under high input voltage conditions, making it suitable for high voltage applications.

[0015] (2) The proposed segmented modulation method can realize soft switching across the entire operating range and reduces the ripple of the inductor current when the gain deviates from 1, thereby reducing the current stress of the switching transistor and making the current stress of the switching transistor more balanced across the entire voltage range, which is beneficial for the selection of switching transistors and the design of circuit parameters.

[0016] (3) The soft switching of the switching transistor is achieved by using the phase shift duty cycle between the three-level unit and the DC-DC converter half bridge. It does not require continuous frequency conversion operation, which improves stability and reduces the difficulty of electromagnetic compatibility design. It can achieve a wider gain adjustment range and soft switching range, and is suitable for photovoltaic systems, centralized energy storage, integrated chips and other occasions with wide voltage range changes. In addition, it maintains the simplicity of traditional control methods, without complex algorithms or large data lookup operations, and is easy to implement on digital controllers. Attached Figure Description

[0017] Figure 1 This is a topology diagram of a three-level six-switch DC-DC converter provided in an embodiment of the present invention;

[0018] Figure 2A , Figure 2B , Figure 2C , Figure 2D The circuit diagrams are respectively provided in the embodiments of the present invention for the flying capacitor type three-level topology, diode clamp type three-level topology, switch clamp type three-level topology, and clamp and flying capacitor hybrid three-level topology;

[0019] Figure 3 The waveform diagram provided in this embodiment of the invention is a working waveform diagram when using a two-level modulation method;

[0020] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G , Figure 4H The circuit diagrams for stages 1, 2, 3, 4, 5, 6, 7, and 8 of the two-level modulation method provided for embodiments of the present invention are as follows:

[0021] Figure 5 The waveform diagram provided in this embodiment of the invention is a working waveform diagram when using the three-level modulation method;

[0022] Figure 6A , Figure 6B , Figure 6C , Figure 6D , Figure 6E , Figure 6F , Figure 6G , Figure 6H The circuit diagrams for stages 1, 2, 3, 4, 5, 6, 7, and 8 of the three-level modulation method provided in the embodiments of the present invention are as follows. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0024] In this invention, the terms "first," "second," etc. (if present) in the invention and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0025] Figure 1 This is a topology diagram of a three-level six-switch DC-DC converter provided in an embodiment of the present invention. (See also...) Figure 1 , combined Figures 2A-6H The three-level six-switch DC-DC converter in this embodiment will be described in detail.

[0026] See Figure 1 The three-level six-switch DC-DC converter includes a three-level unit, a DC-DC conversion half-bridge, and a control unit (not shown in the figure).

[0027] The three-level unit adopts a three-level half-bridge topology; the DC-DC converter half-bridge includes a half-bridge structure composed of the fifth switch Q1 and the sixth switch Q2; the midpoint of the three-level half-bridge topology is connected to the midpoint of the bridge arm of the half-bridge structure through inductor L1; the input capacitor C is connected in parallel on the input side of the three-level unit. in A parallel output capacitor C is connected to the output side of the DC-DC converter half-bridge. o .

[0028] The control unit is used to control the three-level six-switch DC-DC converter using a two-level modulation method when the voltage of the input three-level unit is less than a set value; otherwise, it controls the three-level six-switch DC-DC converter using a three-level modulation method. This set value is designed according to the specific application scenario.

[0029] According to an embodiment of the present invention, the three-level half-bridge topology is a diode-clamped three-level topology (circuit as follows). Figure 2B As shown), a switching transistor clamping three-level topology (circuit shown) Figure 2C As shown), flying capacitor type three-level topology (circuit as shown) Figure 2A (As shown), a hybrid three-level topology of clamping and flying capacitor (circuit shown) Figure 2D (as shown) or a T-type three-level half-bridge topology.

[0030] See Figure 1 The three-level unit has three external connection points: connection point N1, connection point N2, and connection point N3. Connection point N1 is connected to the input capacitor C. in The positive terminal is connected, and the connection point N2 is connected to the input capacitor C. in The negative terminal is connected, and the connection point N3 serves as the output point and is connected to the DC-DC converter half-bridge.

[0031] According to an embodiment of the present invention, the three-level half-bridge topology includes a first switch S1, a second switch S2, a third switch S3 and a fourth switch S4 connected in sequence, and the connection point of the second switch S2 and the third switch S3 is the midpoint of the three-level half-bridge topology.

[0032] The transistors are connected in the following order: positive terminal of the input power supply, drain of the first switch S1, source of the first switch S1, drain of the second switch S2, source of the second switch S2, drain of the third switch S3, source of the third switch S3, drain of the fourth switch S4, source of the fourth switch S4, and negative terminal of the input power supply. The first switch S1 and the second switch S2 form the upper half-bridge, and the third switch S3 and the fourth switch S4 form the lower half-bridge. Connection point N1 is connected to the positive terminal of the bridge arm of the three-level half-bridge topology (i.e., the drain of S1); connection point N2 is connected to the negative terminal of the bridge arm of the three-level half-bridge topology (i.e., the source of S4); connection point N3 is the connection point between inductor L1 and the DC-DC converter half-bridge.

[0033] by Figure 2A Taking the flying capacitor-type three-level topology shown in the figure as an example, the circuit structure of the three-level unit in this embodiment is explained. (See also...) Figure 2A The circuit of the three-level unit includes an upper half-bridge, a lower half-bridge, an inductor L1, and a flying capacitor C. f Input capacitor C in Parallel to a three-level half-bridge; flying capacitor Cf The positive terminal is connected to the midpoint of the upper half-bridge, and the flying capacitor C... f The negative terminal is connected to the midpoint of the lower half-bridge.

[0034] In the DC-DC converter half-bridge, the source of the fifth switch Q1 is connected to the drain of the sixth switch Q2, and the drain of the fifth switch Q1 is connected to the output capacitor C. o The positive terminal of the sixth switch Q2 is connected to the output capacitor C. o The negative terminal. The connection point of the fifth switch Q1 and the sixth switch Q2 is connected to the connection point N3.

[0035] In this embodiment, the control unit uses a segmented modulation method and / or a closed-loop control method to control each switching transistor. The segmented modulation method refers to: when the per-unit input voltage is small (e.g., less than 1.66), a two-level modulation method is used; when the per-unit input voltage is large (e.g., greater than 1.66), a three-level modulation method is used.

[0036] According to an embodiment of the present invention, the two-level modulation method includes: controlling the first switch S1 and the fourth switch S4 to be in the on state, controlling the second switch S2 and the third switch S3 to be alternately turned on, and controlling the three-level six-switch DC-DC converter to realize the DC-DC buck-boost conversion function; controlling T s1 =T s2 , among which, T s1 T s2 These represent the switching cycles of the switching transistors whose switching states change in the three-level half-bridge topology and the DC-DC conversion half-bridge, respectively.

[0037] According to an embodiment of the present invention, the three-level modulation method includes: controlling the first switch S1 and the fourth switch S4 to conduct complementaryly, controlling the second switch S2 and the third switch S3 to conduct complementaryly, controlling the duty cycles of the first switch S1 and the second switch S2 to be the same, and the phase shift duty cycle between them to be 0.5, controlling the three-level six-switch DC-DC converter to realize the DC-DC buck-boost conversion function; controlling T s1 =2T s2 , among which, T s1 T s2 These represent the switching cycles of the transistors whose switching states change in the three-level half-bridge topology and the DC-DC converter half-bridge, respectively. In three-level modulation, Q1 and Q2 conduct complementaryly. There is a certain dead time between the drive pulses of the complementary conducting transistors.

[0038] The control unit is also used to: control the phase shift duty cycle between the DC-DC converter half-bridge and the three-level half-bridge, so as to adjust the freewheeling current i of inductor L1. fw This causes the freewheeling current i fw Equal to the soft-switching critical current IZVS .

[0039] The control unit is also used to: control the duty cycle of the three-level half-bridge and the duty cycle of the DC-DC converter half-bridge, so that the output capacitor C... o Output voltage V at both ends o Equal to the output voltage command value V oref .

[0040] In this embodiment, the duty cycle D2 of the DC-DC converter half-bridge refers to the duty cycle of the fifth switch Q1; the phase-shifting duty cycle D3 between the DC-DC converter half-bridge and the three-level half-bridge refers to the phase-shifting duty cycle of the turn-on time of the fifth switch Q1 relative to the turn-on time of the third switch S3; the phase-shifting duty cycle is the ratio of the difference in turn-on time to the switching cycle of the DC-DC converter half-bridge.

[0041] by Figure 1 The diagram shown below illustrates the operation of the three-level six-switch DC-DC converter in this embodiment, using a flying capacitor type three-level topology as an example.

[0042] When operating in the two-level modulation method, the typical operating waveform is as follows: Figure 3 As shown, there are 8 operating stages within half a switching cycle of the DC-DC converter half-bridge. The operational analysis of each operating stage is as follows.

[0043] Phase 1 [t0-t1]: such as Figure 4A As shown, before time t0, the current of inductor L1 is positive, S1 is on, S2 is on, S4 is on, S3 is off, Q1 is off, and Q2 is off. At time t0, Q1 is turned on as a zero voltage switch (ZVS). As time goes on, the current of inductor L1 increases linearly.

[0044] Phase 2 [t1-t2]: such as Figure 4B As shown, at time t1, S2 is turned off; this stage is the dead time of S2 and S3. The current in inductor L1 freewheels through the body diode of S3, providing the conditions for ZVS of S3.

[0045] Phase 3 [t2-t3]: such as Figure 4C As shown, at time t2, S3 is turned on with ZVS. The current in inductor L1 decreases linearly.

[0046] Phase 4 [t3-t4]: such as Figure 4D As shown, Q2 is turned off at time t3. This stage is the dead time of Q1 and Q2. The current of inductor L1 freewheels through the body diode of Q2, which provides the conditions for Q2 to achieve ZVS.

[0047] Phase 5 [t4-t5]: such as Figure 4E As shown, at time t4, Q2 is turned on with ZVS. The current in inductor L1 freewheels through S3 and Q2.

[0048] Phase 6 [t5-t6]: such as Figure 4F As shown, at time t5, S3 is turned off. This stage is the dead time of S2 and S3. The current of inductor L1 freewheels through the body diode of S2, which provides the conditions for ZVS of S2.

[0049] Stage 7 [t6-t7]: such as Figure 4G As shown, at time t6, S2 is turned on with ZVS. The current in inductor L1 increases linearly.

[0050] Stage 8 [t7-t8]: such as Figure 4H As shown, at time t5, Q2 is turned off. This stage is the dead time of Q1 and Q2. The current of inductor L1 freewheels through the body diode of Q1, which provides the conditions for Q1 to achieve ZVS.

[0051] When operating in the three-level modulation method, the typical operating waveform is as follows: Figure 5 As shown, there are 8 operating stages within half a switching cycle of the DC-DC converter half-bridge. The operational analysis of each operating stage is as follows.

[0052] Phase 1 [t0-t1]: such as Figure 6A As shown, before time t0, the current in inductor L1 is positive, S2 and S4 are on, S1, S3, Q1, and Q2 are off; at time t0, Q1 of the DC-DC converter half-bridge is turned on with ZVS; as time goes on, the current in inductor L1 increases linearly.

[0053] Phase 2 [t1-t2]: such as Figure 6B As shown, at time t1, S2 is turned off; this stage is the dead time of S2 and S3. The current in inductor L1 freewheels through the body diode of S3, providing the conditions for ZVS of S3.

[0054] Phase 3 [t2-t3]: such as Figure 6C As shown, at time t2, S3 is turned on with ZVS. The current in inductor L1 decreases linearly.

[0055] Phase 4 [t3-t4]: such as Figure 6D As shown, Q2 is turned off at time t3. This stage is the dead time of Q1 and Q2. The current of inductor L1 freewheels through the body diode of Q2, which provides the conditions for Q2 to achieve ZVS.

[0056] Phase 5 [t4-t5]: such as Figure 6E As shown, at time t4, Q2 is turned on with ZVS. The current in inductor L1 freewheels through S3 and Q2.

[0057] Phase 6 [t5-t6]: such as Figure 6F As shown, at time t5, S4 is turned off. This stage is the dead time of S1 and S4. The current of inductor L1 freewheels through the body diode of S1, which provides the conditions for ZVS of S1.

[0058] Stage 7 [t6-t7]: such as Figure 6G As shown, at time t6, S1 is turned on with ZVS. The current in inductor L1 increases linearly.

[0059] Stage 8 [t7-t8]: such as Figure 6H As shown, at time t5, Q2 is turned off. This stage is the dead time of Q1 and Q2. The current of inductor L1 freewheels through the body diode of Q1, which provides the conditions for Q1 to achieve ZVS.

[0060] contrast Figure 3 and Figure 5 As can be seen, when the input voltage doubles, the three-level modulation method still ensures that the current flowing through the switching transistor maintains its original variation and magnitude, giving the converter higher voltage withstand capability. When the input voltage is low, a two-level modulation method is used to ensure the converter's conversion accuracy under low input voltage conditions.

[0061] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A three-level six-switch DC-DC converter, characterized in that, include: Three-level unit, DC-DC converter half-bridge and control unit; The three-level unit adopts a three-level half-bridge topology; The DC-DC conversion half-bridge includes a half-bridge structure composed of a fifth switch tube Q1 and a sixth switch tube Q2; the midpoint of the three-level half-bridge topology is connected to the bridge arm midpoint of the half-bridge structure through an inductor L1; the input side of the three-level unit is connected in parallel with an input capacitor C in ; the output side of the DC-DC conversion half-bridge is connected in parallel with an output capacitor C o . The control unit is used to control the three-level six-switch DC-DC converter using a two-level modulation method when the voltage input to the three-level unit is less than a set value; otherwise, it controls the three-level six-switch DC-DC converter using a three-level modulation method. The three-level half-bridge topology includes a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4 connected in sequence, and the connection point of the second switch S2 and the third switch S3 is the midpoint of the three-level half-bridge topology. The two-level modulation method includes: The first switch S1 and the fourth switch S4 are controlled to be in the on state, the second switch S2 and the third switch S3 are controlled to be turned on alternately, and the three-level six-switch DC-DC converter is controlled to realize the DC-DC buck-boost conversion function. Control T s1 = T s2 , among which, T s1 T s2 These are the switching cycles of switches S2 and S3, whose switching states change in the three-level half-bridge topology, and switches Q1 and Q2, whose switching states change in the DC-DC converter half-bridge, respectively. The three-level modulation method includes: The first switch S1 and the fourth switch S4 are controlled to conduct complementaryly, the second switch S2 and the third switch S3 are controlled to conduct complementaryly, the duty cycles of the first switch S1 and the second switch S2 are the same, and the phase shift duty cycle between them is 0.5, thereby controlling the three-level six-switch DC-DC converter to realize the DC-DC buck-boost conversion function; where the phase shift duty cycle refers to the ratio of the phase shift time to the switching period; Control T s1 = 2T s2 , among which, T s1 T s2 These are the switching cycles of the switches S1, S2, S3, and S4 in the three-level half-bridge topology whose switching states change, and the switches Q1 and Q2 in the DC-DC converter half-bridge whose switching states change.

2. The three-level six-switch DC-DC converter as described in claim 1, characterized in that, The control unit is also used to: control the phase shift duty cycle between the DC-DC converter half-bridge and the three-level half-bridge to adjust the freewheeling current of the inductor L1 so that the freewheeling current is equal to the soft-switching critical current.

3. The three-level six-switch DC-DC converter as described in claim 1, characterized in that, The control unit is further configured to: control the duty cycle of the three-level half-bridge and the duty cycle of the DC-DC converter half-bridge, so that the output capacitor C... o The output voltage at both ends is equal to the output voltage command value; where the duty cycle of the three-level half-bridge refers to the duty cycle of the switching transistors S1 and S2, and the duty cycles of S1 and S2 are the same; the duty cycle of the DC-DC converter half-bridge refers to the duty cycle of the switching transistor Q1.

4. The three-level six-switch DC-DC converter as described in claim 1, characterized in that, The three-level half-bridge topology is a diode-clamped three-level topology, a switch-clamped three-level topology, a flying capacitor-type three-level topology, or a hybrid three-level topology of clamping and flying capacitor.

5. The three-level six-switch DC-DC converter as described in claim 1, characterized in that, The source of the fifth switch Q1 is connected to the drain of the sixth switch Q2, and the drain of the fifth switch Q1 is connected to the output capacitor C. o The positive terminal of the sixth switch Q2 is connected to the source of the output capacitor C. o The negative electrode.