Circuit board, functional backboard, backlight module, display panel and display device

Abstract

A circuit board includes a substrate, a conductive pad, and at least one protective layer set. The conductive pad is disposed on the substrate. The at least one protective layer set is disposed on a side of the conductive pad away from the substrate. The protective layer set includes an oxidation protection layer and a palladium alloy layer disposed in a stack, the oxidation protection layer being closer to the substrate than the palladium alloy layer. The material of the oxidation protection layer includes a nickel-based alloy.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular, to a circuit board, a functional backboard, a backlight module, a display panel and a display device. BACKGROUND

[0002] Mini Light-Emitting Diode (Mini LED) refers to an LED device with a chip size of 50 μm-200 μm. The chip size and chip pitch of Mini LED are larger than those of traditional LED and smaller than those of Micro LED. SUMMARY

[0003] In one aspect, a circuit board is provided. The circuit board includes a substrate, a conductive pad, and at least one protective layer group. The conductive pad is disposed on the substrate. The at least one protective layer group is disposed on a side of the conductive pad away from the substrate. The protective layer group includes an oxidation protection layer and a palladium alloy layer stacked, and the oxidation protection layer is closer to the substrate relative to the palladium alloy layer. The material of the oxidation protection layer includes a nickel-based alloy.

[0004] In some embodiments, the nickel-based alloy includes one or more of a nickel-palladium alloy, a copper-nickel alloy, a tungsten-nickel alloy, a nickel-aluminum alloy, a nickel-titanium alloy, a nickel-vanadium alloy, a nickel-zirconium alloy, a nickel-gold alloy, a nickel-yttrium alloy, a nickel-niobium alloy, a nickel-platinum alloy, a nickel-tin alloy, a nickel-silver alloy, and a nickel-tantalum alloy.

[0005] In some embodiments, the thickness of the oxidation protection layer ranges from 0.5 μm to 1.45 μm.

[0006] In some embodiments, the mass fraction of nickel in the material of the oxidation protection layer ranges from 40% to 95%.

[0007] In some embodiments, the thickness of the palladium alloy layer ranges from 0.05 μm to 0.1 μm.

[0008] In some embodiments, the sum of the thickness of the oxidation protection layer and the thickness of the palladium alloy layer ranges from 0.6 μm to 1.5 μm.

[0009] In some embodiments, the circuit board includes a plurality of protective layer groups, and the plurality of protective layer groups are stacked on the side of the conductive pad away from the substrate.

[0010] In some embodiments, the circuit board further includes a protective pad layer disposed between adjacent two protective layer groups.

[0011] In some embodiments, the circuit board further comprises a driving circuit disposed between the substrate and the conductive pad, and the conductive pad is electrically connected with the driving circuit.

[0012] In some embodiments, the circuit board further comprises a trace disposed on the substrate, wherein the conductive pad is located on a side of the trace away from the substrate and is electrically connected with the trace.

[0013] In some embodiments, the trace comprises a first adhesive layer, a first conductive layer and a plated metal layer stacked in a direction perpendicular to and away from the substrate. Alternatively, the trace comprises a first adhesive layer, a first conductive layer, a second conductive layer and an oxidation-resistant conductive layer stacked in a direction perpendicular to and away from the substrate.

[0014] In some embodiments, the material of the first adhesive layer comprises one or more of molybdenum alloy, titanium alloy, tungsten alloy, nickel alloy, molybdenum-based alloy and nickel-based alloy. The materials of the first conductive layer, the second conductive layer and the plated metal layer all comprise copper. The material of the oxidation-resistant conductive layer comprises one or more of molybdenum alloy, titanium alloy, tungsten alloy, nickel alloy, molybdenum-based alloy and nickel-based alloy.

[0015] In some embodiments, the circuit board further comprises at least one insulating layer covering the trace. The conductive pad is electrically connected with the trace through a via hole penetrating through the at least one insulating layer.

[0016] In some embodiments, the at least one insulating layer comprises a first passivation layer, a planarization layer and a second passivation layer stacked in a direction perpendicular to and away from the substrate.

[0017] In some embodiments, the circuit board further comprises a second adhesive layer disposed between the trace and the conductive pad, and the conductive pad is electrically connected with the trace through the second adhesive layer.

[0018] In some embodiments, the material of the second adhesive layer comprises one or more of molybdenum alloy, titanium alloy, tungsten alloy, nickel alloy, molybdenum-based alloy and nickel-based alloy.

[0019] In another aspect, a functional backboard is provided. The functional backboard comprises the circuit board as described in any of the above embodiments, an intermetallic compound layer and a conductive connection layer stacked on the circuit board in a direction perpendicular to and away from the substrate of the circuit board, and an electronic element. The electronic element is electrically connected with the conductive connection layer.

[0020] In some embodiments, the intermetallic compound layer is disposed between the conductive connection layer and a palladium alloy layer of the circuit board. Or, the palladium alloy layer includes a hollowed-out region, a portion of the intermetallic compound layer is located between the palladium alloy layer and the conductive connection layer, and the portion of the intermetallic compound layer is in contact with the oxidation protection layer of the circuit board through the hollowed-out region.

[0021] In some embodiments, a shear strength of the intermetallic compound layer is less than a shear strength of the oxidation protection layer of the circuit board and less than a shear strength of the palladium alloy layer of the circuit board.

[0022] In some embodiments, the functional backplane further includes a first plating layer disposed between the palladium alloy layer and the intermetallic compound layer.

[0023] In some embodiments, the circuit board includes a device region and a bonding region, and the circuit board includes a first conductive pad disposed in the device region and a second conductive pad disposed in the bonding region.

[0024] The electronic component includes a light emitting device bonded with the first conductive pad of the circuit board and a driving circuit board bonded with the second conductive pad of the circuit board.

[0025] In another aspect, a functional backplane is provided. The functional backplane includes a substrate, a conductive pad, an oxidation protection layer, a second plating layer, an intermetallic compound layer, a conductive connection layer, and an electronic component. The conductive pad is disposed on the substrate. The oxidation protection layer, the second plating layer, the intermetallic compound layer, and the conductive connection layer are disposed in a stacking manner along a direction perpendicular to and away from the substrate. The material of the oxidation protection layer includes a nickel-palladium-based alloy. The electronic component is electrically connected with the conductive connection layer.

[0026] In another aspect, a backlight module is provided. The backlight module includes the functional backplane according to any one of the above embodiments.

[0027] In another aspect, a display device is provided. The display device includes a display panel and the backlight module according to the above embodiments. The display panel is disposed on a light emitting side of the backlight module.

[0028] In another aspect, a display panel is provided. The display panel includes the functional backplane according to any one of the above embodiments.

[0029] In another aspect, a display device is provided. The display device includes the display panel according to the above embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0030] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0031] Figure 1 This is a structural diagram of a circuit board according to some embodiments;

[0032] Figure 2A for Figure 1 A cross-sectional view of the circuit board along section line AA';

[0033] Figure 2B for Figure 1 Another cross-sectional view of the circuit board along section line AA';

[0034] Figure 2C for Figure 1 Another cross-sectional view of the circuit board along section line AA';

[0035] Figure 3 for Figure 1 Another cross-sectional view of the circuit board along section line AA';

[0036] Figure 4 for Figure 1 A cross-sectional view of the circuit board along section line BB';

[0037] Figure 5 and Figure 6 This is a structural diagram of another circuit board according to some embodiments;

[0038] Figure 7 This is a structural diagram of a functional backplane according to some embodiments;

[0039] Figure 8 for Figure 7 Equivalent circuit diagram at point M in the functional backplane;

[0040] Figure 9 for Figure 7 A cross-sectional view of the functional back panel along section line CC'.

[0041] Figure 10 A cross-sectional view along section line CC' of another functional back panel according to some embodiments;

[0042] Figure 11 A cross-sectional view along section line CC' of another functional back panel according to some embodiments;

[0043] Figure 12 is a sectional view along section line D-D' of the functional backplane in Figure 7

[0044] Figure 13 is a structural diagram of yet another functional backplane according to some embodiments;

[0045] Figure 14 is a structural diagram of a backlight module according to some embodiments;

[0046] Figure 15 is a structural diagram of a display device according to some embodiments;

[0047] Figure 16 is a structural diagram of a display panel according to some embodiments;

[0048] Figure 17 is a structural diagram of another display device according to some embodiments. DETAILED DESCRIPTION

[0049] The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, and not all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by a person of ordinary skill in the art belong to the scope of protection of the present disclosure.

[0050] Unless otherwise required by context, the term "comprise" and other forms of the term "comprise", such as "comprises" and "comprising", are to be construed as open, inclusive, meaning that "comprising" means "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to mean that the particular feature, structure, material or characteristic associated with that embodiment or example is included in at least one embodiment or example of the present disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics described can be included in any suitable manner in any one or more embodiments or examples.

[0051] ​The terms "first", "second", etc. are used herein only to describe one implementation, and do not imply either an actual order or relative importance of the described features. Thus, a feature defined with "first", "second", etc. can implicitly or explicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "a plurality" is two or more.

[0052] In describing some embodiments, the use of "connected" and "coupled" and variations thereof, is used generically and not as a limitation of the type of joinery used. For example, "connected" and "coupled" are used to indicate either a direct physical or electrical connection between two or more elements, or the use of one or more intermediate elements having the same function.

[0053] "A, B, and C include at least one of" is synonymous with "at least one of A, B, or C," and includes the following combinations: A only, B only, C only, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A and B and C.

[0054] "A and / or B" includes the following three combinations: A alone, B alone, and a combination of A and B.

[0055] The use of "configured to" herein is meant "open and inclusive language" that does not exclude additional devices or steps not specifically recited.

[0056] Additionally, the use of "based on" is meant to be open and inclusive, in that a process, step, calculation, or other action "based on" one or more recited conditions or values may, in practice, be based on additional conditions or values beyond those recited.

[0057] As used herein, "about" or "approximately" means within a range that is acceptable to one of ordinary skill in the art given the measurement being discussed and the error inherent in the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0058] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0059] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0060] In this article, "same layer" refers to a layer structure formed using the same film deposition process to create a specific pattern, and then using the same photomask for a single patterning process. Depending on the specific pattern, the single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the resulting layer structure can be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses. Conversely, "different layers" refers to a layer structure formed using separate film deposition processes to create specific patterns, and then using separate photomasks for a patterning process. For example, "two-layer-different-layer configuration" means that two layer structures are formed separately under corresponding process steps (film deposition process and patterning process).

[0061] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0062] SMT, short for Surface Mount Technology, is a popular technology and process in the electronics assembly industry. It involves placing electronic components with leads on the surface of a substrate with circuitry and conductive pads (also called solder pads), and then assembling them using methods such as reflow soldering or dip soldering. To achieve a secure connection between the electronic component and the conductive pad, solder is applied to the conductive pad on the substrate, or to the leads of the electronic component. The electronic component is then aligned and brought into contact with the conductive pad. For example, the solder is melted and well-wetted at a high temperature of 230°C to 260°C, followed by rapid cooling to achieve a secure connection. The conductive pads are typically made of copper, but copper is prone to oxidation, so surface treatment is required. Surface treatment methods for conductive pads include forming a copper alloy layer on their surface to prevent oxidation. The electronic component is then directly soldered to the copper alloy layer surface using solder. However, the inventors of this disclosure have discovered that during the reflow soldering process, the solder, copper alloy layer, and conductive pads will form an intermetallic compound (IMC). The thickness and composition of the IMC are functionally related to the soldering process time, temperature, and application conditions, and will cause changes in the internal stress at the material bonding joint. Generally, as the thickness of the IMC increases, the internal stress gradually increases, causing the contact area (soldering point) between the electronic component and the conductive pad to become brittle or even break, thereby affecting the connection strength and reliability of the two.

[0063] Specifically, during reflow soldering, intermetallic compounds rapidly form between the solder and the copper alloy layer and conductive pads. The solder is in direct contact with the copper alloy layer and conductive pads, and the copper in the copper alloy layer and conductive pads reacts with the tin in the solder to form Cu. x Sn y A series of "transiently stable" intermetallic compounds, including Cu x Sn y In the given information, x = 3, 4, 5, 6, and y = 2, 3, 4, 5, these are Cu... x Sn y The thickness and thickness ratio of the series of intermetallic compounds vary with the temperature, time, environment and usage conditions of the welding process. Among them, Cu3Sn2 intermetallic compound is located in the region furthest from the solder, while Cu6Sn5 intermetallic compound is located in the region closest to the solder. Cu3Sn2 intermetallic compound has poor weldability, while Cu6Sn5 intermetallic compound has weldability, but its thickness is relatively thin, resulting in lower connection strength and poorer reliability of the weld joint.

[0064] And, in the case of a virtual soldering or a welding position deviation of the electronic component, a lateral shearing force needs to be applied to remove the electronic component and re-solidly weld it in the correct position, and the conductive pad can be damaged in the process of removing the electronic component, resulting in the conductive pad being unable to be welded with the electronic component again.

[0065] In addition, the surface treatment of the conductive pad also includes adopting a chemical nickel plating process, first performing pickling on the substrate base plate with the circuit and the conductive pad, and then placing the substrate base plate in a solution mainly composed of nickel sulfate, sodium hypophosphite (a reducing agent to reduce nickel ions to metallic nickel), and a complexing agent to generate a layer of phosphorus-nickel alloy on the surface of the conductive pad. Since the phosphorus-nickel alloy layer is still prone to oxidation, the soldering with the oxidized phosphorus-nickel alloy layer is difficult and unreliable, and therefore the substrate base plate needs to be finally immersed in a gold ion solution to form a gold immersion layer on the surface of the phosphorus-nickel alloy layer. The gold particles in the gold immersion layer can fill the gaps in the nickel-gold plating layer to reduce the probability of oxidation of the phosphorus-nickel alloy layer, thereby reducing the degree of oxidation of the conductive pad. In this way, the electronic component is directly soldered on the surface of the nickel-gold plating layer. However, the inventors of the present disclosure found that the chemical nickel plating process has the following phenomena:

[0066] (1) The mass percentage of phosphorus in the nickel-gold plating layer affects the quality of the substrate base plate: for example, when the mass percentage of phosphorus in the nickel-gold plating layer is less than 7% or greater than 11%, the quality of the substrate base plate is poor; when the mass percentage of phosphorus in the nickel-gold plating layer is greater than or equal to 7% and less than or equal to 11%, the quality of the substrate base plate is good. The mass percentage of phosphorus in the nickel-gold plating layer is related to the phosphorus content in the solution, but the phosphorus content in the solution during the chemical nickel plating process is in a state of change (sodium hypophosphite is reduced), resulting in a change in the mass percentage of phosphorus in the nickel-gold plating layer. Therefore, it is necessary to adjust or replace the solution to ensure the phosphorus content in the solution, which increases the difficulty of the chemical nickel plating process.

[0067] (2) The nickel-gold plating layer needs to be set to a relatively large thickness: the structure of the nickel-gold plating layer is sheet-shaped in the plane direction of the nickel-gold plating layer, so that the porosity of the nickel-gold plating layer is relatively large. Therefore, the thickness of the nickel-gold plating layer needs to be set to be relatively large, for example, greater than or equal to 3 μm (for high reliability applications, the thickness of the nickel-gold plating layer should be greater than or equal to 5 μm), to avoid the diffusion between tin in the solder (and gold in the gold immersion layer, which will be described below) and copper in the conductive pad to form intermetallic compounds, and thus avoid the damage to the conductive pad in the process of removing the electronic component. However, the too thick nickel-gold plating layer is not conducive to the application in the high frequency (characteristic impedance control) field.

[0068] (3) The covering effect of the immersion gold layer affects the appearance and quality of the substrate: As mentioned above, the solution in the gold plating process is unstable, and the porosity of the nickel-gold layer is large. In addition, the atomic radius of the gold particles in the immersion gold layer is large. If the substrate is immersed in the gold ion solution for a short time, the thickness of the immersion gold layer is small, for example, the thickness of the immersion gold layer is less than or equal to 0.03 μm. The gold particles in the immersion gold layer cannot fill the gaps in the nickel-gold layer, and the immersion gold layer cannot cover the nickel-gold layer. This can cause the nickel-gold layer to be oxidized, for example, the nickel-gold layer forms "black spots", "black spots" or color fluctuations (whitening), which affects the appearance of the substrate and the reliability of the soldering. In addition, the diffusion between the gold in the immersion gold layer and the copper in the conductive pad can form intermetallic compounds, which can diffuse with the copper through the nickel layer gaps, and can damage the conductive pad during the removal of the electronic component.

[0069] (4) The gold plating process includes an acid pickling step, which can remove the oxidized part of the conductive pad surface. However, the unoxidized part of the conductive pad is also corroded during the acid pickling process, resulting in the loss of part of the conductive pad. In addition, the gold plating process has a high cost and causes serious environmental pollution.

[0070] To solve the above problems, as shown in Figure 1 and Figure 2A Some embodiments of the present disclosure provide a circuit board 100, which includes a substrate 1, a conductive pad 2 and at least one protective layer group 30.

[0071] Exemplarily, the material of the substrate 1 can be selected from any one of plastic, FR-4 grade material, resin, glass, quartz, polyimide, PMMA, etc.

[0072] As shown in Figure 2A , the conductive pad 2 is arranged on the substrate 1, and the conductive pad 2 is configured to be electrically connected to the electronic component to transmit electrical signals to the electronic component.

[0073] Exemplarily, the material of the conductive pad 2 includes copper.

[0074] As shown in Figure 2A , the at least one protective layer group 30 is arranged on the side of the conductive pad 2 away from the substrate 1, and the protective layer group 30 includes an oxidation protection layer 3 and a palladium alloy layer 4 arranged in layers, and the oxidation protection layer 3 is closer to the substrate 1 than the palladium alloy layer 4. The material of the oxidation protection layer 3 includes a nickel-based alloy, which has good adhesion with copper, and the oxidation protection layer 3 can prevent the oxidation of the conductive pad 2 and protect the conductive pad 2.

[0075] It should be noted that "nickel-based alloy" refers to a nickel-based metal doped with other metals.

[0076] Exemplarily, the nickel-based alloy includes one or more of a nickel-palladium alloy, a nickel-copper alloy, a nickel-tungsten alloy, a nickel-aluminum alloy, a nickel-titanium alloy, a nickel-vanadium alloy, a nickel-zirconium alloy, a nickel-gold alloy, a nickel-yttrium alloy, a nickel-niobium alloy, a nickel-platinum alloy, a nickel-tin alloy, a nickel-silver alloy, and a nickel-tantalum alloy.

[0077] As shown in FIG. 1, the palladium alloy layer 4 is disposed on the side of the oxidation protection layer 3 away from the substrate 1. Figure 2A

[0078] It should be noted that the "palladium alloy layer 4" refers to an alloy formed by doping a small amount of other metals into palladium as a base metal, and the small amount of other metals can be ignored. The atomic radius of palladium in the palladium alloy layer 4 is small, and palladium is easy to fill the gaps in the oxidation protection layer 3 (nickel-based alloy) and cover the surface of the oxidation protection layer 3. The palladium alloy layer 4 can serve as a dense protective layer for the oxidation protection layer 3.

[0079] In addition, the conductive pad 2, the oxidation protection layer 3, and the palladium alloy layer 4 can all be formed by a magnetron sputtering process, avoiding the corresponding problems brought by a chemical gold process.

[0080] The circuit board 100 provided by the above embodiments of the present disclosure has the advantages that the atomic radius of palladium in the palladium alloy layer 4 is small, and palladium is easy to fill the gaps in the oxidation protection layer 3 (nickel-based alloy) and cover the surface of the oxidation protection layer 3. The palladium alloy layer 4 can serve as a dense protective layer for the oxidation protection layer 3.

[0081] In the process of fixing and connecting the electronic component and the conductive pad by solder, the solder can form an intermetallic compound with the palladium alloy layer 4. The palladium alloy layer 4 can block the solder from contacting the conductive pad 2 through the gaps in the oxidation protection layer 3, avoiding the formation of an intermetallic compound between the solder and the conductive pad 2. Due to the shear strength of the intermetallic compound, the shear strength of the intermetallic compound is smaller than that of the solidified solder, the palladium alloy layer 4, the oxidation protection layer 3, and the conductive pad 2. In the process of removing the electronic component, the intermetallic compound will be broken at the intermetallic compound, which may remove part of the palladium alloy layer 4, but will not remove the conductive pad 2, thereby avoiding the damage of the conductive pad 2, facilitating the re-soldering of the electronic component on the conductive pad 2, improving the repair ability and number of times (repairable rate) of the circuit board 100, reducing the scrap rate of the circuit board 100, and improving the cumulative yield (Cum Yield).

[0082] In addition, the melting point of palladium is high (the melting point of palladium is 1552°C, which is about 500°C higher than that of gold), and palladium also has a non-oxidation effect and high stability. Therefore, the palladium alloy layer 4 can prevent the oxidation of the nickel-based alloy in the oxidation protection layer 3.

[0083] ​In addition, the palladium alloy layer 4 serves as a dense protective layer of the oxidation protection layer 3, and in the process of fixedly connecting the electronic component and the conductive pad by solder, the palladium alloy layer 4 can prevent the solder from contacting the conductive pad 2 through the gap in the oxidation protection layer 3, so that the oxidation protection layer 3 does not need to be set to be thick to prevent the solder, and the palladium alloy layer 4 is set to be thin to form a dense protection for the oxidation protection layer 3, which is conducive to reducing the material cost of the circuit board 100 and is conducive to the application of the circuit board 100 in the high-frequency circuit field.

[0084] In some embodiments, as shown in FIG. 1, the circuit board 100 includes a plurality of protective layer groups 30, and the plurality of protective layer groups 30 are stacked on the side of the conductive pad 2 away from the substrate 1. Figure 2B

[0085] It can be understood that in the process of fixedly connecting the electronic component and the conductive pad by solder, the solder can form an intermetallic compound with the palladium alloy layer 4 in the uppermost protective layer group 30, and the plurality of protective layer groups 30 can improve the blocking effect on the solder, thereby avoiding the formation of an intermetallic compound between the solder and the conductive pad 2.

[0086] In addition, in the process of removing the electronic component, the intermetallic compound can be broken at the intermetallic compound, which can take away part of the palladium alloy layer 4 in the uppermost protective layer group 30, and the oxidation protection layer 3 and other protective layer groups 30 below the palladium alloy layer 4 can be retained. In the process of re-soldering the electronic component, the solder can form an intermetallic compound with the oxidation protection layer 3. It can be seen that the plurality of protective layer groups 30 arranged above the conductive pad 2 can be removed and re-soldered multiple times without damaging the conductive pad 2, thereby further improving the repair ability and times of the circuit board 100.

[0087] In some embodiments, as shown in FIG. 1, the circuit board 100 further includes a protective pad layer L, and the protective pad layer L is arranged between two adjacent protective layer groups 30. Figure 2C

[0088] Exemplarily, the material of the protective pad layer L can include copper.

[0089] Exemplarily, the thickness of the protective pad layer L ranges from 1 μm to 10 μm. For example, the thickness of the protective pad layer L is 5 μm. or

[0090] It can be understood that in the process of fixedly connecting the electronic component and the conductive pad by solder, the protective pad layer L can further improve the blocking effect on the solder, thereby avoiding the formation of an intermetallic compound between the solder and the conductive pad 2.

[0091] ​​And even if the high temperature in the reflow soldering process melts the protective layer group 30 above the protective pad layer L, the solder can form an intermetallic compound with the protective pad layer L. Thus, in the process of removing the electronic component, the intermetallic compound can be broken, which can take away part of the protective pad layer L, and the protective layer group 30 below the protective pad layer L can be retained. In the process of re-soldering the electronic component, the solder can form an intermetallic compound with the protective layer group 30 below the protective pad layer L, thereby improving the repairability and number of times of the circuit board 100.

[0092] In some embodiments, as shown in FIG. 1, the thickness of the oxidation protection layer 3 is in the range of 0.5 μm to 1.45 μm. For example, the thickness of the oxidation protection layer 3 is 0.5 μm, 0.7 μm, 0.9 μm, 1.3 μm, or 1.45 μm. Figure 2A

[0093] In the related art, the thickness of the nickel-plated gold layer needs to be greater than or equal to 3 μm to effectively prevent the solder from passing through the gap in the nickel-plated gold layer and contacting the conductive pad. In the above embodiments of the present disclosure, since the palladium alloy layer 4 serves as a dense protective layer for the oxidation protection layer 3, the thickness of the oxidation protection layer 3 is close to 1 μm, which reduces the thickness of the oxidation protection layer 3, reduces the material cost of the oxidation protection layer 3, and is beneficial to the application of the circuit board 100 in the high-frequency circuit field.

[0094] In some embodiments, as shown in FIG. 1, the mass percentage of nickel in the material of the oxidation protection layer 3 is in the range of 40% to 95%. For example, the mass percentage of nickel is 40%, 60%, 67.5%, 80%, or 95%. Figure 2A The inventors of the present disclosure have found through experiments that when the mass percentage of nickel in the material of the oxidation protection layer 3 is in the range of 40% to 95%, the oxidation protection layer 3 has good oxidation resistance to prevent the oxidation of the conductive pad 2.

[0095] In some embodiments, as shown in FIG. 1, the thickness of the palladium alloy layer 4 is in the range of 0.05 μm to 0.1 μm. For example, the thickness of the palladium alloy layer 4 is 0.05 μm, 0.06 μm, 0.075 μm, 0.08 μm, or 0.1 μm.

[0096] Figure 2A

[0097] ​​​It can be understood that, compared with the atomic radius of gold, the atomic radius of palladium in the palladium alloy layer 4 is smaller, and palladium is easy to fill the gaps in the oxidation protection layer 3 (nickel-based alloy) and cover the surface of the oxidation protection layer 3, so that the palladium alloy layer 4 can be arranged to be thinner, for example, the thickness of the palladium alloy layer 4 is at least 0.05 μm, which can form a dense protection for the oxidation protection layer 3, and is conducive to the application of the circuit board 100 in the high-frequency circuit field. Moreover, the specific gravity of palladium is 3% of that of gold, and the price of palladium is about half of that of gold, compared with forming a gold immersion layer on the surface of the oxidation protection layer 3, the material cost of the palladium alloy layer 4 is lower.

[0098] In some embodiments, as shown in Figure 2A , the sum of the thickness of the oxidation protection layer 3 and the thickness of the palladium alloy layer 4 ranges from 0.6 μm to 1.5 μm.

[0099] Exemplarily, the sum of the thickness of the oxidation protection layer 3 and the thickness of the palladium alloy layer 4 is 0.6 μm, 0.8 μm, 1 μm, 1.3 μm or 1.5 μm.

[0100] In the above embodiments of the present disclosure, the oxidation protection layer 3 and the palladium alloy layer 4 can play a role in protecting the conductive pad 2 and preventing the conductive pad 2 from being oxidized. After the electronic component is welded, the conductive pad 2 can be protected during the process of removing the electronic component to avoid damage to the conductive pad 2. Moreover, the sum of the thickness of the oxidation protection layer 3 and the thickness of the palladium alloy layer 4 is small, which is conducive to reducing the material cost of the circuit board 100 and is conducive to the application of the circuit board 100 in the high-frequency circuit field.

[0101] In some embodiments, as shown in Figure 5 , the circuit board 100 further includes a driving circuit Q arranged on the substrate 1, that is, the circuit board 100 is an active circuit board.

[0102] It can be understood that, referring to Figure 5 , the circuit board 100 includes a plurality of gate lines G and a plurality of data lines D arranged on the substrate 1, and the driving circuit Q is electrically connected with the gate lines G and the data lines D. Under the control of a gate scanning signal from the gate lines G, the driving circuit Q receives a data signal from the data lines D and outputs a driving signal.

[0103] Exemplarily, as shown in Figure 5 , the driving circuit Q is a 2T1C driving circuit, that is, the driving circuit Q includes two thin film transistors T and one capacitor C.

[0104] As shown in Figure 6 , the driving circuit Q is located between the substrate 1 and the conductive pad 2, and the conductive pad 2 is electrically connected with the driving circuit Q.

[0105] It can be understood that, Figure 6The diagram shows the driving transistor DT in the thin-film transistor T of the driving circuit Q. The driving transistor DT is located between the substrate 1 and the conductive pad 2, and the conductive pad 2 is electrically connected to the driving transistor DT. The driving transistor DT of the driving circuit Q outputs a driving signal, which can be transmitted to electronic components through the conductive pad 2.

[0106] In some embodiments, such as Figure 1 and Figure 2A As shown, the circuit board 100 also includes a trace 5 disposed on the substrate 1, and a conductive pad 2 is located on the side of the trace 5 away from the substrate 1 and is electrically connected to the trace 5.

[0107] Understandable Figure 1 The circuit board 100 shown is a passive circuit board, and no driving circuit is provided on the circuit board 100. The trace 5 receives the driving signal from the outside and transmits the driving signal to the electronic components through the conductive pad 2.

[0108] For example, such as Figure 1 As shown, trace 5 includes anode trace 5a and cathode trace 5b.

[0109] In some embodiments, such as Figure 2A As shown, the trace 5 includes a first adhesive layer 51, a first conductive layer 52, a second conductive layer 53, and an anti-oxidation conductive layer 54 stacked together. The first adhesive layer 51, the first conductive layer 52, the second conductive layer 53, and the anti-oxidation conductive layer 54 are sequentially arranged along a direction Z perpendicular to the substrate 1 and away from the substrate 1.

[0110] For example, the material of the first adhesive layer 51 includes one or more of molybdenum alloys, titanium alloys, tungsten alloys, nickel alloys, molybdenum-based alloys, and nickel-based alloys. The molybdenum-based alloy may include molybdenum-niobium alloys, molybdenum-titanium alloys, molybdenum-tungsten alloys, or molybdenum-tantalum alloys. The nickel-based alloy may include copper-nickel-palladium alloys, nickel-palladium alloys, tungsten-nickel-palladium alloys, nickel-aluminum-palladium alloys, or nickel-titanium-palladium alloys.

[0111] For example, the thickness range of the first adhesive layer 51 is [missing information]. For example, the thickness of the first adhesive layer 51 is or

[0112] A first adhesive layer 51 is formed on a substrate 1 using a magnetron sputtering process. This layer can be used to bond the first conductive layer 52 and the second conductive layer 53 to the substrate 1, thereby improving the bonding strength between the first conductive layer 52, the second conductive layer 53 and the substrate 1.

[0113] For example, the materials of the first conductive layer 52 and the second conductive layer 53 both include copper.

[0114] Exemplarily, the sum of the thickness of the first conductive layer 52 and the thickness of the second conductive layer 53 ranges from 1 μm to 5 μm, for example, the sum of the thickness of the first conductive layer 52 and the thickness of the second conductive layer 53 is 1 μm, 2 μm, 3 μm, 4 μm or 5 μm.

[0115] The first conductive layer 52 and the second conductive layer 53 are formed successively on the side of the first adhesive layer 51 away from the substrate 1 by a magnetron sputtering process, and the first conductive layer 52 and the second conductive layer 53 are patterned to form the trace 5, the first conductive layer 52 and the second conductive layer 53 serving as the main part of the trace 5.

[0116] Exemplarily, the material of the oxidation-preventing conductive layer 54 includes one or more of molybdenum alloy, titanium alloy, tungsten alloy, nickel alloy, molybdenum-based alloy and nickel-based alloy. The molybdenum-based alloy can include molybdenum-niobium alloy, molybdenum-titanium alloy, molybdenum-tungsten alloy or molybdenum-tantalum alloy. The nickel-based alloy can include copper-nickel-palladium alloy, nickel-palladium alloy, tungsten-nickel-palladium alloy, nickel-aluminum-palladium alloy or nickel-titanium-palladium alloy.

[0117] The oxidation-preventing conductive layer 54 is formed on the side of the second conductive layer 53 away from the substrate 1 by a magnetron sputtering process, and the oxidation-preventing conductive layer 54 can prevent the second conductive layer 53 from being oxidized.

[0118] In some embodiments, as shown in FIG. 1, the trace 5 includes the first adhesive layer 51, the first conductive layer 52 and the plated metal layer 55 arranged in layers. Figure 3 As shown in FIG. 1, the first adhesive layer 51, the first conductive layer 52 and the plated metal layer 55 are arranged in sequence in the direction Z perpendicular to the substrate 1 and away from the substrate 1.

[0119] Exemplarily, the thickness of the first adhesive layer 51 ranges from 0.1 μm to 1 μm. For example, the thickness of the first adhesive layer 51 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. For example, the thickness of the first adhesive layer 51 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm.

[0120] The first adhesive layer 51 is formed on the substrate 1 by a magnetron sputtering process, which can be used to adhere the first conductive layer 52 to the substrate 1, thereby improving the adhesion strength of the first conductive layer 52 to the substrate 1.

[0121] Exemplarily, the material of the first conductive layer 52 includes copper.

[0122] Exemplarily, the thickness of the first conductive layer 52 ranges from 0.1 μm to 1 μm. For example, the thickness of the first conductive layer 52 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. For example, the thickness of the first conductive layer 52 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. For example, the thickness of the first conductive layer 52 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm.

[0123] Exemplarily, the material of the plated metal layer 55 includes copper.

[0124] Exemplarily, the thickness of the electroplated metal layer 55 ranges from 1 μm to 5 μm, for example, the thickness of the electroplated metal layer 55 is 1 μm, 2 μm, 3 μm, 4 μm or 5 μm.

[0125] The first conductive layer 52 is formed on the side of the first adhesive layer 51 away from the substrate 1 by a magnetron sputtering process, and the electroplated metal layer 55 is formed on the side of the first conductive layer 52 away from the substrate 1 by an electroplating process. The first conductive layer 52 and the electroplated metal layer 55 are patterned to form the trace 5, and the first conductive layer 52 and the electroplated metal layer 55 serve as the main part of the trace 5.

[0126] In some embodiments, as shown in Figure 1 and Figure 2A , the circuit board 100 further comprises at least one insulating layer 6 covering the trace 5. The conductive pad 2 is electrically connected to the trace 5 through a via hole H penetrating the at least one insulating layer 6.

[0127] It should be noted that, referring to Figure 1 and Figure 2A , the circuit board 100 further comprises a connection line 20, which is made of the same material as the conductive pad 2 and is arranged in the same layer. That is, the conductive pad 2 is electrically connected to the connection line 20, and the connection line 20 is electrically connected to the trace 5 through a via hole H penetrating the at least one insulating layer 6, thereby realizing the electrical connection between the conductive pad 2 and the trace 5.

[0128] Exemplarily, as shown in Figure 2A , the at least one insulating layer 6 comprises a first passivation layer 61, a planarization layer 62 and a second passivation layer 63 arranged in layers. The first passivation layer 61, the planarization layer 62 and the second passivation layer 63 are arranged in sequence along the direction Z perpendicular to the substrate 1 and away from the substrate 1.

[0129] Exemplarily, the material of the first passivation layer 61 and the second passivation layer 63 comprises silicon nitride.

[0130] Exemplarily, the thickness of the first passivation layer 61 ranges from 0.1 μm to 1 μm, for example, the thickness of the first passivation layer 61 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. For example, the thickness of the first passivation layer 61 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. or The thickness of the second passivation layer 63 ranges from 0.1 μm to 1 μm, for example, the thickness of the second passivation layer 63 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. For example, the thickness of the second passivation layer 63 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm. or

[0131] Exemplarily, the first passivation layer 61 and the second passivation layer 63 can be formed by a chemical vapor deposition (CVD) process.

[0132] Exemplarily, the material of the planarization layer 62 comprises resin.

[0133] In some embodiments, as shown in FIG. 1, the circuit board 100 further comprises a third passivation layer 8, which is located on the side of the second passivation layer 63 away from the substrate 1, and has an opening 80 exposing the conductive pad 2, and the oxidation protection layer 3 and the palladium alloy layer 4 located above the conductive pad 2, so as to facilitate soldering of electronic components. Figure 2A

[0134] Exemplarily, the material of the third passivation layer 8 comprises silicon nitride.

[0135] Exemplarily, the thickness of the third passivation layer 8 ranges from 0.1 μm to 1 μm. For example, the thickness of the third passivation layer 8 is 0.5 μm or 1 μm. or

[0136] Exemplarily, the third passivation layer 8 can be formed by a chemical vapor deposition process.

[0137] In some embodiments, as shown in FIG. 1, the circuit board 100 further comprises a second adhesive layer 7, which is arranged between the trace 5 and the conductive pad 2. The conductive pad 2 is electrically connected to the trace 5 through the second adhesive layer 7. Figure 2A It should be noted that, referring to FIGS. 1 and 2, the material of the conductive pad 2 is the same as that of the connection line 20 and is arranged in the same layer, and the connection line 20 is electrically connected to the trace 5 through the second adhesive layer 7, so as to realize the electrical connection between the conductive pad 2 and the trace 5.

[0138] Figure 1 Figure 2A Exemplarily, the material of the second adhesive layer 7 comprises one or more of molybdenum alloy, titanium alloy, tungsten alloy, nickel alloy, molybdenum-based alloy and nickel-based alloy. The molybdenum-based alloy can comprise molybdenum-niobium alloy, molybdenum-titanium alloy, molybdenum-tungsten alloy or molybdenum-tantalum alloy. The nickel-based alloy can comprise copper-nickel-palladium alloy, nickel-palladium alloy, tungsten-nickel-palladium alloy, nickel-aluminum-palladium alloy or nickel-titanium-palladium alloy.

[0139] Exemplarily, the thickness of the second adhesive layer 7 ranges from 0.1 μm to 1 μm. For example, the thickness of the second adhesive layer 7 is 0.5 μm or 1 μm.

[0140] or Exemplarily, the second adhesive layer 7 can be formed by a magnetron sputtering process on the side of the trace 5 away from the substrate 1, so as to adhere the conductive pad 2 to the trace 5 of the circuit board 100, thereby improving the adhesion strength between the conductive pad 2 and the trace 5.

[0141] In some embodiments, as shown in FIG. 1, the circuit board 100 further comprises a second adhesive layer 7, which is arranged between the trace 5 and the conductive pad 2. The conductive pad 2 is electrically connected to the trace 5 through the second adhesive layer 7.

[0142] It should be noted that, referring to FIGS. 1 and 2, the material of the conductive pad 2 is the same as that of the connection line 20 and is arranged in the same layer, and the connection line 20 is electrically connected to the trace 5 through the second adhesive layer 7, so as to realize the electrical connection between the conductive pad 2 and the trace 5. Figure 1 ​​​As shown, the circuit board 100 includes a device area AA and a binding area BA. Exemplarily, the binding area BA is located on one side of the device area AA.

[0143] As shown in Figure 1 , Figure 2A and Figure 4 , the circuit board 100 includes a first conductive pad 21 disposed on the device area AA, and a second conductive pad 22 disposed on the binding area BA. Exemplarily, the first conductive pad 21 is configured to bind with the light emitting device, and the second conductive pad 22 is configured to bind with the driving circuit board.

[0144] It can be understood that the first conductive pad 21 and the second conductive pad 22 are both electrically connected with the wire 5. The driving circuit board can generate and output a driving signal, which is transmitted to the wire 5 through the second conductive pad 22, and is transmitted to the light emitting device through the wire 5 and the first conductive pad 21.

[0145] As shown in Figures 7-9 , some embodiments of the present disclosure provide a functional backboard 200, which includes the circuit board 100 in any of the above embodiments, and an intermetallic compound layer 9 and a conductive connection layer 10 stacked on the circuit board 100 in a direction Z perpendicular to and away from the substrate 1 of the circuit board 100.

[0146] As shown in Figures 7-9 , the functional backboard 200 further includes an electronic element E electrically connected with the conductive connection layer 10.

[0147] Exemplarily, the electronic element E includes at least one pin, and the pin of the electronic element E is welded with the conductive connection layer 10.

[0148] Exemplarily, the electronic element E can include a micro integrated circuit, a micro light emitting device, or a sensor chip, etc.

[0149] It can be understood that, in the process of fixing the electronic element E with the conductive pad by solder, the solder can form an intermetallic compound layer 9 with the conductive film layer (palladium alloy layer 4 or oxidation protection layer 3) above the conductive pad 2 in the circuit board 100, and the film layer formed after the solder solidifies is the conductive connection layer 10. The material of the solder at least includes tin, silver and other metal materials.

[0150] In addition, the shear strength of the intermetallic compound layer 9 is less than the shear strength of the oxidation protection layer 3 of the circuit board 100, and less than the shear strength of the palladium alloy layer 4 of the circuit board 100.

[0151] In the process of fixing and connecting the electronic component E and the conductive pad by the solder, the solder can form the intermetallic compound layer 9 with the palladium alloy layer 4 or the oxidation protection layer 3, and the palladium alloy layer 4 and the oxidation protection layer 3 can block the solder from contacting the conductive pad 2, thereby avoiding the solder from forming the intermetallic compound with the conductive pad 2. In this way, since the shear strength of the intermetallic compound layer 9 is relatively small, the intermetallic compound layer 9 can be broken in the process of removing the electronic component E, and a part of the palladium alloy layer 4 or the oxidation protection layer 3 can be taken away, but the conductive pad 2 will not be taken away, thereby avoiding the damage of the conductive pad 2, facilitating the re-soldering of the electronic component E on the conductive pad 2, and improving the maintainability of the functional backboard 200.

[0152] In some embodiments, as shown in Figure 9 and Figure 10 , the intermetallic compound layer 9 is arranged between the conductive connection layer 10 and the palladium alloy layer 4 of the circuit board 100.

[0153] It can be understood that, in the process of fixing and connecting the electronic component E and the conductive pad by the solder, the solder forms the intermetallic compound layer 9 with the palladium alloy layer 4, and the palladium alloy layer 4 and the oxidation protection layer 3 can block the solder from contacting the conductive pad 2, thereby avoiding the solder from forming the intermetallic compound with the conductive pad 2.

[0154] In some embodiments, as shown in Figure 11 , the palladium alloy layer 4 includes a hollow area L, a part of the intermetallic compound layer 9 is located between the palladium alloy layer 4 and the conductive connection layer 10, and a part of the intermetallic compound layer 9 contacts the oxidation protection layer 3 of the circuit board 100 through the hollow area L in the palladium alloy layer 4.

[0155] It can be understood that, referring to Figure 11 , in the process of fixing and connecting the electronic component E and the conductive pad by the solder, the high temperature can melt a part of the palladium alloy layer 4 to form the hollow area L, and the hollow area L can expose a part of the surface of the oxidation protection layer 3. In this case, the solder forms the intermetallic compound with the part of the palladium alloy layer 4 which is not melted, i.e. the part of the intermetallic compound layer 9 located between the palladium alloy layer 4 and the conductive connection layer 10. In addition, the solder can also form the intermetallic compound with the oxidation protection layer 3 through the hollow area L, i.e. the part of the intermetallic compound layer 9 which contacts the oxidation protection layer 3 through the hollow area L in the palladium alloy layer 4.

[0156] In some embodiments, as shown in Figure 10 and Figure 11 , the functional backboard 200 further includes a first plating layer 11, and the first plating layer 11 is arranged between the palladium alloy layer 4 and the intermetallic compound layer 9.

[0157] It can be understood that, referring toFigure 10 In the process of fixedly connecting the electronic component E and the conductive pad by solder, the high temperature can cause part of the palladium alloy layer 4 to melt, but the palladium alloy layer 4 does not form a hollow area, and the palladium alloy layer 4 does not expose the oxidation protection layer 3. In this case, the solder forms an intermetallic compound layer 9 with the palladium alloy layer 4, the part of the palladium alloy layer 4 that melts forms a first plating layer 11, and the first plating layer 11 is formed between the intermetallic compound layer 9 and the palladium alloy layer 4.

[0158] Reference Figure 11 In the process of fixedly connecting the electronic component E and the conductive pad by solder, the high temperature can cause part of the palladium alloy layer 4 to melt and form a hollow area L, and the hollow area L can expose part of the surface of the oxidation protection layer 3. In this case, the solder forms an intermetallic compound layer 9 with the palladium alloy layer 4 and the oxidation protection layer 3, the part of the palladium alloy layer 4 that melts forms a first plating layer 11, and the first plating layer 11 is formed between the intermetallic compound layer 9 and the palladium alloy layer 4.

[0159] Exemplarily, the thickness of the first plating layer 11 ranges from 0.05 μm to 0.1 μm, for example, the thickness of the first plating layer 11 is 0.05 μm, 0.06 μm, 0.075 μm, 0.08 μm, or 0.1 μm.

[0160] Through the above arrangement, the first plating layer 11 is arranged between the palladium alloy layer 4 and the intermetallic compound layer 9, and the first plating layer 11 can also block the solder from contacting the conductive pad 2, avoiding the formation of an intermetallic compound between the solder and the conductive pad 2, and further protecting the conductive pad 2.

[0161] In some embodiments, as shown in Figures 7-9 The electronic component E includes a light emitting device 12, the light emitting device 12 is bound to the first conductive pad 21 on the circuit board 100, and the light emitting device 12 can emit light under the drive of the electrical signal from the first conductive pad 21. The light emitting device 12 can be an LED chip, for example, the light emitting device 12 can be a Mini LED chip or a Micro LED chip.

[0162] The plurality of light emitting devices 12 are arranged in an array, for example, four light emitting devices 12 form a group, see Figure 8 The equivalent circuit diagram shown in, the four light emitting devices 12 in a group of light emitting devices 12 are connected in a manner of “two in series and two in parallel”, two light emitting devices 12 are connected in series, and the other two light emitting devices 12 are also connected in series, and the two series-connected light emitting devices 12 are connected in parallel with the other two series-connected light emitting devices 12.

[0163] As shown in Figure 1 and Figure 7 The light emitting devices 12 are electrically connected by the connecting line 20.

[0164] As shown in Figure 7 and Figure 12 shown, the electronic component E further comprises a driving circuit board 13, the driving circuit board 13 is bound with the second conductive pad 22 on the circuit board 100 to input a driving signal to the circuit board 100 through the second conductive pad 22.

[0165] As shown in Figure 13 some embodiments of the present disclosure further provide a functional backboard 200, the functional backboard 200 comprises a substrate 1, a conductive pad 2, an oxidation protection layer 3, a second plating layer 14, an intermetallic compound layer 9, a conductive connection layer 10 and an electronic component E, the electronic component E is electrically connected with the conductive connection layer 10.

[0166] As shown in Figure 13 the conductive pad 2 is arranged on the substrate 1, and the conductive pad 2 is configured to be electrically connected with the electronic component E to transmit an electrical signal to the electronic component E.

[0167] Exemplarily, the material of the conductive pad 2 comprises copper.

[0168] As shown in Figure 13 in the direction Z perpendicular to the substrate 1 and away from the substrate 1, the oxidation protection layer 3, the second plating layer 14, the intermetallic compound layer 9 and the conductive connection layer 10 are sequentially stacked.

[0169] Among them, the material of the oxidation protection layer 3 comprises a nickel-palladium-based alloy, the adhesion of the nickel-palladium-based alloy to copper is good, and the oxidation protection layer 3 can prevent the oxidation of the conductive pad 2 and protect the conductive pad 2.

[0170] It should be noted that the "nickel-palladium-based alloy" refers to doping other metals based on nickel and palladium.

[0171] Exemplarily, the nickel-palladium-based alloy comprises one or more of nickel-palladium alloy, copper-nickel-palladium alloy, tungsten-nickel-palladium alloy, nickel-aluminum-palladium alloy, nickel-titanium-palladium alloy, nickel-vanadium-palladium alloy, nickel-zirconium-palladium alloy, nickel-gold-palladium alloy, nickel-yttrium-palladium alloy, nickel-niobium-palladium alloy, nickel-platinum-palladium alloy, nickel-tin-palladium alloy, nickel-silver-palladium alloy, nickel-tantalum-palladium alloy.

[0172] Exemplarily, the thickness of the oxidation protection layer 3 ranges from 0.6 μm to 1.5 μm, for example, the thickness of the oxidation protection layer 3 is 0.6 μm, 0.8 μm, 1 μm, 1.3 μm or 1.5 μm.

[0173] It can be understood that, in the process of fixing and connecting the electronic component E and the conductive pad by the solder, the solder can form an intermetallic compound layer 9 with the oxidation protection layer 3, and the film layer formed after the solder solidifies is the conductive connection layer 10, and the high temperature can melt the palladium in the oxidation protection layer 3 to form a second plating layer 14, and the second plating layer 14 is formed between the intermetallic compound layer 9 and the oxidation protection layer 3.

[0174] In addition, the conductive pad 2 and the oxidation protection layer 3 can be formed by a magnetron sputtering process, avoiding the problems brought by the chemical gold process.

[0175] Exemplarily, the thickness of the second plating layer 14 ranges from 0.05 μm to 0.1 μm, for example, the thickness of the first plating layer 11 is 0.05 μm, 0.06 μm, 0.075 μm, 0.08 μm or 0.1 μm.

[0176] The functional backboard 200 provided by the above-mentioned embodiments of the present disclosure can block the solder from contacting the conductive pad 2, avoiding the formation of an intermetallic compound between the solder and the conductive pad 2. In this way, since the shear strength of the intermetallic compound layer 9 is small, the intermetallic compound layer 9 will be broken in the process of removing the electronic component E, which may take away part of the second plating layer 14 or the oxidation protection layer 3, but will not take away the conductive pad 2, thereby avoiding the damage of the conductive pad 2, so as to facilitate the re-soldering of the electronic component E on the conductive pad 2, and improve the maintainability of the functional backboard 200.

[0177] As shown in FIG. 3, Figure 14 Some embodiments of the present disclosure also provide a backlight module 300 including the functional backboard 200 in any of the above-mentioned embodiments.

[0178] It can be understood that the functional backboard 200 includes a plurality of light emitting devices 12, and the light emitting devices 12 can be LED chips, i.e., the backlight module 300 is an LED backlight module.

[0179] The backlight module 300 in the above-mentioned embodiments of the present disclosure can achieve the same beneficial effects as the functional backboard 200 described above, and thus will not be described here again.

[0180] In addition, compared with the backlight module in the related art, the backlight module 300 provided by the above-mentioned embodiments of the present disclosure arranges a large number of light emitting devices 12 closely, and can realize regional dimming in a small range. The backlight module 300 has better brightness uniformity and higher color contrast in a smaller light mixing distance, which is beneficial to make the terminal product equipped with the backlight module 300 have the characteristics of ultra-thin, high color rendering, power saving and the like. In addition, the backlight module 300 can be matched with a flexible display panel to prepare a display device with a curved screen.

[0181] As shown in Figure 15 some embodiments of the present disclosure provide a display device 1000, which comprises a display panel 1001 and the backlight module 300 in the above-mentioned embodiments, and the display panel 1001 is arranged on the light exit side E of the backlight module 300.

[0182] Exemplarily, the display panel 1001 can be a liquid crystal display panel (LCD for short).

[0183] Exemplarily, as shown in Figure 15 the display device 1000 further comprises a plurality of optical films 1002, which are located between the backlight module 300 and the display panel 1001, and are used for adjusting the light emitted by the backlight module 300.

[0184] The display device 1000 in the above-mentioned embodiments of the present disclosure can achieve the same beneficial effects as the backlight module 300, which will not be repeated here.

[0185] The above-mentioned display device 1000 can be any device that displays images whether in motion (e.g., video) or fixed (e.g., still images) and whether text or graphics. More specifically, it is contemplated that the embodiments can be implemented in or in association with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (PDAs), hand-held or portable computers, GPS receivers / navigators, cameras, MP4 video players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and / or displays, camera view displays (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projections, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry) and the like.

[0186] As shown in Figure 16As shown, some embodiments of this disclosure also provide a display panel 400, which includes the functional back panel 200 in any of the above embodiments.

[0187] It is understood that the functional back panel 200 includes a plurality of light-emitting devices 12, which may be LED chips, i.e., the display panel 400 is an LED display panel. For example, the light-emitting devices 12 may include light-emitting devices that emit red light, light-emitting devices that emit green light, or light-emitting devices that emit blue light.

[0188] The beneficial effects that the display panel 400 in the above embodiments of this disclosure can achieve are the same as the beneficial effects that the functional back panel 200 can achieve, and will not be repeated here.

[0189] In related technologies, LED chips are mounted face-up on a functional backplane. However, in the display panel 400 provided by the above embodiments of this disclosure, the light-emitting devices 12 are directly soldered onto the functional backplane 200, avoiding the wire bonding and reliability defects of face-up LED chips. Furthermore, the display panel 400 employs Chips on Board (COB) technology, which can further reduce the spacing between the light-emitting devices 12, improve the resolution of the display panel 400, enhance the visual effect of the end product equipped with the display panel 400, and reduce the viewing distance.

[0190] Furthermore, the display panel 400 can be made using a flexible substrate to fabricate a display panel 400 with a curved screen.

[0191] like Figure 17 As shown, some embodiments of this disclosure also provide a display device 1000, which includes the display panel 400 in the above embodiments.

[0192] The beneficial effects that the display device 1000 in the above embodiments of this disclosure can achieve are the same as the beneficial effects that the display panel 400 can achieve, and will not be repeated here.

[0193] The display device 1000 described above can be any device that displays images whether in motion (e.g., video) or stationary (e.g., still images), and whether textual or pictorial. More particularly, it is contemplated that the embodiments can be implemented in or in association with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and / or displays, display of camera views (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry) and the like.

[0194] The above description is only a specific implementation of the present disclosure. Obviously, many modifications and changes can be made to the present disclosure by those skilled in the art. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A circuit board, comprising: a substrate; a conductive pad disposed on the substrate; a plurality of protection layer groups stacked on a side of the conductive pad away from the substrate; each of the protection layer groups comprises an oxidation protection layer and a palladium alloy layer stacked on each other, the oxidation protection layer being closer to the substrate than the palladium alloy layer; a protection pad layer disposed between two adjacent protection layer groups; wherein the oxidation protection layer comprises a nickel-based alloy, and the protection pad layer comprises copper.

2. The circuit board according to claim 1, wherein, The nickel-based alloy comprises one or more of nickel-palladium alloy, nickel-copper alloy, nickel-tungsten alloy, nickel-aluminum alloy, nickel-titanium alloy, nickel-vanadium alloy, nickel-zirconium alloy, nickel-gold alloy, nickel-yttrium alloy, nickel-niobium alloy, nickel-platinum alloy, nickel-tin alloy, nickel-silver alloy, and nickel-tantalum alloy.

3. The circuit board of claim 1, wherein, The thickness of the oxidation protection layer ranges from 0.5 μm to 1.45 μm.

4. The circuit board according to claim 1, wherein, The mass percentage of nickel in the material of the oxidation protection layer ranges from 40% to 95%.

5. The circuit board of claim 1, wherein, The thickness of the palladium alloy layer ranges from 0.05 μm to 0.1 μm.

6. The circuit board of claim 1, wherein, The sum of the thickness of the oxidation protection layer and the thickness of the palladium alloy layer ranges from 0.6 μm to 1.5 μm. 7.The circuit board of any one of claims 1 to 6, further comprising: a driving circuit disposed between the substrate and the conductive pad; the conductive pad is electrically connected to the driving circuit. 8.The circuit board of any one of claims 1 to 6, further comprising: a trace disposed on the substrate; wherein the conductive pad is disposed on a side of the trace away from the substrate and is electrically connected to the trace.

9. The circuit board of claim 8, wherein, The trace comprises a first adhesive layer, a first conductive layer, and an electroplated metal layer stacked in a direction perpendicular to the substrate and away from the substrate; or The trace comprises a first adhesive layer, a first conductive layer, a second conductive layer, and an oxidation-resistant conductive layer stacked in a direction perpendicular to the substrate and away from the substrate.

10. The circuit board of claim 9, wherein, The material of the first adhesive layer comprises one or more of titanium alloy, tungsten alloy, molybdenum-based alloy, and nickel-based alloy; The material of the first conductive layer, the second conductive layer, and the electroplated metal layer all comprise copper; The material of the oxidation-resistant conductive layer comprises one or more of titanium alloy, tungsten alloy, molybdenum-based alloy, and nickel-based alloy. 11.The circuit board of claim 8, further comprising: at least one insulating layer covering the trace; the conductive pad is electrically connected to the trace through a via hole penetrating the at least one insulating layer.

12. The circuit board of claim 11, wherein, The at least one insulating layer comprises a first passivation layer, a planarization layer, and a second passivation layer stacked in a direction perpendicular to the substrate and away from the substrate. 13.The circuit board of claim 8, further comprising: a second adhesive layer disposed between the trace and the conductive pad; the conductive pad is electrically connected to the trace through the second adhesive layer.

14. The circuit board of claim 13, wherein, The material of the second adhesive layer comprises one or more of titanium alloy, tungsten alloy, molybdenum-based alloy, and nickel-based alloy. 15.A functional backplane, comprising: the circuit board of any one of claims 1 to 14. An intermetallic compound layer and a conductive connection layer are stacked on the circuit board in a direction perpendicular to the substrate of the circuit board and away from the substrate; An electronic component is electrically connected to the conductive connection layer.

16. The functional backplane of claim 15, wherein, The intermetallic compound layer is disposed between the conductive connection layer and a palladium alloy layer of the circuit board; or The palladium alloy layer includes a hollow region; and a portion of the intermetallic compound layer is disposed between the palladium alloy layer and the conductive connection layer, and the portion of the intermetallic compound layer is in contact with an oxidation protection layer of the circuit board through the hollow region.

17. The functional backplane of claim 15, wherein, A shear strength of the intermetallic compound layer is less than a shear strength of the oxidation protection layer of the circuit board and less than a shear strength of the palladium alloy layer of the circuit board.

18. The functional backplane of claim 15, further comprising: A first plated layer is disposed between the palladium alloy layer of the circuit board and the intermetallic compound layer.

19. The functional backplane of any of claims 15-18, wherein, The circuit board includes a device region and a bonding region; the circuit board includes a first conductive pad disposed in the device region and a second conductive pad disposed in the bonding region; The electronic component includes: A light emitting device is bonded to the first conductive pad of the circuit board; A drive circuit board is bonded to the second conductive pad of the circuit board.

20. A backlight module comprising: The functional backplane of any one of claims 15-19.

21. A display device, comprising: A display panel; The backlight module of claim 20; The display panel is disposed on a light emitting side of the backlight module.

22. A display panel comprising: The functional backplane of any one of claims 15-19.

23. A display device comprising: The display panel of claim 22.

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