Rectifier Dynamic Boost

Abstract

The present disclosure relates to rectifier dynamic boost. The system includes a switch network, the switch network including a plurality of switches configured to receive a wireless power input and generate a rectified voltage. The system further includes a first conductor coupled to the first receiver and the switch network, the first conductor configured to transmit a first alternating current to the switch network. The system further includes a second conductor electrically coupled to the first receiver and the switch network, the second conductor electrically configured to transmit a second alternating current having a second voltage to the first receiver. The system further includes a controller configured to determine a rectified voltage signal and transmit an input to at least one of the plurality of switches based on the rectified voltage signal to change the on / off state of the at least one of the plurality of switches, thereby modifying the voltage.

Description

[0001] CROSS REFERENCE TO RELATED APPLICATIONS

[0002] The present disclosure claims the benefit of U.S. Provisional Patent Application No. 63 / 316,579, filed on March 4, 2022, entitled “RECTIFIER DYNAMIC BOOST,” and naming Jim Le, John Walley, and Marc Keppler as inventors, pursuant to 35 U.S.C. §119(e), the entire text of which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates to rectifier dynamic boosting. Background Art

[0004] Many communication devices (e.g., smartphones, tablets) use wireless power transfer (WPT) as a method to charge batteries within the communication device without the need for a compatible plug-in charger. In this way, WPT transmitters from different manufacturers are able to charge the same communication device with WPT reception capabilities. However, a device capable of receiving wireless power may sometimes receive a rectified voltage (V rect ) of an alternating current, the rectified voltage being too weak or too noisy (e.g., an oscillating / ripple waveform) for operation of the device and / or recharging of the device battery.

[0005] Therefore, it is desirable to provide a WPT voltage boosting system and method that enables efficient charging of user devices and other communication devices. Summary of the invention

[0006] A system for rectifying power is disclosed. In one or more embodiments, the system includes a first circuit for a first device. In one or more embodiments, the system further includes a first receiver, the first receiver configured to receive a wireless power input from a second device. In one or more embodiments, the system further includes a switch network, the switch network including a plurality of switches, wherein the switch network is electrically coupled to a first conductor, wherein the switch network is further configured to rectify the wireless power input and generate a rectified voltage. In one or more embodiments, the system further includes a first conductor, the first conductor is electrically coupled to the first receiver and the switch network, wherein the first conductor is configured to transmit a first alternating current having a first voltage to the switch network. In one or more embodiments, the system further includes a second conductor, the second conductor is electrically coupled to the first receiver and the switch network, wherein the second conductor is configured to transmit a second alternating current having a second voltage to the first receiver. In one or more embodiments, the system further includes a first controller, the first controller configured to determine a rectified voltage signal. In one or more embodiments, the first controller is further configured to transmit a signal input to at least one of the plurality of switches based on the rectified voltage signal to change the on / off state of the at least one switch of the plurality of switches, wherein the resulting change in the on / off state of the at least one switch modulates the rectified voltage.

[0007] The present invention summary is provided only as an introduction to the subject matter fully described in the specific embodiments and drawings. The present invention summary should not be regarded as describing necessary features nor should it be used to determine the scope of the claims. In addition, it should be understood that both the foregoing invention summary and the following specific embodiments are merely illustrative and do not necessarily limit the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The detailed description is described with reference to the accompanying drawings. The use of the same reference numerals in different instances in the description and drawings may indicate similar or identical items. Various embodiments or examples ("examples") of the present disclosure are disclosed in the following detailed description and the accompanying drawings. The drawings are not necessarily drawn to scale. In general, the operations of the disclosed processes may be performed in any order unless otherwise specified in the claims. In the drawings:

[0009] Figure 1 is a block diagram of an environment of a user device according to one or more embodiments of the present disclosure;

[0010] Figure 2A to 2B is a circuit diagram illustrating a rectifier circuit according to one or more embodiments of the present disclosure;

[0011] Figure 3Ais a graph illustrating a voltage / time graph of components within a rectifier circuit according to one or more embodiments of the present disclosure;

[0012] Figure 3B C are graphs illustrating voltage / time graphs of a rectifier circuit under different load conditions according to one or more embodiments of the present disclosure;

[0013] Figure 4A is a circuit diagram illustrating a rectifier circuit according to one or more embodiments of the present disclosure; and

[0014] Figure 4B is a graph illustrating a voltage / time graph of a rectifier circuit according to one or more embodiments of the present disclosure. DETAILED DESCRIPTION

[0015] Before explaining one or more embodiments of the present disclosure in detail, it should be understood that the application of the embodiments is not limited to the details of the construction and arrangement of the components or steps or methods described in the following description or illustrated in the accompanying drawings. In the following detailed description of the embodiments, numerous specific details are described in order to provide a more thorough understanding of the present disclosure. However, it will be apparent to those of ordinary skill in the art who benefit from the present disclosure that the embodiments disclosed herein can be practiced without some of these specific details. In other examples, well-known features may not be described in detail in order to avoid unnecessarily complicating the present disclosure.

[0016] As used herein, a letter following an element number is intended to refer to an embodiment of features or elements that may be similar but not necessarily identical to the preceding element or feature with the same element number (e.g., 1, 1a, 1b). Such shorthand notation is used only for convenience purposes and should not be construed as limiting the present disclosure in any way unless expressly stated to the contrary.

[0017] Furthermore, unless expressly stated to the contrary, "or" refers to an inclusive or rather than an exclusive or. For example, a condition A or B is satisfied by any of the following situations: A is true (or exists) and B is false (or does not exist), A is false (or does not exist) and B is true (or exists), and both A and B are true (or exist).

[0018] In addition, the use of "a" or "an" may be used to describe elements and components of the embodiments disclosed herein. This is done only for convenience and "a" and "an" are intended to include "one" or "at least one", and the singular also includes the plural, unless it is obvious that it means otherwise.

[0019] It should be understood that the described architecture is merely exemplary and many other architectures that can implement the same functionality. In a conceptual sense, any component arrangement to achieve the same functionality is effectively "associated" so that the desired functionality, common goal, purpose and / or result are achieved. Therefore, any two components combined to achieve a specific functionality herein can be considered to be "associated" with each other so that the desired functionality, common goal, purpose and / or result are achieved, regardless of the architecture or intermediate components. Similarly, any two components so associated can also be considered to be "connected" or "coupled" to each other to achieve the desired functionality, and any two components that can be so associated can also be considered to be "coupleable" to each other to achieve the desired functional phase (e.g., "operably coupled" or "electrically coupled"). In addition, unless otherwise indicated, a description indicating that a component is "connected to" another component or "connected between two components" indicates that such components are functionally connected and do not necessarily indicate that such components are physically in contact. Instead, such components may be physically in contact or may alternatively include an intermediary element. Similarly, descriptions of a particular component being "fabricated on" another component (alternatively "located on" another component, "positioned on" another component, or the like) indicate relative positions of such components but do not necessarily indicate that such components are in physical contact. Such components may be in physical contact or may alternatively include intervening elements.

[0020] It should be understood that electrical inputs (e.g., power inputs, signal inputs, voltages, wireless inputs, wired inputs) can be varied within the system (e.g., by processing or changes that occur when the input is transmitted) to produce outputs with different characteristics. For example, an AC input can be rectified to produce a DC output. In another example, the voltage value of the rectified voltage can change after being transmitted along a conductor. In another example, a data signal can be derived from or integrated into the input signal.

[0021] Finally, as used herein, reference to "one embodiment" or "some embodiments" means that a particular element, feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment disclosed herein. Appearances of the phrase "in some embodiments" throughout the specification are not necessarily all referring to the same embodiment, and an embodiment may include any combination of one or more of the features expressly described or inherently present herein, or a subcombination of two or more such features, together with any other features that may not necessarily be expressly described or inherently present in the present disclosure.

[0022] A wireless power transmission (WPT) receiving circuit is disclosed. The WPT receiving circuit includes a wireless power receiving circuit system (e.g., a coil), a rectifier circuit system, and a control circuit system, and the control circuit system can modulate the voltage of an incoming power signal by controlling multiple switches within the WPT receiving circuit. For example, the control circuit system can increase the voltage of the incoming power signal (e.g., boost), or can reduce the voltage of the input signal (e.g., buck). The control circuit system can also determine the value of a specific operating parameter within the WPT receiving circuit and operate based on the determined value to increase the stability of the WPT receiving circuit. The WPT receiving circuit can function to charge a battery in any device and / or otherwise provide power to any device.

[0023] Figure 1 is a block diagram of an environment 90 of a user device 100 (e.g., a first device) according to one or more embodiments of the present disclosure. The user device 100 may be configured as any type of powered device. For example, the user device 100 may be configured as a mobile communication device, including but not limited to a smart phone, a mobile phone, or a tablet computer. In another example, the user device 100 may be configured as a media device (e.g., a media playback and / or recording device). In another example, the user device 100 may be configured as a driver assistance module, an emergency responder, a pager, a watch, a satellite television receiver, a stereo, a computer system, a music player, a laptop or tablet computer, a household appliance, or nearly any other powered device in a vehicle. For example, the user device 100 may be configured as a computing / entertainment device for a vehicle.

[0024] In an embodiment, the user device 100 may be configured to communicate with a network controller, such as an enhanced Node B (eNB) or other base station. For example, the network controller may establish communication channels such as control channels and data channels, and exchange data via these channels. The user device 100 may also be exposed to many other wireless signal sources (e.g., from a wireless charging pad or a wireless router), and may acquire wireless signals in conjunction with WPT and the techniques described below. The user device 100 may also support one or more subscriber identity modules (SIMs).

[0025] The user device 100 may include a user interface 102 and a rechargeable battery 104 that powers the electronic components within the user device 100. The battery 104 is configured to be charged using power from a wireless charger 108 (e.g., a second device). For example, the wireless charger 108 may be plugged into a power outlet 112, where power is received by a power receiving circuit system 116 within the wireless charger 108 and output as a wireless power signal 120 via a wireless power transmitter 124. The wireless power transmitter 124 includes at least one coil and transmits the wireless power signal 120 to a receiving coil on a wireless power receiver 128 (e.g., a first receiver) of the user device 100 through a magnetic field using inductive coupling. Once received, the power received from the wireless power signal 120 may be referred to herein as wireless power input. The wireless power input received as alternating current (AC) by the wireless power receiver 128 is then rectified by the rectification circuit system 132 into a current (e.g., having a voltage V rect The wireless power receiver 128 and the rectifier circuit system 132 are controlled by the rectifier control circuit system 136 (e.g., a first controller). The rectifier control circuit system 136 performs the processing functions required for wireless power reception and battery charging. The user device 100 can operate with power directly from the wireless charger 108 or the battery 104.

[0026] The user device 100 further includes a system controller 140, which includes one or more processors 144, a memory 148, and a communication interface 152. The one or more processors 144 may include any processor or processing element known in the art. For the purposes of this disclosure, the term "processor" or "processing element" may be broadly defined to encompass any device having one or more processing or logic elements (e.g., one or more microprocessor devices, one or more application specific integrated circuit (ASIC) devices, one or more field programmable gate arrays (FPGAs), one or more digital signal processors (DSPs), or state devices). In this sense, the one or more processors 144 may include any device configured to execute algorithms and / or instructions (e.g., program instructions stored in the memory 148).

[0027] The memory 148 may include any storage media known in the art suitable for storing one or more sets of program instructions that can be executed by the associated one or more processors 144. For example, the memory 148 may include non-transitory storage media. For example, the memory 148 may include, but is not limited to, read-only memory (ROM), random access memory (RAM), magnetic or optical storage devices (e.g., disks), tapes, solid-state drives, and the like. The memory 148 may be configured to provide information to the system controller 140 or other components of the user device 100. In addition, the memory 148 may be configured to store user input. The memory 148 may be housed in a common controller housing with the one or more processors 144. Alternatively or in addition, the memory 148 may be remotely located relative to the spatial location of the processor 144 or the system controller 140. For example, the one or more processors 144 and / or the system controller 140 may access a remote memory 148 that is accessible via a network (e.g., a wireless network and the like) via one or more communication interfaces 152.

[0028] The one or more communication interfaces 152 may be operably configured to communicate with components of the system controller 140 or any other components within the user device 100. For example, the one or more communication interfaces 152 may be configured to retrieve data from the one or more processors 144 or other devices, transmit data for storage in the memory 148, retrieve data from the storage device of the memory 148, and so on. The one or more communication interfaces 152 may also be operably coupled with the one or more processors 144 to facilitate data transfer between components of the system controller 140 and components of the user device 100, including the rectifier circuit system 132 and / or the rectifier control circuit system 136. It should be noted that while the one or more communication interfaces 152 are described as components of the system controller 140, one or more components of the one or more communication interfaces 152 may be implemented as external components operably coupled to the system controller 140 via wired and / or wireless connections. It should also be noted that the rectifier control circuitry 136 may also include one or more processors 114, memory 148, and communication interface 152 to perform the functions described herein.

[0029] In an embodiment, the user device is configured to communicate unidirectionally and / or bidirectionally with the wireless charger 108 via wireless communication signals 156 (e.g., controlled by the system controller 140 or the rectifier control circuit system 136). The wireless communication signals 156 may be communicated via induction of coils of the wireless charger 108 and / or the user device 100, or by other wireless signaling methods including, but not limited to, Bluetooth, WIFI, and ZigBee. The communication from the user device 100 to the wireless charger 108 creates a feedback loop, in which the user device 100 may command the wireless charger 108 to change the current state of the wireless power transmitter 124 (e.g., to increase the wireless power signal 120 due to weak reception). For example, the wireless power receiver 128 may be configured to transmit a signal (e.g., an amplitude shift keying (ASK) signal, a frequency shift keying (FSK) signal, or other modulation-based signal) to the wireless power transmitter 124, and the wireless power transmitter may be configured to receive and process the signal. The wireless power receiver 128 may also be configured to receive and process a communication signal (eg, ASK, FSK, or another modulated signal).

[0030] Figure 2A 1 is a circuit diagram illustrating a rectifier circuit 200 (e.g., a first circuit) according to one or more embodiments of the present disclosure. The rectifier circuit 200 may include some or all of the components of the wireless power receiver 128, the rectifier circuit system 132, and the rectifier control circuit system 136. The rectifier circuit 200 may obtain wireless power from any wireless power source. For example, the rectifier circuit 200 may obtain 6.78 MHz Wireless Power Alliance (A4WP, also known as AirFuel) power transmission. The rectifier circuit 200 facilitates receiving the transmitted energy and delivering it (e.g., as a rectified direct current (DC) voltage V rect ) to a subsequent energy consumption stage in the device (e.g. via V out 204 to battery 104) efficiency improvements.

[0031] Wireless power transmission suffers efficiency losses at several stages, such as converting power to a radio frequency (RF) wireless power signal transmission, receiving the RF flux of the wireless power signal 120, and converting the RF flux to a usable DC voltage in the receiving device. The wireless power receiver 128 can use magnetic resonance achieved by matching the inductor and capacitor to the transmitter system to obtain a high Q receiver that is very sensitive to the fundamental frequency of the wireless power signal 120. Common WPT frequencies range from 90KHz to 200KHz. WPT frequencies may also include frequencies approximately 360KHz and / or frequencies approximately 6.78MHz. Inductance may be provided by a receiving coil 208 that receives the flux of the wireless power signal. Inductance may also be provided by one or more turns of conductors on a printed circuit board, for example, or another type of antenna. The inductor generates alternating current (AC) electricity and the first capacitor 212 may be tuned relative to the receiving coil 208 to achieve resonance, which results in a substantial response to the wireless power signal 120. The wireless power receiver 128 provides AC current into the rectifier circuit 200 via an AC positive conductor (eg, first conductor 216) and an AC negative conductor (eg, second conductor 220). The first conductor 216 and the second conductor 220 may be collectively referred to as AC conductors 224.

[0032] The rectifier circuit 200 receives AC current and rectifies the AC current into a DC voltage V rect . V rect Energy may then be provided for any subsequent processing circuitry or other functions of the user device 100. In one embodiment, the rectifier circuit 200 is integrated in whole or in part into an integrated circuit chip 268. The integrated circuit chip 268 may also be referred to as a "device". In other embodiments, discrete components may be used. The switch network 228 receives power from the first conductor 224 and includes a plurality of switches (e.g., switches 230, 232, 234, and 236) arranged to rectify the wireless power input and generate a rectified voltage. Switches 230 to 236 may be configured as field effect transistors (FETs), such as metal oxide semiconductor FETs (MOSFETs) or other types of transistors or other types of switches. Switches 230 to 236 are configured so that upon receiving a signal input (e.g., a gate input), such as based on V rect When receiving a feedback input (e.g., a rectified voltage signal), switches 230 to 236 may change the on / off state. For example, switch 230 may switch from the off state to the on state when receiving the signal input. Correspondingly, the switch may switch from the on state to the off state when receiving the signal input. Within switch network 228, changing the on / off state of one or more switches 230 to 236 results in a change in the V rectThe switch network 228 may include any number of switches 230 to 236. For example, the switch network 228 may include 5 or more, 10 or more, or 15 or more switches 230 to 236.

[0033] The rectifier control circuit system 136 may be operably coupled to the switch network 228. For example, the rectifier control circuit system 136 may control the on and off states of the switches 230 to 236 using the switching control output to rectify the wireless power input, thereby producing a full-wave rectified version of the wireless power input. The rectifier control circuit system 136 may include a processing unit (e.g., a state machine 240 containing one or more processors 144), an analog-to-digital converter (ADC 242), and a control loop mechanism, such as a proportional-integral-derivative (PID) controller 244 (e.g., an analog PID or a digital PID). The state machine 240 may include any finite state processor, including but not limited to a central processing unit (CPU) or an application specific integrated circuit (ASIC).

[0034] The rectifier circuit 200 further includes a plurality of pin outputs 246, 248, 250, 252, 254, 256, 258, 260, 262, 264 accessible to the rectifier control circuit system 136. For example, the rectifier control circuit system 136 can detect the state of power (e.g., current, voltage, oscillation) via one or more pin outputs 246 to 264 and can affect the state of power at one or more pin outputs (e.g., by injection). For example, the rectifier control circuit system 136 can communicate with the switch network 228 to control the switches 230, 232 by delivering power (e.g., power amplified via the gate driver 266) at the pin outputs 250, 252, respectively. The pin outputs 246 to 264 can be arranged on an integrated circuit chip 268 (e.g., the circuit chip 268 represented by the dashed square). The rectifier circuit can also include a current sensing circuit system 270 and a voltage regulation circuit system 272.

[0035] In an embodiment, the rectifier circuit 200 further includes a circuit configured to make V rect For example, according to one or more embodiments of the present disclosure, the switch network 228 may further include: Figure 2B268 . The first FET 274 may be incorporated into one of several locations within the rectifier circuit 200 (e.g., integrated into the integrated circuit chip 268 or outside the integrated circuit chip 268). For example, the first FET 274 may be configured to handle high power inputs that may be harmful to the integrated circuit chip 268. Thus, the first FET 274 may be disposed outside the integrated circuit chip 268 or physically separated from the integrated circuit chip 268 (e.g., as an external first FET 274, also referred to as an external FET, which is not disposed within the integrated circuit chip 268 or physically integrated into the integrated circuit chip 268, but is electrically coupled to the integrated circuit chip 268), where other circuit component portions, such as the switch network 228, are located on the integrated circuit chip 268 or integrated into the integrated circuit chip 268. For example, the first FET 274 may be configured as an external FET that can effectively handle a maximum VDS of 115 volts or 117 volts. However, in some embodiments, the first FET 274 may be incorporated into the integrated circuit chip 268. The first FET may be configured as an insulated gate FET (MOSFET), a junction FET (JET), or a metal semiconductor FET (MESFET). When incorporating the first FET, the drain of the first FET 274 may be coupled to the AC positive conductor 216 via a drain conductor 276 and the source of the first FET 274 may be coupled to the first conductor 216 via a source conductor 278. Then, the second capacitor 280 may be disposed within the drain conductor 276. This arrangement forms a FET loop 282 (e.g., the arrangement forms a first loop) with parallel capacitors (e.g., the first capacitor 212 and the second capacitor 280). The gate of the first FET 274 may be coupled to a pin output 254 accessible to the rectifier control circuit system 136. In this arrangement, the first FET 274 / FET loop 282 acts as a dynamic capacitive switch that modulates the magnitude of the network reactance, which may then be controlled by the rectifier control circuit system 136.

[0036] In an embodiment, the first FET 274 operates to turn on the additional series capacitance on the receiver side to ensure that the WPT transmission network is inductive during the boost operation. Then, the rectifier control circuit system 136 can generate a negative phase shift to control the amount of boost. For example, the rectifier control circuit system 136 including a state machine and / or a loop control device (e.g., PID 244) can adjust or apply a current limit value or current limit threshold (I lim )(e.g., such as the rectifier turn-off current threshold). For example, making the rectifier turn-off current limit threshold more negative causes the rectifier input impedance to become more capacitive. In another example, the rectifier control circuit system 136 modulates V by applying a pulse width modulation (PWM) signal to the gate of the first FET 274.rect , so that the PWM signal is actually synchronized with the AC waveform. The ability of the first FET 274 to boost the input voltage is based on the ability of the first FET 274 to dynamically modulate the impedance created by the power flowing through the field coil 208 and along the AC conductor 224 through the first capacitor 212 to the switch network 228. For example, if the impedance of the signal along the AC conductor 224 is reduced, then the output signal V rect For a given load increase, the rectifier control circuit system 136 may then send a control signal to the gate of the first FET 274 to open or close the first FET 274 accordingly so that V rect In some embodiments, dynamic boosting can be implemented in the rectifier circuit by using a dynamic tuning capacitor.

[0037] Return to reference Figure 2A In one embodiment, the rectifier control circuit system 136 including the state machine 240 and / or the PID 244 is configured to control the rectifier control circuit system 136 at V rect drops below a predetermined threshold causing V rect The boost voltage. rect A drop in V may occur under transient heavy loads. For example, in a circuit system where a low dropout (LDO) regulator is used or in a capacitive step-down situation, a transient drop in V may occur under heavy loads. Dynamic boost can be achieved by increasing V rect Keep it at the threshold minimum to prevent voltage collapse.

[0038] The rectifier control circuit system 136 can make V rect For example, the switch network 228 controlled by the rectifier control circuit system 136 can temporarily short the first conductor 216 and / or the second conductor 220 to increase the voltage of the V rect Boost, such as Figure 3A As shown in . Figure 3A 1. The set of graphs 300 is illustrated, including graphs illustrating a first voltage (AC1) as measured on the first conductor 216, a second voltage (AC2) as measured on the second conductor 220, and a voltage V rect The voltage / time graph 304 of the waveform of the first voltage AC1, the second voltage AC2 and V rect, 234, 236, respectively. The diagram set 300 also includes a diagram subset 308, which indicates the on / off state of the high-side switches HS1 and HS2 (e.g., switches 232, 230, respectively) and the low-side switches LS1 and LS2 (e.g., switches 236 and 234, respectively). The turning on of the switches 230, 232, 234, 236 is indicated by a rise in the measured voltage at the switches 230, 232, 234, 236, and the turning off of the switches 230, 232, 234, 236 is indicated by a corresponding voltage drop. In this dynamic boost scheme, the switching between the switches 230, 232, 234, 236 coordinates to change the first voltage AC1 and the second voltage AC2, and V rect Maintain at threshold level.

[0039] In an embodiment, the dynamic boost scheme includes engaging or turning on two low-side switches 234, 236 after a transition of the first voltage (AC1) and / or the second voltage (AC2) from a peak to a valley (e.g., typically a transition from the highest, substantially the highest, or near-highest voltage (peak) in the waveform to the lowest, substantially the lowest, or near-lowest voltage (valley) in the waveform). By engaging the low-side switches 234, 236, the switch network presents a "short" duty cycle to the coil 208, within which the current through the coil increases due to the reduced impedance, thereby producing a boost effect.

[0040] The switching of switches 230, 232, 234, 236 for the dynamic boost scheme can be performed via one or more specific sequences. For example, the dynamic boost scheme may include switching the second low-side switch 234 to the on state when the second voltage AC2 has been transformed from the peak to the trough, and switching the second low-side switch 234 to the off state when the second voltage AC2 has started the transition from the trough to the peak. The dynamic boost scheme may further include switching the first high-side switch 232 to the on state when the first voltage AC1 has been transformed from the trough to the peak, and switching the first high-side switch 232 to the off state when the first voltage AC1 has started the transition from the peak to the trough. The dynamic boost scheme may further include switching the first low-side switch 236 to the on state when the first voltage AC1 has been transformed from the peak to the trough, and switching the first low-side switch 236 to the off state when the first voltage AC1 has started the transition from the trough to the peak. The dynamic boost scheme may further include switching the second high-side switch 230 to the on state when the second voltage AC2 has transitioned from a valley to a peak, and switching the second high-side switch 230 to the off state when the second voltage AC2 has initiated a transition from a peak to a valley.

[0041] In this switch sequencing example, a short overlap time period (referred to as T boost) turns on both the first low-side switch 236 and the second low-side switch 234. boost is a period of transition to a high impedance (HIZ) effect during which a transient boost in voltage occurs (e.g., due to the current through the inductor (e.g., coil 208) being transiently shorted across the inductor). The inductor will then modulate the voltage to maintain the current by collapsing the magnetic field and changing the voltage across the terminals (AC1 / AC2) to maintain the current (e.g., the voltage increases to maintain the current). The switching sequence may be performed once per cycle, twice per cycle (e.g., as desired). Figure 3A ), or performed once every few cycles. However, the switch sequence can be changed so that several switch sequences can be performed per cycle.

[0042] In an embodiment, the switch sequencing is performed via one or more timers. For example, when the second low-side switch 234 is turned on and the first low-side switch 236 is turned on, T boost timer, where the second low-side switch 234 will be on based on T boost The timer is switched off after the set time. In this way, the T boost Time and T boost The switch sequencing can also be performed based on voltage conditions. For example, when the first voltage drops below a threshold voltage (eg, 20 mV), the first low-side switch 234 can be turned on.

[0043] In such Figure 3B The effect of dynamic boosting on the rectifier circuit 200 is illustrated in the set of graphs 350 shown in FIG. 3 , which presents the T boost The results under loads of 20mA, 50mA and 100mA (graphs 354, 358, 362, respectively). The different curves in each graph 354, 358, 362 represent different T boost Generally speaking, increasing T boost Will increase the voltage boost, where the specific T boost Time increases the rectifier voltage up to approximately 10 volts.

[0044] In an embodiment, the voltage increase as exhibited by the switch sequencing scheme can also be used for communication, such as ASK communication. As detailed above, turning on both low-side switches 234, 236 causes the duty cycle to be short, resulting in a modulated impedance on the wireless power receiver 128. The modulated impedance changes the voltage level that can be used for continuous ASK communication. Figure 3C Instructions Demonstration by T boost The adjustment of the cycle produces a V rectA voltage-time graph 370 of a superimposed series 374 of voltages. The voltages within the series 374 are stably differentiated from each other and may be suitable for ASK signaling. It should be understood that the switch sequencing scheme may be used for other types of amplitude modulation based communications, including amplitude and phase shift keying (APSK), on-off keying (OOK), quadrature amplitude modulation (QAM), and other communications.

[0045] It should be noted that dynamic boost can cause V rect The oscillations of the signal are shown in graphs 354 and 358. These oscillations can be reduced through the implementation of various circuit systems and controller inputs. For example, V rect The oscillations can be reduced via an adaptive shut-off mechanism implemented by a timer, where the maximum on timer (e.g., T on,max ) expires, the combination of switches 230, 232, 234, 236 is forced to open. Then, the digital control loop adjusts T on,max , thereby causing oscillation suppression due to delayed induced reverse current. In another example, the rectifier circuit 200 may include a circuit configured to sense V rect dv / dt (e.g., via a slope detector) and when V rect Dynamically increase T when decreasing boost The closed loop PID controller 244 may also be configured to suppress oscillations. For example, the PID input may be a target voltage, and the resulting PID output controls the amount of boost.

[0046] If the load impedance of the coil network (e.g., coil 208) and / or the wireless power receiver 128 is inductive and the switch network 228 modulates the input capacitance, or if the load impedance of the coil network and / or the wireless power receiver 128 is capacitive and the switch network 228 modulates the input inductance, the rectifier control circuit system 136 may also cause V rect Voltage boost. For example, the rectifier control circuit system 136 can be configured to modulate the inductance of the wireless power input when the load impedance of the coil network or the wireless power receiver 128 is capacitive. In another example, the rectifier control circuit system 136 can be configured to modulate the capacitance of the wireless power input when the load impedance of the coil network or the wireless power receiver 128 is inductive. In both cases, the rectifier control circuit system 136 can be configured to modulate the capacitance of the wireless power input when the load impedance of the coil network or the wireless power receiver 128 is inductive. lim The input capacitance and input inductance may be modified by using a threshold value (e.g., a switching threshold value of individual switches 230, 232, 234, 236 within the switch network 228). For example, the negative I may be used via the state machine 240 within the rectifier control circuit system 136. lim Phase shift (for example, using negative I lim In another example, the input capacitance can be modulated by using a positive phase shift (e.g., using a positive I lim threshold) modulates the input inductance. Figure 4A The rectifier circuit 200 is illustrated, wherein the PID controller 244 receives V rect Data and threshold data, and I lim The signal is sent to the state machine 240, where the switching threshold is based on I lim Signal to adjust.

[0047] In an embodiment, the rectifier control circuitry 136 can reduce V by reducing instabilities in the functioning of the rectifier circuit 200. rect signal because there are several potential sources of instability in and around the rectifier circuit 200, including but not limited to: input impedance greater than the network source impedance and 180° out of phase; output signal resistance becoming negative or close to zero; load ballast stability issues; and V rect Oscillations in the circuit. Problems arising from these problems, such as V rect The oscillations can be reduced in magnitude by controlling the switching within the rectifier via the rectifier control circuitry. In an embodiment, the rectifier control circuitry 136 can reduce the V rect The high-pass filter can effectively filter the oscillation, ripple and other noise in the input V rect The signal is filtered and the filtered V rect The signal is sent to the PID controller 244. The HPF 404 can be configured to filter signals of any frequency band or frequency band size. For example, the HPF 404 can be configured as a 500kHz filter. For example, the HPF 404 can be used to filter the incoming V rect The signal is filtered, and the filtered signal is then passed through a PID controller 244, where the PID controller 244 adjusts I lim (e.g., approximately + / - 400mA). Figure 4B The diagram 450 of FIG. 4 shows the use of filtered V rect Signal and Adjusted I lim Thresholds (e.g., fast I lim Here, V rect Baseline 454 is shown to be highly oscillatory. lim The oscillation is reduced when the input voltage 462 is modulated, resulting in a modulated V rect 458. In an embodiment, phase shifting (eg, positive and / or negative) may be performed via a digital phase locked loop (DPLL).

[0048] In an embodiment, the rectifier circuit 200 uses a configurable speed function to match switching events with programmed switching times. For example, at high frequencies, small power losses may occur because the switching events do not occur at the exact moment, such as when the forward diode is about to turn on, or when the switches 230 to 236 are programmed to switch to the off state when the current approaches 0 mA. Initially, these switching events may be optimally calibrated or factory set. However, the switching times may vary with load current, V rect Using configurable speed protocols, such as those used in UART-based communications, can facilitate these low-precision switching events to switch at the appropriate time.

[0049] In an embodiment, a predictive switching scheme can be used to more closely coordinate switching events at the right time. For example, the predictive switching scheme may include measuring the timing error generated by using the switch logic (e.g., via a fast comparator), and adjusting the on / off switch threshold to compensate for the switch logic delay. Then, the measurement and adjustment can be repeated iteratively to achieve switching with higher accuracy. The predictive switching scheme may also include periodically performed measurements and adjustments to limit the additional power consumption from the fast comparator. As mentioned above, the predictive switching scheme may also use a fast comparator to provide a near-ideal time switch, but in order to save power, the fast comparator is only powered on around the switching event. Then, a digital timer is used to determine when to power on and off the fast comparator.

[0050] The stability of the rectifier circuit 200 may be further improved by adding timers (e.g., defined timers) for the ½ cycle and full cycle on events in the state machine 240. For example, when the carrier frequency is known, switching may be forced within the rectifier circuit 200 via a timer to comply with the required duty cycle parameters and to counteract oscillations caused by unstable on / off switching events.

[0051] The rectifier circuit 200 may also be configured to derive clocks and timers as the power signal passes through the rectifier circuit 200. For example, FCLK and FCLK metrics (e.g., clock fidelity metrics) may be used for a variety of functions, including, but not limited to, encoding / decoding (e.g., FSK decoding), and providing a reference time (e.g., for UART and USB timing functions). In an embodiment, the rectifier circuit 200 determines one or more FCLK metrics (e.g., FCLK fidelity metrics) used to determine the stability and / or fidelity (e.g., signal quality metrics) of a process within the rectifier circuit. For example, an FCLK fidelity metric (e.g., a noise metric) based on signal noise may be used to determine whether the rectifier circuit 200 is operating correctly and whether the signal passing through the rectifier circuit system is usable for further processing. For example, the noise metric may include data corresponding to a noise threshold or a current noise level currently experienced by the rectifier circuit 200. The noise metric may be particularly useful for describing or reporting ripple noise (e.g., a fluctuating AC component in a rectified DC output). Noise metrics may also be used to describe or report switching noise or jitter (e.g., deviations from the true periodicity of an assumed periodic signal) in particular. For example, the rectifier control circuitry 136 may be configured to generate a noise metric that is then used by the rectifier control circuitry 136 and / or the system controller 140 to determine jitter (e.g., a jitter value) of the rectifier circuit 200.

[0052] The rectifier circuit 200 may also generate a noise metric for determining whether a signal meets a threshold for decoding a communication signal (e.g., a signal of an ASK preamble). The noise metric may report or assist in determining a signal decoding threshold (e.g., a parameter or setting for determining whether a received signal is a message or noise). For example, if the signal decoding threshold for a transmitted ASK signal is set too low, the receiver control circuit system 136 or the system controller 140 may inappropriately interpret the noise as an incoming ASK preamble. Setting the signal decoding threshold too high may cause the receiver control circuit system 136 or the system controller 140 to miss the ASK preamble.

[0053] The FCLK metric may include reporting of the on / off period (eg, cycle period) of each state machine 240 so that the duty cycle of the FCLK signal may also be measured. The FCLK metric is determined via the rectifier control circuitry 136 or the processor 144 of the system controller 140.

[0054] In an embodiment, the FCLK fidelity metric is configured to measure the off and / or on intervals of one or more switches 230 to 236 within the switch network 228. For example, the rectifier circuit 200 may include one or more comparators that measure when the carrier signal is high and / or low, and a timer that can measure the duration of these on / off periods. From these time measurements, a jitter metric of the FCLK can be derived (e.g., via root mean square (RMS) and / or deviation calculations). This FCLK jitter metric (e.g., such as jitter magnitude or other noise metric) can then be used to determine the appropriate baud rate, FSK model settings, or other communication-related settings for the rectifier circuit 200. For example, the FCLK jitter metric can be used to determine the baud rate between the user device 100 and the wireless charger 108. These FCLK fidelity metrics and other signal quality metrics can be derived via analog or digital timers and related circuit systems.

[0055] In an embodiment, a signal quality metric is used to determine V rect Fidelity. For example, you can measure V rect and pass it through a high-pass filter to remove low-frequency noise, and then use the resulting filtered V rect The signal is used to calculate an RMS error value (e.g., a quality metric). The quality metric can be used in further calculations / analysis to determine stability issues within the rectifier circuit and otherwise determine the operating state of the rectifier circuit 200. For example, V rect The quality metric can be used to determine whether the rectifier control circuit system 136 has been improperly programmed. In another example, V rect The quality metric determines whether a particular component within the rectifier circuit 200 has failed.

[0056] In an embodiment, a signal quality metric is used for threshold detection of a communication signal, such as for detection of a preamble in an ASK signal. For example, the circuitry within the rectifier circuit 200 or an existing modem circuitry may be configured to measure a down-converted signal of an ASK message or otherwise monitor noise on a coil network and generate a signal metric that can be used to determine an ASK preamble threshold. The signal metric may include determining signal magnitudes and accumulating RMS errors based on those magnitudes. For example, a high ASK signal and noise may produce a higher RMS value. Then, the signal metric may be used to adjust the threshold.

[0057] It should be understood that embodiments of the methods disclosed herein may include one or more of the steps described herein. In addition, such steps may be performed in any desired order and two or more of the steps may be performed simultaneously with each other. Two or more of the steps disclosed herein may be combined in a single step, and in some embodiments, one or more of the steps may be performed as two or more sub-steps. In addition, other steps or sub-steps may be performed in addition to or in place of one or more of the steps disclosed herein.

[0058] Although the inventive concepts have been described with reference to the embodiments illustrated in the accompanying drawings, equivalents may be employed and substitutions may be made herein without departing from the scope of the claims. The components illustrated and described herein are merely examples of system devices and components that may be used to implement embodiments of the inventive concepts, and may be replaced with other devices and components without departing from the scope of the claims. In addition, any dimensions, degrees, and / or numerical ranges provided herein should be understood as non-limiting examples unless otherwise specified in the claims.

Claims

1. A system for power transmission, comprising: A first circuit for a first device, the first circuit comprising: a first receiver configured to receive wireless power input from a second device; a switch network comprising a plurality of switches, wherein the switch network is operably coupled to a first conductor, wherein the switch network is further configured to rectify the wireless power input and produce a rectified voltage; The first conductor is operably coupled to the first receiver and the switching network, wherein the A first conductor is configured to transmit a first alternating current having a first voltage to the switching network; a second conductor operably coupled to the first receiver and the switch network, wherein the second conductor is configured to transmit a second alternating current having a second voltage to the first receiver; A first controller configured to: determining a rectified voltage signal in response to a transition of the first voltage or the second voltage; and transmitting a signal input to at least one switch of the switch network based on the rectified voltage signal to change an on / off state of the at least one switch of the switch network, wherein the resulting change in the on / off state of the at least one switch modulates the rectified voltage; wherein the system further comprises a boost switch, the boost switch comprising a first field effect transistor electrically coupled to the first conductor and the first controller, the boost switch being configured to modulate the impedance of the first conductor by configuring an on / off state of the boost switch in response to a control signal from the first controller; and The first controller is configured to modulate the rectified voltage by applying a pulse width modulation (PWM) signal to the boost switch, the PWM signal being synchronized to the first voltage or the second voltage.

2. The system of claim 1 , wherein the first field effect transistor comprises: a source conductor operatively coupled to the first conductor; and a drain conductor operably coupled to the first conductor to form a first loop including the first conductor, the source conductor, and the drain conductor, wherein the first loop further comprises: a first capacitor operably coupled to the first conductor; and A second capacitor is operably coupled to the drain conductor.

3. The system of claim 1, wherein the plurality of switches comprises: a first high-side switch; a first low-side switch; a second high-side switch; and Second low side switch.

4. The system of claim 3, wherein the first controller is configured to: switching the second low-side switch to an on state when the second voltage has transitioned from a peak to a trough, and switching the second low-side switch to an off state when the second voltage has initiated a transition from a trough to a peak; switching the first high-side switch to the on-state when the first voltage has transitioned from a trough to a peak, and switching the first high-side switch to the off-state when the first voltage has initiated a transition from a peak to a trough; switching the first low-side switch to the on-state when the first voltage has transitioned from a peak to a trough, and switching the first low-side switch to the off-state when the first voltage has initiated a transition from a trough to a peak; and The second high-side switch is switched to the on-state when the second voltage has transitioned from a trough to a peak, and the second high-side switch is switched to the off-state when the second voltage has initiated a transition from a peak to a trough.

5. The system of claim 4, wherein the first low-side switch and the second low-side switch are configured to be in the on-state during overlapping time periods, whereby switching at least one of the first low-side switch or the second low-side switch to the off-state causes a change in the impedance of the first conductor and an increase in the rectified voltage.

6. The system of claim 5, wherein the increase of the rectified voltage by modulating the impedance of the first conductor is used for amplitude modulation based communication.

7. The system of claim 6, wherein the amplitude modulation communication comprises amplitude shift keying (ASK); Wherein the system is configured to generate a noise metric for determining a threshold for decoding an ASK signal.

8. The system of claim 1, wherein the first controller comprises a state machine and a proportional-integral-derivative (PID) controller.

9. The system of claim 1, wherein the signal input is based on a current limit value.

10. The system of claim 1, wherein the first controller is configured to modulate a capacitance of the wireless power input when a load impedance of the first receiver is inductive.

11. The system of claim 1 , wherein the first controller is configured to modulate an inductance of the wireless power input when a load impedance of the first receiver is capacitive. 12 . The system of claim 1 , wherein the first controller further comprises a proportional-integral-derivative controller configured to adjust a current limit value based on the rectified voltage.

13. The system of claim 1, wherein the controller is configured to generate a noise metric, wherein the controller determines a jitter value based on the noise metric.

14. The system of claim 1, wherein the controller is configured to generate a quality metric based on the rectified voltage signal, wherein an operating state of the first circuit is determined based on the quality metric.

15. The system of claim 1, wherein the system is configured to generate a signal metric, wherein a signal decoding threshold for a communication signal is determined based on the signal metric.

16. An apparatus for power transmission, comprising: A first circuit for a first device, the first circuit comprising: a switch network comprising a plurality of switches, wherein the switch network is operably coupled to the first conductor, wherein the switch network is further configured to rectify the wireless power input from the first receiver and produce a rectified voltage; The first conductor is operably coupled to the first receiver and the switching network, wherein the A first conductor is configured to transmit a first alternating current having a first voltage to the switching network; a second conductor operably coupled to the first receiver and the switch network, wherein the second conductor is configured to transmit a second alternating current having a second voltage to the first receiver; and A first controller configured to: determining a rectified voltage signal in response to a transition of the first voltage or the second voltage; and transmitting a signal input to at least one switch of the switch network based on the rectified voltage signal to change an on / off state of the at least one switch of the switch network, wherein the resulting change in the on / off state of the at least one switch modulates the rectified voltage; wherein the apparatus further comprises a boost switch, the boost switch comprising a first field effect transistor electrically coupled to the first conductor and the first controller, the boost switch being configured to modulate the impedance of the first conductor by configuring an on / off state of the boost switch in response to a control signal from the first controller; and The first controller is configured to modulate the rectified voltage by applying a pulse width modulation (PWM) signal to the boost switch, the PWM signal being synchronized to the first voltage or the second voltage.

17. A system for power transmission, comprising: A first circuit for a first device, the first circuit comprising: a first receiver configured to receive wireless power input from a second device; a switch network comprising a plurality of switches, wherein the switch network is operably coupled to a first conductor, wherein the switch network is further configured to rectify the wireless power input and produce a rectified voltage, wherein the switch network is integrated into an integrated circuit chip; The first conductor is operably coupled to the first receiver and the switching network, wherein the A first conductor is configured to transmit a first alternating current having a first voltage to the switching network; a second conductor operably coupled to the first receiver and the switch network, wherein the second conductor is configured to transmit a second alternating current having a second voltage to the first receiver; a first field effect transistor electrically coupled to the first conductor and configured to receive a power input and output an output voltage back to the first conductor based on a signal input, wherein the first field effect transistor is physically separated from the integrated circuit chip; and A first controller configured to: determining a rectified voltage signal in response to a transition of the first voltage or the second voltage; and transmitting the signal input to the first field effect transistor; wherein the first field effect transistor is configured to modulate the impedance of the first conductor by configuring an on / off state of a boost switch in response to a control signal from the first controller; and The first controller is configured to modulate the rectified voltage by applying a pulse width modulation (PWM) signal to the boost switch, the PWM signal being synchronized to the first voltage or the second voltage.

Images