Pixel driving circuit, driving method, display panel and display device

Abstract

The application discloses a pixel driving circuit, a driving method, a display panel and a display device, and relates to the technical field of display. The pixel driving circuit comprises a first driving transistor, a power voltage writing module, a light emitting element, a second driving transistor, a charging module, a data writing module, a first capacitor, a second capacitor, a first switch module and a second switch module. In the embodiment provided in the application, at least two driving transistors and two capacitors are arranged. In the charging stage, the first power signal end charges the two capacitors; in the data writing stage, the two capacitors discharge the second driving transistor, and the gate of the first driving transistor and the gate of the second driving transistor are electrically connected with the first node. Therefore, the voltage variation amount of the driving voltage generated by the first driving transistor in the light emitting stage is reduced, so that the generated driving current is more stable and accurate, and the light emitting is more uniform and accurate.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more particularly, to a pixel driving circuit, a driving method, a display panel, and a display device. Background Art

[0002] From the CRT (Cathode Ray Tube) era to the Liquid Crystal Display (LCD) era, and now to the OLED (Organic Light-Emitting Diode) and LED display eras, the display industry has undergone decades of rapid development and is now inextricably linked to our daily lives. From traditional mobile phones, tablets, TVs, and PCs to today's smart wearables, VR, in-car displays, and other electronic devices, display technology is indispensable.

[0003] In the related art, each light emitting element corresponds to a pixel driving circuit, and the pixel driving circuit drives the light emitting element to emit light. The light emitting elements of the array form a display screen by emitting light of different colors and different intensities. Figure 1 As shown, Figure 1 FIG. 1 is a schematic diagram of a pixel driving circuit in a related art. Figure 1 As can be seen, the gate of the driving transistor M0 is electrically connected to the second electrodes of the fourth transistor M4 and the fifth transistor M5. Since the transistors cannot be completely turned off, during the light-emitting phase of the pixel driving circuit, the driving transistor M0 will be affected by leakage current from the fourth transistor M4 and the fifth transistor M5, which in turn affects the driving current and causes inaccurate light emission. Summary of the Invention

[0004] In view of this, the present invention provides a pixel driving circuit, a driving method, a display panel and a display device, which can reduce the influence of leakage current on light emission.

[0005] In a first aspect, the present invention provides a pixel driving circuit, comprising:

[0006] a first driving transistor, wherein a gate of the first driving transistor is connected to a first node, a first electrode of the first driving transistor is connected to a first power signal terminal, and a second electrode of the first driving transistor is connected to a second power signal terminal;

[0007] a power supply voltage writing module, the power supply voltage writing module being connected in series between the first power supply signal terminal and the first driving transistor, the control terminal of the power supply voltage writing module being connected to the first driving signal terminal, the first terminal of the power supply voltage writing module being connected to the first power supply signal terminal, and the second terminal of the power supply voltage writing module being connected to the first electrode of the first driving transistor;

[0008] a light-emitting element, wherein the light-emitting element is connected in series between the first driving transistor and the second power signal terminal, a first end of the light-emitting element is connected to the second electrode of the first driving transistor, and a second end of the light-emitting element is connected to the second power signal terminal;

[0009] a second driving transistor, wherein the gate of the second driving transistor is connected to the first node, the first electrode of the second driving transistor is connected to the first power signal terminal, and the second electrode of the second driving transistor is connected to the data signal terminal; the first electrode of the second driving transistor is connected to the gate of the second driving transistor;

[0010] a charging module, the charging module being connected in series between the first power signal terminal and the second driving transistor, the control terminal of the charging module being connected to the second driving signal terminal, the first terminal of the charging module being connected to the first power signal terminal, and the second terminal of the charging module being connected to the first electrode of the second driving transistor;

[0011] a data writing module, the data writing module being connected in series between the second driving transistor and the data signal terminal, the control terminal of the data writing module being connected to the third driving signal terminal, the first terminal of the data writing module being connected to the data signal terminal, and the second terminal of the data writing module being connected to the second electrode of the second driving transistor;

[0012] a first capacitor, wherein a first end of the first capacitor is connected to the first node, and a second end of the first capacitor is connected to the second power signal end;

[0013] a second capacitor, wherein a first end of the second capacitor is connected to the first node, and a second end of the second capacitor is connected to the second node;

[0014] a first switch module, wherein a control end of the first switch module is connected to the fourth drive signal end, a first end of the first switch module is connected to the second power signal end, and a second end of the first switch module is connected to the second node;

[0015] The second switch module has a control end connected to the first drive signal end, a first end connected to the reset signal end, and a second end connected to the second node.

[0016] In a second aspect, the present invention provides a driving method for driving the pixel driving circuit provided in the first aspect of the present invention.

[0017] In a third aspect, the present invention provides a display panel comprising the pixel driving circuit provided in the first aspect of the present invention.

[0018] In a fourth aspect, the present invention provides a display device comprising the display panel provided in the third aspect of the present invention.

[0019] Compared with the prior art, the pixel driving circuit, driving method, display panel, and display device provided by the present invention achieve at least the following beneficial effects:

[0020] In the embodiment provided by the present invention, at least two driving transistors and two capacitors are provided. The two driving transistors are used to generate a driving current and maintain a node voltage, respectively. During the charging phase, the first power signal terminal charges the two capacitors; during the data writing phase, the two capacitors discharge the second driving transistor, thereby reducing the voltage variation of the gate of the second driving transistor. Since the gate of the first driving transistor and the gate of the second driving transistor are both electrically connected to the first node, the voltage variation when the first driving transistor generates a driving voltage during the light-emitting phase will be reduced, thereby making the generated driving current more stable and accurate, and thus making the light emission more uniform and precise.

[0021] Of course, any product implementing the present invention does not necessarily need to achieve all of the technical effects described above at the same time.

[0022] Further features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0024] Figure 1 Schematic diagram of the structure of a pixel driving circuit in the related art;

[0025] Figure 2 A schematic structural diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0026] Figure 3 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0027] Figure 4 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0028] Figure 5 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0029] Figure 6 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0030] Figure 7 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0031] Figure 8 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0032] Figure 9 A flowchart of a driving method provided by an embodiment of the present invention;

[0033] Figure 10 A timing diagram of a driving method provided by an embodiment of the present invention;

[0034] Figure 11 A top view of a display panel provided by an embodiment of the present invention;

[0035] Figure 12 This is a top view of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0036] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention.

[0037] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0038] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0039] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0040] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0041] In the related art, each light emitting element corresponds to a pixel driving circuit, and the pixel driving circuit drives the light emitting element to emit light. The light emitting elements of the array form a display screen by emitting light of different colors and different intensities. Figure 1 As shown, Figure 1 FIG. 1 is a schematic diagram of a pixel driving circuit in a related art. Figure 1It can be seen that the gate of the driving transistor M0 is electrically connected to the second electrodes of the fourth transistor M4 and the fifth transistor M5. Since the transistors cannot be completely turned off, during the light-emitting phase of the pixel driving circuit, the driving transistor M0 will be affected by the leakage current from the fourth transistor M4 and the fifth transistor M5, which in turn affects the driving current and causes uneven light emission.

[0042] In order to solve the above technical problems, an embodiment of the present invention provides a pixel driving circuit, referring to Figure 2 As shown, Figure 2 Schematic diagram of a pixel driving circuit provided by an embodiment of the present invention. The embodiment of the present invention provides a pixel driving circuit 100, including:

[0043] a first driving transistor M11, wherein a gate of the first driving transistor M11 is connected to a first node N1, a first electrode of the first driving transistor M11 is connected to a first power signal terminal PVDD, and a second electrode of the first driving transistor M11 is connected to a second power signal terminal PVEE;

[0044] A power supply voltage writing module 10 is connected in series between the first power supply signal terminal PVDD and the first driving transistor M11. The control terminal of the power supply voltage writing module 10 is connected to the first driving signal terminal S1. The first terminal of the power supply voltage writing module 10 is connected to the first power supply signal terminal PVDD. The second terminal of the power supply voltage writing module 10 is connected to the first electrode of the first driving transistor M11.

[0045] A light-emitting element D is connected in series between the first driving transistor M11 and the second power signal terminal PVEE, wherein a first end of the light-emitting element D is connected to the second electrode of the first driving transistor M11, and a second end of the light-emitting element D is connected to the second power signal terminal PVEE;

[0046] a second driving transistor M12, wherein the gate of the second driving transistor M12 is connected to the first node N1, the first electrode of the second driving transistor M12 is connected to the first power signal terminal PVDD, and the second electrode of the second driving transistor M12 is connected to the data signal terminal Vdata; the first electrode of the second driving transistor M12 is connected to the gate of the second driving transistor M12;

[0047] The charging module 20 is connected in series between the first power signal terminal PVDD and the second driving transistor M12. The control terminal of the charging module 20 is connected to the second driving signal terminal S2. The first terminal of the charging module 20 is connected to the first power signal terminal PVDD. The second terminal of the charging module 20 is connected to the first electrode of the second driving transistor M12.

[0048] A data writing module 30 is connected in series between the second driving transistor M12 and the data signal terminal Vdata. The control terminal of the data writing module 30 is connected to the third driving signal terminal S3. The first terminal of the data writing module 30 is connected to the data signal terminal Vdata. The second terminal of the data writing module 30 is connected to the second electrode of the second driving transistor M12.

[0049] a first capacitor C1, wherein a first end of the first capacitor C1 is connected to the first node N1, and a second end of the first capacitor C1 is connected to the second power signal terminal PVEE;

[0050] a second capacitor C2, wherein a first end of the second capacitor C2 is connected to the first node N1, and a second end of the second capacitor C2 is connected to the second node N2;

[0051] A first switch module 40, wherein a control end of the first switch module 40 is connected to the fourth drive signal end S4, a first end of the first switch module 40 is connected to the second power signal end PVEE, and a second end of the first switch module 40 is connected to the second node N2;

[0052] The second switch module 50 has a control end connected to the first drive signal end S1 , a first end connected to the reset signal end Vref, and a second end connected to the second node N2 .

[0053] It will be appreciated that the pixel driving circuit 100 includes a first power signal terminal PVDD and a second power signal terminal PVEE, which are respectively configured to provide a first voltage signal and a second voltage signal. A first driving transistor M11 is connected in series between the first power signal terminal PVDD and the second power signal terminal PVEE, with the gate of the first driving transistor M11 being connected to a first node N1.

[0054] Furthermore, the pixel driving circuit 100 also includes a power supply voltage writing module 10. The power supply voltage writing module 10 is connected in series between the first power supply signal terminal PVDD and the first driving transistor M11, and the control terminal of the power supply voltage writing module 10 is electrically connected to the first driving signal terminal S1. During the light-emitting phase, the first driving signal terminal S1 provides a first driving signal. In response to the first driving signal, the power supply voltage writing module 10 transmits the first voltage signal provided by the first power supply signal terminal PVDD to the first electrode of the first driving transistor M11.

[0055] Furthermore, the pixel driver circuit 100 also includes a light-emitting element D, which is connected in series between the first driver transistor M11 and the second power signal terminal PVEE. During the light-emitting phase, the power voltage writing module 10 transmits a first voltage signal to the first electrode of the first driver transistor M11. The voltage difference between the first voltage signal provided by the first power signal terminal PVDD and the second signal provided by the second power signal terminal PVEE drives the first driver transistor M11 to generate a drive current. The drive current is then transmitted to the light-emitting element D, causing the light-emitting element D to emit light.

[0056] Furthermore, the pixel driving circuit 100 further includes a second driving transistor M12, which is connected in series between the first power signal terminal PVDD and the data signal terminal Vdata, and a gate of the second driving transistor M12 is connected to the first node N1. During a charging phase, the second driving transistor M12 transmits a first voltage signal provided by the first power signal terminal PVDD to the first node N1; during a data writing phase, the second driving transistor M12 transmits a data signal from the data signal terminal Vdata to the first node N1.

[0057] Furthermore, the pixel driving circuit 100 includes a charging module 20. The charging module 20 is connected in series between the first power signal terminal PVDD and the second driving transistor M12, and the control terminal of the charging module 20 is connected to the second driving signal terminal S2. During the charging phase, the second driving signal terminal S2 provides a second driving signal. In response to the second driving signal, the charging module 20 transmits the first voltage signal provided by the first power signal terminal PVDD to the first electrode of the second driving transistor M12.

[0058] Furthermore, the pixel driving circuit 100 includes a data writing module 30. The data writing module 30 is connected in series between the data signal terminal Vdata and the second driving transistor M12, and the control terminal of the data writing module 30 is connected to the third driving signal terminal S3. During the data writing phase, the third driving signal terminal S3 provides a third driving signal. Under the influence of the third driving signal, the data writing module 30 transmits the data signal provided by the data signal terminal Vdata to the first node N1 through the second driving transistor M12.

[0059] Furthermore, the pixel drive circuit also includes a first capacitor C1 and a second capacitor C2. One end of the first capacitor C1 and the second transistor are both electrically connected to the first node N1. The other end of the first capacitor C1 is connected to the second power signal terminal PVEE, and the other end of the second capacitor C2 is connected to the second node N2. Since the gate of the second drive transistor M12, that is, the first node N1, is electrically connected to the first electrode of the second drive transistor M12, during the charging phase, the first power signal terminal PVDD charges the first capacitor C1 and the second capacitor C2 through the first node N1. During the data writing phase, the first capacitor C1 and the second capacitor C2 discharge to the second drive transistor M12 through the first node N1. Therefore, compared with the prior art, the voltage change of the first node N1 during the data writing phase will be reduced. Furthermore, during the light-emitting phase, the change in the driving voltage of the first drive transistor M11 is reduced, making the drive more stable.

[0060] Furthermore, the pixel driving circuit 100 further includes a first switch module 40. The first switch module 40 is connected in series between the first capacitor C1 and the second capacitor C2, and a control terminal of the first switch module 40 is connected to the fourth drive signal terminal S4. During the charging phase and the data writing phase, the fourth drive signal terminal S4 provides a fourth drive signal. In response to the fourth drive signal, the first switch module 40 transmits the second voltage signal provided by the second power signal terminal PVEE to the second node N2.

[0061] Furthermore, the pixel driving circuit 100 further includes a second switch module 50. The second switch module 50 is connected in series between the reset signal terminal Vdata and the second node N2, and a control terminal of the second switch module 50 is connected to the first drive signal terminal S1. During the light-emitting phase, the first drive signal terminal S1 provides a first drive signal, and the second switch module 50, under the action of the first drive signal, transmits the reset signal provided by the reset signal terminal Vref to the second node N2.

[0062] In the embodiment provided by the present invention, at least two driving transistors and two capacitors are provided. The two driving transistors are used to generate a driving current and maintain a node voltage, respectively. In the charging phase, the first power signal terminal PVDD charges the two capacitors; in the data writing phase, the two capacitors discharge the second driving transistor M12, thereby reducing the voltage variation of the gate of the second driving transistor M12. Since the gate of the first driving transistor M11 and the gate of the second driving transistor M12 are both electrically connected to the first node N1, the voltage variation when the first driving transistor M11 generates a driving voltage in the light-emitting phase will be reduced, thereby making the generated driving current more stable and accurate, and thus making the light emission more uniform and precise.

[0063] In an optional embodiment provided by the present invention, referring to Figure 3As shown, Figure 3 This is a schematic diagram of the structure of another pixel driving circuit provided by an embodiment of the present invention. The power supply voltage writing module 10 includes a first transistor M21, the gate of the first transistor M21 is connected to the first drive signal terminal S1, the first electrode of the first transistor M21 is connected to the first power signal terminal PVDD, and the second electrode of the first transistor M21 is connected to the first electrode of the first drive transistor M11.

[0064] It is understood that the power supply voltage writing module 10 includes a first transistor M21. The gate of the first transistor M21 serves as a control terminal of the power supply voltage writing module 10. The gate of the first transistor M21 is electrically connected to the first drive signal terminal S1 and is turned on and off in response to a first drive signal provided by the first drive signal terminal S1. The first terminal of the first transistor M21 serves as a first terminal of the power supply voltage writing module 10 and is electrically connected to the first power supply signal terminal PVDD. The second terminal of the first transistor M21 serves as a second terminal of the power supply voltage writing module 10 and is electrically connected to the first terminal of the first drive transistor M11.

[0065] In the embodiment provided by the present invention, the power supply voltage writing module 10 includes a first transistor M21. By controlling the potential of the gate of the first transistor M21, the power supply voltage writing module 10 can be turned on or off, which is conducive to simplifying the structure of the pixel driving circuit 100 and further simplifying the overall structure of the display panel.

[0066] In an optional embodiment provided by the present invention, referring to Figure 4 As shown, Figure 4 This is a schematic diagram of another pixel driving circuit provided by an embodiment of the present invention. The charging module 20 includes a second transistor M22, a gate of the second transistor M22 connected to the second drive signal terminal S2, a first electrode of the second transistor M22 connected to the first power signal terminal PVDD, and a second electrode of the second transistor M22 connected to the first electrode of the second drive transistor M12.

[0067] It is understood that the charging module 20 includes a second transistor M22. The gate of the second transistor M22 serves as the control terminal of the charging module 20. The gate of the second transistor M22 is electrically connected to the second drive signal terminal S2 and is turned on and off in response to a second drive signal provided by the second drive signal terminal S2. The first electrode of the second transistor M22 serves as the first terminal of the charging module 20 and is electrically connected to the first power supply signal terminal PVDD. The second electrode of the first transistor M21 serves as the second terminal of the charging module 20 and is electrically connected to the first electrode of the second drive transistor M12.

[0068] In the embodiment provided by the present application, the charging module 20 comprises a second transistor M22, and the on or off of the charging module 20 can be realized by controlling the potential of the gate of the second transistor M22, which is beneficial to simplify the structure of the pixel driving circuit 100 and further simplify the overall structure of the display panel.

[0069] In an optional embodiment provided by the present application, referring to Figure 5 , it is shown that Figure 5 is a structural schematic diagram of another pixel driving circuit provided by the embodiment of the present application. The data writing module 30 comprises a third transistor M23, the gate of the third transistor M23 is connected with a third driving signal end S3, the first pole of the third transistor M23 is connected with a data signal end Vdata, and the second pole of the third transistor M23 is connected with the second pole of the second driving transistor M12.

[0070] It can be understood that the data writing module 30 comprises a third transistor M23, the gate of the third transistor M23 is the control end of the data writing module 30, and the gate of the third transistor M23 is electrically connected with the third driving signal end S3 and is turned on or off under the action of the third driving signal provided by the third driving signal end S3. The first pole of the third transistor M23 is the first end of the data writing module 30, and the first pole of the third transistor M23 is electrically connected with the data signal end Vdata; the second pole of the third transistor M23 is the second end of the data writing module 30, and the second pole of the third transistor M23 is electrically connected with the second pole of the second driving transistor M12.

[0071] In the embodiment provided by the present application, the data writing module 30 comprises a third transistor M23, and the on or off of the data writing module 30 can be realized by controlling the potential of the gate of the third transistor M23, which is beneficial to simplify the structure of the pixel driving circuit 100 and further simplify the overall structure of the display panel.

[0072] In an optional embodiment provided by the present application, referring to Figure 6 , it is shown that Figure 6 is a structural schematic diagram of another pixel driving circuit provided by the embodiment of the present application. The first switch module 40 comprises a fourth transistor M24, the gate of the fourth transistor M24 is connected with a fourth driving signal end S4, the first pole of the fourth transistor M24 is connected with a second power signal end PVEE, and the second pole of the fourth transistor M24 is connected with a second node N2.

[0073] It is understood that the first switch module 40 includes a fourth transistor M24. The gate of the fourth transistor M24 serves as the control terminal of the first switch module 40. The gate of the fourth transistor M24 is electrically connected to the fourth drive signal terminal S4 and is turned on / off by the fourth drive signal provided by the fourth drive signal terminal S4. The first electrode of the fourth transistor M24 serves as the first terminal of the first switch module 40 and is electrically connected to the second power signal terminal PVEE. The second electrode of the fourth transistor M24 serves as the second terminal of the first switch module 40 and is electrically connected to the second node N2.

[0074] In the embodiment provided by the present invention, the first switch module 40 includes a fourth transistor M24. By controlling the potential of the gate of the fourth transistor M24, the first switch module 40 can be turned on or off, which is beneficial to simplifying the structure of the pixel driving circuit 100 and further simplifying the overall structure of the display panel.

[0075] In an optional embodiment provided by the present invention, referring to Figure 7 As shown, Figure 7 This is a schematic diagram of another pixel driving circuit provided by an embodiment of the present invention. The second switch module 50 includes a fifth transistor M25, wherein the gate of the fifth transistor M25 is connected to the first drive signal terminal S1, the first electrode of the fifth transistor M25 is connected to the reset signal terminal Vref, and the second electrode of the fifth transistor M25 is connected to the second node N2.

[0076] It is understood that the second switch module 50 includes a fifth transistor M25. The gate of the fifth transistor M25 serves as the control terminal of the second switch module 50. The gate of the fifth transistor M25 is electrically connected to the first drive signal terminal S1 and is turned on and off in response to the first drive signal provided by the first drive signal terminal S1. The first electrode of the fifth transistor M25 serves as the first terminal of the second switch module 50 and is electrically connected to the reset signal terminal Vref. The second electrode of the fifth transistor M25 serves as the second terminal of the second switch module 50 and is electrically connected to the second node N2.

[0077] In the embodiment provided by the present invention, the second switch module 50 includes a fifth transistor M25. The second switch module 50 can be turned on or off by controlling the potential of the gate of the fifth transistor M25, which is beneficial to simplifying the structure of the pixel driving circuit 100 and further simplifying the overall structure of the display panel.

[0078] In an optional embodiment provided by the present invention, referring to Figure 8 As shown, Figure 8This is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention. The first driving transistor M11 and the second driving transistor M12 are N-type transistors.

[0079] It is understood that when the first drive transistor M11 and the second drive transistor M12 are N-type transistors, the switch transistors in the pixel drive circuit 100, namely the first transistor M21 to the fifth transistor M25, may also be N-type transistors. For an N-type transistor, when its gate is a high-level signal, the N-type transistor is turned on; when its gate is a low-level signal, the N-type transistor is turned off. The drive signal can be designed based on the on / off properties of the N-type transistor, that is, the first drive signal to the fourth drive signal can be a high-level signal or a low-level signal at different stages.

[0080] It should be noted that the first driving transistor M11 and the second driving transistor M12 are N-type transistors, which is only one possible embodiment provided by the present invention. In other embodiments, the first driving transistor M11 and the second driving transistor M12 can also be P-type transistors, which is not specifically limited by the present invention.

[0081] Based on the same inventive concept, the present invention also provides a driving method, referring to Figures 8 to 10 As shown, Figure 9 A flowchart of a driving method provided by an embodiment of the present invention is provided. Figure 10 A timing diagram of a driving method provided by an embodiment of the present invention. The pixel driving circuit 100 includes: a first driving transistor M11, a second driving transistor M12, a power supply voltage writing module 10, a charging module 20, a data writing module 30, a first capacitor C1, a second capacitor C2, a first switch module 40, a second switch module 50, and a light-emitting element D;

[0082] The driving method at least includes: a charging stage T1, a data writing stage T2 and a light emitting stage T3;

[0083] In the charging stage T1, the charging module 20, the second driving transistor M12 and the first switch module 40 are turned on; the first power signal terminal PVDD charges the first capacitor C1 and the second capacitor C2;

[0084] In the data writing phase T2, the data writing module 30, the second driving transistor M12 and the first switch module 40 are turned on; the first capacitor C1 and the second capacitor C2 discharge the second driving transistor M12;

[0085] In the light-emitting stage T3, the power supply voltage writing module 10, the first driving transistor M11 and the second switch module 50 are turned on; the reset signal terminal Vref writes the reset signal to the second node N2, the first node N1 changes according to the voltage change of the second node N2, and compensates the first driving transistor M11. The first voltage signal provided by the first power supply signal terminal PVDD drives the first driving transistor M11 to form a current, which is transmitted to the light-emitting element D.

[0086] It is understood that in the embodiment provided by the present invention, the pixel driving circuit 100 includes at least two driving transistors and two capacitors. Specifically, the pixel driving circuit 100 includes: a first driving transistor M11, a second driving transistor M12, a power supply voltage writing module 10, a charging module 20, a data writing module 30, a first capacitor C1, a second capacitor C2, a first switch module 40, a second switch module 50 and a light-emitting element D. Among them, the power supply voltage writing module 10 includes a first transistor M21; the charging module 20 includes a second transistor M22; the data writing module 30 includes a third transistor M23; the first switch module 40 includes a fourth transistor M4; and the second switch module 50 includes a fifth transistor M25. Now, take the driving transistor and the switching transistor as N-type transistors as an example for explanation.

[0087] The driving method at least includes: a charging stage T1, a data writing stage T2 and a light emitting stage T3.

[0088] In the charging phase T1, the second drive signal provided by the second drive signal terminal S2 and the fourth drive signal provided by the fourth drive signal terminal S4 are high-level signals. Therefore, the second transistor M22 included in the charging module 20 and the fourth transistor M24 included in the first switch module 40 are turned on under the action of the high-level signal at the gate. Since the fourth transistor M24 is turned on and the first electrode of the fourth transistor M24 is connected to the second power signal terminal PVEE, the voltage value of the second node N2 is the voltage value of the second voltage signal provided by the second power signal terminal PVEE, that is, V N2 =V PVEE Since the second transistor M22 is turned on and the first electrode of the second transistor M22 is connected to the first power signal terminal PVDD, the voltage value of the first node N1 is the voltage value of the first voltage signal provided by the first power signal terminal PVDD, that is, V N1 =V PVDD At this time, the voltage values ​​of the first electrodes of the first capacitor C1 and the second capacitor C2 are both V PVDD The voltage values ​​of the second electrodes of the first capacitor C1 and the second capacitor C2 are both V PVEE In the charging phase T1, the first capacitor C1 and the second capacitor C2 are charged.

[0089] During the data writing phase T2, the third drive signal provided by the third drive signal terminal S3 and the fourth drive signal provided by the fourth drive signal terminal S4 are high-level signals. Therefore, the third transistor M23 included in the data writing module 30 and the fourth transistor M24 included in the first switch module 40 are turned on under the action of the high-level signal at the gate. Since the third transistor M23 is turned on, the data signal provided by the data signal terminal Vdata is transmitted to the first node N1 through the second drive transistor M12. Since the second drive transistor M12 has a threshold voltage, the voltage value of the first node N1 is the voltage value V of the second electrode of the second drive transistor M12. data The threshold voltage V th12 The sum of, that is, V N1 =V data +V th12 The voltage value of the first node N1 changes, so the first capacitor C1 and the second capacitor C2 electrically connected to the first node N1 discharge the second driving transistor M12 until no current flows. Since the fourth transistor M24 is turned on, the voltage value of the second node N2 remains V N2 =V PVEE .

[0090] During the light-emitting phase T3, the first drive signal provided by the first drive signal terminal S1 is a high-level signal. Therefore, the gates of the first transistor M21 included in the power supply voltage writing module 10 and the fifth transistor M25 included in the second switch module 50 are turned on under the action of the high-level signal. Since the fifth transistor M25 is turned on, the reset signal provided by the reset signal terminal Vref connected to the first electrode of the fifth transistor M25 is transmitted to the second node N2 through the fifth transistor M25. The voltage value of the second node N2 suddenly changes, and the change amount is ΔN2 = V ref -V PVEE According to the law of conservation of energy, the voltage change at the first electrode of the second capacitor C2, that is, the first node N1, is Therefore, the voltage value of the first node N1 at this time is In the embodiment provided by the present invention, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 are equal. Therefore, Furthermore, for the first driving transistor M11, the voltage value of the gate of the first driving transistor M11 is the voltage value of the first node N1, that is, V g =V N1 The voltage value of the drain of the first driving transistor M11 is the voltage value of the first voltage provided by the first power supply voltage signal terminal PVDD, that is, V d =V PVDD The voltage value of the source of the first driving transistor M11 is the voltage value of the anode of the light emitting element D, that is, V s =Voled The voltage difference between the gate and source of the first driving transistor M11 is The voltage difference between the drain and source of the first driving transistor M11 is V ds =V d -V s =V PVDD -V oled Since the voltage difference between the drain and source of the first driving transistor M11 is greater than the difference between the voltage difference between the gate and drain of the first driving transistor M11 and the threshold voltage of the first driving transistor M11, that is, V ds >(V gs -V th11 ), therefore, the first driving transistor M11 is in a saturated state. According to the current law, the driving current generated by the first driving transistor M11 is I oled =k(V gs -V th11 ) 2 In the embodiment of the present invention, the first driving transistor M11 and the second driving transistor M12 are the same, and their threshold voltages are also the same, that is, V th11 =V th12 . We can get:

[0091]

[0092] As can be seen, the magnitude of the driving current generated by the first driving transistor M11 for driving the light-emitting element D to emit light is independent of the threshold voltage of the first driving transistor M11. Therefore, the problem of threshold voltage drift caused by leakage from the switching transistor to the gate of the driving transistor can be solved, and the light-emitting element D can be accurately illuminated.

[0093] Based on the same inventive concept, the present invention also provides a display panel, referring to Figure 11 As shown, Figure 11 This is a top view of a display panel provided by an embodiment of the present invention. The display panel 200 includes the pixel driving circuit 100 in any of the above embodiments.

[0094] Optionally, the display panel 200 provided in this embodiment may be a display panel using organic light-emitting diode (OLED) display technology. The basic structure of an OLED display panel generally includes a hole transport layer, a light-emitting layer, and an electron transport layer. When a power supply supplies an appropriate voltage, holes from the anode and electrons from the cathode combine in the light-emitting layer, generating bright light. Compared to liquid crystal display panels, OLED display panels offer high visibility and brightness, are more energy-efficient, lightweight, and thin.

[0095] Based on the same inventive concept, the present invention also provides a display device, referring toFigure 12 As shown, Figure 12 This is a top view of a display device provided by an embodiment of the present invention. The display device 300 includes the display panel 200 in any of the above embodiments.

[0096] The display device 300 provided in this embodiment of the present invention can be any electronic device with a display function, such as a touch screen display, a mobile phone, a tablet computer, a laptop computer, an e-reader, or a television. The display device 300 provided in this embodiment of the present invention has the beneficial effects of the display panel 200 provided in this embodiment of the present invention. For details, please refer to the detailed description of the display panel 200 in the above embodiments, and will not be repeated in this embodiment.

[0097] It should be noted that Figure 11 and Figure 12 The display panel 200 and the display device 300 are illustrated using a rectangle as an example. In some other embodiments of the present application, the display panel 200 and the display device 300 may also be embodied in other shapes, such as a circle, an ellipse, or an irregular structure, etc., and the present invention does not specifically limit this. Figure 12 The circular area in is used to represent the fingerprint recognition area, but this diagram is not used to define the specific position of the fingerprint recognition area on the display device 300.

[0098] In summary, the pixel driving circuit, driving method, display panel, and display device provided by the present invention achieve at least the following beneficial effects:

[0099] In the embodiment provided by the present invention, at least two driving transistors and two capacitors are provided. The two driving transistors are used to generate a driving current and maintain a node voltage, respectively. During the charging phase, the first power signal terminal charges the two capacitors; during the data writing phase, the two capacitors discharge the second driving transistor, thereby reducing the voltage variation of the gate of the second driving transistor. Since the gate of the first driving transistor and the gate of the second driving transistor are both electrically connected to the first node, the voltage variation when the first driving transistor generates a driving voltage during the light-emitting phase will be reduced, thereby making the generated driving current more stable and accurate, and thus making the light emission more uniform and precise.

[0100] Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should be understood by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A pixel driving circuit, characterized in that: include: a first driving transistor, wherein a gate of the first driving transistor is connected to a first node, a first electrode of the first driving transistor is connected to a first power signal terminal, and a second electrode of the first driving transistor is connected to a second power signal terminal; a power supply voltage writing module, the power supply voltage writing module being connected in series between the first power supply signal terminal and the first driving transistor, the control terminal of the power supply voltage writing module being connected to the first driving signal terminal, the first terminal of the power supply voltage writing module being connected to the first power supply signal terminal, and the second terminal of the power supply voltage writing module being connected to the first electrode of the first driving transistor; a light-emitting element, wherein the light-emitting element is connected in series between the first driving transistor and the second power signal terminal, a first end of the light-emitting element is connected to the second electrode of the first driving transistor, and a second end of the light-emitting element is connected to the second power signal terminal; a second driving transistor, wherein a gate of the second driving transistor is connected to the first node, a first electrode of the second driving transistor is connected to the first power signal terminal, and a second electrode of the second driving transistor is connected to the data signal terminal; The first electrode of the second driving transistor is connected to the gate of the second driving transistor; a charging module, the charging module being connected in series between the first power signal terminal and the second driving transistor, the control terminal of the charging module being connected to the second driving signal terminal, the first terminal of the charging module being connected to the first power signal terminal, and the second terminal of the charging module being connected to the first electrode of the second driving transistor; a data writing module, the data writing module being connected in series between the second driving transistor and the data signal terminal, the control terminal of the data writing module being connected to the third driving signal terminal, the first terminal of the data writing module being connected to the data signal terminal, and the second terminal of the data writing module being connected to the second electrode of the second driving transistor; a first capacitor, wherein a first end of the first capacitor is connected to the first node, and a second end of the first capacitor is connected to the second power signal end; a second capacitor, wherein a first end of the second capacitor is connected to the first node, and a second end of the second capacitor is connected to the second node; a first switch module, wherein a control end of the first switch module is connected to the fourth drive signal end, a first end of the first switch module is connected to the second power signal end, and a second end of the first switch module is connected to the second node; The second switch module has a control end connected to the first drive signal end, a first end connected to the reset signal end, and a second end connected to the second node.

2. The pixel driving circuit according to claim 1, wherein: The power supply voltage writing module includes a first transistor, a gate of the first transistor is connected to the first drive signal end, a first electrode of the first transistor is connected to the first power supply signal end, and a second electrode of the first transistor is connected to the first electrode of the first drive transistor.

3. The pixel driving circuit according to claim 1, wherein: The charging module includes a second transistor, a gate of the second transistor is connected to the second drive signal terminal, a first electrode of the second transistor is connected to the first power signal terminal, and a second electrode of the second transistor is connected to the first electrode of the second drive transistor.

4. The pixel driving circuit according to claim 1, wherein: The data writing module includes a third transistor, a gate of the third transistor is connected to the third driving signal terminal, a first electrode of the third transistor is connected to the data signal terminal, and a second electrode of the third transistor is connected to the second electrode of the second driving transistor.

5. The pixel driving circuit according to claim 1, wherein: The first switch module includes a fourth transistor, a gate of the fourth transistor is connected to the fourth drive signal terminal, a first electrode of the fourth transistor is connected to the second power signal terminal, and a second electrode of the fourth transistor is connected to the second node.

6. The pixel driving circuit according to claim 1, wherein: The second switch module includes a fifth transistor, a gate of the fifth transistor is connected to the first drive signal terminal, a first electrode of the fifth transistor is connected to the reset signal terminal, and a second electrode of the fifth transistor is connected to the second node.

7. The pixel driving circuit according to claim 1, wherein: The first driving transistor and the second driving transistor are N-type transistors.

8. A driving method for driving the pixel driving circuit according to any one of claims 1 to 7, characterized in that: The pixel driving circuit includes: a first driving transistor, a second driving transistor, a charging module, a first capacitor, a second capacitor, a first switching module, a second switching module, a data writing module, a power supply voltage writing module and a light emitting element; The driving method at least includes: a charging stage, a data writing stage and a light emitting stage; In the charging stage, the charging module, the second driving transistor and the first switch module are turned on; the first power signal terminal charges the first capacitor and the second capacitor; In the data writing phase, the data writing module, the second driving transistor and the first switching module are turned on; the first capacitor and the second capacitor discharge the second driving transistor; During the light-emitting stage, the power supply voltage writing module, the first driving transistor and the second switching module are turned on; the reset signal end writes the reset signal into the second node, the first node changes according to the voltage change of the second node, and the first driving transistor is compensated, and the first voltage signal provided by the first power supply signal end drives the first driving transistor to form a current, which is transmitted to the light-emitting element.

9. A display panel, characterized in that: The pixel driving circuit comprises the pixel driving circuit according to any one of claims 1 to 7.

10. A display device, characterized in that: The display panel comprises the display panel according to claim 9.

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