A demodulation device for a continuous multicarrier signal oriented to efficient transmission

Abstract

The application relates to a demodulation device for continuous multicarrier signals aiming at efficient transmission in the field of digital signal processing, which comprises a digital shunt module, a multi-path matching filter module, a multi-path timing synchronization module, a multi-path frame header capture module, a multi-path descrambling and despreading module, a multi-path carrier synchronization module, a multi-path demapping and decoding and packet assembling module and a decoding module. The application can realize efficient transmission of FPGA, can extend to support demodulation of multiple modulation and spread spectrum coding modes and multiple rate continuous signals, can support 64-way or even more continuous multicarrier demodulation, and the performance loss of baseband demodulation is less than 0.5 dB. The application is suitable for processing more users and larger capacity high-throughput system gateway stations and satellite transponder load demodulators.

Description

Technical Field

[0001] This invention relates to a demodulation device for continuous multi-carrier signals for high-efficiency transmission in the field of digital signal processing. Based on multi-carrier signal splitting technology and continuous carrier demodulation technology, it is suitable for high-throughput system gateway stations and satellite transponder payload demodulators that handle more users and larger capacity. Background Technology

[0002] The multi-carrier splitting technology involved in this invention can use various methods such as channelization and polyphase filter banks to reconstruct or separate multiple signals. The multiple signals can be either burst signals or continuous signals. There is a lot of research on the overall demodulation technology of multiple burst signals, and the demodulation technology of single continuous signals is relatively mature. However, there is less research on the overall demodulation method of multiple continuous signals with different carrier rates and different modulation codes. Summary of the Invention

[0003] This paper proposes a method for FPGAs with high-efficiency transmission capabilities, which can demodulate various modulation spread spectrum coding schemes and multi-rate continuous signals.

[0004] The technical solution adopted in this invention is as follows:

[0005] A demodulation device for continuous multi-carrier signals for high-efficiency transmission includes a digital splitting module, a multi-channel matched filtering module, a multi-channel timing synchronization module, a multi-channel frame header acquisition module, a multi-channel descrambling and despreading module, a multi-channel carrier synchronization module, a multi-channel demapping and decoding packet assembly module, and a decoding module.

[0006] The digital splitter module is used to sample multiple continuous signals, convert the sampled data into working clock data related to each carrier rate, seamlessly split the multiple continuous signals within a uniformly divided processing time, and then label the carrier number and modulation and coding parameter information before outputting it to the multi-channel matched filter module.

[0007] The multi-channel matched filtering module is used to perform corresponding convolution operations according to the carrier number and modulation and coding parameter information within the processing time, and to perform matched filtering using the overlapping addition method of segmented filtering, and output the data of each carrier after matched filtering to the multi-channel timing synchronization module.

[0008] The multi-channel timing synchronization module is used to complete timing synchronization within the processing time, calculate the timing error of each carrier after matching filtering, perform interpolation digital resampling processing on each carrier based on the timing error, and select the best sampling point to output to the multi-channel frame header capture module.

[0009] The multi-channel frame header acquisition module is used to capture the frame header of the best sampling point of each carrier within the processing time, generate a frame header identifier, which is used to identify the start position of the frame header and the modulated data block. At the same time, it determines whether the link is locked or unlocked by judging the state of the captured frame header, attaches the link state along with the parameters to the front of each data channel, and outputs it to the multi-channel descrambling and despreading module.

[0010] The multi-channel descrambling and despreading module is used to despread the frame headers corresponding to each carrier within the processing time according to the frame header identifier and data enable output by the multi-channel frame header capture module. At the same time, it performs descrambling and despreading processing on the data of each carrier and serially outputs the attachment parameters, frame headers and data of each carrier to the multi-channel carrier synchronization module. Among them, the frame header is despread based on the known spreading sequence within the symbol, the data is descrambled once per frame, and despreading processing is performed after the data is descrambled.

[0011] The multi-carrier synchronization module is used to determine whether the synchronization loop of each carrier remains in tracking state or re-locks based on the link status; and performs frequency offset estimation, carrier tracking and phase ambiguity correction on the input carrier data within the processing time, and outputs the data after eliminating the remaining frequency offset and phase offset to the multi-path demapping and decoding packet assembly module.

[0012] The multi-path demapping and decoding packet assembly module is used to perform soft demapping on data with different modulation schemes based on the frame header start position and modulation coding parameter information within the processing time, and to split the data according to the code length and code rate, and then output it to the decoding module for decoding.

[0013] Furthermore, the multi-channel timing synchronization module includes a timing error estimation module, a timing error buffer module, an interpolation data selection module, an interpolation filter module, and an interpolation coefficient calculation module.

[0014] The timing error estimation module is used to estimate timing errors using the data of each carrier after matched filtering, and to cache the data of each carrier.

[0015] The timing error caching module is used to store the estimated timing error of each carrier within the current processing time in the cache, and to read the stored information from the previous processing time according to the current carrier number.

[0016] The interpolation coefficient calculation module is used to call the timing error information stored in the timing error cache module, calculate the interpolation coefficients, and output them to the interpolation filter module.

[0017] The interpolation data selection module is used to call the timing error information stored in the timing error cache module, cache the relevant data and base point control parameters of each carrier calculation base point in the current processing time, and read the stored information in the previous processing time according to the current carrier number, select the interpolation base point on each carrier data stream, and output it to the interpolation filter module.

[0018] The interpolation filter module is used to perform interpolation digital resampling processing and output the optimal sampling point.

[0019] Furthermore, the multi-carrier synchronization module includes a frequency offset estimation module, a frequency offset correction module, a loop tracking module, a phase correction module, a phase ambiguity correction module, a data buffer module, a frequency parameter buffer module, a loop status buffer module, a phase offset parameter buffer module, and a frame header related status buffer module;

[0020] The data caching module is used to cache the data processed by the multi-channel descrambling and despreading module;

[0021] The frequency offset estimation module is used to demodulate the data processed by the multi-channel descrambling and despreading module and perform FFT transformation, and search for the maximum value. The maximum value is the frequency offset estimate, and the frequency offset estimate is output to the frequency offset correction module.

[0022] The frequency offset correction module is used to call the data in the data cache module, perform up-conversion or down-conversion to eliminate the frequency offset according to the frequency offset estimate, output the eliminated frequency offset data to the loop tracking module, and output the data called from the data cache module to the phase correction module.

[0023] The loop tracking module uses a phase-locked loop based on a decision feedback Costas ring structure. It tracks the phase of the input signal to achieve loop locking through phase detection and loop filtering. It estimates the accumulated phase value and outputs it to the phase correction module. It also controls the loop state based on the link state information attached to the input data. When the link state is out of lock, it performs loop filtering to relock and initially resets the loop state buffer module. When the link state is locked, it maintains the current loop lock tracking state and controls the loop state buffer module to read and write the loop state information.

[0024] The phase correction module is used to perform up / down conversion on the input data based on the cumulative value of each carrier phase estimated by the loop tracking module, and outputs the frequency offset-corrected data to the phase ambiguity correction module.

[0025] The phase ambiguity correction module is used to perform correlation processing on the frame header sequence in each data stream through the frame header identifier, and to make a phase decision based on the phase of the correlation peak and correct the phase ambiguity caused by the phase-locked loop.

[0026] The frequency offset correction module, loop tracking module, phase correction module, and phase ambiguity correction module store the carrier state information, including the initial phase of the loop, the ending phase of the loop, the frequency offset, the phase accumulation value, and the final state of the register and the working mode, into the frequency parameter cache module, the loop state parameter module, the phase parameter cache module, and the frame header related state cache module, respectively, within the current processing time. In the next processing time, the corresponding state information of each carrier is read out.

[0027] Furthermore, the multi-path demapping and decoding packet assembly module includes a multi-path soft demapping module, a multi-path data buffer module, a pre-decoding data buffer module, and a multi-path parameter information buffer module;

[0028] The soft demapping module is used to perform soft demapping on data with various modulation schemes based on modulation parameters;

[0029] The multi-channel data buffer module is used to store multi-channel soft demapping data without frame headers into the buffer corresponding to each carrier number through buffering. At the same time, it reads the code length data corresponding to each carrier by synchronously updating the carrier number and encoding / decoding parameter information in the multi-channel parameter information buffer module and outputs it to the pre-decoding buffer module.

[0030] The pre-decoding buffer module is used to output the data to be decoded to the decoding module according to the code length of its current carrier.

[0031] Furthermore, in the digital splitting module, the evenly distributed processing time and carrier arrangement are implemented according to the following rules: when all carriers in a carrier group are non-spreading carriers, the processing time interval is L, which is the minimum carrier rate; when there are spreading carriers in a carrier group, the processing time interval is L*SS, which is the data length of the carrier with the maximum spreading ratio. max The interval is the processing time interval; where L is the minimum carrier rate data storage length, and SS... max This represents the maximum spreading ratio in the carrier group.

[0032] Compared with the prior art, the present invention has the following advantages:

[0033] 1. This invention is designed for FPGA implementation, has high transmission efficiency, and supports overall demodulation of multiple carrier rates, spread spectrum, and coding modulation methods for continuous carriers, making system applications more flexible.

[0034] 2. The demodulation support of this invention is scalable, supporting continuous multi-carrier demodulation of 64 or even more channels, with a baseband demodulation performance loss of less than 0.5dB. Attached Figure Description

[0035] Figure 1 This is a block diagram illustrating the implementation principle of the demodulation device for continuous multi-carrier signals of the present invention.

[0036] Figure 2 This invention provides a timing diagram of the data stream output by the digital splitter module of the present invention within the divided processing time.

[0037] Figure 3 This is a block diagram illustrating the implementation principle of the multi-channel timing synchronization module of the present invention;

[0038] Figure 4 This is a block diagram illustrating the implementation principle of the multi-carrier synchronization module of the present invention;

[0039] Figure 5 This is a block diagram illustrating the implementation principle of the multi-path demapping and decoding packet assembly module of this invention. Detailed Implementation

[0040] The main modules of the multi-channel continuous signal demodulation of the present invention will be described in further detail below with reference to the accompanying drawings.

[0041] Figure 1 This is a block diagram illustrating the implementation principle of the continuous multi-carrier signal demodulation method of the present invention, including a digital splitting module, a multi-channel matched filtering module, a multi-channel timing synchronization module, a multi-channel frame header acquisition module, a multi-channel descrambling and despreading module, a multi-channel carrier synchronization module, a multi-channel demapping and decoding packet assembly module, and a decoding module.

[0042] The digital splitter module samples multiple continuous signals, converts the sampled data into working clock data related to each carrier rate, and seamlessly segments the multiple continuous signals within a uniformly divided processing time. Within this divided processing time, each continuous signal is presented as a segment of discontinuous data, such as... Figure 2 As shown, the modulation and coding scheme, carrier number, and other parameter information are then appended before each carrier data.

[0043] In the digital splitter module, the evenly distributed processing time and carrier arrangement are implemented according to the following rules: when all carriers in a carrier group are non-spreading carriers, the processing time interval is L, which is the minimum carrier rate; when there are spreading carriers in a carrier group, the processing time interval is L*SS, which is the data length of the carrier with the maximum spreading ratio. max The interval is the processing time interval; where L is the minimum carrier rate data storage length, and SS... max This represents the maximum spreading ratio in the carrier group.

[0044] The multi-channel matched filtering module is used to perform corresponding convolution operations according to the carrier number and modulation and coding parameter information within the processing time, and to perform matched filtering using the overlapping addition method of segmented filtering, and output the data of each carrier after matched filtering to the multi-channel timing synchronization module.

[0045] The multi-channel timing synchronization module is used to complete timing synchronization within the processing time, calculate the timing error using the data of each carrier after matched filtering, perform interpolation digital resampling processing on each carrier based on the timing error, and select the best sampling point to output to the multi-channel frame header capture module.

[0046] like Figure 3 As shown, the multi-channel timing synchronization module includes a timing error estimation module, a timing error buffer module, an interpolation data selection module, an interpolation filter module, and an interpolation coefficient calculation module.

[0047] The timing error estimation module estimates timing errors using data from each carrier after matched filtering and caches the data for each carrier. The timing error caching module stores the estimated timing errors for each carrier within the current processing time in the cache and reads the stored information from the previous processing time based on the current carrier number. The interpolation coefficient calculation module calls the timing error information stored in the timing error caching module, calculates the interpolation coefficients, and outputs them to the interpolation filter module. The interpolation data selection module calls the timing error information stored in the timing error caching module, caches the relevant data and base point control parameters for each carrier calculation base point within the current processing time, reads the stored information from the previous processing time based on the current carrier number, selects the interpolation base point on each carrier data stream, and outputs it to the interpolation filter module. The interpolation filter module performs interpolation digital resampling processing and outputs the optimal sampling point.

[0048] The multi-channel frame header acquisition module is used to capture the frame header of the best sampling point of each carrier within the processing time, generate a frame header identifier, which is used to identify the start position of the frame header and the modulated data block. At the same time, it determines whether the link is locked or unlocked by judging the state of the captured frame header, attaches the link state along with the parameters to the front of each data channel, and outputs it to the multi-channel descrambling and despreading module.

[0049] The multi-channel descrambling and despreading module is used to despread the frame headers corresponding to each carrier within the processing time according to the frame header identifier and data enable output by the multi-channel frame header capture module. At the same time, it performs descrambling and despreading processing on the data of each carrier and serially outputs the attachment parameters, frame headers and data of each carrier to the multi-channel carrier synchronization module. Among them, the frame header is despread based on the known spreading sequence within the symbol, the data is descrambled once per frame, and despreading processing is performed after the data is descrambled.

[0050] The multi-carrier synchronization module is used to determine whether the synchronization loop of each carrier remains in tracking state or re-locks based on the link status; and performs frequency offset estimation, carrier tracking and phase ambiguity correction on the input carrier data within the processing time, and outputs the data after eliminating the remaining frequency offset and phase offset to the multi-path demapping and decoding packet assembly module.

[0051] like Figure 4 As shown, the multi-carrier synchronization module includes a frequency offset estimation module, a frequency offset correction module, a loop tracking module, a phase correction module, a phase ambiguity correction module, a data buffer module, a frequency parameter buffer module, a loop status buffer module, a phase offset parameter buffer module, and a frame header related status buffer module.

[0052] The data buffer module buffers the data processed by the multi-channel descrambling and despreading module. The frequency offset estimation module demodulates and performs FFT transform on the data processed by the multi-channel descrambling and despreading module, searches for the maximum value (which is the frequency offset estimate), and outputs the frequency offset estimate to the frequency offset correction module. The frequency offset correction module calls the data from the data buffer module, performs up-conversion or down-conversion to eliminate the frequency offset based on the frequency offset estimate, outputs the eliminated frequency offset data to the loop tracking module, and outputs the data called from the data buffer module to the phase correction module. The loop tracking module uses a phase-locked loop based on a decision feedback Costas ring structure. It tracks the phase of the input signal to achieve loop locking through phase detection and loop filtering, estimates the accumulated phase value, outputs it to the phase correction module, and performs loop state control based on the link state information attached to the input data. When the link state is out of lock, it performs loop filtering to relock the loop and initializes the loop state buffer module. The system is reset, and when the link is in the locked state, it maintains the current loop-locked tracking state and controls the loop state cache module to read and write loop state information. The phase correction module is used to perform up / down conversion on the input data based on the phase accumulation value of each carrier estimated by the loop tracking module, and outputs the frequency offset-corrected data to the phase ambiguity correction module. The phase ambiguity correction module is used to perform correlation processing on the frame header sequence in each data path through the frame header identifier, and correct the phase ambiguity caused by the phase-locked loop based on the phase judgment of the correlation peak. The frequency offset correction module, loop tracking module, phase correction module, and phase ambiguity correction module store the carrier state information, including the initial phase of the loop, the end phase of the loop, the frequency offset, the phase accumulation value, and the last state of the register and the working mode, one by one into the frequency parameter cache module, the loop state parameter module, the phase parameter cache module, and the frame header related state cache module, and read out the corresponding state information of each carrier in the next processing time.

[0053] The multi-path demapping and decoding packet assembly module is used to perform soft demapping on data with different modulation schemes based on the frame header start position and modulation coding parameter information within the processing time, and to split the data according to the code length and code rate, and then output it to the decoding module for decoding.

[0054] like Figure 5 As shown, the multi-path demapping and decoding packet assembly module includes a multi-path soft demapping module, a multi-path data buffer module, a pre-decoding data buffer module, and a multi-path parameter information buffer module;

[0055] The soft demapping module is used to perform soft demapping on data of various modulation modes according to the modulation parameters; the multi-channel data buffer module is used to store the multi-channel soft demapping data without frame headers into the buffer corresponding to each carrier number through the buffer, and at the same time reads the code length data corresponding to each carrier by synchronously updating the carrier number and encoding / decoding parameter information in the multi-channel parameter information buffer module, and outputs it to the pre-decoding buffer module; the pre-decoding buffer module is used to output the data to be decoded to the decoding module according to the code length of each current carrier.

Claims

1. A demodulation device for continuous multi-carrier signals for high-efficiency transmission, characterized in that, It includes a digital splitter module, a multi-channel matched filter module, a multi-channel timing synchronization module, a multi-channel frame header capture module, a multi-channel descrambling and despreading module, a multi-channel carrier synchronization module, a multi-channel demapping and decoding packet assembly module, and a decoding module; The digital splitter module is used to sample multiple continuous signals, convert the sampled data into working clock data related to each carrier rate, seamlessly split the multiple continuous signals within a uniformly divided processing time, and then label the carrier number and modulation and coding parameter information before outputting it to the multi-channel matched filter module. The multi-channel matched filtering module is used to perform corresponding convolution operations according to the carrier number and modulation and coding parameter information within the processing time, and to perform matched filtering using the overlapping addition method of segmented filtering, and output the data of each carrier after matched filtering to the multi-channel timing synchronization module. The multi-channel timing synchronization module is used to complete timing synchronization within the processing time, calculate the timing error using the data of each carrier after matched filtering, perform interpolation digital resampling processing on each carrier based on the timing error, and select the best sampling point to output to the multi-channel frame header capture module. The multi-channel frame header acquisition module is used to capture the frame header of the best sampling point of each carrier within the processing time, generate a frame header identifier, which is used to identify the start position of the frame header and the modulated data block. At the same time, it determines whether the link is locked or unlocked by judging the state of the captured frame header, attaches the link state along with the parameters to the front of each data channel, and outputs it to the multi-channel descrambling and despreading module. The multi-channel descrambling and despreading module is used to despread the frame headers corresponding to each carrier within the processing time according to the frame header identifier and data enable output by the multi-channel frame header capture module. At the same time, it performs descrambling and despreading processing on the data of each carrier and serially outputs the attachment parameters, frame headers and data of each carrier to the multi-channel carrier synchronization module. Among them, the frame header is despread based on the known spreading sequence within the symbol, the data is descrambled once per frame, and despreading processing is performed after the data is descrambled. The multi-carrier synchronization module is used to determine whether the synchronization loop of each carrier remains in tracking state or re-locks based on the link status; and performs frequency offset estimation, carrier tracking and phase ambiguity correction on the input carrier data within the processing time, and outputs the data after eliminating the remaining frequency offset and phase offset to the multi-path demapping and decoding packet assembly module. The multi-path demapping and decoding packet assembly module is used to perform soft demapping on data with different modulation schemes based on the frame header start position and modulation coding parameter information within the processing time, and to split the data according to the code length and code rate, and then output it to the decoding module for decoding.

2. The demodulation device for continuous multi-carrier signals for high-efficiency transmission according to claim 1, characterized in that, The multi-channel timing synchronization module includes a timing error estimation module, a timing error buffer module, an interpolation data selection module, an interpolation filter module, and an interpolation coefficient calculation module. The timing error estimation module is used to estimate timing errors using the data from each carrier after matched filtering, and to cache the data from each carrier. The timing error caching module is used to store the estimated timing error of each carrier within the current processing time in the cache, and to read the stored information from the previous processing time according to the current carrier number. The interpolation coefficient calculation module is used to call the timing error information stored in the timing error cache module, calculate the interpolation coefficients, and output them to the interpolation filter module. The interpolation data selection module is used to call the timing error information stored in the timing error cache module, cache the relevant data and base point control parameters of each carrier calculation base point in the current processing time, and read the stored information in the previous processing time according to the current carrier number, select the interpolation base point on each carrier data stream, and output it to the interpolation filter module. The interpolation filter module is used to perform interpolation digital resampling processing and output the optimal sampling point.

3. The demodulation device for continuous multi-carrier signals for high-efficiency transmission according to claim 1, characterized in that, The multi-carrier synchronization module includes a frequency offset estimation module, a frequency offset correction module, a loop tracking module, a phase correction module, a phase ambiguity correction module, a data buffer module, a frequency parameter buffer module, a loop status buffer module, a phase offset parameter buffer module, and a frame header related status buffer module; The data caching module is used to cache the data processed by the multi-channel descrambling and despreading module; The frequency offset estimation module is used to demodulate the data processed by the multi-channel descrambling and despreading module and perform FFT transformation, and search for the maximum value. The maximum value is the frequency offset estimate, and the frequency offset estimate is output to the frequency offset correction module. The frequency offset correction module is used to call the data in the data cache module, perform up-conversion or down-conversion to eliminate the frequency offset according to the frequency offset estimate, output the eliminated frequency offset data to the loop tracking module, and output the data called from the data cache module to the phase correction module. The loop tracking module uses a phase-locked loop based on a decision feedback Costas ring structure. It tracks the phase of the input signal to achieve loop locking through phase detection and loop filtering. It estimates the accumulated phase value and outputs it to the phase correction module. It also controls the loop state based on the link state information attached to the input data. When the link state is out of lock, it performs loop filtering to relock and initially resets the loop state buffer module. When the link state is locked, it maintains the current loop lock tracking state and controls the loop state buffer module to read and write the loop state information. The phase correction module is used to perform up / down conversion on the input data based on the cumulative value of each carrier phase estimated by the loop tracking module, and outputs the frequency offset-corrected data to the phase ambiguity correction module. The phase ambiguity correction module is used to perform correlation processing on the frame header sequence in each data stream through the frame header identifier, and to make a phase decision based on the phase of the correlation peak and correct the phase ambiguity caused by the phase-locked loop. The frequency offset correction module, loop tracking module, phase correction module, and phase ambiguity correction module store the carrier state information, including the initial phase of the loop, the ending phase of the loop, the frequency offset, the phase accumulation value, and the final state of the register and the working mode, into the frequency parameter cache module, the loop state parameter module, the phase parameter cache module, and the frame header related state cache module, respectively, within the current processing time. In the next processing time, the corresponding state information of each carrier is read out.

4. The demodulation device for continuous multi-carrier signals for high-efficiency transmission according to claim 1, characterized in that, The multi-channel demapping and decoding packet assembly module includes a multi-channel soft demapping module, a multi-channel data buffer module, a pre-decoding data buffer module, and a multi-channel parameter information buffer module; The soft demapping module is used to perform soft demapping on data with various modulation schemes based on modulation parameters; The multi-channel data buffer module is used to store multi-channel soft demapping data without frame headers into the buffer corresponding to each carrier number through buffering. At the same time, it reads the code length data corresponding to each carrier by synchronously updating the carrier number and encoding / decoding parameter information in the multi-channel parameter information buffer module and outputs it to the pre-decoding buffer module. The pre-decoding buffer module is used to output the data to be decoded to the decoding module according to the code length of its current carrier.

5. The demodulation device for continuous multi-carrier signals for high-efficiency transmission according to claim 1, characterized in that, In the digital splitting module, the evenly divided processing time and carrier arrangement are implemented according to the following rules: when all carriers in the carrier group are non-spreading carriers, the processing time interval is L-length interval of the lowest carrier rate. When there is a spread spectrum carrier in the carrier group, the data length L*SS of the carrier with the maximum spreading ratio is used. max The interval is the processing time interval; where L is the minimum carrier rate data storage length, and SS... max This represents the maximum spreading ratio in the carrier group.

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