High-frequency circuits and communication devices

Abstract

The high-frequency circuit (1) comprises: a transmission filter (31T) for B66-Tx connected to a power amplifier (61); a transmission filter (42T) for B25-Tx connected to a power amplifier (62); a switch circuit (20) having terminals (20a, 20b, 20c, and 20d); a switch circuit (51) having a common terminal (51a), terminals (51b, and 51c); and a switch circuit (52) having a common terminal (52a), terminals (52b, and 52c), wherein the terminal (20a) is connected to the common terminal (51a), the terminal (20b) is connected to the common terminal (52a), the terminal (51b) is connected to the transmission filter (31T), and the terminal (52b) is connected to the transmission filter (42T), the number of stacking of the switch circuit (51) is smaller than the number of stacking of the switch circuit (20), and the number of stacking of the switch circuit (52) is smaller than the number of stacking of the switch circuit (20).

Description

Technical Field

[0001] The present invention relates to a high-frequency circuit and a communication device for processing high-frequency signals. Background Art

[0002] Patent Document 1 discloses a high-frequency module that features multiple duplexers (transmit filters and receive filters) connected to a single switching circuit, enabling simultaneous transmission of multiple signals. A phase circuit is placed between the duplexers and the select terminals of the switch. This prevents harmonics of the transmitted signal from leaking from one duplexer to another, or from one signal path to another, through the switch.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: International Publication No. 2015 / 041125 Summary of the Invention

[0006] Problems to be solved by the invention

[0007] However, in the high-frequency module disclosed in Patent Document 1, all duplexers that simultaneously transmit multiple signals are connected to a single switching circuit. This increases the number of transmission paths connected to the switching circuit, and the number of terminals in the switching circuit increases. When multiple transmission signals are simultaneously input to the switching circuit, the voltage applied to the terminals increases, causing increased signal distortion and deteriorating signal quality. Furthermore, increasing the voltage resistance of the switching circuit would increase the size of the switching circuit.

[0008] Therefore, the present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a compact high-frequency circuit and a communication device that suppress degradation of transmission performance when a plurality of signals are transmitted simultaneously.

[0009] Solutions for solving problems

[0010] A high-frequency circuit according to one embodiment of the present invention comprises: a first power amplifier and a second power amplifier; a first transmission filter connected to the first power amplifier, wherein the passband of the first transmission filter includes a first transmission band included in the first frequency band; a second transmission filter connected to the second power amplifier, wherein the passband of the second transmission filter includes a second transmission band included in a second frequency band different from the first frequency band; a first switch circuit having a first antenna connection terminal, a second antenna connection terminal, a first terminal, and a second terminal; a second switch circuit having a first common terminal, a third terminal, and a fourth terminal; and a third switch circuit having a second common terminal, a fifth terminal, and a sixth terminal, wherein the first terminal is connected to the first common terminal, and the second terminal is connected to the second common terminal. The common terminal is connected, the third terminal is connected to the first transmit filter, and the fifth terminal is connected to the second transmit filter. The first switching circuit has a first switch respectively configured in series between the first antenna connection terminal and the first terminal, between the first antenna connection terminal and the second terminal, between the second antenna connection terminal and the first terminal, and between the second antenna connection terminal and the second terminal. The second switching circuit has a second switch respectively configured in series between the first common terminal and the third terminal, and between the first common terminal and the fourth terminal. The third switching circuit has a third switch respectively configured in series between the second common terminal and the fifth terminal, and between the second common terminal and the sixth terminal. The stacking number of the second switches is less than the stacking number of the first switches, and the stacking number of the third switches is less than the stacking number of the first switch.

[0011] Effects of the Invention

[0012] According to the present invention, it is possible to provide a compact high-frequency circuit and a communication device that suppress degradation of transmission performance when a plurality of signals are transmitted simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a circuit configuration diagram of a high-frequency circuit and a communication device according to an embodiment.

[0014] Figure 2A 2 is a circuit configuration diagram of a first switching circuit according to an embodiment.

[0015] Figure 2B 2 is a circuit configuration diagram of a second switching circuit according to the embodiment.

[0016] Figure 2C 3 is a circuit configuration diagram of a third switching circuit according to the embodiment.

[0017] Figure 3 This is a diagram showing a circuit state of a switch circuit in a dual uplink configuration in a high-frequency circuit according to an embodiment.

[0018] Figure 4 3 is a circuit configuration diagram of a high-frequency circuit according to a comparative example.

[0019] Figure 5 It is a diagram showing a circuit state of a switch circuit in a dual uplink configuration in a high-frequency circuit according to a comparative example.

[0020] Figure 6 It is a circuit configuration diagram of a high-frequency circuit according to a modification of the embodiment. DETAILED DESCRIPTION

[0021] Below, the embodiments of the present invention are described in detail. In addition, the embodiments described below all represent general or specific examples. The numerical values, shapes, materials, structural elements, configurations of structural elements and connection methods shown in the following embodiments are examples, and their purpose is not to limit the present invention. The structural elements of the following embodiments and modifications that are not recorded in the independent claims are described as arbitrary structural elements. In addition, the sizes or size ratios of the structural elements shown in the drawings are not necessarily strict. In each figure, substantially the same structure is marked with the same mark, and repeated descriptions are sometimes omitted or simplified.

[0022] In the following, terms such as parallel and perpendicular that indicate the relationship between elements, terms such as rectangular that indicate the shape of an element, and numerical ranges indicate substantially equivalent ranges, including differences of, for example, several percent, and do not necessarily indicate strict meanings.

[0023] In the following embodiments, "A and B are connected" is defined as not only being in contact with each other but also being electrically connected to each other via a conductor electrode, conductor terminal, wiring, or other circuit components. Furthermore, "connected between A and B" means being connected to both A and B.

[0024] In the following, a "transmission path" refers to a transmission line consisting of wiring that propagates high-frequency transmission signals, electrodes directly connected to the wiring, and terminals directly connected to the wiring or electrodes. Furthermore, a "reception path" refers to a transmission line consisting of wiring that propagates high-frequency reception signals, electrodes directly connected to the wiring, and terminals directly connected to the wiring or electrodes.

[0025] (Implementation Method)

[0026] [1. Configuration of High-Frequency Circuit 1 and Communication Device 5]

[0027] Figure 11 is a circuit diagram of a high-frequency circuit 1 and a communication device 5 according to an embodiment. As shown in the figure, the communication device 5 includes the high-frequency circuit 1, antennas 2A and 2B, an RF signal processing circuit (RFIC) 3, and a baseband signal processing circuit (BBIC) 4.

[0028] Antenna 2A is, for example, a main antenna, which is used preferentially over antenna 2B in terms of antenna performance, and is an antenna element capable of transmitting and receiving signals in the first, second, third, and fourth frequency bands. Antenna 2B is, for example, a sub-antenna, which is an antenna element capable of transmitting and receiving signals in the first, second, third, and fourth frequency bands.

[0029] RFIC 3 is an RF signal processing circuit that processes high-frequency signals transmitted and received by antennas 2A and 2B. Specifically, RFIC 3 performs signal processing such as down-conversion on the received signal input via high-frequency circuit 1, and outputs the resulting received signal to BBIC 4. Furthermore, RFIC 3 performs signal processing such as up-conversion on the transmitted signal input from BBIC 4, and outputs the resulting transmitted signal to the transmission path of high-frequency circuit 1.

[0030] BBIC 4 is a circuit that performs signal processing using an intermediate frequency band lower than the frequency of the high-frequency signal propagating through high-frequency circuit 1. The signal processed by BBIC 4 is used as an image signal for displaying an image or as an audio signal for making a call via a speaker.

[0031] RFIC 3 also functions as a control unit that controls the connection of a switch circuit (described later) included in high-frequency circuit 1 based on the frequency band used. Specifically, RFIC 3 switches the connection of the switch circuit included in high-frequency circuit 1 using a control signal (not shown). Alternatively, the control unit may be provided external to RFIC 3, for example, in high-frequency circuit 1 or BBIC 4.

[0032] Next, the detailed circuit configuration of the high-frequency circuit 1 will be described.

[0033] like Figure 1 As shown, the high-frequency circuit 1 includes switch circuits 20 , 50 , 51 , 52 , 53 , and 54 , transmission filters 31T, 34T, 42T, and 43T, reception filters 31R, 32R, 33R, 34R, 41R, 42R, 43R, and 44R, and power amplifiers 61 and 62 .

[0034] In this embodiment, four frequency bands are respectively allocated to specific frequency bands, for example, for LTE (Long Term Evolution) or 5GNR (5th Generation New Radio). The first frequency band is, for example, Band 66 (transmit frequency band: 1710MHz-1780MHz, receive frequency band: 2110MHz-2200MHz). The second frequency band is, for example, Band 25 (transmit frequency band: 1850MHz-1915MHz, receive frequency band: 1930MHz-1995MHz). The third frequency band is, for example, Band 1 (transmit frequency band: 1920MHz-1980MHz, receive frequency band: 2110MHz-2170MHz). The fourth frequency band is, for example, Band 3 (transmit frequency band: 1710MHz-1785MHz, receive frequency band: 1805MHz-1880MHz).

[0035] In the above frequency allocation, the transmission band of Band 3 includes the transmission band of Band 66, and the reception band of Band 66 includes the reception band of Band 1. Otherwise, there is no overlap or inclusion among the four frequency bands.

[0036] Due to the relationship between the frequency bands described above, the high-frequency circuit 1 according to the present embodiment is configured not to perform dual uplinks of Band 66 and Band 3 and not to perform dual downlinks of Band 66 and Band 1.

[0037] With the above-mentioned structure, the high-frequency circuit 1 is capable of performing (1) dual uplink transmission of a transmission signal of the first transmission frequency band (B66-Tx) included in the first frequency band (Band 66) and a transmission signal of the second transmission frequency band (B25-Tx) included in the second frequency band (Band 25), (2) dual downlink reception of a reception signal of the first reception frequency band (B66-Rx) included in the first frequency band (Band 66) and a reception signal of the second reception frequency band (B25-Rx) included in the second frequency band (Band 25), (3) dual uplink transmission of a transmission signal of the third transmission frequency band (B1-Tx) included in the third frequency band (Band 1) and a transmission signal of the fourth transmission frequency band (B3-Tx) included in the fourth frequency band (Band 3), and (4) dual downlink reception of a reception signal of the third reception frequency band (B1-Rx) included in the third frequency band (Band 1) and a reception signal of the fourth reception frequency band (B3-Tx) included in the fourth frequency band (Band 3). 3) dual downlink of the reception signal of the fourth reception frequency band (B3-Rx) included in the embodiment.

[0038] The transmission filter 31T is an example of a first transmission filter having B66-Tx as a passband. The input terminal of the transmission filter 31T is connected to the power amplifier 61 via the switch circuit 53 , and the output terminal is connected to the terminal 51 b .

[0039] The transmission filter 34T is an example of a fourth transmission filter having a passband of B3 -Tx. The input terminal of the transmission filter 34T is connected to the power amplifier 61 via the switch circuit 53 , and the output terminal is connected to the terminal 51 c .

[0040] The reception filter 31R is an example of a first reception filter having B66-Rx as a passband, and its input terminal is connected to the terminal 51 b .

[0041] The reception filter 32R is an example of a fifth reception filter having a passband of B25-Rx, and its input terminal is connected to the terminal 51 b .

[0042] The reception filter 33R is an example of a seventh reception filter having a passband of B1 -Rx, and its input terminal is connected to the terminal 51 c .

[0043] The reception filter 34R is an example of a fourth reception filter having a passband of B3 -Rx, and its input terminal is connected to the terminal 51 c .

[0044] The transmission filter 42T is an example of a second transmission filter having B25-Tx as a passband. An input terminal of the transmission filter 42T is connected to the power amplifier 62 via the switch circuit 54 , and an output terminal of the transmission filter 42T is connected to the terminal 52 b .

[0045] The transmission filter 43T is an example of a third transmission filter having a passband of B1 -Tx. The input terminal of the transmission filter 43T is connected to the power amplifier 62 via the switch circuit 54 , and the output terminal is connected to the terminal 52 c .

[0046] The reception filter 41R is an example of a sixth reception filter having a passband of B66-Rx, and its input terminal is connected to the terminal 52 b .

[0047] The reception filter 42R is an example of a second reception filter having B25-Rx as a passband, and its input terminal is connected to the terminal 52 b .

[0048] The reception filter 43R is an example of a third reception filter having a passband of B1 -Rx, and its input terminal is connected to the terminal 52 c .

[0049] The reception filter 44R is an example of an eighth reception filter having a passband of B3 -Rx, and its input terminal is connected to the terminal 52 c .

[0050] Transmit filters 31T and 34T, and receive filters 31R, 32R, 33R, and 34R form a first multiplexer capable of selectively transmitting high-frequency signals in Band 66 and Band 3, and receiving high-frequency signals in Band 66, Band 25, Band 1, and Band 3. The first multiplexer is a collection of filters connected between the switch circuit 51 and the power amplifier 61. The first multiplexer does not include a transmit filter with a passband of B25-Tx or a transmit filter with a passband of B1-Tx.

[0051] Transmit filters 42T and 43T, and receive filters 41R, 42R, 43R, and 44R form a second multiplexer capable of selectively transmitting high-frequency signals in Band 25 and Band 1, and receiving high-frequency signals in Band 66, Band 25, Band 1, and Band 3. The second multiplexer is a collection of filters connected between the switch circuit 52 and the power amplifier 62. The second multiplexer does not include a transmit filter with a passband of B66-Tx or a transmit filter with a passband of B3-Tx.

[0052] Power amplifier 61 is an example of a first power amplifier, and its input terminal is connected to switch circuit 50, and its output terminal is connected to switch circuit 53. Power amplifier 62 is an example of a second power amplifier, and its input terminal is connected to switch circuit 50, and its output terminal is connected to switch circuit 54. Power amplifiers 61 and 62 are power amplifiers composed of transistors, etc., for example.

[0053] The switch circuit 20 is an example of a first switch circuit, and includes a terminal 20 a (first terminal), a terminal 20 b (second terminal), a terminal 20 c (first antenna connection terminal), and a terminal 20 d (second antenna connection terminal).

[0054] The terminal 20c is connected to the antenna 2A, and the terminal 20d is connected to the antenna 2B. In addition, the terminal 20a is connected to the common terminal 51a, and the terminal 20b is connected to the common terminal 52a.

[0055] In the switch circuit 20 , conduction between the terminal 20 a and the terminal 20 c and between the terminal 20 a and the terminal 20 d is exclusively selected, and conduction between the terminal 20 b and the terminal 20 c and between the terminal 20 b and the terminal 20 d is exclusively selected.

[0056] The switch circuit 20 is, for example, a DPDT (Double Pole Double Throw) type switch circuit having terminals 20a, 20b, 20c, and 20d. Alternatively, the switch circuit 20 may be a DP3T (Double Pole 3Throw) type switch circuit or a DP4T (Double Pole 4Throw) type switch circuit. In this case, the required terminals can be used depending on the number of frequency bands to be used.

[0057] Switch circuit 51 is an example of a second switch circuit and includes a common terminal 51a (first common terminal), a terminal 51b (third terminal), and a terminal 51c (fourth terminal). It exclusively switches between the conduction between common terminal 51a and terminal 51b, and between common terminal 51a and terminal 51c. Common terminal 51a is connected to terminal 20a, terminal 51b is connected to transmit filter 31T and receive filters 31R and 32R, and terminal 51c is connected to transmit filter 34T and receive filters 33R and 34R. Thus, switch circuit 51 switches between the connection between transmit filter 31T, receive filter 31R, and 32R and switch circuit 20, and between the connection between transmit filter 34T, receive filter 33R, and 34R and switch circuit 20.

[0058] Switch circuit 52 is an example of a third switch circuit and includes a common terminal 52a (second common terminal), a terminal 52b (fifth terminal), and a terminal 52c (sixth terminal). It exclusively switches between the conduction between common terminal 52a and terminal 52b, and between common terminal 52a and terminal 52c. Common terminal 52a is connected to terminal 20b, terminal 52b is connected to transmit filter 42T and receive filters 41R and 42R, and terminal 52c is connected to transmit filter 43T and receive filters 43R and 44R. Thus, switch circuit 52 switches between the connection between transmit filter 42T, receive filters 41R, and 42R and switch circuit 20, and between transmit filter 43T, receive filters 43R, and 44R and switch circuit 20.

[0059] Each of the switch circuits 51 and 52 is, for example, a SPDT (Single Pole Double Throw) type switch circuit.

[0060] The switch circuit 53 includes a common terminal 53a, terminals 53c, and 53d, and exclusively switches between the conduction between the common terminal 53a and the terminal 53c, and between the conduction between the common terminal 53a and the terminal 53d. The common terminal 53a is connected to the power amplifier 61, the terminal 53c is connected to the transmit filter 31T, and the terminal 53d is connected to the transmit filter 34T. Thus, the switch circuit 53 switches between the connection between the transmit filter 31T and the power amplifier 61, and between the connection between the transmit filter 34T and the power amplifier 61.

[0061] Switch circuit 54 includes a common terminal 54a, terminals 54c, and 54d, and exclusively switches between the conduction between common terminal 54a and terminal 54c, and between common terminal 54a and terminal 54d. Common terminal 54a is connected to power amplifier 62, terminal 54c is connected to transmit filter 42T, and terminal 54d is connected to transmit filter 43T. Thus, switch circuit 54 switches between the connection between transmit filter 42T and power amplifier 62, and between transmit filter 43T and power amplifier 62.

[0062] The switch circuit 50 includes a terminal 50 a , a terminal 50 b , a terminal 50 c , and a terminal 50 d .

[0063] The terminal 50c is connected to the power amplifier 61, and the terminal 50d is connected to the power amplifier 62. The terminals 50a and 50b are connected to different terminals of the RFIC 3, respectively.

[0064] In the switch circuit 50 , conduction between the terminal 50 a and the terminal 50 c and between the terminal 50 a and the terminal 50 d is exclusively selected, and conduction between the terminal 50 b and the terminal 50 c and between the terminal 50 b and the terminal 50 d is exclusively selected.

[0065] The switch circuit 50 is, for example, a DPDT type switch circuit. Alternatively, the switch circuit 50 may be a DP3T type, a DP4T type, or the like. In this case, required terminals may be used depending on the number of frequency bands to be used.

[0066] Furthermore, an impedance matching circuit may be inserted between the aforementioned circuit components constituting the high-frequency circuit 1 .

[0067] With the above configuration, high-frequency circuit 1 arbitrarily distributes high-frequency signals of Band 66, Band 25, Band 1, and Band 3 to antennas 2A and 2B by switching the connection states of switch circuits 20 and 50 to 54, thereby enabling simultaneous transmission of dual uplink and dual downlink signals as described in (1) to (4) above. Here, the first multiplexer does not include a transmit filter for Band 25 or a transmit filter for Band 1, and the second multiplexer does not include a transmit filter for Band 66 or a transmit filter for Band 3, thereby providing a compact high-frequency circuit 1 capable of simultaneous transmission of dual uplink and dual downlink signals.

[0068] Furthermore, the high-frequency circuit of the present invention only needs to have at least Figure 1 The power amplifiers 61 and 62, the transmission filters 31T and 43T, and the switch circuits 20, 51, and 52 among the circuit components shown in FIG.

[0069] [2. Configuration of Switching Circuit According to Embodiment]

[0070] Next, the circuit configuration of the switch circuits 20 , 51 , and 52 constituting the high-frequency circuit 1 will be described.

[0071] Figure 2A 2 is a circuit diagram of the switch circuit 20 according to the embodiment. As shown in the figure, the switch circuit 20 includes switches 210 , 220 , 230 , 240 , 215 , and 235 in addition to terminals 20 a , 20 b , 20 c , and 20 d .

[0072] Switch 210 is an example of a first switch and is a so-called series switch arranged in series between terminal 20c and terminal 20a. Switch 220 is an example of a first switch and is a so-called series switch arranged in series between terminal 20d and terminal 20a. Switch 230 is an example of a first switch and is a so-called series switch arranged in series between terminal 20c and terminal 20b. Switch 240 is an example of a first switch and is a so-called series switch arranged in series between terminal 20d and terminal 20b.

[0073] Here, the switch being arranged in series between terminal a and terminal b means that, in the switch that switches conduction and non-conduction between the two terminals, one of the two terminals is connected to terminal a and the other is connected to terminal b.

[0074] The switch 215 is an example of a fourth switch and is a so-called shunt switch connected between the terminal 20a and the ground. The switch 235 is an example of a fourth switch and is a so-called shunt switch connected between the terminal 20b and the ground.

[0075] The first and fourth switches that constitute the switch circuit 20 are each composed of one or more semiconductor elements connected in series. Each of the one or more semiconductor elements is, for example, a FET (Field Effect Transistor) consisting of a source electrode, a drain electrode, and a gate electrode. In each of the first and fourth switches, the number of semiconductor elements connected in series is defined as the stack number.

[0076] In addition, switches 215 and 235 may not exist.

[0077] Figure 2B 1 is a circuit configuration diagram of a switch circuit 51 according to an embodiment. As shown in the figure, the switch circuit 51 includes switches 511 , 515 , 512 , and 516 in addition to a common terminal 51 a , terminals 51 b , and 51 c .

[0078] The switch 511 is an example of a second switch and is a so-called series switch arranged in series between the common terminal 51a and the terminal 51b. The switch 515 is an example of a second switch and is a so-called series switch arranged in series between the common terminal 51a and the terminal 51c.

[0079] The switch 512 is an example of a fifth switch and is a so-called parallel switch connected between the terminal 51b and the ground. The switch 516 is an example of a fifth switch and is a so-called parallel switch connected between the terminal 51c and the ground.

[0080] The second and fifth switches constituting switch circuit 51 are each composed of one or more semiconductor elements connected in series. Each of the one or more semiconductor elements is, for example, a FET consisting of a source electrode, a drain electrode, and a gate electrode. In each of the second and fifth switches, the number of semiconductor elements connected in series is defined as the stack number.

[0081] In addition, switches 512 and 516 may not exist.

[0082] Figure 2C 1 is a circuit configuration diagram of the switch circuit 52 according to the embodiment. As shown in the figure, the switch circuit 52 includes switches 521 , 525 , 522 , and 526 in addition to a common terminal 52a , terminals 52b , and 52c .

[0083] The switch 521 is an example of a third switch and is a so-called series switch arranged in series between the common terminal 52a and the terminal 52b. The switch 525 is an example of a third switch and is a so-called series switch arranged in series between the common terminal 52a and the terminal 52c.

[0084] The switch 522 is an example of a sixth switch and is a so-called parallel switch connected between the terminal 52b and the ground. The switch 526 is an example of a sixth switch and is a so-called parallel switch connected between the terminal 52c and the ground.

[0085] The third and sixth switches constituting switch circuit 52 are each composed of one or more semiconductor elements connected in series. Each of the one or more semiconductor elements is, for example, a FET consisting of a source electrode, a drain electrode, and a gate electrode. In each of the third and sixth switches, the number of semiconductor elements connected in series is defined as the stack number.

[0086] In addition, switches 522 and 526 may not exist.

[0087] Figure 3 This diagram shows the circuit states of the switch circuits 20, 51, and 52 in the high-frequency circuit 1 according to the embodiment during dual uplink operation. This diagram shows the circuit states during dual uplink operation, where a transmit signal in a first transmission frequency band (B66-Tx) included in a first frequency band (Band 66) and a transmit signal in a second transmission frequency band (B25-Tx) included in a second frequency band (Band 25) are simultaneously transmitted.

[0088] like Figure 3 As shown, the transmission signal of B66-Tx is output to antenna 2A via terminal 51b, switch 511, common terminal 51a, terminal 20a, switch 210, and terminal 20c. At the same time, the transmission signal of B25-Tx is output to antenna 2B via terminal 52b, switch 521, common terminal 52a, terminal 20b, switch 240, and terminal 20d.

[0089] At this time, only a single transmission signal flows through each of the switch circuits 51 and 52. In contrast, two transmission signals flow simultaneously through the switch circuit 20. When a transmission signal flows through the switch circuit, the switch that becomes non-conductive in order to cut off the transmission signal needs to have a withstand voltage performance corresponding to the transmission power of the transmission signal.

[0090] For example, the non-conductive switch 515 in the switch circuit 51 needs to have a withstand voltage corresponding to the transmission power of the B66-Tx transmission signal. Furthermore, the non-conductive switch 525 in the switch circuit 52 needs to have a withstand voltage corresponding to the transmission power of the B25-Tx transmission signal.

[0091] In contrast, for example, the switch 220 in the non-conductive state in the switch circuit 20 must satisfy the withstand voltage corresponding to the B66-Tx transmission signal applied from the terminal 20a and the withstand voltage corresponding to the B25-Tx transmission signal applied from the terminal 20d.

[0092] Furthermore, for example, the switch 230 in the non-conductive state in the switch circuit 20 must satisfy the withstand voltage corresponding to the B66-Tx transmission signal applied from the terminal 20 c and the withstand voltage corresponding to the B25-Tx transmission signal applied from the terminal 20 b .

[0093] That is, the withstand voltage performance of the second switch as the series switch constituting the switch circuit 51 and the third switch as the series switch constituting the switch circuit 52 may be lower than the withstand voltage performance of the first switch as the series switch constituting the switch circuit 20 .

[0094] Regarding the withstand voltage of a switch, the greater the number of stacked semiconductor elements constituting the switch, the higher the withstand voltage of the switch.

[0095] From this point of view, the stacking number (for example, N) of the second switches constituting the switch circuit 51 is smaller than the stacking number (for example, M) of the first switches constituting the switch circuit 20, and the stacking number (for example, N) of the third switches constituting the switch circuit 52 is smaller than the stacking number (for example, M) of the first switches constituting the switch circuit 20.

[0096] [3. Structures of High-Frequency Circuit and Switching Circuit According to Comparative Example]

[0097] Next, a circuit configuration of a high-frequency circuit 900 and a switch circuit 90 according to a comparative example will be described.

[0098] Figure 4 is a circuit configuration diagram of a high-frequency circuit 900 according to a comparative example. As shown in the figure, high-frequency circuit 900 includes switch circuits 90, 50, 53, and 54, transmit filters 31T, 34T, 42T, and 43T, receive filters 31R, 32R, 33R, 34R, 41R, 42R, 43R, and 44R, and power amplifiers 61 and 62. High-frequency circuit 900 according to the comparative example differs from high-frequency circuit 1 according to the embodiment only in that a switch circuit 90 is provided in place of switch circuits 20, 51, and 52.

[0099] Hereinafter, regarding the high-frequency circuit 900 according to the comparative example, description of the same configuration as that of the high-frequency circuit 1 according to the embodiment will be omitted, and the description will focus on the different configurations.

[0100] The switch circuit 90 has terminals 90 a , 90 b , 90 c , 90 d , 90 e , and 90 f .

[0101] Terminal 90e is connected to antenna 2A, and terminal 90f is connected to antenna 2B. Furthermore, terminal 90a is connected to transmission filter 31T and reception filters 31R and 32R, terminal 90b is connected to transmission filter 34T and reception filters 33R and 34R, terminal 90c is connected to transmission filter 42T and reception filters 41R and 42R, and terminal 90d is connected to transmission filter 43T and reception filters 43R and 44R.

[0102] In the switching circuit 90, any one of the conduction between terminal 90e and terminal 90a, the conduction between terminal 90e and terminal 90b, the conduction between terminal 90e and terminal 90c, and the conduction between terminal 90e and terminal 90d is exclusively selected, and any one of the conduction between terminal 90f and terminal 90a, the conduction between terminal 90f and terminal 90b, the conduction between terminal 90f and terminal 90c, and the conduction between terminal 90f and terminal 90d is exclusively selected.

[0103] With the above structure, the high-frequency circuit 900 arbitrarily distributes the high-frequency signals of Band 66, Band 25, Band 1, and Band 3 to antennas 2A and 2B by switching the connection states of switch circuits 90, 50, 53, and 54, thereby enabling simultaneous transmission of dual uplink and dual downlink as listed in (1) to (4) above.

[0104] Figure 5 This diagram shows the circuit state of the switch circuit 90 in a dual uplink configuration in a high-frequency circuit 900 according to a comparative example. As shown in the diagram, the switch circuit 90 includes switches 910, 920, 930, 940, 950, 960, 970, 980, 915, 935, 955, and 975 in addition to terminals 90a, 90b, 90c, 90d, 90e, and 90f.

[0105] Switch 910 is a so-called series switch arranged in series between terminal 90e and terminal 90a. Switch 920 is a so-called series switch arranged in series between terminal 90f and terminal 90a. Switch 930 is a so-called series switch arranged in series between terminal 90e and terminal 90b. Switch 940 is a so-called series switch arranged in series between terminal 90f and terminal 90b. Switch 950 is a so-called series switch arranged in series between terminal 90e and terminal 90c. Switch 960 is a so-called series switch arranged in series between terminal 90f and terminal 90c. Switch 970 is a so-called series switch arranged in series between terminal 90e and terminal 90d. Switch 980 is a so-called series switch arranged in series between terminal 90f and terminal 90d.

[0106] Switch 915 is a so-called parallel switch connected between terminal 90a and ground. Switch 935 is a so-called parallel switch connected between terminal 90b and ground. Switch 955 is a so-called parallel switch connected between terminal 90c and ground. Switch 975 is a so-called parallel switch connected between terminal 90d and ground.

[0107] Each switch constituting the switch circuit 90 is constituted by one or more semiconductor elements connected in series. Each of the one or more semiconductor elements is, for example, a FET constituted by a source electrode, a drain electrode, and a gate electrode.

[0108] in addition, Figure 5 : shows the circuit state when dual uplink is performed, in which a transmission signal of the first transmission frequency band (B66-Tx) included in the first frequency band (Band 66) and a transmission signal of the second transmission frequency band (B25-Tx) included in the second frequency band (Band 25) are simultaneously transmitted.

[0109] like Figure 5 As shown, the transmission signal of B66-Tx is output to antenna 2A via terminal 90a, switch 910, and terminal 90e. At the same time, the transmission signal of B25-Tx is output to antenna 2B via terminal 90c, switch 960, and terminal 90f.

[0110] At this time, two transmission signals flow simultaneously through the switch circuit 90. When a transmission signal flows through the switch circuit, the switch that becomes non-conductive to cut off the transmission signal needs to have a withstand voltage performance corresponding to the transmission power of the transmission signal.

[0111] For example, the switch 920 in the non-conductive state in the switch circuit 90 must satisfy the withstand voltage corresponding to the B66-Tx transmission signal applied from the terminal 90 a and the withstand voltage corresponding to the B25-Tx transmission signal applied from the terminal 90 f .

[0112] Furthermore, for example, the switch 950 in the non-conductive state in the switch circuit 90 must satisfy the withstand voltage corresponding to the B66-Tx transmission signal applied from the terminal 90e and the withstand voltage corresponding to the B25-Tx transmission signal applied from the terminal 90c.

[0113] In addition, when the B66Tx transmission signal is output from antenna 2B and the B25Tx transmission signal is output from antenna 2A, switches 910 and 960 in the non-conducting state must respectively meet the withstand voltage corresponding to the B66-Tx transmission signal and the withstand voltage corresponding to the B25-Tx transmission signal.

[0114] Similarly, when dual uplink transmission is performed simultaneously, in which a transmit signal of the third transmit frequency band (B1-Tx) included in the third frequency band (Band 1) and a transmit signal of the fourth transmit frequency band (B3-Tx) included in the fourth frequency band (Band 3) are transmitted, switches 940 and 970 in the non-conducting state must meet the withstand voltage requirements for the B1-Tx transmit signal and the B3-Tx transmit signal, respectively. Furthermore, switches 930 and 980 in the non-conducting state must meet the withstand voltage requirements for the B1-Tx transmit signal and the B3-Tx transmit signal, respectively.

[0115] [4. Comparison of the Configurations of Switching Circuits According to the Embodiment and the Comparative Example]

[0116] That is, the withstand voltage performance of the series switches constituting the switch circuit 90 must be equivalent to that of the first switch constituting the switch circuit 20 .

[0117] From this point of view, the number of stacks of switches constituting the switch circuit 90 (for example, M) is at the same level as the number of stacks of the first switches constituting the switch circuit 20 (for example, M), and is greater than the number of stacks of the second switches constituting the switch circuit 51 (for example, N), and is greater than the number of stacks of the third switches constituting the switch circuit 52 (for example, N).

[0118] In the high-frequency circuit 900 of the comparative example, the two transmit filters for the dual uplink are directly connected to a single switch circuit 90. This increases the number of transmission paths connected to the switch circuit 90 and the number of terminals in the switch circuit 90. As the number of terminals in the switch circuit 90 increases, the cutoff capacitance of the switch circuit 90 increases, which in turn increases the transmission loss of the switch circuit 90. Furthermore, when multiple transmit signals are simultaneously input to the switch circuit 90, the voltage applied to each switch constituting the switch circuit 90 increases, increasing signal distortion and degrading signal quality. The greater the number of terminals in the switch circuit 90, the greater the signal distortion. Consequently, when the number of stacked switches is increased to improve the withstand voltage performance of each switch constituting the switch circuit 90, the switch circuit 90 and, consequently, the high-frequency circuit 900 become larger.

[0119] In contrast, in the high-frequency circuit 1 according to the embodiment, the two transmit filters for the dual uplink are connected separately to the switch circuits 51 and 52. Therefore, there is only one transmission path connected to each of the switch circuits 51 and 52. Therefore, the number of terminals in the switch circuits 51 and 52 is reduced compared to the switch circuit 90. Furthermore, although the switch circuit 20 is connected to two transmission paths, the number of terminals is reduced compared to the switch circuit 90 by configuring the switch circuits 51 and 52. Therefore, the number of terminals in the switch circuits 51, 52, and 20 is reduced compared to the switch circuit 90, thereby reducing the off-capacitance of the switch circuits 51, 52, and 20. This reduces signal transmission loss caused by this off-capacitance. Furthermore, when multiple transmit signals are simultaneously input to the switch circuit 20, the voltage applied to each switch constituting the switch circuit 20 increases, causing signal distortion. However, since the switch circuit 20 has fewer terminals, signal distortion can be reduced compared to the switch circuit 90. Furthermore, while the number of switches stacked in switch circuit 20 is comparable to that in switch circuit 90, the number of switches stacked in switch circuits 51 and 52 is smaller than that in switch circuit 90. This allows the switch circuit of high-frequency circuit 1 according to the embodiment to be more compact than the switch circuit of high-frequency circuit 900 according to the comparative example. Consequently, a compact high-frequency circuit 1 can be provided that suppresses degradation in transmission performance during dual uplink transmission.

[0120] [5. Configuration of High-Frequency Circuit 1A According to Modification Example]

[0121] Figure 6 This is a circuit diagram of a high-frequency circuit 1A according to a modified example of the embodiment. As shown in the figure, high-frequency circuit 1A includes switch circuits 20, 50, 51, 52, 53, and 54; transmit filters 31T, 34T, 42T, and 43T; receive filters 31R, 32R, 33R, 34R, 41R, 42R, 43R, and 44R; power amplifiers 61 and 62; and low-pass filters 81 and 82. High-frequency circuit 1A according to this modified example differs from high-frequency circuit 1 according to the embodiment only in that low-pass filters 81 and 82 are provided.

[0122] Hereinafter, regarding the high-frequency circuit 1A according to the present modification, description of the same configuration as that of the high-frequency circuit 1 according to the embodiment will be omitted, and the description will focus on the different configurations.

[0123] Low-pass filter 81 is an example of a first filter circuit and is connected between switch circuit 20 and switch circuit 51. For example, the passband of low-pass filter 81 includes the first frequency band (Band 66), the second frequency band (Band 25), the third frequency band (Band 1), and the fourth frequency band (Band 3). The attenuation band of low-pass filter 81 includes twice the frequency of the first frequency band (Band 66) and twice the frequency of the fourth frequency band (Band 3). This can suppress the generation of harmonics generated in power amplifier 61 and transmission filters 31T and 34T.

[0124] Low-pass filter 82 is an example of a second filter circuit and is connected between switch circuit 20 and switch circuit 52. For example, the passband of low-pass filter 82 includes the third frequency band (Band 66), the second frequency band (Band 25), the third frequency band (Band 1), and the fourth frequency band (Band 3). The attenuation band of low-pass filter 82 includes twice the frequency of the second frequency band (Band 25) and twice the frequency of the third frequency band (Band 1). This can suppress the generation of harmonics generated in power amplifier 62 and transmit filters 42T and 43T.

[0125] Furthermore, in the high-frequency circuit 1A, at least a portion of the frequency range of intermodulation distortion (first intermodulation distortion) generated between the second harmonic of the transmission signal in the first transmission frequency band included in the first frequency band and the fundamental wave of the transmission signal in the second transmission frequency band included in the second frequency band may overlap with at least a portion of the first frequency band. Alternatively, at least a portion of the frequency range of intermodulation distortion (second intermodulation distortion) generated between the fundamental wave of the transmission signal in the first transmission frequency band included in the first frequency band and the second harmonic of the transmission signal in the second transmission frequency band included in the second frequency band may overlap with at least a portion of the second frequency band.

[0126] Even in this case, by placing the low-pass filter 81 between the switch circuit 20 and the switch circuit 51, the first intermodulation distortion can be suppressed from entering the switch circuit 51 from the switch circuit 20. Furthermore, by placing the low-pass filter 82 between the switch circuit 20 and the switch circuit 52, the second intermodulation distortion can be suppressed from entering the switch circuit 52 from the switch circuit 20. Therefore, it is possible to suppress degradation in the quality of the transmission signal.

[0127] For example, when the first frequency band is Band 3 and the second frequency band is Band 1, the first intermodulation distortion overlaps with at least a portion of Band 1.

[0128] Furthermore, for example, when the first frequency band is Band 1 and the second frequency band is Band 3 , the second intermodulation distortion overlaps with at least a portion of Band 3 .

[0129] Furthermore, for example, when the first frequency band is Band 40 (frequency band: 2300 MHz-2400 MHz) and the second frequency band is Band 1 , the first intermodulation distortion overlaps with at least a portion of Band 40 .

[0130] Even in these cases, the low-pass filter 81 can suppress the first intermodulation distortion from invading the switch circuit 20 to the switch circuit 51. Furthermore, the low-pass filter 82 can suppress the second intermodulation distortion from invading the switch circuit 20 to the switch circuit 52. Therefore, it is possible to suppress degradation of the quality of the transmission signal.

[0131] In addition, a high-pass filter or a notch filter may be provided instead of the low-pass filters 81 and 82 .

[0132] Alternatively, a first matching circuit that achieves impedance matching can be provided in place of low-pass filter 81. Alternatively, a second matching circuit that achieves impedance matching can be provided in place of low-pass filter 82. Furthermore, it is desirable that each of the first matching circuit and the second matching circuit include an inductor. Switch circuits 20, 51, and 52 often have capacitive impedance due to their non-conductive terminals. In contrast, the first matching circuit provided between switch circuit 20 and switch circuit 51, and the second matching circuit provided between switch circuit 20 and switch circuit 52, have inductive impedance. This effectively achieves impedance matching between the switch circuits and reduces transmission loss in high-frequency circuit 1A.

[0133] Furthermore, a larger gate width of the semiconductor element (FET) constituting each switch can reduce the on-resistance when conducting without changing the withstand voltage performance. Therefore, the gate width of the semiconductor element (FET) constituting the first switch of the switching circuit 20 can also be increased. This allows the on-resistance to be reduced while maintaining the withstand voltage performance of the switching circuit 20.

[0134] [6. Effects, etc.]

[0135] As described above, the high-frequency circuit 1 according to this embodiment includes: power amplifiers 61 and 62; a transmission filter 31T connected to the power amplifier 61, wherein the passband of the transmission filter 31T includes the first transmission frequency band (B66-Tx) included in the first frequency band (Band 66); a transmission filter 42T connected to the power amplifier 62, wherein the passband of the transmission filter 42T includes the second frequency band (Band 25) included in the second transmission frequency band (B25-Tx); a switching circuit 20, which has terminals 20c, 20d, 20a and 20b, switches the conduction between the terminal 20a and the terminal 20c, and the conduction between the terminal 20a and the terminal 20d, and switches the conduction between the terminal 20b and the terminal 20c, and the conduction between the terminal 20b and the terminal 20d; a switching circuit 51, which has a common terminal 51a, terminals 51b and 51c, switches the conduction between the common terminal 51a and the terminal 51b, and the conduction between the common terminal 51a and the terminal 51c; and a switching circuit 52, which has a common terminal 52a, terminals 52b and 52c, switches the conduction between the common terminal 52a and the terminal 52b, and the conduction between the common terminal 52a and the terminal 52c. Terminal 20a is connected to common terminal 51a, terminal 20b is connected to common terminal 52a, terminal 51b is connected to transmit filter 31T, and terminal 52b is connected to transmit filter 42T. The switch circuit 20 includes a first switch that is respectively arranged in series between terminal 20c and terminal 20a, between terminal 20c and terminal 20b, between terminal 20d and terminal 20a, and between terminal 20d and terminal 20b. The switch circuit 51 includes a second switch that is respectively arranged in series between common terminal 51a and terminal 51b, and between common terminal 51a and terminal 51c. The switch circuit 52 includes a third switch that is respectively arranged in series between common terminal 52a and terminal 52b, and between common terminal 52a and terminal 52c. The number of stacks of the second switches is smaller than the number of stacks of the first switches, and the number of stacks of the third switches is smaller than the number of stacks of the first switches.

[0136] Thus, the two transmit filters 31T and 42T are connected separately to the switch circuits 51 and 52, resulting in a single transmit path connected to each of the switch circuits 51 and 52. Consequently, the number of terminals in the switch circuits 51 and 52 is reduced. Furthermore, although the switch circuit 20 is connected to two transmit paths, the number of terminals is reduced by configuring the switch circuits 51 and 52. Consequently, the number of terminals in the switch circuits 51, 52, and 20 is reduced, respectively, thereby reducing the cutoff capacitance of the switch circuits 51, 52, and 20. This reduces signal transmission loss caused by this cutoff capacitance. Furthermore, when multiple transmit signals are simultaneously input to the switch circuit 20, the voltage applied to each switch constituting the switch circuit 20 increases, causing signal distortion. However, since the switch circuit 20 has fewer terminals, signal distortion can be reduced. Furthermore, while the number of stacked switches constituting the first switch of the switch circuit 20 is comparable to that of conventional switch circuits, the number of stacked switches constituting the switch circuits 51 and 52 is smaller than that of conventional switch circuits. This makes it possible to miniaturize the switch circuit of the high-frequency circuit 1. Therefore, it is possible to provide a compact high-frequency circuit 1 that suppresses degradation of transmission performance when a plurality of signals are transmitted simultaneously.

[0137] In addition, in the high-frequency circuit 1, the switching circuit 20 may have a fourth switch connected between the following terminals and the ground: terminals 20c, 20d, 20a and 20b, the switching circuit 51 may have a fifth switch connected between the following terminals and the ground: a common terminal 51a, terminals 51b and 51c, and the switching circuit 52 may have a sixth switch connected between the following terminals and the ground: a common terminal 52a, terminals 52b and 52c.

[0138] This makes it possible to improve the isolation between the terminals constituting each of the switch circuits 20 , 51 , and 52 .

[0139] In addition, in the high-frequency circuit 1, in the switching circuit 20, the conduction between the terminal 20a and the terminal 20c and the conduction between the terminal 20a and the terminal 20d are switched, and the conduction between the terminal 20b and the terminal 20c and the conduction between the terminal 20b and the terminal 20d are switched; in the switching circuit 51, the conduction between the common terminal 51a and the terminal 51b and the conduction between the common terminal 51a and the terminal 51c are switched; and in the switching circuit 52, the conduction between the common terminal 52a and the terminal 52b and the conduction between the common terminal 52a and the terminal 52c are switched.

[0140] Alternatively, high-frequency circuit 1A may further include a first matching circuit connected between switch circuit 20 and switch circuit 51 , and a second matching circuit connected between switch circuit 20 and switch circuit 52 , wherein each of the first matching circuit and the second matching circuit includes an inductor.

[0141] The switch circuits 20, 51, and 52 often have capacitive impedance due to their non-conductive terminals. In contrast, the first and second matching circuits have inductive impedance, which effectively achieves impedance matching between the switch circuits and reduces transmission loss in the high-frequency circuit 1A.

[0142] In addition, the high-frequency circuit 1A may further include a low-pass filter 81 connected between the switch circuit 20 and the switch circuit 51 , and a low-pass filter 82 connected between the switch circuit 20 and the switch circuit 52 .

[0143] Thus, the low-pass filter 81 can suppress the generation of harmonics generated in the power amplifier 61 and the transmission filters 31T and 34T, and the low-pass filter 82 can suppress the generation of harmonics generated in the power amplifier 62 and the transmission filters 42T and 43T.

[0144] Furthermore, in the high-frequency circuit 1A, at least a portion of the frequency range of intermodulation distortion (first intermodulation distortion) generated between the second harmonic of the transmission signal in the first transmission frequency band included in the first frequency band and the fundamental wave of the transmission signal in the second transmission frequency band included in the second frequency band may overlap with at least a portion of the first frequency band. Alternatively, at least a portion of the frequency range of intermodulation distortion (second intermodulation distortion) generated between the fundamental wave of the transmission signal in the first transmission frequency band included in the first frequency band and the second harmonic of the transmission signal in the second transmission frequency band included in the second frequency band may overlap with at least a portion of the second frequency band.

[0145] Thus, by placing the low-pass filter 81 between the switch circuit 20 and the switch circuit 51, the first intermodulation distortion can be suppressed from entering the switch circuit 51 from the switch circuit 20. Furthermore, by placing the low-pass filter 82 between the switch circuit 20 and the switch circuit 52, the second intermodulation distortion can be suppressed from entering the switch circuit 52 from the switch circuit 20. Consequently, degradation of the quality of the transmission signal can be suppressed.

[0146] Furthermore, in the high-frequency circuit 1A, when the first frequency band is Band 3 and the second frequency band is Band 1 , the first intermodulation distortion may overlap at least a portion of Band 1 .

[0147] Furthermore, in the high-frequency circuit 1A, when the first frequency band is Band 1 and the second frequency band is Band 3 , the second intermodulation distortion may overlap at least a portion of Band 3 .

[0148] Furthermore, in the high-frequency circuit 1A, when the first frequency band is Band 40 and the second frequency band is Band 1 , the first intermodulation distortion may overlap at least a portion of Band 40 .

[0149] Even in these cases, the low-pass filter 81 can suppress the first intermodulation distortion from invading the switch circuit 20 to the switch circuit 51. Furthermore, the low-pass filter 82 can suppress the second intermodulation distortion from invading the switch circuit 20 to the switch circuit 52. Therefore, it is possible to suppress degradation of the quality of the transmission signal.

[0150] Alternatively, the high-frequency circuit 1 may further include: a transmission filter 34T connected to the power amplifier 61, wherein the passband of the transmission filter 34T includes the fourth transmission frequency band (B3-Tx) included in the fourth frequency band (Band 3); and a transmission filter 43T connected to the power amplifier 62, wherein the passband of the transmission filter 43T includes the third frequency band (Band 1), the terminal 51c is connected to the transmit filter 34T, and the terminal 52c is connected to the transmit filter 43T. Between the power amplifier 61 and the switching circuit 51, there is no configuration of a transmit filter including the second transmit band in the passband and a transmit filter including the third transmit band in the passband. Between the power amplifier 62 and the switching circuit 52, there is no configuration of a transmit filter including the first transmit band in the passband and a transmit filter including the fourth transmit band in the passband. By conducting the common terminal 51a with the terminal 51b and by conducting the common terminal 52a with the terminal 52b, a dual uplink of the transmit signal of the first transmit band and the transmit signal of the second transmit band is performed. By conducting the common terminal 51a with the terminal 51c and by conducting the common terminal 52a with the terminal 52c, a dual uplink of the transmit signal of the third transmit band and the transmit signal of the fourth transmit band is performed.

[0151] Thus, by switching the connection states of switch circuits 20, 51, and 52, high-frequency signals in the first frequency band (Band 66), the second frequency band (Band 25), the third frequency band (Band 1), and the fourth frequency band (Band 3) are arbitrarily distributed to antennas 2A and 2B, thereby enabling simultaneous transmission of dual uplinks. Here, no transmission filter whose passband includes the second transmission band or a transmission filter whose passband includes the third transmission band is disposed between power amplifier 61 and switch circuit 51, and no transmission filter whose passband includes the first transmission band or a transmission filter whose passband includes the fourth transmission band is disposed between power amplifier 62 and switch circuit 52. Therefore, a compact high-frequency circuit 1 capable of simultaneous transmission of multiple signals can be provided.

[0152] Furthermore, the communication device 5 includes a high-frequency circuit 1 and an RFIC 3 that processes high-frequency signals transmitted and received by the high-frequency circuit 1 .

[0153] This makes it possible to provide a compact communication device 5 that suppresses degradation of transmission performance when a plurality of signals are transmitted simultaneously.

[0154] (Other embodiments)

[0155] While the high-frequency circuits and communication devices according to the embodiments have been described above by citing the embodiments and their variations, the high-frequency circuits and communication devices of the present invention are not limited to the aforementioned embodiments and their variations. Other embodiments implemented by combining arbitrary structural elements of the aforementioned embodiments and their variations, variations obtained by applying various modifications to the aforementioned embodiments and their variations that would be conceivable by those skilled in the art without departing from the spirit of the present invention, and various devices incorporating the high-frequency circuits and communication devices disclosed herein are also encompassed by the present invention.

[0156] Furthermore, in the above-described embodiments and their variations, dual uplink structures for simultaneously transmitting high-frequency signals in a first frequency band and a second frequency band, and dual uplink structures for simultaneously transmitting high-frequency signals in a third frequency band and a fourth frequency band, are exemplified. However, the structures of the high-frequency circuit and communication device involved in the present invention can also be applied to structures that simultaneously use uplinks in three or more different frequency bands (e.g., a triple uplink). In other words, the dual uplink in the above-described embodiments and their variations is a structure that also includes a multi-uplink that simultaneously uses three or more different frequency bands, and that performs uplinks that simultaneously use three or more different frequency bands. High-frequency circuits or communication devices that include the structures of the high-frequency circuits or communication devices involved in the above-described embodiments and their variations are also included in the present invention.

[0157] For example, in the high-frequency circuits and communication devices according to the above-described embodiments and their modifications, other high-frequency circuit elements and wirings may be inserted between paths connecting each circuit element and the signal path disclosed in the drawings.

[0158] Industrial applicability

[0159] The present invention can be widely used in communication devices such as mobile phones as a front-end circuit supporting multi-band / multi-mode and capable of performing dual uplink.

[0160] Description of Reference Numerals

[0161] 1, 1A, 900: high-frequency circuit; 2A, 2B: antenna; 3: RF signal processing circuit (RFIC); 4: baseband signal processing circuit (BBIC); 5: communication device; 20, 50, 51, 52, 53, 54, 90: switching circuit; 20a, 20b, 20c, 20d, 50a, 50b, 50c, 50d, 51b, 51c, 52b, 52c, 53c, 53d, 54c, 54d, 90a, 90b, 90c, 90d, 90e, 90f: terminals; 51a, 52a, 53a, 54a : Common terminal; 31R, 32R, 33R, 34R, 41R, 42R, 43R, 44R: Receiving filter; 31T, 34T, 42T, 43T: Transmitting filter; 61, 62: Power amplifier; 81, 82: Low-pass filter; 210, 215, 220, 230, 235, 240, 511, 512, 515, 516, 521, 522, 525, 526, 910, 915, 920, 930, 935, 940, 950, 955, 960, 970, 975, 980: Switch.

Claims

1. A high-frequency circuit comprising: a first power amplifier and a second power amplifier; a first transmission filter connected to the first power amplifier, wherein a passband of the first transmission filter includes a first transmission frequency band included in the first frequency band; a second transmit filter connected to the second power amplifier, wherein a passband of the second transmit filter includes a second transmit frequency band included in a second frequency band different from the first frequency band; a first switching circuit having a first antenna connection terminal, a second antenna connection terminal, a first terminal, and a second terminal; a second switch circuit having a first common terminal, a third terminal, and a fourth terminal; as well as a third switch circuit having a second common terminal, a fifth terminal, and a sixth terminal; The first terminal is connected to the first common terminal, the second terminal is connected to the second common terminal, the third terminal is connected to the first transmit filter, and the fifth terminal is connected to the second transmit filter. The first switch circuit includes first switches respectively arranged in series between the first antenna connection terminal and the first terminal, between the first antenna connection terminal and the second terminal, between the second antenna connection terminal and the first terminal, and between the second antenna connection terminal and the second terminal. The second switch circuit includes second switches arranged in series between the first common terminal and the third terminal, and between the first common terminal and the fourth terminal, respectively. The third switch circuit includes third switches arranged in series between the second common terminal and the fifth terminal, and between the second common terminal and the sixth terminal, respectively. The stacking number of the second switches is smaller than the stacking number of the first switches, and the stacking number of the third switches is smaller than the stacking number of the first switches.

2. The high-frequency circuit according to claim 1, wherein The first switch circuit includes a fourth switch connected between the following terminals and ground: the first antenna connection terminal, the second antenna connection terminal, the first terminal, and the second terminal. The second switch circuit includes a fifth switch connected between the first common terminal, the third terminal, and the fourth terminal and ground. The third switch circuit includes a sixth switch connected between the second common terminal, the fifth terminal, and the sixth terminal and ground.

3. The high-frequency circuit according to claim 1 or 2, wherein: In the first switching circuit, the conduction between the first terminal and the first antenna connection terminal and the conduction between the first terminal and the second antenna connection terminal are switched, and the conduction between the second terminal and the first antenna connection terminal and the conduction between the second terminal and the second antenna connection terminal are switched. In the second switch circuit, conduction between the first common terminal and the third terminal and conduction between the first common terminal and the fourth terminal are switched. In the third switch circuit, conduction between the second common terminal and the fifth terminal and conduction between the second common terminal and the sixth terminal are switched.

4. The high-frequency circuit according to any one of claims 1 to 3, wherein: Also features: a first matching circuit connected between the first switching circuit and the second switching circuit; and The second matching circuit is connected between the first switching circuit and the third switching circuit. The first matching circuit and the second matching circuit each include an inductor.

5. The high-frequency circuit according to any one of claims 1 to 3, wherein: Also features: a first filter circuit connected between the first switch circuit and the second switch circuit; and a second filter circuit connected between the first switch circuit and the third switch circuit; The first filter circuit is a low-pass filter or a band-pass filter, The second filter circuit is a low-pass filter or a band-pass filter.

6. The high-frequency circuit according to claim 5, wherein At least a portion of a frequency range of intermodulation distortion generated between the second harmonic of the transmission signal in the first transmission frequency band and the fundamental wave of the transmission signal in the second transmission frequency band overlaps with at least a portion of the first frequency band, or At least a portion of a frequency range of intermodulation distortion generated between a fundamental wave of a transmission signal in the first transmission frequency band and a second harmonic of a transmission signal in the second transmission frequency band overlaps with at least a portion of the second frequency band.

7. The high-frequency circuit according to claim 6, wherein The first frequency band is Band 3 for Long Term Evolution (LTE) or 5G New Radio (5GNR). The second frequency band is Band 1 for LTE or 5G NR.

8. The high-frequency circuit according to claim 6, wherein The first frequency band is Band 40 for Long Term Evolution (LTE) or 5G New Radio (5GNR). The second frequency band is Band 1 for LTE or 5G NR.

9. The high-frequency circuit according to any one of claims 1 to 8, wherein: Also features: a fourth transmit filter connected to the first power amplifier, wherein a passband of the fourth transmit filter includes a fourth transmit frequency band included in a fourth frequency band different from the first frequency band and the second frequency band; as well as a third transmission filter connected to the second power amplifier, wherein a passband of the third transmission filter includes a third transmission frequency band included in a third frequency band different from the first frequency band, the second frequency band, and the fourth frequency band; The fourth terminal is connected to the fourth transmission filter, and the sixth terminal is connected to the third transmission filter. A transmission filter whose passband includes the second transmission frequency band and a transmission filter whose passband includes the third transmission frequency band are not provided between the first power amplifier and the second switching circuit. A transmission filter whose passband includes the first transmission frequency band and a transmission filter whose passband includes the fourth transmission frequency band are not provided between the second power amplifier and the third switch circuit. By conducting the first common terminal and the third terminal and conducting the second common terminal and the fifth terminal, dual uplink of the transmission signal of the first transmission frequency band and the transmission signal of the second transmission frequency band is performed. By conducting between the first common terminal and the fourth terminal and conducting between the second common terminal and the sixth terminal, dual uplink of the transmission signal of the third transmission frequency band and the transmission signal of the fourth transmission frequency band is performed.

10. A communication device comprising: The high-frequency circuit according to any one of claims 1 to 9; and The radio frequency signal processing circuit is an RF signal processing circuit that processes the high frequency signal sent or received by the high frequency circuit.

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