Data processing method and device for device communication, device and storage medium

Abstract

The application relates to a data processing method and device for equipment communication, equipment and a storage medium. The method comprises the following steps: in response to a data frame generation instruction, determining corresponding specified frame data; generating specified frame data length information based on the data length of the specified frame data; determining a specified frame sequence number and a specified frame header check bit corresponding to the specified frame data; generating specified data frames based on a preset frame header flag bit, the specified frame header check bit, the specified frame sequence number, the specified frame data length information and the specified frame data; and sending the specified data frames to a data receiving end. The embodiment of the application can be applied to various scenes such as cloud technology, artificial intelligence, intelligent transportation and auxiliary driving. The application improves the in-frame space utilization rate of the data frame, avoids affecting the data transmission efficiency due to space waste, meanwhile, the application ensures that the data frame extracted therefrom is complete and effective, thereby ensuring the reliability of data transmission.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of Internet communication, and in particular to a data processing method and device for device communication, a device, and a storage medium. BACKGROUND

[0002] With the development of Internet communication technology, relevant products are emerging in an endless stream. The implementation of the use function of the relevant products requires data transmission, such as data being sent from a data sending end to a data receiving end. In the related art, a fixed-length data frame is used for data transmission. The data frame generated by the data sending end is of fixed length, and the data receiving end extracts the data frame from a data buffer queue according to the fixed length for processing. However, in order to ensure universality, the fixed length is often taken as a large value, which often leads to waste of data frame space and even affects the data transmission efficiency. Meanwhile, when packet loss, packet error and the like occur in data transmission, the data frame extracted by the data receiving end according to the fixed length is also prone to abnormality. Therefore, a scheme for improving the utilization rate of data frame space and ensuring the performance of data transmission needs to be provided. SUMMARY

[0003] In order to solve at least one of the technical problems mentioned above, the present application provides a data processing method and device for device communication, a device, and a storage medium:

[0004] According to a first aspect of the present application, a data processing method for device communication is provided, applied to a data sending end, and the method comprises:

[0005] In response to a data frame generation instruction, determining corresponding specified frame data;

[0006] Generating specified frame data length information based on the data length of the specified frame data, the specified frame data length information meeting a first length requirement;

[0007] Determining a specified frame sequence number and a specified frame header check bit corresponding to the specified frame data, the specified frame sequence number being different from an already allocated frame sequence number, and the specified frame sequence number meeting a second length requirement and the specified frame header check bit meeting a third length requirement;

[0008] Generating a specified data frame based on a preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information, and the specified frame data, and sending the specified data frame to a data receiving end.

[0009] According to a second aspect of the present application, a data processing method for device communication is provided, applied to a data receiving end, and the method comprises:

[0010] extract a target data frame from a data cache queue, the data cache queue being configured to store a received data frame of the data receiving end, the received data frame being generated by a data sending end using the data processing method for device communication according to the first aspect.

[0011] According to a third aspect of the present application, a data processing apparatus for device communication is provided, configured in a data sending end, the apparatus comprising:

[0012] a designated frame data determination module configured to determine corresponding designated frame data in response to a data frame generation instruction;

[0013] a designated frame data length information generation module configured to generate designated frame data length information based on a data length of the designated frame data, the designated frame data length information satisfying a first length requirement;

[0014] an associated element generation module configured to determine a designated frame sequence number corresponding to the designated frame data and a designated frame header check bit, the designated frame sequence number being different from an already allocated frame sequence number, and the designated frame sequence number satisfying a second length requirement and the designated frame header check bit satisfying a third length requirement;

[0015] a designated data frame generation module configured to generate a designated data frame based on a preset frame header flag bit, the designated frame header check bit, the designated frame sequence number, the designated frame data length information and the designated frame data, and send the designated data frame to a data receiving end.

[0016] According to a fourth aspect of the present application, a data processing apparatus for device communication is provided, configured in a data receiving end, the apparatus comprising:

[0017] a target data frame extraction module configured to extract a target data frame from a data cache queue, the data cache queue being configured to store a received data frame of the data receiving end, the received data frame being generated by a data sending end using the data processing method for device communication according to the first aspect.

[0018] According to a fifth aspect of the present application, an electronic device is provided, comprising at least one processor, and a memory connected with the at least one processor in communication; wherein the memory stores at least one instruction or at least one program, the at least one instruction or at least one program is loaded and executed by the at least one processor to implement the data processing method for device communication according to the first aspect, the data processing method for device communication according to the second aspect.

[0019] According to a sixth aspect of the present application, a computer readable storage medium is provided, the computer readable storage medium storing at least one instruction or at least one program, the at least one instruction or at least one program being loaded and executed by a processor to implement the data processing method for device communication according to the first aspect or the data processing method for device communication according to the second aspect.

[0020] According to a seventh aspect of the present application, a computer program product is provided, the computer program product comprising at least one instruction or at least one program, the at least one instruction or at least one program being loaded and executed by a processor to implement the data processing method for device communication according to the first aspect or the data processing method for device communication according to the second aspect.

[0021] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, rather than restrictive of the present application.

[0022] The implementation of the present application has the following beneficial effects:

[0023] The present application generates a specified data frame based on the configuration of the data frame, introduces a preset frame header flag without limiting the length of the frame data, and sets other elements and their lengths constituting the data frame. In this way, the intra-frame space utilization of the data frame is improved, and the data transmission efficiency is affected by the waste of space. At the same time, the present application extracts a target data frame from the data buffer queue based on the configuration of the data frame, ensures that the data frame extracted therefrom is complete and valid, and further ensures the reliability of data transmission.

[0024] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions and advantages of the embodiments of the present application or the prior art, the drawings needed in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative labor.

[0026] Figure 1 A schematic diagram showing an application environment according to an embodiment of the present application is shown;

[0027] Figure 2 A flowchart showing a data processing method for device communication according to an embodiment of the present application is shown;

[0028] Figure 3Fig. 1 shows a flow diagram of a data processing method for device communication according to an embodiment of the present application;

[0029] Figure 4 Fig. 2 shows a flow diagram of obtaining a target data frame according to an embodiment of the present application;

[0030] Figure 5 Fig. 3 shows a flow diagram of determining an associated element in a data cache queue according to an embodiment of the present application;

[0031] Figure 6 Fig. 4 shows a schematic diagram of a principle of device communication according to an embodiment of the present application;

[0032] Figure 7 Fig. 5 shows a flow diagram of a principle of cut-packet according to an embodiment of the present application;

[0033] Figure 8 Fig. 6 shows a flow diagram of a principle of cut-packet according to an embodiment of the present application;

[0034] Figure 9 Fig. 7 shows a block diagram of a data processing apparatus for device communication according to an embodiment of the present application;

[0035] Figure 10 Fig. 8 shows an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of the present application.

[0037] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or server including a series of steps or units does not necessarily have to include only those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product, or device.

[0038] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numbers in different drawings represent the same or similar elements. Although various aspects of embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0039] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

[0040] The term "and / or" used herein only means an association relationship of associated objects, and means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.

[0041] In addition, in order to better illustrate the present application, a large number of specific details are given in the specific embodiments below. Those skilled in the art should understand that the present application can also be implemented without some specific details. In some examples, methods, means, elements and circuits that are well known to those skilled in the art are not described in detail, in order to highlight the main ideas of the present application.

[0042] Before the embodiments of the present application are further described in detail, the terms and terms involved in the embodiments of the present application are explained, and the terms and terms involved in the embodiments of the present application are applicable to the following explanations.

[0043] Serial port: a widely used physical layer asynchronous communication interface, which can only transmit one byte at a time.

[0044] MCU: single-chip microcomputer or single-chip microcomputer, which is a chip-level computer that integrates peripheral interfaces.

[0045] Host computer: ordering machine, vending cabinet, PC (personal computer) and other devices linked through serial port with consumer machines.

[0046] BCC (Block Check Character): information group check code. Since the check code is obtained by XORing all data, it is also called XOR check.

[0047] CRC (Cyclic Redundancy Check): cyclic redundancy check.

[0048] Please refer to Figure 1 , Figure 1A schematic diagram of an application environment according to an embodiment of the present application is shown, which can include a data sending end 10 and a data receiving end 20. The data sending end 10 and the data receiving end 20 can be directly or indirectly connected through wired or wireless communication. The data sending end 10 can determine corresponding specified frame data in response to a data frame generation instruction; then generate specified frame data length information based on the data length of the specified frame data; further, determine the specified frame sequence number corresponding to the specified frame data and the specified frame header check bit; finally, generate the specified data frame based on the preset frame header flag bit, the specified frame header check bit, the specified frame sequence number, the specified frame data length information and the specified frame data, and send the specified data frame to the data receiving end. Correspondingly, the data receiving end extracts the target data frame from the data buffer queue, wherein the data buffer queue is used to store the received data frame of the data receiving end, and the received data frame is generated by the data sending end. It should be noted that, Figure 1 It is only an example.

[0049] The data sending end 10 and the data receiving end 20 can be an entity device such as a smart phone, a computer (such as a desktop computer, a tablet computer, a notebook computer), an augmented reality (AR) / virtual reality (VR) device, a digital assistant, a smart voice interaction device (such as a smart speaker), a smart wearable device, a smart home appliance, a vehicle terminal, etc., or a software such as a computer program running in the entity device. The operating system corresponding to the data sending end 10 and the data receiving end 20 can be an Android system, an iOS system (a mobile operating system developed by Apple Inc.), a Linux system (an operating system), a Microsoft Windows system (a Microsoft Windows operating system), etc.

[0050] Taking two devices involved in data interaction as an example, the first device sends data to the second device, so the first device is the data sending end and the second device is the data receiving end; the second device sends data to the first device, so the second device is the data sending end and the first device is the data receiving end. In actual application, the first device can be a host computer and the second device can be a consumer computer. Specifically, the following combinations can be used: the first device is a canteen ordering machine and the second device is a terminal consumer computer; the first device is a PC for business handling and the second device is a terminal computer for identity verification; the first device is a smart retail vending cabinet and the second device is a terminal consumer computer.

[0051] The data processing scheme for device communication provided by the embodiments of the present application can be applied to cloud computing technology. Cloud computing refers to a delivery and use model of IT infrastructure, which refers to obtaining required resources in a scalable manner on demand through a network; generalized cloud computing refers to a delivery and use model of services, which refers to obtaining required services in a scalable manner on demand through a network. Such services can be IT and software, Internet related, or other services. Cloud computing is a product of the integration of traditional computer and network technologies such as grid computing, distributed computing, parallel computing, utility computing, network storage technologies, virtualization, load balancing, and the like.

[0052] It should be noted that for the data frames and the like that have an association relationship with user information, when the embodiments of the present application are applied to specific products or technologies, user permission or consent needs to be obtained, and the collection, use and processing of related data need to comply with relevant laws, regulations and standards of countries and regions.

[0053] Figure 2 A flowchart of a data processing method for device communication according to an embodiment of the present application is shown, as shown in Figure 2 The method comprises the following steps.

[0054] S201: In response to a data frame generation instruction, determining corresponding specified frame data;

[0055] In the embodiments of the present application, in response to a data frame generation instruction, the data sending end determines the corresponding specified frame data. For example, 1) the data sending end provides an interactive interface, and a related object (such as a user or a simulator) triggers a related control displayed on the interactive interface to make the data sending end generate a data frame generation instruction. The specified frame data can be data that has an association relationship with the related control. 2) The data frame generation instruction is sent by the data receiving end, which can be regarded as a data frame acquisition request. The data frame generation instruction can guide the data sending end to generate new data as specified frame data, and then generate a specified data frame; or guide the data sending end to locate old data as specified frame data, and then generate a specified data frame.

[0056] S202: Generating specified frame data length information based on the data length of the specified frame data, the specified frame data length information meeting a first length requirement;

[0057] In the embodiments of the present application, the data sending end generates the specified frame data length information based on the data length of the specified frame data. It can be understood that the specified frame length information needs to meet two requirements, one is that it needs to meet the information requirement, that is, it needs to represent the data length of the specified frame data; the other is that it needs to meet the first length requirement. For example, if the data length of the specified frame data is 3 bytes, and the first length requirement indicates 2 bytes, then the specified frame length information needs to represent the information of "3 bytes", and the data length of the specified frame length information needs to be 2 bytes.

[0058] S203: determining the specified frame sequence number corresponding to the specified frame data and the specified frame header check bit, the specified frame sequence number being different from the allocated frame sequence number, and the specified frame sequence number meeting the second length requirement, and the specified frame header check bit meeting the third length requirement;

[0059] In the embodiments of the present application, the data sending end determines the specified frame sequence number corresponding to the specified frame data and the specified frame header check bit. The specified frame sequence number is different from the allocated frame sequence number, and the specified frame sequence number has uniqueness, that is, the uniqueness of the specified frame sequence number can be used to reflect the uniqueness of the subsequent generated specified data frame. At the same time, the specified frame sequence number needs to meet the second length requirement. If the second length requirement indicates 2 bytes, then the data length of the specified frame sequence number needs to be 2 bytes.

[0060] The specified frame header check bit needs to meet the third length requirement. If the third length requirement indicates 1 byte, then the data length of the specified frame header check bit needs to be 1 byte. The function of the specified frame header check bit is to participate in the frame header check to determine whether the frame header is accurate and effective. It can be understood that a complete data frame includes a frame header and frame data, the frame header is in front, and the frame data is behind. Before extracting the complete data frame, it can be determined in priority whether the frame header is accurate and effective, and then it is decided whether to extract the complete data frame composed of the frame header and the frame data. Through the frame header check bit, the situation of extracting abnormal data can be effectively avoided. In combination with the elements constituting the specified data frame in the following step S204, the specified frame header check bit can have a matching relationship with the specified frame sequence number. With the uniqueness of the specified frame sequence number, the effect of determining whether the frame header is accurate and effective can be further improved.

[0061] Further, the internal data of the specified frame sequence number can be XORed in sequence to determine the specified frame header check bit. The sequence involved in the XOR operation can be the sequence of the internal data from front to back (from high bit to low bit), and the internal data participating in the XOR operation or the XOR operation result of the internal data can be in byte dimension or in bit dimension. Specifically, BCC XOR check can be used. In this way, the frame header check bit determination efficiency can be improved while ensuring the reliability of subsequent frame header check using the frame header check bit and the frame sequence number. Of course, to improve the strength of the encryption mode agreed between the frame header check bit and the frame sequence number, CRC can also be used.

[0062] In addition, the determination of the specified frame sequence number can be achieved through the following steps: first, determine the maximum frame sequence number in the allocated frame sequence number, which is based on the increasing size of the allocation time; then, increment the maximum frame sequence number to determine the specified frame sequence number. For example, the maximum frame sequence number in the allocated frame sequence number is 0X0020, and the specified frame sequence number is 0X0021. Considering that data interaction can involve at least two devices, for example, one host and two consumer machines, the determination of the frame sequence number can be achieved by means of a frame sequence number allocation system. The frame sequence number required in the process of generating data frames by the host, and the frame sequence number required in the process of generating data frames by the two consumer machines are all maintained by the frame sequence number allocation system.

[0063] S204: generate a specified data frame based on the preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information, and the specified frame data, and send the specified data frame to a data receiving end.

[0064] In the embodiments of the present application, the data sending end generates a specified data frame based on a preset frame header flag, a specified frame header check bit, a specified frame sequence number, specified frame data length information and specified frame data, and sends the specified data frame to the data receiving end. The preset frame header flag is preset and is also fixed. The preset frame header flag can be used to locate the frame header of a data frame. The preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information and the specified frame data are elements constituting the specified data frame. In combination with the names and functions, the arrangement order of them in the specified data frame needs to meet the following requirements: 1) the preset frame header flag is in the first place, and the specified frame header check bit is in the second place; 2) the specified frame data length information is before the specified frame data. Based on the uniqueness of the specified frame sequence number and the function of the specified frame header check bit, the above requirements that need to be met can also include: 3) the specified frame sequence number is between the frame header and the specified frame data. Then, the arrangement order of them in the specified data frame is in turn the preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information and the specified frame data; or the preset frame header flag, the specified frame header check bit, the specified frame data length information, the specified frame sequence number and the specified frame data.

[0065] In an exemplary embodiment, before the specified data frame is generated based on the preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information and the specified frame data, the method can further include the following steps: determining a specified frame check bit matched with reference data, the reference data including at least one of the specified frame data, the specified frame data length information and the specified frame sequence number, the specified frame check bit meeting a fourth length requirement. Correspondingly, the specified data frame can be generated based on the preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information, the specified frame data and the specified frame check bit.

[0066] On the basis of the frame header check bit, the frame check bit is added, which can further improve the accuracy of extracting complete data frame, and further ensure the reliable performance of data transmission. The specified frame check bit is in matching relationship with the reference data. The reference data is taken from at least one of the specified frame data, the specified frame data length information and the specified frame sequence number. The specified frame check bit needs to meet the fourth length requirement. If the fourth length requirement indicates 1 byte, the data length of the specified frame check bit needs to be 1 byte. The preset frame header flag bit, the specified frame header check bit, the specified frame sequence number, the specified frame data length information, the specified frame data and the frame check bit are elements constituting the specified data frame. In combination with the requirements that need to be met in the above arrangement order, on the basis of considering the role of the specified check bit, the above requirements that need to be met can further include: 4) the specified frame check bit is located at the end. Their arrangement order in the specified data frame is in turn the preset frame header flag bit, the specified frame header check bit, the specified frame sequence number, the specified frame data length information, the specified frame data and the frame check bit; or, the preset frame header flag bit, the specified frame header check bit, the specified frame data length information, the specified frame sequence number, the specified frame data and the specified frame check bit.

[0067] Further, the internal data of the reference data can be determined as the specified frame check bit according to the order XOR result. The order involved in the XOR operation can be the order of the internal data from front to back (from high bit to low bit), and the internal data participating in the XOR operation or the XOR operation result of the internal data can be in byte dimension or in bit dimension. Specifically, BCC check can be used. For example, the reference data includes the specified frame data, the specified frame data length information and the specified frame sequence number, and the arrangement order of the internal data constituted by them is in turn the specified frame sequence number, the specified frame data length information and the specified frame data. The specified frame check bit is the order XOR result of the internal data. In this way, the efficiency of determining the frame check bit can be improved, and the reliability of subsequent frame check using the frame check bit and the reference data can be ensured. Of course, in order to improve the strength of the encryption mode agreed between the frame check bit and the reference data, CRC can also be used.

[0068] In actual application, the data processing scheme for device communication provided by the embodiments of the present application involves the constituent setting of data frame, which can refer to the following Table 1:

[0069]

[0070] Table 1

[0071] Wherein, the data frame is composed of a frame header, a frame sequence number, frame data length information, frame data and a frame check bit. The data frame is a complete service data packet for one transmission, the frame header is a flag bit of the start bit of the data frame, the frame sequence number is a unique flag bit of the data frame, the frame data length information indicates the data length of the frame data related to the service carried by the data frame, the frame data is the target data related to the service carried by the data frame, and the frame check bit is a flag bit for verifying the integrity of the data frame. Specifically,

[0072] 1) Frame header: total length 2 bytes, composed of 0x5A (preset frame header flag) + frame header check bit. The frame header check bit exists to prove that the preceding 0x5A is the start bit of the frame header, rather than the frame data 0x5A. In this way, the start bit of the data frame can be quickly found, and the packet extraction (data frame extraction) process can be quickly started. The frame header check bit can be a 1-byte check bit generated by BCC exclusive OR of the high and low bits of the frame sequence number.

[0073] 2) Frame sequence number: total length 2 bytes, a unique sequence number starting from 0x0000 and increasing sequentially, which ensures the uniqueness of each data frame. The frame header check bit indicates the frame sequence number, and the probability that the same data as the frame header check bit appears in the frame data is less than .

[0074] 3) Frame data length information: total length 2 bytes, indicating the length of the frame data that follows, facilitating packet extraction.

[0075] 4) Frame data: 2 16 bytes of any length of data. For serial port low-speed transmission, the scenario of transmitting 2 16 bytes (65M) at a time through the serial port basically does not exist, and data of larger length can be transmitted using USB high-speed transmission.

[0076] 5) Frame check bit: total length 1 byte, a check bit generated by BCC exclusive OR of the high and low bits of the reference data (frame sequence number + frame data length information + frame data), to verify the integrity of the data frame. Compared with the encryption strength brought by CRC (such as the theoretical error rate of corresponding to complex CRC16, CRC16 involves a frame check bit of total length 2 bytes), here the frame check bit corresponds to the theoretical error rate of , and the frame header check bit in 2) corresponds to the theoretical error rate of . Therefore, the data processing scheme for device communication provided by the embodiment of the application can guarantee the global theoretical error rate of while occupying less frame internal space, realizing faster frame check bit determination and faster frame checking.

[0077] From the technical solutions provided by the embodiments of the present application, it can be seen that the embodiments of the present application generate a specified data frame based on the configuration of a data frame, introduce a preset frame header flag bit without limiting the length of frame data, and set other elements and their lengths of the data frame. In this way, the intra-frame space utilization of the data frame is improved, and the data transmission efficiency is not affected by space waste.

[0078] Figure 3 A flowchart of a data processing method for device communication according to an embodiment of the present application is shown, as shown in Figure 3 The method comprises:

[0079] S301: Extract a target data frame from a data cache queue, wherein the data cache queue is used to store received data frames of the data receiving end, and the received data frames are generated by the data sending end using the data processing method for device communication as described in the foregoing steps S201-S204.

[0080] In the embodiments of the present application, the data receiving end extracts a target data frame from a data cache queue. In combination with the related description of the foregoing steps S201-S204, the data sending end generates a specified data frame and sends the specified data to the data receiving end. The data receiving end stores the received data frames using the data cache queue. Taking a plurality of received data frames as an example, the data receiving end adds the plurality of received data frames to the tail of the data cache queue in the order of the receiving time.

[0081] The data receiving end extracts data frames from the head of the data cache queue. Specifically, first, it is determined whether the data cache queue is empty; then, when the data cache queue is not empty, a data frame is extracted from the data cache queue; further, the above steps of determining whether the data cache queue is empty and extracting a data frame from the data cache queue are repeated until the data cache queue is empty. It should be noted that 1) the target data frame can be the specified data frame involved in the foregoing steps S201-S204, or other data frames before the specified data frame in the data cache queue. 2) The other data frames can be generated by the same data sending end using the data processing method for device communication as described in the foregoing steps S201-S204, or generated by other data sending ends using the data processing method for device communication as described in the foregoing steps S201-S204. Reference can be made to Figure 6 、 7 , Figure 6 The binary expression of "L" is "01001100", and the complete packet indication "LOL" is in Figure 7 .

[0082] In an exemplary embodiment, as shown in Figure 4As shown, before the target data frame is extracted from the data cache queue, the method further comprises:

[0083] S401: determining the preset frame header flag bit in the data cache queue;

[0084] S402: determining the associated element in the data cache queue according to the data sorting order of the data cache queue and the associated element length requirement, taking the preset frame header flag bit as the starting point, the associated element being other elements for constituting the data frame except the preset frame header flag bit, the associated element length requirement including the first length requirement, the second length requirement and the third length requirement;

[0085] S403: obtaining the target data frame according to the preset frame header flag bit and the associated element.

[0086] In combination with the description of the constituting setting of the data frame in the foregoing steps S201-S204, the frame header of the data frame can be located through the preset frame header flag bit. On the basis of determining the preset frame header flag bit in the data cache queue, the associated element can be determined in the data cache queue according to the data sorting order of the data cache queue and the associated element length requirement, taking the preset frame header flag bit as the starting point. The associated element can include the candidate frame data length information meeting the first length requirement, the candidate frame sequence number meeting the second length requirement, the candidate frame header check bit meeting the third length requirement, and the candidate frame data meeting the candidate frame data length information. On the basis of determining the associated element in the data cache queue, a complete data frame, i.e., the target data frame, can be obtained based on the preset frame header flag bit and the associated element. Since there are multiple associated elements, the order of determining them in the data buffer queue can refer to the arrangement order involved in the foregoing step S204, which will not be described again.

[0087] Compared with the related art that the data receiving end extracts the data frame from the data buffer queue according to the fixed length, the embodiment of the present application adopts the preset frame header flag bit to locate the starting bit of the data frame before extracting the data frame, and determines the associated element in combination with the associated element length requirement, thereby improving the adaptability and accuracy of determining the complete data frame, and further ensuring that the complete and valid data frame can be extracted from the data cache queue. Even if packet loss, packet error and the like occur in data transmission, the embodiment of the present application can also guarantee the reliability of extracting the complete data frame.

[0088] For example, the arrangement order of the data frame received by the data receiving end is also as follows: the preset frame header flag bit, the specified frame header check bit, the specified frame sequence number, the specified frame data length information and the specified frame data. Then, as shown in the foregoing step S402, the data receiving end can determine the associated element in the data cache queue according to the data sorting order of the data cache queue and the associated element length requirement, taking the preset frame header flag bit as the starting point. Figure 5As shown, the determining the associated element in the data buffer queue according to the data sorting order of the data buffer queue and the associated element length requirement, starting from the preset frame header flag bit, comprises:

[0089] S501: sequentially determining a candidate frame header check bit meeting the third length requirement and a candidate frame sequence number meeting the second length requirement in the data buffer queue according to the data sorting order of the data buffer queue, starting from the preset frame header flag bit.

[0090] S502: when the candidate frame header check bit matches the candidate frame sequence number, sequentially determining a candidate frame data length information meeting the first length requirement and candidate frame data meeting the candidate frame data length information in the data buffer queue according to the data sorting order of the data buffer queue, starting from the candidate frame sequence number.

[0091] S503: obtaining the associated element based on the candidate frame header check bit, the candidate frame sequence number, the candidate frame data length information and the candidate frame data.

[0092] Referring to Figure 8 starting from the preset frame header flag bit, judging whether the data length after the preset frame header flag bit in the data buffer queue meets the third length requirement based on the data sorting order corresponding to the data buffer queue; if yes, determining the data adjacent to the preset frame header flag bit in the data buffer queue and meeting the third length requirement as the candidate frame header check bit; if no, it is indicated that there is no candidate frame header check bit, and the next preset frame header flag bit needs to be determined from the data buffer queue. If the preset frame header flag bit meets the third length requirement, the determination of the next preset frame header flag bit needs to wait for adding new data in the data buffer queue.

[0093] starting from the candidate frame header check bit, judging whether the data length after the candidate frame header check bit in the data buffer queue meets the second length requirement based on the data sorting order corresponding to the data buffer queue; if yes, determining the data adjacent to the candidate frame header check bit in the data buffer queue and meeting the second length requirement as the candidate frame sequence number; if no, it is indicated that there is no candidate frame header check bit, and the next preset frame header flag bit needs to be determined from the data buffer queue.

[0094] On the basis of determining the candidate frame header check bit and the candidate frame sequence number, it is judged whether the two match. If not, it indicates that the frame header check fails, and the next preset frame header flag bit needs to be determined from the data cache queue. If yes, it indicates that the frame header check succeeds, and the candidate frame data needs to be determined from the data cache queue. The process of determining the candidate frame data from the data cache queue is as follows: a) taking the candidate frame sequence number as the starting point, judging whether the data length after the candidate frame sequence number in the data cache queue meets the first length requirement based on the data sorting order corresponding to the data cache queue; b) if yes, determining the data adjacent to the candidate frame sequence number and meeting the first length requirement in the data cache queue as the candidate frame data length information; c) taking the candidate frame data length information as the starting point, judging whether the data length after the candidate frame data length information in the data cache queue meets the candidate frame data length information based on the data sorting order corresponding to the data cache queue; d) if yes, determining the data adjacent to the candidate frame data length information and meeting the candidate frame data length information in the data cache queue as the candidate frame data; e) if yes, it indicates that there is no candidate frame data, and the next preset frame header flag bit needs to be determined from the data cache queue. Of course, if the data length after the candidate frame sequence number in the data cache queue does not meet the first length requirement, it indicates that there is no candidate frame data length information, and the next preset frame header flag bit also needs to be determined from the data cache queue.

[0095] In combination with the content about the length of the constituent item and the relationship between the constituent items in the setting of the constitution of the data frame, each constituent item is determined step by step, and the determination of the associated element is completed. In the step-by-step determination, whether the length requirement is met and whether the matching relationship is met are used to realize the determination of the constituent item with finer granularity and realize the more timely and effective frame extraction switching (i.e., in the case that the current data frame to be extracted does not meet the requirement, the extraction process for the next data frame is started in time).

[0096] Further, referring to the "specified frame check code" introduced in the aforementioned step S204, each received data frame here is generated by the relevant data sending end using the data processing method for device communication described in the aforementioned steps S201-S204. Then, before obtaining the associated element based on the candidate frame header check code, the candidate frame sequence number, the candidate frame data length information, and the candidate frame data, the method can further include the following step: determining a candidate frame check code that meets the fourth length requirement in the data buffer queue starting from the candidate frame data according to the data ordering sequence of the data buffer queue. Correspondingly, when the candidate frame check code matches the to-be-matched data, the associated element can be obtained based on the candidate frame header check code, the candidate frame sequence number, the candidate frame data length information, the candidate frame data, and the candidate frame check code, and the to-be-matched data includes at least one of the candidate frame sequence number, the candidate frame data length information, and the candidate frame data.

[0097] The frame check code is used together with the frame header check code, which can improve the accuracy of extracting complete data frames and further ensure the reliable performance of data transmission. It should be noted that if a certain constituent item is agreed upon as reference data in the link of generating data frames, and the frame check code is determined based on this. Then, in the link of extracting data frames, the constituent item is also used as to-be-matched data, and frame checking is performed based on this. For example, the selected reference data is the frame sequence number + frame data length information + frame data item, and the to-be-matched data is the frame sequence number + frame data length information + frame data.

[0098] The following will introduce the judgment of whether the candidate frame header check code matches the candidate frame sequence number, and whether the candidate frame check code matches the to-be-matched data:

[0099] The matching relationship judged here needs to be consistent with the matching relationship agreed upon in the link of generating data frames. Referring to the relevant records of the aforementioned steps S203 and S204, for "judging whether the candidate frame header check code matches the candidate frame sequence number", the first internal data per-order XOR result of the candidate frame sequence number can be determined first; when the first internal data per-order XOR result is the same as the candidate frame header check code, it is determined that the candidate frame header check code matches the candidate frame sequence number; otherwise, it is determined that the candidate frame header check code does not match the candidate frame sequence number. For "judging whether the candidate frame check code matches the to-be-matched data", the second internal data per-order XOR result of the to-be-matched data can be determined first; when the second internal data per-order XOR result is the same as the candidate frame check code, it is determined that the candidate frame check code matches the to-be-matched data; otherwise, it is determined that the candidate frame check code does not match the to-be-matched data.

[0100] The data receiving end extracts the data frame from the data cache queue after determining the data frame. In normal cases, the preset frame header flag should appear at the head of the data cache queue. The following provides a determination and feedback method for abnormal cases, specifically as follows:

[0101] I) For determining the preset frame header flag in the data cache queue: starting from the head of the data cache queue, the frame header flag is located in the data cache queue according to the data sorting order of the data cache queue until the preset frame header flag is determined. In this way, the data receiving end can extract the data frame from the head of the data cache queue. Taking the preset frame header flag 0X5A and its data length of 1 byte as an example, a sliding window scheme can be used, starting from the head of the data cache queue, and sequentially locating the candidate data of 1 byte and judging whether the candidate data is 0X5A until 0X5A is found.

[0102] II) Before the target data frame is extracted from the data cache queue, the method can further include the following steps: when the preset frame header flag is not located at the head of the data cache queue, determining that the data before the preset frame header flag in the data cache queue is abnormal data, or generating a feedback instruction to send to the data sending end. If there is other data between the preset frame header flag and the head of the data cache queue, the other data can be determined as abnormal data: the abnormal data can be discarded to avoid occupying storage space and affecting data processing effect; or a feedback instruction can be generated and sent to the data sending end: the data sending end can be reported an error, requested to retransmit, etc. through the feedback instruction to avoid affecting related businesses. In addition, the frame sequence number can be located in the other data, and then the data sending end can be determined through the frame sequence number.

[0103] In actual application, in combination with Table 1, after the frame structure is defined, the data processing scheme for device communication provided by the embodiment of the application further introduces processing logic of self-built buffer and packet cutting (extracting data frame) strategy. The self-built buffer is a first-in first-out serial message queue, which has the characteristics of multi-thread safety. Each time new data comes in, the packet cutting strategy is triggered to start inspection, and the complete data frame is cut out; the incomplete data frame is left; the error data frame is discarded, and the response mechanism is triggered to send to the upper computer and request data retransmission.

[0104] Figure 8 The process from new data coming in, inserting into the buffer queue, to starting the packet cutting strategy to obtain the correct data frame or error data frame is described in detail.

[0105] 1) When new data comes in through the serial port, it is inserted into the tail of the buffer queue in the order of first-in first-out, and the packet cutting strategy is started.

[0106] 2) After the data is loaded in 1), start to search for preset frame header flag 0x5A from the head of the buffer queue. If not exist, end the process. If exist, start to search for frame header check bit and frame sequence; then start to perform BCC exclusive or check on the frame header check bit and the frame sequence; if the exclusive or result of the frame sequence is equal to the frame header check bit, it indicates that the frame header composed of 0x5A and the frame header check bit is legal, otherwise start to search for the next 0x5A.

[0107] 3) After the legal frame header is found in 2), start to search for frame data length information, frame data and frame check bit. If not found, it indicates that the data receiving end has not completely received this data frame, which can be directly bypassed, and the next 0x5A can be searched. If found, and the exclusive or result of the to-be-matched data (frame sequence number + frame data length information + frame data) is equal to the frame check bit, it indicates that the data frame composed of 0x5A, frame header check bit, frame sequence number, frame data length information, frame data and frame check bit is legal, which can be extracted from the queue. At this time, if the buffer is empty, end the process; otherwise, start to determine whether there is an error data frame (corresponding to the above abnormal data) in the buffer, and process it, and then if the buffer is still empty, end the process, otherwise start to search for the next 0x5A.

[0108] Through the above steps, the complete data frame can be cut out in real time, and the retransmission request or error reporting strategy is triggered when the error data frame is cut out. The data processing scheme for device communication provided by the embodiment of the application involves serial communication. Through redefinition of the data frame, the positioning and identification effect of the frame header is taken into account, the conflict with the frame data is avoided, the reliability and efficiency of data transmission are ensured with minimum data frame loss, the occurrence of packet splitting and packet sticking can be effectively avoided, the error packet retransmission or error reporting, real-time cutting of packet sticking, zero-delay reading of packet splitting and other characteristics can be effectively adapted to the error packet and packet loss scenarios. At the same time, in cooperation with the serial data frame buffer and the packet cutting strategy, the effectiveness of data interaction between devices is ensured, and the related business effect is ensured.

[0109] As can be seen from the technical scheme provided by the above embodiment of the application, the target data frame is extracted from the data cache queue based on the composition of the data frame. In the case of not limiting the length of the frame data, a preset frame header flag is introduced, and other elements and their lengths constituting the data frame are set. In this way, the extracted data frame is complete and effective, and the reliability of data transmission is ensured.

[0110] The embodiment of the application also provides a data processing device for device communication, as shown in Figure 9 The data processing device for device communication 90 is configured in a data sending end, and the data processing device for device communication comprises:

[0111] The designated frame data determination module 901 is configured to determine corresponding designated frame data in response to a data frame generation instruction.

[0112] The designated frame data length information generation module 902 is configured to generate designated frame data length information based on the data length of the designated frame data, wherein the designated frame data length information satisfies a first length requirement.

[0113] The associated element generation module 903 is configured to determine a designated frame sequence number corresponding to the designated frame data and a designated frame header check bit, wherein the designated frame sequence number is different from an already allocated frame sequence number, the designated frame sequence number satisfies a second length requirement, and the designated frame header check bit satisfies a third length requirement.

[0114] The designated data frame generation module 904 is configured to generate a designated data frame based on a preset frame header flag bit, the designated frame header check bit, the designated frame sequence number, the designated frame data length information, and the designated frame data, and send the designated data frame to a data receiving end.

[0115] It should be noted that the device in the device embodiment and the method embodiment are based on the same inventive concept.

[0116] The device for device communication data processing apparatus provided in the embodiments of the present application is configured in a data receiving end, and comprises a target data frame extraction module configured to extract a target data frame from a data cache queue, wherein the data cache queue is configured to store a received data frame of the data receiving end, and the received data frame is generated by using the device for device communication data processing method described in the foregoing steps S201-S204.

[0117] It should be noted that the device in the device embodiment and the method embodiment are based on the same inventive concept.

[0118] In some embodiments, the device provided in the embodiments of the present application has functions or comprises modules that can be used to execute the method described in the foregoing method embodiments, and the specific implementation can be referred to the description of the foregoing method embodiments, and for brevity, will not be described here.

[0119] The embodiments of the present application further provide a computer readable storage medium, wherein at least one instruction or at least one program is stored in the computer readable storage medium, and the at least one instruction or at least one program is loaded and executed by a processor to implement the foregoing method. The computer readable storage medium can be a non-volatile computer readable storage medium.

[0120] The embodiment of the present application further provides an electronic device, which comprises at least one processor and a memory connected with the at least one processor in communication; wherein the memory stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by the at least one processor to realize the above method.

[0121] The electronic device can be provided as a terminal, a server or other forms of devices.

[0122] Figure 10 A block diagram of an electronic device according to an embodiment of the present application is shown. For example, the electronic device 1900 can be provided as a server. Referring to Figure 10 , the electronic device 1900 comprises a processing component 1922, which further comprises one or more processors, and a memory resource represented by a memory 1932, for storing instructions executable by the processing component 1922, such as an application program. The application program stored in the memory 1932 can comprise one or more than one module each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute the instructions to perform the above method.

[0123] The electronic device 1900 can further comprise a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output (I / O) interface 1958. The electronic device 1900 can operate based on an operating system stored in the memory 1932, such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM or the like.

[0124] In an exemplary embodiment, a non-volatile computer readable storage medium, such as the memory 1932 comprising computer program instructions executable by the processing component 1922 of the electronic device 1900 to complete the above method is further provided.

[0125] The present application can be a system, a method, and / or a computer program product. The computer program product can include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present application.

[0126] Computer readable storage media can be tangible storage media which can retain and store instructions for use by an instruction execution device. Computer readable storage media can be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer readable storage media include the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.

[0127] Computer readable program instructions described herein can be downloaded to respective computing / processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and / or a wireless network. The network can comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and / or edge servers. A network adapter card or network interface in each computing / processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing / processing device.

[0128] Computer readable program instructions for carrying out operations of the present application can be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate array (FPGA), or programmable logic array (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present application.

[0129] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0130] These computer readable program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. These computer readable program instructions can also be stored in a computer readable storage medium that can include random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or nonvolatile memory, or a suitable combination of the different types of computer readable storage media. The computer readable program instructions can also be downloaded to a computer, other programmable data processing apparatus, or other device from a computer readable storage medium or to an external computer or external storage device via a data signal that can be transmitted for example via a wired medium or a wireless medium such as the Internet or wireless media.

[0131] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer, other programmable data processing apparatus, or other device implement the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0132] The flow diagrams and the block diagrams in the drawings are presented to illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams and the block diagrams can represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logic functions. In some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and

[0133] Embodiments of the application have been described above. The description is illustrative of the embodiments of the application and is not meant to be limiting. Numerous modifications and variations are possible in light of the above teachings without departing from the scope and spirit of the described embodiments of the application. No limitation is intended to the details of construction or design except as described in the claims.

Claims

1. A data processing method for device communication, characterized by, The method is applied to a data receiving end, and comprises the following steps: A preset frame header mark is determined in a data cache queue, the data cache queue is used for storing data frames sent by a data sending end, and the data frames are sent by the data sending end based on a serial port communication mechanism through multiple single-byte sending; A candidate frame header check bit meeting a third length requirement and a candidate frame sequence number meeting a second length requirement are sequentially determined in the data cache queue according to a data sorting order of the data cache queue, with the preset frame header mark as a starting point; When an in-order XOR result of internal data of the candidate frame sequence number is the same as the candidate frame header check bit, a candidate frame data length information meeting a first length requirement, candidate frame data meeting the candidate frame data length information, and a candidate frame check bit meeting a fourth length requirement are sequentially determined in the data cache queue according to the data sorting order of the data cache queue, with the candidate frame sequence number as a starting point; When an in-order XOR result of internal data of the candidate frame sequence number is the same as the candidate frame header check bit, a candidate frame data length information meeting a first length requirement, candidate frame data meeting the candidate frame data length information, and a candidate frame check bit meeting a fourth length requirement are sequentially determined in the data cache queue according to the data sorting order of the data cache queue, with the candidate frame sequence number as a starting point; 2. The method of claim 1, wherein, When an in-order XOR result of internal data of the candidate frame sequence number is the same as the candidate frame header check bit, a candidate frame data length information meeting a first length requirement, candidate frame data meeting the candidate frame data length information, and a candidate frame check bit meeting a fourth length requirement are sequentially determined in the data cache queue according to the data sorting order of the data cache queue, with the candidate frame sequence number as a starting point; When an in-order XOR result of internal data of the candidate frame sequence number is the same as the candidate frame header check bit, a candidate frame data length information meeting a first length requirement, candidate frame data meeting the candidate frame data length information, and a candidate frame check bit meeting a fourth length requirement are sequentially determined in the data cache queue according to the data sorting order of the data cache queue, with the candidate frame sequence number as a starting point.

3. The method according to claim 1 or 2, characterized in that, After the target frame data is obtained based on the preset frame header mark, the candidate frame header check bit, the candidate frame sequence number, the candidate frame data length information, the candidate frame data and the candidate frame check bit, the method further comprises the following steps: The target data frame is extracted from the data cache queue.

4. The method of claim 3, wherein, The preset frame header mark is determined in the data cache queue, comprising the following steps: Frame header mark positioning is performed on the data cache queue according to a data sorting order of the data cache queue, starting from a head of the data cache queue, until the preset frame header mark is determined.

5. A data processing method for device communication, characterized by, The method further comprises the following steps: When the preset frame header mark is not located at the head of the data cache queue, it is determined that data located before the preset frame header mark in the data cache queue is abnormal data, or a feedback instruction is generated to be sent to the data sending end. The method is applied to a data sending end, and comprises the following steps: In response to a data frame generation instruction, corresponding specified frame data is determined; A specified frame data length information is generated based on a data length of the specified frame data, and the specified frame data length information meets a first length requirement; A specified frame sequence number corresponding to the specified frame data is determined, and an in-order XOR result of internal data of the specified frame sequence number is determined as a specified frame header check bit, the specified frame sequence number is different from an already allocated frame sequence number, and the specified frame sequence number meets a second length requirement and the specified frame header check bit meets a third length requirement; XORing internal data of the reference data in sequence to determine a specified frame check code, the reference data including at least one of the specified frame data, the specified frame data length information and the specified frame sequence number, the specified frame check code satisfying a fourth length requirement; generating a specified data frame based on the preset frame header flag, the specified frame header check code, the specified frame sequence number, the specified frame data length information, the specified frame data and the specified frame check code; sending the specified data frame to a data receiving end, so that the data receiving end uses the data processing method for device communication according to any one of claims 1 to 4 to locate a data frame.

6. A data processing apparatus for device communication, characterized by The device is configured in a data receiving end, and the device is used for: determining a preset frame header flag in a data cache queue, the data cache queue being used for storing data frames sent by a data sending end, the data frames being sent by the data sending end based on a serial port communication mechanism through multiple single-byte sending; starting from the preset frame header flag, sequentially determining, in the data cache queue, a candidate frame header check code satisfying a third length requirement and a candidate frame sequence number satisfying a second length requirement according to a data sorting order of the data cache queue; when internal data of the candidate frame sequence number XORed in sequence is the same as the candidate frame header check code, starting from the candidate frame sequence number, sequentially determining, in the data cache queue, candidate frame data length information satisfying a first length requirement, candidate frame data satisfying the candidate frame data length information, and a candidate frame check code satisfying a fourth length requirement according to the data sorting order of the data cache queue; when internal data of the to-be-matched data XORed in sequence is the same as the candidate frame check code, obtaining a target data frame based on the preset frame header flag, the candidate frame header check code, the candidate frame sequence number, the candidate frame data length information, the candidate frame data and the candidate frame check code, the to-be-matched data including at least one of the candidate frame sequence number, the candidate frame data length information and the candidate frame data.

7. The apparatus of claim 6, wherein, The device further includes: a target data frame extraction module configured to extract the target data frame from the data cache queue.

8. The apparatus of claim 6 or 7, wherein, The determining of the preset frame header flag in the data cache queue includes: starting from a head of the data cache queue, performing frame header flag positioning on the data cache queue according to the data sorting order of the data cache queue, until the preset frame header flag is determined.

9. The apparatus of claim 8, wherein, The device is further used for: when the preset frame header flag is not located at the head of the data cache queue, determining data located before the preset frame header flag in the data cache queue as abnormal data, or generating a feedback instruction to be sent to the data sending end.

10. A data processing device for device communication, characterized by The device is configured in a data sending end, and the device includes: a specified frame data determination module configured to determine corresponding specified frame data in response to a data frame generation instruction; a specified frame data length information generation module configured to generate specified frame data length information based on a data length of the specified frame data, the specified frame data length information satisfying a first length requirement; The association element generation module is configured to determine a specified frame sequence number corresponding to the specified frame data, and determine an internal data of the specified frame sequence number as a specified frame header check bit by performing a sequence XOR operation, the specified frame sequence number is different from an allocated frame sequence number, and the specified frame sequence number satisfies a second length requirement, and the specified frame header check bit satisfies a third length requirement; The internal data of the reference data is determined as the specified frame check bit by performing a sequence XOR operation, the reference data includes at least one of the specified frame data, the specified frame data length information and the specified frame sequence number, and the specified frame check bit satisfies a fourth length requirement; The specified data frame generation module is configured to generate a specified data frame based on a preset frame header flag, the specified frame header check bit, the specified frame sequence number, the specified frame data length information, the specified frame data and the specified frame check bit; The specified data frame sending module is configured to send the specified data frame to a data receiving end, so that the data receiving end uses the data processing method for device communication according to any one of claims 1 to 4 to locate a data frame.

11. An electronic device, comprising: The electronic device includes at least one processor, and a memory connected with the at least one processor in communication; wherein the memory stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by the at least one processor to implement the data processing method for device communication according to any one of claims 1 to 4, or the data processing method for device communication according to claim 5.

12. A computer-readable storage medium, characterized in that, The computer readable storage medium stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by the processor to implement the data processing method for device communication according to any one of claims 1 to 4, or the data processing method for device communication according to claim 5.

13. A computer program product, characterised in that, The computer program product includes at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by the processor to implement the data processing method for device communication according to any one of claims 1 to 4, or the data processing method for device communication according to claim 5.

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