Power supply device and power supply control method

Abstract

The application provides a power supply device for supplying power to a powered device in a power over Ethernet system. The power supply device includes a first port, a second port, and a control circuit. The first port is configured to power stage the powered device in a first stage and output a first voltage across the powered device. The second port is configured to output a second voltage across the powered device in a second stage. The control circuit is configured to disable the second port in the first stage and control the second port to output the second voltage and increase the first voltage in the second stage.

Description

Technical Field

[0001] This invention relates to a power supply device and a power supply control method, and particularly to a single-channel mode power supply device and a power supply control method. Background Technology

[0002] In power over Ethernet (PoE) systems, if the power sourcing equipment takes too long to perform power classification on the powered device, the powered device may fail to be authenticated, thus preventing the power sourcing equipment from supplying power to the powered device. Therefore, the efficiency of power classification has become a concern in this field. Summary of the Invention

[0003] This invention provides an electrical device for supplying power to a powered device in a Power over Ethernet (PoE) system. The power supply device includes a first port, a second port, and control circuitry. The first port is used to perform power grading on the powered device in a first phase and output a first voltage across the powered device. The second port is used to output a second voltage across the powered device in a second phase. The control circuitry is used to disable the second port in the first phase and to control the second port to output the second voltage across the second port and increase the first voltage across the second port in the second phase.

[0004] This invention provides a power supply control method for controlling the power supply of a power supply device to a powered device in a Power over Ethernet (PoE) system. The power supply control method includes: in a first stage of the power supply control method, performing power classification on the powered device and controlling a first port of the power supply device to output a first cross-voltage to the powered device; in the first stage, disabling a second port of the power supply device; in a second stage of the power supply control method, controlling the second port to output a second cross-voltage to the powered device; and in the second stage, increasing the first cross-voltage.

[0005] The power supply device and power supply control method of the present invention adjust the voltage to increase the speed at which the current charges the capacitor in the power supply device, thereby accelerating the execution of power grading. Attached Figure Description

[0006] The various embodiments of this application can be best understood by reading the detailed description and accompanying drawings below. It should be noted that, in accordance with standard practice in the art, the various features in the figures are not drawn to scale. In fact, the dimensions of certain features may be intentionally enlarged or reduced for clarity of description.

[0007] Figure 1 This is a schematic diagram of a Power over Ethernet (PoE) system according to some embodiments of the present invention.

[0008] Figure 2 This is a schematic diagram of a power supply device and a power receiving device according to some embodiments of the present invention.

[0009] Figure 3 The above is a waveform diagram of the voltage within a power supply device according to some embodiments of the present invention.

[0010] Explanation of reference numerals in the attached figures:

[0011] PoE (Power over Ethernet) system - PSE (Power Supply Device) - PD (Power Receiver)

[0012] PA-ConverterCRT-Control CircuitP1-First Port

[0013] P2 - Second port PP1 - Positive terminal PN1 - Negative terminal

[0014] PP2 - Positive terminal PN2 - Negative terminal C1 - Capacitor

[0015] C2 - Capacitor CN - Capacitor R - Resistor

[0016] L - Load M1 - Transistor M2 - Transistor

[0017] OP - Amplifier S - Switch FB - Feedback Controller

[0018] VDD - Supply voltage; VSS - Supply voltage; V1 - Voltage

[0019] V2 - Voltage; VC - Control Voltage; VP1 - Transvoltage

[0020] VP2 - Transvoltage VPD - Transvoltage BR1 - Bridge Rectifier

[0021] BR2-Bridge rectifier T1-First stage T2-Second stage Detailed Implementation

[0022] Figure 1 This is a schematic diagram of a power over Ethernet (PoE) system according to some embodiments of the present invention. PoE includes power sourcing equipment (PSE), powered device (PD), and adapter (PA).

[0023] In PoE, besides transmitting Ethernet signals, the network cable is also used by the Power Provider (PSE) to provide power to the Device (PD), eliminating the need for the remote PD to receive additional power. In some embodiments, the PD requires high power consumption, and a single port on the PSE may not be sufficient. In this case, the PSE uses a single-signature mode to power the PD. Specifically, in single-signature mode, the PSE uses two (or more) ports to power the PD. For ease of explanation, this invention is illustrated using two ports on the PSE to power the PD. However, this invention is not limited to this; using various numbers of ports to power the PD is within the scope of this invention.

[0024] PA is used to provide supply voltages VDD and VSS to PSE, for example, providing DC power with a voltage difference of 48V between supply voltages VDD and VSS. PSE then uses supply voltages VDD and VSS to supply power to PD.

[0025] refer to Figure 2 . Figure 2 This is a schematic diagram illustrating a Power Sockets Environment (PSE) and a Power Socket Device (PD) according to some embodiments of the present invention. The PSE includes multiple ports and a control circuit (CRT). In this invention, only the first port P1 and the second port P2 are discussed, where the first port P1 and the second port P2 can be any two of these ports in the PSE. The control circuit (CRT) is coupled to the first port P1 and the second port P2 and is used to control the power supply from the first port P1 and the second port P2 to the PD. The first port P1 and the second port P2 are respectively coupled to the PD via network cables.

[0026] Before the PSE supplies power to the PD, the operation can be divided into two stages, T1 and T2. In the first stage, T1, the PSE and PD first perform power classification (also known as power detection). In the first stage, T1, the PSE detects the PD through the first port P1. If the PD is successfully verified, the operation proceeds to the second stage, T2.

[0027] The first port P1 and the second port P2 are used to provide voltage difference VP1 and voltage difference VP2 to the PD, respectively. The first port P1 includes a positive terminal PP1 and a negative terminal PN1, where the positive terminal PP1 receives the supply voltage VDD and transmits it to the PD, and the negative terminal PN1 receives voltage V1 from the PD. The second port P2 includes a positive terminal PP2 and a negative terminal PN2, where the positive terminal PP2 receives the supply voltage VDD and transmits it to the PD, and the negative terminal PN2 receives voltage V2 from the PD. The voltage difference between the supply voltage VDD and voltage V1 is the voltage difference VP1, and the voltage difference between the supply voltage VDD and voltage V2 is the voltage difference VP2.

[0028] The control circuit CRT includes capacitors C1 and C2, transistors M1 and M2, amplifier OP, feedback controller FB, and switch S. Capacitor C1 is coupled between the supply voltage VDD and the first terminal of transistor M1; feedback controller FB is coupled between the positive input terminal of amplifier OP and the first terminal of transistor M1; the negative input terminal of amplifier OP receives the reference voltage VREF; the output terminal of amplifier OP is coupled to the control terminal of transistor M1; the second terminal of transistor M1 is coupled to the supply voltage VSS; capacitor C2 is coupled between the supply voltage VDD and the first terminal of transistor M2; the output terminal of amplifier OP is also coupled to the control terminal of transistor M2 via switch S; the second terminal of transistor M2 is coupled to the supply voltage VSS. The first terminal of transistor M1 is coupled to the negative terminal PN1 to receive voltage V1, and the first terminal of transistor M2 is coupled to the negative terminal PN2 to receive voltage V2.

[0029] In some embodiments, PD includes bridge rectifiers BR1 and BR2 connected across the load L. For ease of understanding, the load L is represented by an RC circuit consisting of capacitor CN and resistor R. Bridge rectifier BR1 receives the supply voltage VDD and outputs a first voltage; bridge rectifier BR2 receives the supply voltage VDD and outputs a second voltage. When the first port P1 supplies power to PD, the voltage across the load L, VPD, is equal to the voltage across the load L, VP1. Similarly, when the second port P2 supplies power to PD, the voltage across the load L, VPD, is equal to the voltage across the load L, VP2. When the PSE supplies power to PD using the first port P1 and the second port P2 to achieve a steady state, the voltages VP1, VP2, and VPD are all equal.

[0030] In the first stage T1, switch S is closed, transistor M2 is not conducting, and the voltage across capacitor C2 VP2 is 0, disabling the second port P2. The supply voltage VDD is transferred from the positive terminal PP1 of the first port P1 to PD, generating a voltage across load L VPD. Then, voltage V1 (=VDD-VPD) is transferred from bridge rectifier BR1 through the negative terminal PN1 of the first port P1 to the first terminal of transistor M1. The feedback controller FB is used to directly transfer voltage V1 to the positive receiving terminal of amplifier OP.

[0031] In this invention, voltage V1 is greater than the reference voltage VREF, and amplifier OP generates a control voltage VC greater than 0, so transistor M1 is turned on. Please also refer to... Figure 3 , Figure 3The diagram illustrates the waveforms of voltages V1 and V2 according to some embodiments of the present invention. When transistor M1 is first turned on, a conduction current is generated and flows from the first terminal of transistor M1 to the second terminal coupled to the supply voltage VSS, thus pulling down the voltage V1 at the first terminal of transistor M1. Subsequently, charge gradually accumulates at the first terminal of transistor M1 (coupled to capacitor C1) until the voltage across capacitor C1 equals a predetermined voltage across VP1 (e.g., ...). Figure 3 (As shown in the T1 region of the first stage).

[0032] In the second stage T2, switch S is turned on, and transistor M2 is thus turned on, enabling the second port P2. The supply voltage VDD is transferred from the positive terminal PP2 of the second port P2 to PD, generating a voltage across the load L, VPD. Then, voltage V2 (=VDD-VPD) is transferred from the bridge rectifier BR2 through the negative terminal PN2 of the second port P2 to the first terminal of transistor M2. Similarly, when transistor M2 first turns on, it generates current that flows to the supply voltage VSS terminal, thus pulling down the voltage V2 at the first terminal of transistor M2. Then, charge gradually accumulates at the first terminal of transistor M2 (coupled to capacitor C2) until the voltage across capacitor C2 equals the predetermined voltage across VP2 (e.g., ...). Figure 3 (As shown in the T2 region of the second stage).

[0033] In some embodiments, the feedback controller FB directly transmits voltage V1 to the positive receiving terminal of amplifier OP in the second stage T2. Amplifier OP generates a control voltage VC greater than 0, so transistors M1 and M2 are turned on. Simultaneously, the control circuit CRT is used in the second stage T2 to change the reference voltage VREF, causing the voltage V1 at the first terminal of transistor M1 to drop, thereby causing a momentary increase in the transvoltage VP1 (transvoltage VPD). In this case, the current flowing through the load L increases due to the increase in transvoltage VPD. In some embodiments, transistors M1 and M2 have the same size and specifications, so when switch S is turned on, the current flowing through transistor M1 can be mirrored to transistor M2.

[0034] Because the second port P2 has just been enabled, the bridge rectifier BR2 in PD has not yet turned on. The equivalent impedance from the load L to the bridge rectifier BR1 is relatively low, so the proportion of current flowing from the load L to the first terminal of transistor M2 is small. Therefore, the time required for the control circuit CRT to accumulate charge on the first terminal of transistor M2 until the voltage across capacitor C2 equals the voltage across VP2 is short. However, by instantaneously increasing the voltage across VP1 (that is, decreasing the voltage V1), an additional mirror current can be generated on transistor M2, increasing the rate at which charge accumulates at the first terminal of transistor M2 and reducing the time required for operation.

[0035] In some embodiments, the control circuit CRT increases the reference voltage VREF in the second stage T2 to increase the transverse voltage VP1. However, the invention is not limited thereto; depending on the type of transistor M1 and / or amplifier OP, the control circuit CRT may also decrease the reference voltage VREF in the second stage T2 to increase the transverse voltage VP1.

[0036] In other embodiments, the control circuit CRT does not adjust the reference voltage VREF in the second stage. Instead, it raises voltage V1 to voltage V3 via the feedback controller FB and transmits voltage V3 to the positive receiver of amplifier OP. Similar to the embodiment that adjusts the reference voltage VREF, the control circuit CRT lowers voltage V3 to voltage V1 and transmits it to the positive receiver of amplifier OP, causing the voltage V1 at the first terminal of transistor M1 to decrease instantaneously increase the current flowing through transistor M1, thereby increasing the current flowing through transistor M2.

[0037] When enough charge accumulates at the first terminal of transistor M2 to make the voltage across capacitor C2 reach the predetermined VP2, the second stage T2 is completed and a steady state is reached. At this time, the voltages VP1, VP2 and VPD are equal.

[0038] The foregoing description briefly outlines the features of certain embodiments of this application, enabling those skilled in the art to more fully understand the various embodiments of this application. Those skilled in the art should recognize that they can readily utilize this application as a basis to design or modify other processes and structures to achieve the same objectives and / or advantages as the embodiments described herein. Those skilled in the art should understand that these equivalent embodiments still fall within the spirit and scope of this application, and various changes, substitutions, and modifications can be made without departing from the spirit and scope of the invention.

Claims

1. A power supply device for supplying power to a powered device in a Power over Ethernet (PoE) system, comprising: A first port is used to perform a power classification on the powered device in a first stage and to output a first voltage across the powered device; A second port for outputting a second voltage across the powered device in a second stage; and A control circuit is used to disable the second port in the first stage, and to control the second port to output the second voltage and increase the first voltage in the second stage; The control circuit includes: The first transistor; A second transistor; and An amplifier, wherein, The first terminal of the first transistor is configured to receive a first voltage from the powered device through the first port, and the first terminal of the second transistor is configured to receive a second voltage from the powered device through the second port; The control terminal of the first transistor and the control terminal of the second transistor are coupled to the output terminal of the amplifier; The second terminal of the first transistor is coupled to the second terminal of the second transistor to the second supply voltage; The positive receiving terminal of the amplifier is coupled to the first terminal of the first transistor, and the negative receiving terminal is coupled to the first reference voltage or the second reference voltage.

2. The power supply device according to claim 1, characterized in that, The first port has a first positive terminal and a first negative terminal, wherein in the first stage, the first positive terminal is used to output a first supply voltage to the power receiving device, and the first negative terminal is used to receive a first voltage from the power receiving device, wherein the first supply voltage and the first voltage form a first cross voltage between the first positive terminal and the first negative terminal.

3. The power supply device according to claim 2, characterized in that, The second port has a second positive terminal and a second negative terminal, wherein in the second stage, the second positive terminal is used to output the first supply voltage to the power receiving device, and the second negative terminal is used to receive a second voltage from the power receiving device, wherein the first supply voltage and the second voltage form a second cross voltage between the second positive terminal and the second negative terminal.

4. The power supply device according to claim 3, characterized in that, The control circuit includes: First capacitor; The first capacitor is coupled between the first supply voltage and a first terminal of the first transistor.

5. The power supply device according to claim 4, characterized in that, The control circuit also includes: A second capacitor; and The second capacitor is coupled between the first supply voltage and a first terminal of the second transistor.

6. The power supply device according to claim 4, characterized in that, The positive receiving terminal is used to receive the first voltage, and the negative receiving terminal is used to receive a first reference voltage in the first stage and a second reference voltage in the second stage, wherein the second reference voltage is greater than the first reference voltage.

7. The power supply device according to claim 4, characterized in that, The control circuit further includes a feedback controller coupled between the positive receiving terminal and the first terminal of the first transistor, wherein the feedback controller is used to directly transmit the first voltage to the positive receiving terminal in the first stage, and to increase the first voltage at the positive receiving terminal to a third voltage in the second stage. The negative receiving terminal is used to receive a first reference voltage in both the first and second stages.

8. A power supply control method for controlling the power supply of a power supply device to a power receiving device in a Power over Ethernet (PoE) system, comprising: In a first stage of the power supply control method, a power classification is performed on the powered device, and a first port of the power supply device is controlled to output a first voltage across the powered device, including: The first voltage from the power receiving device is received through the first negative terminal of the first transistor. In the first phase, a second port of the power supply device is disabled; In a second stage of the power supply control method, controlling the second port to output a second voltage across the power receiving device includes: The second voltage is received from the power receiving device via the first terminal of the second transistor and the second negative terminal of the second port; and Increasing the first trans-pressure in the second stage includes: The reference voltage is received through the negative receiver of the amplifier; and The amplifier outputs control voltage to the control terminals of the first transistor and the second transistor. Wherein, the second terminal of the first transistor is coupled to the second terminal of the second transistor to the second supply voltage, the positive receiving terminal of the amplifier is coupled to the first terminal of the first transistor, and the negative receiving terminal is coupled to the reference voltage.

9. The power supply control method according to claim 8, characterized in that, Controlling the first port of the power supply device to output the first voltage to the power receiving device includes: A first supply voltage is transmitted to the powered device through a first positive terminal of the first port; and Wherein the first supply voltage and the first voltage form the first cross voltage between the first positive terminal and the first negative terminal, wherein controlling the second port to output the second cross voltage to the power receiving device includes: The first supply voltage is transmitted to the powered device through a second positive terminal of the second port; and The first supply voltage and the second voltage form the second cross voltage between the second positive terminal and the second negative terminal.

10. The power supply control method according to claim 9, characterized in that, Increasing the first transpressure in the second stage includes: Reduce the first voltage.

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