Nanowire array, growth method, and thermoelectric device

Abstract

The application relates to a nanowire array, a growth method and a thermoelectric device, and the growth method comprises the following steps: obtaining a SnTe template and SnTe powder, taking the SnTe template as a growth substrate, and coating gold particles on the SnTe template; placing the SnTe powder in a high-temperature zone and the SnTe template in a low-temperature zone, heating the SnTe powder in the high-temperature zone to sublimate into a gaseous state, and when the gaseous SnTe flows to the SnTe template in the low-temperature zone, the gaseous SnTe is cooled and grows into SnTe nanowires under the induction of the gold particles, and the SnTe nanowires are nanowires grown along the 100 direction. The growth method utilizes a selective growth mechanism with the lowest energy to obtain a directional and ordered SnTe nanowire array, and the obtained nanowire thermal conductivity can be as low as 5.6 Wm ‑1 K ‑1 .

Description

Technical Field

[0001] This invention relates to a nanowire array, a growth method, and a thermoelectric device, belonging to the field of one-dimensional materials. Background Technology

[0002] One-dimensional materials have attracted widespread attention due to their excellent optical, electrical, and thermal anisotropy. Chemical vapor deposition has become one of the important processes for preparing various high-crystal-quality one-dimensional layered materials. However, according to the gas-liquid-solid (VLS) growth mechanism, the growth direction of one-dimensional materials is usually random, making it difficult to maintain anisotropy in large-scale practical applications. Controllable growth of oriented and uniformly arranged high-density nanowire arrays is considered a good method to achieve scalability while maintaining anisotropy. Moreover, such oriented nanowires play an irreplaceable role in the application of micro thermoelectric devices. As a typical representative of thermoelectric materials, the controllable growth of IV-VI (group IV-VI) nanowire arrays is almost non-existent.

[0003] One-dimensional SnTe nanowires, as a newly discovered topological insulator material, possess the same rock-salt crystal structure and similar band structure as the classic thermoelectric material PbTe, making them a promising environmentally friendly lead-free thermoelectric material. For practical large-scale applications in thermoelectric conversion in electronic devices, obtaining ordered, high-density SnTe nanowire arrays is crucial. In previous studies, due to the VLS growth mechanism, SnTe nanowires grown on substrates by CVD are planar and disordered, which is extremely detrimental to their widespread application in thermoelectric devices. Therefore, a new growth method is needed to achieve ordered and oriented high-density SnTe nanowire arrays. Summary of the Invention

[0004] To address the aforementioned problems, this invention provides a method for growing nanowire arrays, as well as the nanowire arrays and thermoelectric devices obtained by this method. This growth method utilizes a selective growth mechanism with the lowest energy to obtain oriented and ordered SnTe nanowire arrays.

[0005] Based on this, the technical solution adopted by the present invention is, on the one hand, a method for growing nanowire arrays, comprising the following steps.

[0006] Obtain a SnTe template and SnTe powder, and use the SnTe template as a growth substrate to coat gold paste onto the SnTe template;

[0007] SnTe powder is placed in a high-temperature region, and a SnTe template is placed in a low-temperature region. The SnTe powder is heated and sublimates into a gaseous state in the high-temperature region. The gaseous SnTe flows to the SnTe template in the low-temperature region, cools, and grows into SnTe nanowires under the induction of gold paste. The SnTe nanowires are grown along the 100° direction. Due to the quantum confinement effect, one-dimensional SnTe nanowires have better performance in the 100° direction than bulk nanowires. By growing 100° nanowires with a SnTe template using a gas-liquid phase method, an ordered and oriented SnTe nanowire array is obtained.

[0008] As a preferred embodiment, the SnTe nanowires are grown in a vacuum environment. A SnTe template and SnTe powder are placed in a tubular furnace. After the furnace is evacuated, a mixture of H2 and Ar is introduced. The SnTe powder is positioned upstream of the gas flow, and the SnTe template is positioned downstream. The SnTe powder flows with the gas flow to the SnTe template for deposition and growth. The vacuum environment and protective gas prevent the nano-SnTe from being oxidized. The H2 in the mixed gas has reducing properties, preventing the material from being oxidized and thus reducing it. The central region of the tubular furnace has a high and stable temperature, serving as a high-temperature zone. As the distance from the central region increases, the temperature decreases. Selecting a suitable location as a low-temperature zone, and conducting the reaction in a tubular furnace, facilitates temperature control.

[0009] As a preferred option, the volume mixing ratio of H2 to Ar in the mixed gas is (1-3):(97-99). Below this ratio, the reduction effect cannot be achieved, while above this ratio, H2 will react with the material, introducing unnecessary impurities and affecting the growth mechanism. The gas inlet rate of the mixed gas is (45-55) SCCM, and the final pressure is maintained at (4-6) tors. More preferably, the gas inlet rate of the mixed gas is 50 SCCM, and the pressure is maintained at 5 tors. Under this pressure, the gas flow can be stabilized, and the SnTe evaporation amount can be controlled by the evaporation temperature in the high-temperature zone, thereby controlling the growth rate and achieving stable nanowire growth.

[0010] As a preferred option, the nanowire growth conditions are: high temperature zone temperature (600-800)℃, preferably 700℃; low temperature zone temperature (200-400)℃, preferably 300℃; growth time is 30 minutes. The high temperature zone temperature is used to control the evaporation rate. If the temperature is too high, the evaporation rate will be too large, and the amount deposited on the template will be too large, which will prevent the nanowires from growing. If the temperature is too low, evaporation will not occur or the evaporation rate will be too low.

[0011] As a preferred embodiment, the growth of nanowires requires the induction of gold particles. It is preferable to use a gold paste coating method to form gold particles. Gold paste is coated on a SnTe template, and the solvent in the gold paste evaporates in a tube furnace to leave the remaining gold particles. Under the induction of the gold particles, the nanowires grow linearly. The gold particles are nanoscale in size, preferably 150 nm.

[0012] The surface crystal orientation of the SnTe template directly affects the growth direction of the nanowires. To obtain a stable SnTe template, the preferred preparation method of the SnTe template in this invention is as follows:

[0013] Using a silicon substrate as the growth substrate, the silicon substrate is placed in a low-temperature region and SnTe powder is placed in a high-temperature region. After the SnTe powder sublimates into a gaseous state in the high-temperature region, it is deposited and grown on the silicon substrate in the low-temperature region to obtain a SnTe template. The surface of the SnTe template includes a (111) plane and a (100) plane. The SnTe template is grown by gaseous SnTe deposition to form a naturally grown crystal surface morphology. Based on the principle of minimum surface energy and surface stability, the exposed surfaces are a triangular Te (111) plane and a square (100) plane.

[0014] The growth of the SnTe template was carried out in a tube furnace, specifically by evacuating the tube furnace to a low pressure of 10 mtorr.

[0015] A mixture of H2 and Ar gas is injected at a rate of 100 cubic centimeters per minute. SnTe powder is placed upstream of the gas flow direction, and the silicon substrate is placed downstream. The gas flow carries the gaseous SnTe to the silicon substrate for deposition and growth. The gas flow acts as a gaseous flow, carrying the gaseous SnTe, as well as a protective gas to prevent SnTe oxidation, and also provides a reducing atmosphere to further prevent SnTe oxidation. The gas pressure in the tube furnace affects the gas flow and evaporation rate. Adjusting this value helps control the growth rate of the template. This invention completes growth within 90 minutes, obtaining a SnTe plate with a diameter of 100 micrometers.

[0016] As a preferred embodiment, the SnTe powder has a purity of 99.99%. The silicon-based substrate is a SiO2 substrate, a Si substrate, or a composite substrate of SiO2 and Si. Such substrates are chemically stable in high-temperature environments and have a smooth surface, which makes the generated SnTe structure stable.

[0017] On the other hand, the present invention also provides a method for growing nanowire arrays of a class of materials, namely IV-VI materials, the growth method comprising the following steps.

[0018] IV-VI material template and IV-VI material powder were obtained, and gold particles were coated on the IV-VI material template as a growth substrate.

[0019] IV-VI material powder is placed in a high-temperature zone, and an IV-VI material template is placed in a low-temperature zone. The IV-VI material powder is heated and sublimates into a gaseous state in the high-temperature zone. The gaseous IV-VI material flows to the IV-VI material template in the low-temperature zone, cools, and grows into IV-VI material nanowires under the induction of gold particles. The IV-VI material nanowires are nanowires grown along the 100° direction. SnTe material is one type of IV-VI material.

[0020] In another aspect, the present invention provides a nanowire array obtained by the above method, and a thermoelectric device obtained by the nanowire array.

[0021] The beneficial effects of this invention include: the invention uses SnTe templates to form SnTe nanowires with specific growth directions, thereby obtaining oriented and ordered nanowire arrays and obtaining thermoelectric materials with good performance;

[0022] This invention obtains a SnTe nanowire growth substrate by first preparing a SnTe precursor, namely a SnTe template, so that the surface of the template is (100) plane and (111) plane, which provides a basis for obtaining oriented and ordered nanowires in the future.

[0023] The SnTe nanowires obtained by this invention exhibit a thermal conductivity at 300 K that is approximately 40% (5.6 W / m²) lower than that of bulk nanowires. -1 K -1 It has good thermal conductivity, which provides a broad prospect for its application in the field of thermoelectricity;

[0024] In this invention, SnTe nanowires, as one-dimensional TCI (topological insulator) materials, have a high surface area-to-volume ratio that can not only suppress heat conduction by enhancing phonon surface scattering, but also maintain robust conductivity by enhancing the topological protective surface state, which contributes to the improvement of thermoelectric performance. Attached Figure Description

[0025] Figure 1(a) SnTe unit cell structure diagram;

[0026] Figure 1(b) shows the crystal structure and outline of SnTe with Te(111) plane structure.

[0027] Figure 1(c) Schematic diagram of a single nanowire grown on the (100) crystal plane;

[0028] Figure 1(d) Schematic diagram of a single nanowire grown on a Te(111) surface;

[0029] Figure 2(a) shows the structure of the tubular furnace during precursor preparation;

[0030] Figure 2(b) shows the structure of the tubular furnace used in nanowire fabrication.

[0031] Figure 3(a) Schematic diagram of nanowire arrays grown during CVD (chemical vapor deposition);

[0032] Figure 3(b) Magnified view of nanowires on SnTe precursor substrate;

[0033] Figure 3(c) Magnified view of nanowires on SiO2 / Si substrate;

[0034] Figure 3(d) SEM image of the scattering nanowires on the SiO2 / Si substrate;

[0035] Figure 3(e) SEM image of SnTe in SnTe precursor;

[0036] Figure 3(f) SEM image of a top view of the nanowire array on the SnTe precursor;

[0037] Figure 3(g) Side scanning electron microscope image of nanowire array on SnTe precursor at an tilt angle;

[0038] Figure 3(h) shows a schematic diagram of nanowires on the 100 surface;

[0039] Figure 3(i) shows a schematic diagram of nanowires on the 111 surface;

[0040] Figure 4(a) Low-magnification TEM image of the top of the SnTe nanowire, with a scale bar of 200 μm;

[0041] Figure 4(b) Low-magnification TEM image of the bottom of the SnTe nanowire;

[0042] Figure 4(c) High-resolution TEM image of SnTe nanowires, scale bar 5 nm;

[0043] Figure 4(d) High-resolution TEM image of SnTe nanowires, scale bar 1 nm;

[0044] Figure 4(e-1), Figure 4(e-2), Figure 4(e-3) Energy dispersive X-ray spectra of SnTe nanowires;

[0045] Figure 5 The graph shows the results of the nanowire thermal conductivity test, with temperature on the horizontal axis and thermal conductivity on the vertical axis.

[0046] In the figure, 1 represents the gas inflow direction, 2 represents the quartz tube, 3 represents the SnTe powder, 4 represents the SiO2 / Si substrate, 5 represents the furnace chamber, 6 represents the gas outflow direction, and 7 represents the SnTe precursor. Detailed Implementation

[0047] The present invention will be further explained in detail below with reference to the accompanying drawings and specific embodiments, but it should be understood that the scope of protection of the present invention is not limited to the specific embodiments.

[0048] The nanowire array growth method of this invention is applicable to typical IV-VI materials with face-centered cubic structures. The SnTe nanowire array is used as an example for illustration. The growth method includes the following steps: obtaining a SnTe template and SnTe powder; using the SnTe template as a growth substrate; coating the SnTe template with gold particles; placing the SnTe powder in a high-temperature region and the SnTe template in a low-temperature region; heating and sublimating the SnTe powder into a gaseous state in the high-temperature region; cooling the gaseous SnTe as it flows to the SnTe template in the low-temperature region and growing into SnTe nanowires under the induction of the gold particles. The SnTe template has a (100) or (111) surface. Density functional theory (DFT) calculations show that, due to crystal mismatch and corresponding low adhesion energy, the SnTe nanowire array grows along the

[100] direction on the (100) or (111) surface of the SnTe template.

[0049] The growth mechanism is shown in Figure 1. Tin atoms and tellurium atoms are represented by cyan and yellow, respectively. Figure 1(a) shows a single cell of SnTe. Cubic SnTe is composed of closely packed Sn atoms (cyan-green spheres) and Te atoms (yellow spheres). Figure 1(b) shows the crystal structure of SnTe. The triangular cross-section is the Te(111) plane, and the remaining surfaces are the 100 planes. Figure 1(c) shows nanowires grown on the 100 plane, growing vertically. Figure 1(d) shows nanowires grown on the cross-section Te(111) plane. The nanowires grow obliquely on the Te(111) plane, with the growth direction being the 100 direction. Based on the principle of minimum energy, whether on the (100) plane or the (111) plane of the SnTe template, the nanowires grow along the (100) direction with the lowest surface energy, thus forming an ordered high-density nanowire array. Different stacking methods lead to different growth morphologies (vertical and oblique), which are determined by the lower surface energy and adhesion energy. As shown in Figures 1(c) and 1(d), in order to ensure the minimum surface energy of SnTe nanosheets, when the substrate is the (100) face of SnTe, the surface energy of the nanosheets grows vertically, while when the substrate is the (111) face of SnTe, the surface energy of the nanosheets grows at a certain angle.

[0050] To prevent SnTe from being oxidized during growth, the growth process is carried out under vacuum conditions, specifically in a tube furnace, as shown in Figure 2(a). SnTe powder 3 is placed in the middle region of the quartz tube 2 of the tube furnace, which is the highest temperature region in the tube furnace. The SnTe template 7 is placed in the downstream region of the quartz tube, which is a low-temperature region. The tube furnace is evacuated to a low pressure of 5 mtorr, and a mixture of H2 and Ar is introduced into the tube furnace to form a gas flow. The gas flow direction is from the inflow direction 1 to the outflow direction 6. H2 can reduce SnTe in time after oxidation, and Ar is a protective gas. The H2 in the mixed gas is 1-3%, and the remainder is Ar. After SnTe powder 3 evaporates into a gaseous state in the high-temperature region, it flows to the SnTe template 7 and is deposited and grown. The injection rate of the mixed gas is 100 cubic centimeters per minute, the inlet rate is 50 SCCM, and the final pressure is maintained at 5 mtorr. If the pressure is higher than this, the amount of SnTe powder 3 will be large, and SnTe will accumulate in large quantities on the SnTe template 7, making it impossible to grow stably in a linear mode. If the pressure is lower than this, it will result in no deposition on the SnTe template or very little deposition, thus failing to obtain a high-density nanowire array. During nanowire growth, the furnace temperature of the tube furnace is maintained at 600–700°C. This temperature allows the SnTe powder to evaporate, and the evaporation rate can be controlled by adjusting the temperature. If the temperature is too low, the evaporation rate will be too low or impossible to evaporate. If the temperature is too high, the evaporation rate will be too high, resulting in a large deposition rate and unstable linear growth. The gas inlet rate, tube pressure, and furnace temperature in the tube furnace work together to ensure stable nanowire growth. The SnTe template is placed in a low-temperature zone, where gaseous SnTe is converted into a solid or liquid state and deposited and grown. The temperature of the low-temperature zone is preferably below 400°C, and more preferably 300°C. This temperature not only allows gaseous SnTe to deposit, but also works in conjunction with the evaporation conditions (evaporation temperature and gas flow pressure) to regulate the deposition rate and growth rate.

[0051] The nanowire array is grown under the induction of gold particles, which are placed at the top of the nanowires. The particle size is 150 nm. The formation of the gold particles is as follows: gold paste is coated on a SnTe template. When the tube furnace is heated, the solvent in the gold paste evaporates, leaving the gold particles.

[0052] To ensure the surface crystal planes of the SnTe template, the SnTe template in this embodiment is grown in a tubular furnace, as shown in Figure 2(b). The preparation method is as follows: (1) SnTe powder 3 is placed in the high-temperature zone (middle region) of the quartz tube 2 of the tubular furnace and heated by the furnace chamber 5. SiO2 / Si liner 4 is placed in the downstream low-temperature zone of the tubular furnace; (2) The quartz tube 2 is sealed and evacuated to a low pressure of 10 mtorr. A mixed gas of (1-3)% H2 and (97-99)% Ar is injected into the furnace at a rate of 100 cubic centimeters / minute. The mixed gas plays a protective role and prevents the material from being oxidized; (3) The furnace is heated to 700°C at a rate of 20°C / min and held for 90 minutes. After the reaction is completed, the tubular furnace is cooled to room temperature, and a SnTe plate of several hundred micrometers can be deposited on the substrate. Due to the low surface energy, the faces shown at the growth cutoff point are square (100) and triangular Te (111) faces. Table 1 clearly shows that surface (100) is the main exposed surface because it has the lowest surface energy. Density functional theory (DFT) calculations show that the surface energy of (100) is 0.222 J / m². 2 The surface energy of the (100) SnTe surface is significantly lower than that of other surfaces, meaning that the (100) SnTe surface is the most stable. During chemical vapor deposition, the (100) surface tends to be exposed relative to other surfaces. Meanwhile, the Te (111) surface has a lower surface energy than the Sn (111) surface and is exposed when growth stops during CVD. Furthermore, when the exposure stop surface is the Te (111) surface, the adhesion energy of the (111) surface is significantly lower than that of other surfaces. 2 The adhesion energy of the (100) surface is -0.532 eV / nm. 2 The surface energy is lower, making it easier to stack along the Te(111) plane. Whether it is the (100) plane or the (111) plane, the nanowires grow along the (100) direction with the lowest surface energy, thus forming an ordered high-density nanowire array.

[0053] Table 1 Surface Energy of Each Crystal Plane

[0054] Surface <![CDATA[Surface energy(J / m 2 )]]> (100) 0.222 (110) 0.365 Sn terminal(111) 0.612 Te terminal(111) 0.567

[0055] The following is a further explanation using specific embodiments.

[0056] Example 1

[0057] A method for growing a nanowire array, comprising the following steps:

[0058] Preparation of SnTe precursor: (1) Place the SiO2 / si substrate downstream of the tubular furnace quartz tube (low temperature zone, so that the material can be cooled and deposited onto the substrate), and place SnTe powder with a purity of 99.99% in the middle region (high temperature zone) of the tubular furnace quartz tube.

[0059] (2) Seal the quartz tube and evacuate it. Inject a mixture of 2.98% H2 and 97.02% Ar at a rate of 100 cubic centimeters / minute to stabilize the gas pressure inside the quartz tube at 10 mtorr.

[0060] (3) The tubular furnace is heated to 700°C at a rate of 20°C / min and held for 90 minutes. After the reaction is complete, the furnace is cooled to room temperature, and a SnTe plate of hundreds of micrometers can be deposited on the substrate.

[0061] Fabrication of nanowire arrays: SnTe nanowires were prepared using a gold particle-induced vapor-liquid-solid (VLS) method.

[0062] (1) The SnTe precursor is placed in the downstream (low temperature zone) of the tube furnace as a growth substrate, and the SnTe powder is placed in the middle (high temperature zone) of the quartz tube of the tube furnace.

[0063] (2) Seal the quartz tube and evacuate it. Inject a mixture of 2.98% H2 and 97.02% Ar into the quartz tube at a rate of 100 cubic centimeters per minute. The gas inlet rate of the mixture is 50 SCCM, and the final pressure is maintained at ~5 torrrs.

[0064] (3) The tubular furnace is heated to maintain the furnace temperature at 630°C for 30 minutes to complete the growth of nanowires.

[0065] The SnTe precursor prepared in this embodiment has a thickness of 100 micrometers. Its exposed (100) top surface was found to serve as the substrate for subsequent epitaxial growth. During the CVD process, fewer (111) crystal planes were exposed after growth severing, which is consistent with the DFT calculation results. Figure 3(a) is a schematic diagram of the nanowire array grown during the CVD process. The nanowire regions directly deposited on the SiO2 / Si substrate and the nanowire regions deposited on the SnTe precursor are magnified and observed, as shown in Figures 3(b) and 3(c), respectively. It can be seen that the nanowires deposited on the SiO2 / Si substrate are disordered, while the nanowires deposited on the SnTe precursor are grown in an orderly and directional manner. When observed under a microscope, Figure 3(d) shows that the nanowires deposited on the SiO2 / Si substrate are scattering nanowires. Figure 3(e) shows the morphology of the SiO2 / Si precursor, which has a cubic structure and includes a small number of 111 tilted cross-sections. After the nanowires were deposited, the top view and the microscopic images at the tilt angle are shown in Figures 3(f) and 3(g), respectively. It can be seen that the nanowires are oriented on the substrate, which is consistent with the calculation results. As shown in Figure 3(h), the nanowires on the 100 plane are vertically grown, and as shown in Figure 3(i), the nanowires on the 111 plane are tilted, which is consistent with the calculation results.

[0066] As shown in Figure 3(c), SnTe nanowires are grown disorderedly on an exposed SiO2 / Si wafer without a self-assembling template. Due to the substrate change, highly aligned and perpendicular nanowire arrays are obtained on the (100) facet of the SnTe plate, as shown in Figures 3(f) and 3(g), which is due to the regulation of the growth mechanism dominated by crystal mismatch and the corresponding change in adhesion energy. These uniform and highly oriented nanowire arrays are crucial for the large-scale device fabrication for practical applications.

[0067] To demonstrate the uniformity of the nanowires, the vertically grown SnTe nanowires were transferred to other devices using a tungsten probe, as shown in Figure 4(a), for material characterization and device fabrication. The crystal structure and lattice parameters of the SnTe nanowires were further characterized using transmission electron microscopy (TEM), which further verified the mechanism of array growth. Figure 4(a) and 4(b) Low-magnification TEM images of the top and bottom of a SnTe nanowire with a width / diameter of approximately 210 nm are shown, respectively. The upper segment in Figure 4(a) also shows alloy particles with a diameter of approximately 150 nm. Diffraction patterns along one of the four sides of the nanowire further indicate that the growth direction of the

[100] nanowire is that of a high-quality single-crystal SnTe nanowire, which corresponds to the DFT curve. The four vertical sides can be identified as the (100) planes based on the cubic phase determined by the selected area diffraction (SAED) pattern (i.e., the inset with white bright spots in Figure 4(a)). The framed area in Figure 4(b) is magnified to Figure (c), and the framed area in Figure 4(c) is magnified to Figure 4(d). From Figures 4(b), 4(c), and 4(d), it can be seen that the lattice spacing is 0.31 nm, which is consistent with half the distance between the two (100) planes in SnTe (Figure 4(d)). These features indicate the growth orientation of

[100] and the (100) plane, which is consistent with the growth mechanism proposed by the DFT calculation. In addition, the corresponding energy dispersive X-ray spectroscopy (EDS) elemental mappings are shown in Figures 4(e-1), 4(e-2), and 4(e-3). Figure 4(e-1) is a high-resolution photograph, Figure 4(e-2) is a Te elemental image, and Figure 4(e-3) is a Sn elemental image, demonstrating the uniform stoichiometry of SnTe nanowires.

[0068] Example 2

[0069] A nanowire array obtained in Example 1 was used to measure the thermal conductivity of the nanowires in a thermal bridge testing system. The measurement results are shown in [Figure 1]. Figure 5 The results show the thermal conductivity measurements of a typical SnTe nanowire (340 nm * 360 nm). We obtained the phonon spectrum using VASP (a computer package for atomic-scale material simulation), in which the lattice exhibits strong anharmonic vibrations. A significant feature of the spectrum is the presence of highly dispersed photophonon modes. Figure 5As shown, SnTe exhibits the highest γs at frequencies below 15 rad / ps, indicating strong anharmonicity in this frequency range. This naturally favors electron-phonon scattering, leading to a low thermal conductivity. The thermal conductivity of the nanowire initially increases rapidly at low temperatures (below 250 K) and then decreases slowly, indicating that phonon scattering is the primary mechanism at low temperatures, rather than Umklapp scattering. At room temperature and above, the thermal conductivity of the nanowire is significantly lower than that of bulk SnTe. The thermal conductivity of the SnTe nanowire obtained in Example 1 is approximately 5 W / m² at 300 K. -1 K -1 The bulk nanowire has a thermal conductivity of 8 W / m². -1 K -1 Since the thermal conductivity of the SnTe nanowires in Example 1 is significantly lower than that of bulk nanowires, the improved phonon dispersion in nanowire arrays with low anharmonicity and size effect is more conducive to thermoelectric applications.

[0070] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A method of growing a nanowire array, characterized by: The method comprises the following steps obtaining a SnTe template and SnTe powder, taking the SnTe template as a growth substrate, coating gold particles on the SnTe template, and the SnTe template having (100) and (111) surfaces; placing the SnTe powder in a high-temperature zone and the SnTe template in a low-temperature zone, heating the SnTe powder in the high-temperature zone to sublimate into a gaseous state, and flowing the gaseous SnTe to the SnTe template in the low-temperature zone, and growing the SnTe nanowires under the induction of the gold particles, the SnTe nanowires being nanowires grown in the (100) direction.

2. The method of claim 1, wherein: The SnTe nanowires are grown in a vacuum environment, the SnTe template and the SnTe powder are placed in a tubular furnace, after the tubular furnace is vacuumized, a mixed gas of H2 and Ar is introduced, the SnTe powder is placed upstream of the gas flow, and the SnTe template is placed downstream of the gas flow, and after the SnTe powder sublimates into a gaseous state, the gaseous SnTe flows to the SnTe template along the gas flow to deposit and grow.

3. The method of claim 2, wherein: The mixed gas is 1-3% H2 and 97-99% Ar, the gas inlet rate of the mixed gas is 40-60 SCCM, and the final pressure is maintained at 4-6 Torr.

4. The method of claim 1, wherein: The nanowire growth conditions are: The high-temperature zone temperature is 600-800°C; The low-temperature zone temperature is 200-400°C; The growth time is 20-50 minutes.

5. The method of claim 1, wherein: The gold particles are gold glue coated on the SnTe template, the gold glue evaporates to form gold particles, and the SnTe nanowires grow linearly under the induction of the gold particles; the gold particles are nanoscale in size.

6. The method of claim 1, wherein: The preparation method of the SnTe template is: taking a silicon-based substrate as a growth substrate, placing the silicon-based substrate in a low-temperature zone, and placing SnTe powder in a high-temperature zone, sublimating the SnTe powder in the high-temperature zone into a gaseous state, and depositing and growing on the silicon-based substrate in the low-temperature zone to obtain a SnTe template, the surface of the SnTe template including (111) and (100) surfaces.

7. The method of claim 6, wherein: The growth of the SnTe template is carried out in a tubular furnace, specifically: the tubular furnace is vacuumized to a low pressure of 9-11 mTorr; injecting a mixed gas of H2 and Ar at a speed of 90-110 cubic centimeters per minute, placing the SnTe powder upstream of the mixed gas flow direction, and placing the silicon-based substrate downstream of the mixed gas flow direction, and the mixed gas drives the gaseous SnTe to flow to the silicon-based substrate. The silicon-based substrate is one of a SiO2 substrate, a Si substrate, and a composite substrate of SiO2 and Si.

8. The method of claim 6, wherein:

9. A nanowire array prepared by the growth method according to any one of claims 1-8.

10. A thermoelectric device prepared by using the nanowire array according to claim 9. ​

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