A method for decoding LDPC based on bidirectional recurrent network

Abstract

The application discloses a kind of LDPC decoding method based on bidirectional circulation network, belong to communication technical field, including: the 1024QAM signal after transmission by coherent optical system is collected;Discrete channel quantizer suitable for high-order modulation signal is constructed;All bit information is calculated and the uniformity of bit information is completed;Bidirectional information bottleneck decoder is constructed based on bidirectional circulation structure, the check node design of bidirectional information bottleneck decoder;Variable node design of bidirectional information bottleneck decoder.The method utilizes multivariate parameter to construct information bottleneck framework, for all M-QAM modulation format, only need to construct two LUTs extra, can solve the problem that memory requirement increases with modulation order in IB decoding method.In addition, we use bidirectional circulation network and the symmetry of quantized information to realize the multiplexing of table, give full play to the role of intermediate information, make the relationship between the number of LUT search and node degree in IB decoding algorithm from square magnitude to linear magnitude.

Description

Technical Field

[0001] This invention belongs to the field of communication technology, specifically relating to an LDPC decoding method based on a bidirectional cyclic network. Background Technology

[0002] In recent years, with the continuous emergence of new businesses such as big data, artificial intelligence, and the industrial internet, the scale, communication rate, and transmission capacity of optical communication systems have been continuously increasing, making it more urgent to improve the performance and channel capacity of optical communication systems. Low-density parity-check codes (LDPC), due to their theoretical performance approaching the Shannon limit, will serve as forward error correction codes for next-generation optical fiber communication systems. Currently, LDPC decoding algorithms are mainly divided into two categories. The first category is iterative decoding algorithms, including the state-of-the-art minimum sum (MS) algorithm. These algorithms progressively optimize the decoding result by updating information between check nodes and variable nodes until the convergence condition is met. However, information updates are usually based on arithmetic operations on double-precision decimals, which is not conducive to hardware implementation. Another novel approach utilizes the Information Bottleneck (IB) algorithm to generate a full integer lookup table (LUT) to replace arithmetic operations. The LUT maximizes the mutual information between symbols and corresponding information by compressing the input information. Since all complex function operations during information updates are simplified to simple table lookup operations, IB-based decoding algorithms have lower decoding complexity compared to iterative decoding algorithms. Although this algorithm performs well in terms of decoding performance and complexity, there is a phenomenon of repeated calculation of some information in its local node operations. This causes the number of LUT lookups to increase quadratically with the degree of LDPC nodes during the iteration process, which will increase the decoding latency.

[0003] To improve the transmission capacity of fiber optic communication systems, advanced high-order modulation formats, such as M-QAM, are required. Current IB decoding algorithms, when processing M-QAM high-order modulation formats, require processing ((log2M-2)*M... 2 The computation or construction of log2M LUTs requires a significant amount of memory, and the complexity increases with the size of M. Making the IB decoding algorithm applicable to communication systems with ultra-high-order modulation formats remains a challenging problem. Summary of the Invention

[0004] This invention provides an LDPC decoding method based on a bidirectional cyclic network. This method utilizes multivariate parameters to construct an information bottleneck framework, requiring only two additional LUTs for all M-QAM modulation formats, thus solving the problem of increasing memory requirements with modulation order in the IB decoding method. Furthermore, we leverage the bidirectional cyclic network and the symmetry of quantization information to achieve table reuse, fully utilizing the role of intermediate information and reducing the relationship between the number of LUT lookups and node degree in the IB decoding algorithm from the quadratic order to the linear order.

[0005] This invention is achieved through the following technical solution:

[0006] An LDPC decoding method based on a bidirectional cyclic network includes the following steps:

[0007] Step A: Acquire the 1024QAM signal after transmission via the coherent optical system;

[0008] Step B: Construct a discrete channel quantizer suitable for high-order modulated signals;

[0009] Step C: Calculate all bit information and unify the bit information;

[0010] Step D: Construct a bidirectional information bottleneck decoder based on a bidirectional loop structure, including:

[0011] Step D1: Design of the verification node for the bidirectional information bottleneck decoder;

[0012] Step D2: Design of variable nodes for the bidirectional information bottleneck decoder.

[0013] Furthermore, the specific process of step A is as follows:

[0014] Step A1: First, the transmitting end generates a 2048-bit binary random number, which includes a 13-bit preamble inserted in the header; after obtaining the 2048-bit binary number, it is transmitted to the LDPC encoder to generate an LDPC code of length 2560; then, the LDPC code is mapped to a 1024QAM signal and shaped by an RRC shaping filter using Nyquist.

[0015] Step A2: The mapped 1024QAM electrical signal is split into two routes and generated into a single-channel analog signal of 40Gbit / s by a digital-to-analog converter (DAC) with a sampling frequency of 64GSa / s. This analog signal is then sent to an I / Q modulator to load the signal onto the signal light. The output power of the signal light laser is set to 12dBm. Subsequently, a variable optical attenuator (VOA) is used to adjust the received optical power.

[0016] Step A3: At the receiving end, the coherent receiver mixes the 12dBm power light from the local oscillator (LO) laser with the VOA-modulated optical signal; a digital oscilloscope with a sampling rate of 100GSa / s is used to display and receive the data; the received signal is downsampled after passing through a matched filter corresponding to the shaping filter, and the sampling rate is adjusted to twice the symbol rate for estimation of various error parameters; the obtained signal is compensated and normalized for IQ imbalance using the Gram-Schmidt algorithm, clock error is recovered using the Gardner algorithm, and channel noise is balanced and compensated using the Cascaded Multimode Algorithm (CMMA); finally, the frequency and phase offset are estimated and compensated using the previously inserted preamble; the compensated signal is then sent to the discrete channel quantizer for quantization.

[0017] The input and output data are used to construct a sample dataset, which is then divided into a training set and a test set.

[0018] Furthermore, the specific process of step B is as follows:

[0019] Step B1: Mark 10 bits in the 1024QAM signal, with the marked bits being v = {0, 1, ... 9}, and the information of each bit being c. v ;

[0020] Step B2: Limit the received signal to the information concentration area, and divide it evenly into n quantization intervals, each corresponding to a discrete value; based on the range of the quantization intervals, determine the joint distribution of the transmitted and received signals in each interval. Integrating, we obtain the discretized joint distribution; where σ 2 The variance of the signal and noise. It is the real part of the transmitted signal. Let be the real part of the received signal; the resulting discretized distribution will be used as the input to the information bottleneck algorithm. Through continuous optimization of the quantization region by the information bottleneck algorithm, a mapping that maximizes the mutual information between the transmitted and received signals is obtained. This mapping will be used for the calculation of bit information in step C.

[0021] Furthermore, the specific process of step C is as follows:

[0022] Step C: Through and The mapping is calculated With bit information c v The joint distribution of information carried by bits Will Constitutes a multivariate observational random variable, c vLet z be a relevant random variable and z be a compressed random variable, forming a new information bottleneck framework, through which... Find the joint distribution of the random variables. That is, the input of the information bottleneck algorithm; the two compressed tables (LUTs) obtained by compressing the information bottleneck algorithm make the information carried by all different bits have a positional probability distribution p(c v ,z).

[0023] Furthermore, the specific process of step D1 is as follows:

[0024] D11, to obtain the dth verification node c Let d be the output information of the edge. c The total quantization information received by the edge is The input to the information bottleneck algorithm is p(c v (z) and compressed space T = 2 q , where q is the number of bits to be quantized;

[0025] D12. First, perform sequential operations, searching for the LUT from front to back according to the sequential structure. and corresponding sequence information

[0026] D13. Then, perform the reverse operation, looking up the table in reverse order, to obtain the lookup table constructed from back to front. and corresponding information

[0027] D14. Repeat steps D12 and D13 to generate the corresponding reused tables for the remaining edges, thereby obtaining the corresponding output information.

[0028] D15. After integrating the above tables to generate the final reusable table, delete the tables that serve a transitional purpose to reduce the space required to store the tables.

[0029] Furthermore, the specific process of step D2 is as follows:

[0030] D21, when the degree of the variable node d v When the number is even, the tree structure will As the input for the last layer, this edge can satisfy the symmetry between its front and back sides.

[0031] D22, When the degree of the variable node d v If it is an odd number, It serves as the input to the last edge in the first layer, ensuring that the decoding process can be completed with the minimum number of LUTs.

[0032] Furthermore, the method also includes:

[0033] Step E: Build a 1024QAM coherent system to verify the algorithm performance.

[0034] Furthermore, step E specifically includes the following:

[0035] After receiving the channel signal, the above-mentioned LDPC decoding method is used to iterate between the check node and the variable node, and finally a decision is made to output the bit error rate.

[0036] Compared with the prior art, the advantages of the present invention are as follows:

[0037] This invention presents an LDPC decoding method based on a bidirectional cyclic network. It utilizes multi-parameter parameters to construct an information bottleneck framework, requiring only two additional LUTs for all M-QAM modulation formats. Furthermore, it leverages the bidirectional cyclic network and the symmetry of quantization information to achieve table reuse, fully utilizing the role of intermediate information. This reduces the relationship between the number of LUT lookups and node degree in the IB decoding algorithm from the quadratic order to the linear order. Simultaneously, a coherent optical communication system based on 1024QAM signals was built to verify the effectiveness of the decoding method. Experimental results show that the method can operate effectively in a 1024QAM signal communication system, sacrificing approximately 0.2–0.3 dB of performance to reduce the number of LUT lookups required for check nodes and variable nodes in a single iteration. Reduced to Attached Figure Description

[0038] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0039] Figure 1 This is a flowchart illustrating an LDPC decoding method based on a bidirectional cyclic network according to the present invention.

[0040] Figure 2 This is a structural diagram of the 1024QAM signal system.

[0041] Figure 3 This is a bit-marking diagram of 10 bits in a 1024QAM signal in this invention;

[0042] Figure 4 This is a mapping diagram formed after the received signal passes through a discrete channel quantizer;

[0043] Figure 5 To receive the information carried by the 5 bits in the real part of the signal;

[0044] Wherein, (a) is the bit information distribution when v=0, (b) is the bit information distribution when v=1, (c) is the bit information distribution when v=2, (d) is the bit information distribution when v=3, and (e) is the bit information distribution when v=4.

[0045] Figure 6 A multi-dimensional information bottleneck structure for bit information alignment;

[0046] Figure 7 The information compression guide diagram is shown using the first two bits as an example;

[0047] Figure 8 This is a structural diagram of the check node of a bidirectional cyclic IB decoder;

[0048] Figure 9 The structure diagram of the variable node of a bidirectional cyclic IB decoder with a variable node degree of 5;

[0049] Figure 10 The bit error rate curve is used to verify the algorithm's performance.

[0050] Among them, (a) is the bit error rate curve obtained by transmitting signals in a back-to-back system; (b) is the bit error rate curve obtained by transmitting signals in a 5km single-mode fiber coherent optical system.

[0051] Figure 11 A comparison diagram of various algorithms for word iteration; Detailed Implementation

[0052] To clearly and completely describe the technical solution and its specific working process of the present invention, the specific embodiments of the present invention are as follows, in conjunction with the accompanying drawings:

[0053] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0054] Example 1

[0055] like Figure 1 As shown, this embodiment provides a bidirectional cyclic LDPC decoding method, including the following steps:

[0056] like Figure 2 As shown, step A: Acquire the transmitted 1024QAM signal;

[0057] Step A1: First, the transmitter generates a 2048-bit binary random number, which includes a 13-bit preamble inserted in the header. After obtaining the 2048-bit binary number, it is transmitted to the LDPC encoder to generate a 2560-bit LDPC code. Then, the LDPC code is mapped to a 1024QAM signal and shaped using an RRC shaping filter with Nyquist shaping.

[0058] Step A2: The mapped 1024QAM electrical signal is split into two routes and generated into a single-channel 40Gbit / s analog signal by a digital-to-analog converter (DAC) with a sampling frequency of 64GSa / s. This analog signal is then fed into an I / Q modulator to load the signal onto the signal light. The output power of the signal light laser is set to 12dBm. A variable optical attenuator (VOA) is then used to adjust the received optical power.

[0059] Step A3: At the receiving end, the coherent receiver mixes the 12dBm power light from the local oscillator (LO) laser with the signal light. A digital oscilloscope with a sampling rate of 100GSa / s is used for data display and reception. The received signal is downsampled after passing through a matched filter corresponding to the shaping filter, and the sampling rate is adjusted to twice the symbol rate for estimation of various error parameters. Specifically, the Gram-Schmidt algorithm is used to compensate for and normalize the IQ imbalance, the Gardner algorithm is used to recover the clock error, and the Cascaded Multimode Algorithm (CMMA) is used to balance and compensate for channel noise. Finally, the previously inserted preamble is used to estimate and compensate for the corresponding frequency and phase offsets. The compensated signal is then fed into a discrete channel quantizer for quantization.

[0060] Step B: Design a discrete channel quantizer suitable for high-order modulated signals, including:

[0061] Step B1: Mark 10 bits in the 1024QAM signal, with the marked bits being v = {0, 1, ... 9}, and the information of each bit being c. v .

[0062] Step B2: Limit the received signal to the information concentration area, and divide it evenly into n quantization intervals, each corresponding to a discrete value. Based on the range of the quantization intervals, determine the joint distribution of the transmitted and received signals in each interval. Integrating yields the discretized joint distribution. Where σ 2 The variance of the signal and noise. It is the real part of the transmitted signal. Let be the real part of the received signal. The resulting discretized distribution will serve as the input to the information bottleneck algorithm. By continuously optimizing the quantization region using the information bottleneck algorithm, we can find a mapping that maximizes the mutual information between the transmitted and received signals.

[0063] like Figure 3 As shown, step B1 involves marking all bits with a specific number of sign bits. In this example, a 1024QAM signal is used, which has 10 bits, v = {0, 1, ... 9}; Figure 4 As shown, the received signal is processed by a discrete channel quantizer to form 1024 mappings with maximized information.

[0064] like Figure 5 As shown, step C is used to calculate the information distribution of the 5 bits in the real part of the 1024QAM signal, and then the information of all bits is unified.

[0065] Step C: Through and The mapping is calculated With bit information c v The joint distribution of information carried by bits Will Constitutes a multivariate observational random variable, c v Let z be a relevant random variable and z be a compressed random variable, forming a new information bottleneck framework, through which... Find the joint distribution of the random variables. This refers to the input of the information bottleneck algorithm. By compressing the information bottleneck algorithm, the information carried by all different bits has a positionally unified probability distribution p(c) v ,z).

[0066] like Figure 6 As shown, step B4 transforms the information bit alignment problem into a multi-dimensional information bottleneck problem, maximizing c. v Mutual information with z; such as Figure 7 As shown, the compression bootstrap diagram for compressing all two bits into one LUT is illustrated using bits 0 and 1 as an example.

[0067] Step D: Design a bidirectional information bottleneck decoder based on a bidirectional loop structure, including:

[0068] Step D1: Design of the check node for the bidirectional information bottleneck decoder, as follows:

[0069] (1) Assume that the dth node of the verification node is c Output external information for each edge, d cThe total quantization information received by the edge is The input to the information bottleneck algorithm is p(c v (z) and compressed space T = 2 q , where q is the number of bits to be quantized.

[0070] (2) First, sequential operations are required. The lookup table constructed for this operation is obtained by looking up the table in sequence according to the sequential structure. and corresponding sequence information

[0071] (3) Then perform the reverse operation, looking up the table in reverse order, to obtain the lookup table constructed from back to front. and corresponding information Note that due to the input quantization information Since they follow the same probability distribution and satisfy symmetry, in both cyclic processes... and Right now and The same constructed lookup table can be used. In the previous two processes, at d0 and (d... c -1) If the edge generates the input information, you only need to generate the corresponding reused table for the remaining edges in the same way to get the corresponding output information.

[0072] (4) After generating the final reusable table, delete the tables that only serve a transitional purpose to reduce the space required to store the tables.

[0073] like Figure 8 As shown, in this embodiment, a bidirectional information bottleneck decoding algorithm is designed by utilizing the bidirectional characteristics of the bidirectional loop structure and the symmetric characteristics of the quantized information. This structure can make full use of the intermediate information generated in the bidirectional loop, greatly reducing the number of times the LUT needs to be searched.

[0074] Step D2: Design of the variable node of the bidirectional information bottleneck decoder, the specific design is as follows:

[0075] (1) When the variable node degree d v When the number is even, the tree structure will As the input for the last layer, this edge can satisfy the symmetry between its front and back sides.

[0076] (2) When the variable node degree d v If it is an odd number, As the input to the last edge in the first layer, it ensures that the decoding process can be completed with the minimum number of LUTs;

[0077] like Figure 9As shown, since the degree of variable nodes is generally small, in order to further reduce the number of LUT lookups required, we change the structure of variable nodes to a tree structure, considering the additional quantization information from the channel during variable node decoding. We need to place this additional information according to the parity of the node degree and then perform a bidirectional loop operation.

[0078] Step E: Build a 1024QAM coherent system to verify the algorithm performance.

[0079] like Figure 10 As shown, the bit error rate obtained after decoding the acquired signal in step D can be calculated. With a performance sacrifice of 0.2 to 0.3 dB, the number of times the LUT needs to be searched can be greatly reduced.

[0080] Figure 11 A comparison of the number of LUT lookups required by several current mainstream methods was conducted. Observation clearly shows that the proposed method completes the decoding process using fewer LUT lookups compared to other methods.

[0081] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention, and these simple modifications all fall within the protection scope of the present invention.

[0082] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.

[0083] Furthermore, various different embodiments of the present invention can be combined in any way, as long as they do not violate the spirit of the present invention, they should also be regarded as the content disclosed by the present invention.

Claims

1. A method for decoding LDPC based on a bi-directional circulant network, characterized in that, Specifically comprising the following steps: Step A: collecting 1024QAM signals transmitted by a coherent light system; Step B: constructing a discrete channel quantizer suitable for high-order modulation signals; Step C: calculating all bit information and completing the unification of the bit information; Step D: constructing a bidirectional information bottleneck decoder based on a bidirectional loop structure, comprising: Step D1: check node design of the bidirectional information bottleneck decoder; Step D2: variable node design of the bidirectional information bottleneck decoder; The specific process of step B is as follows: Step B1 : Mark 10 bit positions in the 1024 QAM signal, the marked bit positions are v = {0, 1,... 9}, the information of each bit position is ; Step B2: limit the received signal to the information set area, evenly divide it into n quantization intervals, each quantization interval corresponds to a discrete value; according to the range of the quantization interval, the joint distribution of the transmitted signal and the received signal in each interval is calculated Integrate to get the discretized joint distribution ; Where, is the variance of the signal noise, is the real part of the transmitted signal, is the real part of the received signal; the discretized distribution obtained will be the input of the information bottleneck algorithm, through the continuous optimization of the quantization region by the information bottleneck algorithm, a mapping with the maximum mutual information between the transmitted signal and the received signal is obtained ; this mapping will be used to calculate the bit information in step C; The specific process of step C is as follows: Step C: the mapping , and is calculated by the joint distribution of the bit information and the distribution of the information carried by the bit ; the is composed of multivariate observation random variables, is the relevant random variable, is the compression random variable, which constitutes a new information bottleneck framework, and the joint distribution of the random variables is obtained by , that is, the input of the information bottleneck algorithm; the two compression tables LUT obtained by the compression of the information bottleneck algorithm make the information carried by all different bits have a position-uniform probability distribution ; The specific process of step D1 is as follows: D11, to get the output extrinsic information of the check node of the m-th row, let the total received quantized information of the m-th row be ; the input of the information bottleneck algorithm is and the compressed space , where q is the number of bits to be quantized. D12. First, perform sequential operations, searching for the LUT from front to back according to the sequential structure. ( ) and the corresponding sequence information ( ); D13. Then, reverse order operation is performed, and the lookup table is searched in reverse order in the order opposite to the order of the sequential operation, to obtain the lookup table constructed from back to front ( ) and the corresponding information ( ) D14, repeat step D12 and step D13, generate a corresponding multiplex table for the remaining edges, and obtain the corresponding output information; D15, after integrating the above table to generate a final multiplex table, delete the transitional table to reduce the space required for storing the table; The specific process of step D2 is as follows: D21, when the variable node degree is even, the tree structure will as the input of the last layer, so that the front and back of the edge satisfy the symmetry; D22、When the variable node degree is odd is odd, the as the input of the last edge in the first layer to ensure that the decoding process can be completed with the least LUT.

2. The LDPC decoding method based on a bi-directional circular network according to claim 1, characterized in that, The specific process of step A is as follows: Step A1: first, the sending end generates a binary random number with a length of 2048, which contains a preamble with a length of 13 inserted in the header; after obtaining the 2048-bit binary number, it is transmitted to the LDPC encoder to generate an LDPC code with a length of 2560; then, the LDPC code is mapped to a 1024QAM signal, and the Nyquist shaping is realized by the RRC shaping filter; Step A2: the mapped 1024QAM electrical signal is divided into two paths by a digital-to-analog converter with a sampling frequency of 64GSa / s to generate an analog signal with a single path rate of 40Gbit / s and is delivered to an I / Q modulator for the purpose of loading the signal into the signal light; wherein the output power of the signal light laser Laser is set to 12dBm; then, a variable optical attenuator is used to adjust the received optical power; Step A3: in the receiving end, the local oscillator laser delivers an optical signal with a power of 12dBm, which is mixed with the optical signal after VOA adjustment; a digital oscilloscope with a sampling rate of 100GSa / s is used to display and receive the data; after the received signal is matched with the corresponding shaping filter, the sampling rate is adjusted to twice the symbol rate for error parameter estimation; the obtained signal is compensated and normalized by using the Gram-Schmidt algorithm, the clock error is recovered by using the Gardner algorithm, and the channel noise is balanced and compensated by using the cascaded multi-mode algorithm; finally, the corresponding frequency and phase offset estimation and compensation are performed by using the previously inserted preamble; the compensated signal is sent to the discrete channel quantizer for quantization.

3. The LDPC decoding method based on a bi-directional circular network according to claim 1, wherein, The method further comprises: Step E: building a 1024QAM coherent system to verify the performance of the algorithm.

4. The LDPC decoding method based on a bi-directional circular network according to claim 3, characterized in that, The step E specifically comprises the following contents: After receiving the signal of the channel, the above LDPC decoding method is used for iteration between the check node and the variable node, and finally the decision is made to output the bit error rate.

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