A chip, communication method and device
By delaying the response of the consumable chip after receiving the verification command, and combining the delay with the preset response time for legality verification, the problem of inflexibility in the legality verification of consumable chips in the prior art is solved, and higher accuracy and user experience are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-21
- Publication Date
- 2026-03-24
AI Technical Summary
The current technology for verifying the legitimacy of consumable chips is not flexible enough, resulting in insufficient data transmission accuracy and user experience.
After receiving the verification command, the consumable chip does not respond immediately. Instead, it sends a response signal within a preset response time after a delay. The legality is verified by the combination of the delay time and the preset response time.
This improves the flexibility and accuracy of verifying the legitimacy of consumable chips, enhancing the user experience.
Smart Images

Figure CN116890541B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of printing technology, in particular to a chip, a communication method and device. BACKGROUND
[0002] An image forming apparatus is a device that forms an image on a recording medium by an imaging principle, such as a printer, a copier, a facsimile, a multifunction image making and copying device, an electrostatic printing device, and any other similar device. A consumable is usually detachably provided on the image forming apparatus, and provides recording material in an image forming process of the image forming apparatus. For example, for a laser printer, the corresponding consumable can be a toner cartridge, and the recording material in the toner cartridge is toner; for an inkjet printer, the corresponding consumable can be an ink cartridge, and the recording material in the ink cartridge is ink or ink water.
[0003] In order to facilitate the management of the consumable, the consumable is usually provided with a consumable chip, and when the consumable is installed in the image forming apparatus, the consumable chip can interact with the image forming apparatus. For example, the image forming apparatus can transmit identity information, performance or state information of the consumable chip. In order to ensure the accuracy of data transmission, the image forming apparatus needs to verify the legality of the consumable chip before data transmission. SUMMARY
[0004] Therefore, the present application provides a chip, a communication method and device to solve the problem of the legality verification of the consumable chip in the prior art.
[0005] In a first aspect, an embodiment of the present application provides a chip for communicating with a host, and the chip is configured to:
[0006] receive a verification instruction sent by the host, wherein the verification instruction comprises a first time length;
[0007] send a response signal of the verification instruction to the host after a delay time length, wherein a duration of sending the response signal is a preset response time length, and the preset response time length is different from the first time length.
[0008] In a possible implementation manner of the first aspect, the chip further comprises:
[0009] obtain a preset response time length corresponding to the verification instruction, and determine a second time length based on the first time length, wherein a sum of the first time length and the second time length is not less than the preset response time length;
[0010] determine the delay time length based on the first time length, the second time length and the preset response time length;
[0011] in response to the target time being reached, sending a response signal of the verification instruction to the host within a duration of the preset response time length; the target time is a time after a time of receiving the verification instruction is delayed by the delay time length.
[0012] In a possible implementation of the first aspect, a ratio between the second time length and the first time length is less than 1.
[0013] In a possible implementation of the first aspect, the response signal of the verification instruction includes a first level signal; a potential of the first level signal is less than a first preset potential.
[0014] In a possible implementation of the first aspect, the chip is further configured to:
[0015] after the duration of the preset response time length, sending a signal from a first level signal to a second level signal to the host, the second level signal being different from the first level signal.
[0016] In a possible implementation of the first aspect, the chip is specifically configured to:
[0017] when a first clock signal is received through a clock bus SCL, sending a first jump signal through a serial data bus SDA to the host, and when a second clock signal is received through the SCL, sending a second jump signal through the SDA to the host; the first jump signal refers to switching of the chip from sending a second level signal or not sending a level signal to sending a first level signal; the second jump signal refers to switching of the chip from sending the first level signal to sending the second level signal or not sending a level signal; the first clock signal refers to a clock signal with a level greater than a second preset potential, and the second clock signal refers to a clock signal with a level less than the second preset potential.
[0018] In a possible implementation of the first aspect, the chip is further configured to:
[0019] before the verification instruction is received and the target time is reached, sending a second level signal to the host, the second level signal being different from the first level signal.
[0020] In a possible implementation of the first aspect, the delay time length is greater than 0 milliseconds.
[0021] In a second aspect, an embodiment of the present application provides a communication method applied to a chip, the chip being in communication with a host; the method includes:
[0022] receiving a verification instruction sent by the host, the verification instruction containing a first time length;
[0023] send a response signal of the verification instruction to the host after a time delay duration, wherein a duration of sending the response signal is a preset response duration, and the preset response duration is different from the first duration.
[0024] In a third aspect, an image forming apparatus is provided, which includes the chip of any one of the first aspect.
[0025] With the scheme provided in the embodiments of the present application, the chip can receive the verification instruction sent by the host, and does not send the response signal immediately after receiving the verification instruction, but sends the response signal of the verification instruction to the host after a time delay duration, and the duration of sending the response signal is a preset response duration. That is, in the embodiments of the present application, the sending of the response signal is not directly performed after receiving the verification instruction, but the response signal of the verification instruction is sent to the host within the duration of the preset response duration after a time delay duration, so that the purpose of verifying the legality of the chip is achieved, and in the present application, the flexibility of verifying the legality of the chip is improved, thereby improving the user experience. BRIEF DESCRIPTION OF DRAWINGS
[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0027] Figure 1 A structural schematic diagram of a communication system provided in the embodiments of the present application is shown;
[0028] Figure 2 Another structural schematic diagram of a communication system provided in the embodiments of the present application is shown;
[0029] Figure 3 A schematic diagram of a consumable box provided in the embodiments of the present application is shown;
[0030] Figure 4 A schematic diagram of a consumable chip provided in the embodiments of the present application is shown;
[0031] Figure 5 A scene schematic diagram of a communication method provided in the embodiments of the present application is shown;
[0032] Figure 6 A flowchart of a communication method provided in the embodiments of the present application is shown. DETAILED DESCRIPTION
[0033] In order to better understand the technical solutions of the present application, the embodiments of the present application will be described in detail below with reference to the drawings.
[0034] It should be apparent that the described embodiments are merely a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.
[0035] The terms used in the embodiments of the present application are merely for the purpose of describing the specific embodiments, and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.
[0036] It should be understood that the term "and / or" used herein merely describes an association relationship of associated objects, and indicates that there can be three relationships, for example, A and / or B, which can represent the three cases of A existing alone, A and B existing together, and B existing alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.
[0037] Referring to Figure 1 A structural schematic diagram of a communication system provided by the embodiments of the present application is shown in FIG. 1. As shown in FIG. 1, the communication system includes a user equipment (UE) 100, a base station (BS) 200, and a core network (CN) 300. Figure 1As shown, the communication system includes a host 100 and a chip 200. The host 100 is provided with a communication port 101, and the slave device is provided with an interface module 201. A communication link is established between the communication port 101 and the interface module 201, through which the host 100 and the chip 200 can transmit information. Specifically, the communication port 101 and the interface module 201 can be electrically connected via a pin, contact point, or spring to establish a communication link. In other embodiments, the communication link can also be a non-contact communication link, i.e., a wireless communication link. In this case, the communication port 101 and the interface module 201 can include an antenna or coil for transmitting wireless signals. In some possible implementations, the communication link may also be referred to as a data bus. Generally, when the host 100 and the chip 200 communicate, they adopt a time-division multiplexing method to achieve bidirectional transmission and reception of information (i.e., full-duplex communication). The host 100 involved in this application embodiment is a device that can perform data processing, control, or related operations, and the chip 200 is installed on the host 100 to assist the host 100 in completing related functions. Chip 200 includes an SDA (Serial Data) channel, which is a data transmission channel. Both the host 100 sending data to chip 200 and chip 200 responding with data to the host 100 are achieved through this channel. When the host 100 wants to send data to chip 200, chip 200 needs to release the bus. At this time, the host 100 has control of the bus and sends data to chip 200; in this state, chip 200 is in signal input mode. When chip 200 wants to respond with data, it takes over the bus, and control of the bus returns to chip 200. It then sends data to the host 100; in this state, chip 200 is in signal output mode. When chip 200 and host 100 are both in input mode, a detection device can detect whether there are other irrelevant signals interfering with the communication process on the bus.
[0038] In one example, the host computer can be a computer, and the chip can be a peripheral device / device of the computer. In another example, the host computer can be a mobile terminal (such as a mobile phone, tablet, or PDA), while the chip is an accessory or peripheral device / device of the mobile terminal, such as a lithium battery chip or a wearable device chip. In some application scenarios, such as... Figure 2The host device 100 is a printing device 110, and the chip 200 is a consumable chip 210. The printing device 110 has a communication port 111, and the consumable chip 210 has an interface module 211. A communication link is established between the communication port 111 and the interface module 211, allowing information transmission between the printing device 110 and the consumable chip 210. For example, during imaging, the consumable chip 210 is used to provide identification information and record material usage information. In the prior art, when the printing device 110 sends a signal to the consumable chip 210, the printing device 110 is the sender, and the consumable chip 210 is the receiver; conversely, when the consumable chip 210 sends a signal to the printing device 110, the consumable chip 210 is the sender, and the printing device 110 is the receiver.
[0039] For ease of description, the technical solutions provided in the embodiments of this application are described below using printing device 110 and consumable chip 210 as examples. However, those skilled in the art should understand that, in addition to printing device 110 and consumable chip 210, the technical solutions provided in the embodiments of this application can also be applied to other types of hosts and chips, and the embodiments of this application do not limit this.
[0040] like Figure 3 As shown, during the imaging process, the printing device 110 requires the assistance of imaging aid information from the consumable cartridge 21 to complete the imaging process. In addition to being recorded in the printing device 110 itself, the imaging aid information is also recorded on the consumable chip 210. The consumable chip 210 primarily serves to identify the printer and record the material usage status. Therefore, when the consumable chip 210 is installed on the printing device 110, the printing device 110 will read the information from the consumable chip 210 and send information about the printing job status and related data to the consumable chip 210.
[0041] One embodiment of this application provides a consumable chip 210 for a consumable cartridge 21, wherein the consumable cartridge 21 is detachably mounted on a printing device 110, and the consumable chip 210 can communicate with the printing device 110, such as... Figure 4 As shown, the consumable chip 210 and the printing device 110 communicate with each other through a plurality of terminals on the consumable chip 210 and terminals on the printing device 110. In one embodiment, the consumable chip 210 includes a data terminal 2101.
[0042] The data terminal 2101 in the consumable chip 210 includes an SDA channel, which is a data transmission channel. Both the printer 110 sending data to the consumable chip 210 and the consumable chip 210 responding with data to the printer 110 are achieved through this channel. When the printer 110 wants to send data to the consumable chip 210, the consumable chip 210 needs to release the bus. At this time, the printer 110 has control of the bus and sends data to the consumable chip 210, which is in signal input mode. When the consumable chip 210 wants to respond with data, it takes over the bus, and then sends data to the printer 110, which is in signal output mode. The printer 110 sends a periodic, alternating low and high level clock signal SCK (Serial Clock) to the consumable chip 210 on the SCL (Serial Clock Line) via the clock terminal, ensuring the correctness and stability of the communication process.
[0043] To ensure the accuracy of data transmission between the consumable chip 210 and the printing device 110, the printing device 110 typically needs to verify the legitimacy of the consumable chip 210 before data transmission. In this embodiment, the consumable chip 210 can receive a verification command sent by the printing device 110. Upon receiving the verification command, it does not immediately respond but instead obtains a preset response duration corresponding to the verification command within the chip and determines a delay duration based on the verification command. After the delay duration, it sends a response signal corresponding to the verification command to the printing device 110, and the duration of sending the response signal is the preset response duration. That is, in this embodiment, by not directly sending a response signal after receiving the verification command, but instead sending a response signal to the printing device 110 within the preset response duration after a delay, the legitimacy verification of the consumable chip 210 is achieved. Furthermore, this application improves the flexibility of the legitimacy verification of the consumable chip 210, thereby enhancing the user experience. A detailed explanation follows.
[0044] In a specific implementation, the consumable chip 210 can be configured with a delay circuit. The consumable chip 210 receives the verification command sent by the printing device 110, records the time of receiving the verification command, and sends a response signal of the verification command to the printing device 110 after the delay period.
[0045] The verification command includes a first duration; the duration for sending the response signal is a preset response duration, which is different from the first duration.
[0046] In this embodiment, to verify the legitimacy of the consumable chip 210, the printing device 110 can send a verification command to the consumable chip 210. After receiving the verification command, the consumable chip 210 replies to the printing device 110 with a preset fixed-duration response signal after a certain delay. The duration of the response signal can also be adjusted according to the current verification command. The adjusted response signal is then sent to the printing device 110 so that the printing device 110 can verify the legitimacy of the consumable chip 210 based on the response signal. Therefore, when the printing device 110 needs to verify the legitimacy of the consumable chip 210, it sends a verification command to the consumable chip, which the consumable chip 210 can receive. This verification command includes a first duration, which is the duration set by the printing device 110 for the consumable chip 210 to immediately send a response signal after receiving the verification command. After receiving a verification command, the consumable chip 210 can either immediately send a response signal to the printing device 110, or, to increase verification flexibility, not immediately. In this case, the consumable chip 210 can obtain a fixed response duration pre-set within itself after receiving the verification command. In this embodiment, although the verification command carries a first duration, to improve verification flexibility, the consumable chip 210 can obtain a preset response duration instead of directly setting the first duration as the preset response duration. When the consumable chip 210 receives a verification command, it can delay sending a response signal to the printing device 110 for a certain period before doing so. The consumable chip 210 can determine the delay duration after receiving the verification command. This delay duration can be pre-set according to actual needs or calculated. After determining the delay duration, the consumable chip 210 can delay the time it receives the verification command before sending the corresponding response signal. To ensure the printing device 110 receives the response signal more accurately, the consumable chip 210 can continuously send the response signal to the printing device 110 within a preset fixed response duration or a response duration adjusted according to the current verification command. That is, the duration for which the consumable chip 210 sends the response signal is a preset response duration (either the response duration itself is a preset fixed duration or the response duration is generated in a preset way), so that the printing device 110 can verify the legitimacy of the consumable chip 210 based on the response signal.
[0047] As one possible implementation, to more accurately verify the legitimacy of the consumable chip 210 by the printing device 110, the delay duration can be determined using the first duration carried in the verification command. In this case, obtaining the preset response duration and determining the delay duration, and then sending the verification command response signal to the printing device 110 after the delay duration includes:
[0048] A preset response duration is obtained, and a second duration is determined based on a first duration. A delay duration is determined based on the first duration, the second duration, and the preset response duration. In response to the arrival of the target time, a response signal for a verification command is sent to the printing device 110 for the duration of the preset response duration.
[0049] The sum of the first duration and the second duration is not less than the preset response duration; the target time is the time after the time delay for receiving the verification command.
[0050] In this embodiment, the preset response time can be pre-calculated. In this case, the consumable chip 210 can calculate an adjustable preset response time based on the first duration in the current instruction. In some embodiments, the preset response time can be a fixed response time calculated by the consumable chip 210 based on the first duration carried in historical verification instructions. For example, it can be calculated by averaging the first duration carried in previously received verification instructions. Alternatively, in some embodiments, the consumable chip 210 can calculate the preset response time by averaging the first duration carried in the currently received verification instruction and the first duration carried in previously received verification instructions. Of course, the response time can also be set based on experience, in which case the consumable chip 210 can obtain the preset response time from a storage device. Alternatively, the preset response time can be obtained through other means; this application does not limit this.
[0051] The consumable chip 210 can obtain the first duration by parsing the verification command. Although the printing device 110 carries the first duration in the verification command, in order to improve the verification accuracy of the consumable chip 210, the first duration set by the printing device 110 can be extended in a timely manner. That is, a second duration can be added in a timely manner based on the first duration set by the printing device 110 to extend the response duration set by the printing device 110. At this time, the second duration can be calculated by the consumable chip 210 based on the first duration. The second duration can be calculated based on the first duration after parsing it. The second duration is the response duration added by the consumable chip 210 in a timely manner based on the response duration set by the printing device 110. At this time, when calculating the second duration, the set second duration needs to satisfy that the sum of the second duration and the first duration is not less than the preset response duration.
[0052] In some embodiments, to facilitate the calculation of the second duration, an operational relationship between the second duration and the first duration can be established, and based on this operational relationship, the second duration can be calculated from the first duration.
[0053] In some embodiments, the ratio between the second duration and the first duration is less than 1. For example, T2 = n T1, where T2 is the second duration, T1 is the first duration, and n is a number less than 1 and greater than 0.
[0054] To improve the accuracy of consumable chip verification, the second duration can be set to be greater than or equal to 0.1. The first duration is T1, and less than or equal to 0.5T1. The value of the second duration can be set according to specific circumstances, and the set second duration must satisfy that the sum of the second duration and the first duration is not less than the preset response duration. For example, when the first duration is 40 milliseconds and the preset response duration is 50 milliseconds, since the second duration is greater than or equal to 0.1... The second duration, defined as a time interval T1, must be greater than or equal to 4 milliseconds and less than or equal to 20 milliseconds. When calculating the second duration based on the first duration, the sum of the second and first durations must not be less than the preset response time, meaning the second duration should be greater than or equal to 10 milliseconds. Therefore, the second duration can be any duration greater than or equal to 10 milliseconds and less than or equal to 20 milliseconds. In this case, the second duration can be set to 15 milliseconds.
[0055] After determining the second duration, since the sum of the second duration and the first duration is not less than the preset response duration, the consumable chip 210 can determine the delay duration based on the first duration, the second duration, and the preset response duration. That is, when the consumable chip 210 receives the verification command but does not immediately send a response signal to the printing device 110, since the preset response duration is not greater than the sum of the second duration and the first duration, it can determine the delay duration based on the first duration, the second duration, and the preset response duration. This allows the consumable chip 210 to send a response signal to the printing device 110 after a delay following the receipt of the verification command.
[0056] In some embodiments, the consumable chip 210 can calculate the delay duration according to the formula T4 = T1 + T2 - T3. Here, T1 is the first duration, T2 is the second duration, T3 is the preset response duration, and T4 is the delay duration. After determining the delay duration, in response to the arrival of the target time, i.e., after the time delay since receiving the verification command, the consumable chip 210 can send a response signal of the verification command to the printing device 110. At this time, the consumable chip 210 can send the response signal of the verification command to the printing device 110 within the duration of the preset response duration, so that the printing device 110 can verify the legitimacy of the consumable chip 210 based on the response signal.
[0057] One possible implementation is a delay duration greater than 0 milliseconds. That is, the sum of the first and second durations is greater than the preset response time. In this case, the delay duration is greater than 0 milliseconds, as shown below. Figure 5 As shown. In this way, the consumable chip 210 can receive a verification command but not immediately respond to it. Instead, it can delay for a certain period of time before sending a response signal.
[0058] As one possible implementation, the response signal of the verification command includes a first level signal. The potential of the first level signal is less than a first preset potential.
[0059] The first preset potential is a threshold value used to determine whether a signal is a high-level signal or a low-level signal. When the potential of a signal is greater than the first preset potential, the signal is considered a high-level signal. When the potential of a signal is less than the first preset potential, the signal is considered a low-level signal.
[0060] In this embodiment, to facilitate the printing device 110's detection of the legitimacy of the consumable chip 210, the response signal of the verification command can be determined as a low-level signal. A signal with a potential lower than a first preset potential is considered a low-level signal. At this time, the consumable chip 210 can send a first-level signal with a potential lower than the first preset potential to the printing device 110 for a preset response duration.
[0061] As one possible implementation, the consumable chip 210 is also used to: send a second level signal to the printing device 110 or not send any signal before receiving the verification instruction and reaching the target time. When not sending any signal, the SDA terminal of the consumable chip 210 is in a high-impedance state.
[0062] The second level signal or the high-impedance state signal is different from the first level signal.
[0063] In this embodiment, when the response signal of the verification command is a first-level signal, in order for the printing device 110 to recognize that the signal it receives is the response signal of the verification command and to receive the first-level signal more accurately, the consumable chip 210 may send a second-level signal or not send any signal to the printing device 110 before receiving the verification command and sending the first-level signal to the printing device 110. The second-level signal is a different level signal from the first-level signal. In some embodiments, the potential of the second-level signal is greater than a first preset potential. That is, the second-level signal or the high-impedance signal is a high-level signal. Thus, after receiving the verification command and before reaching the target time, the consumable chip 210 may send a second-level signal or a high-impedance signal to the printing device 110. When the printing device 110 receives the second-level signal or does not receive the signal, it can know that it has not received the response signal of the verification command. Upon reaching the target time, the consumable chip 210 may send a first-level signal to the printing device 110 so that the printing device 110 can verify the legitimacy of the consumable chip 210 through the received first-level signal.
[0064] As one possible implementation, the consumable chip 210 can send a transition signal to the printing device 110 when sending a response signal. The start and end of signal transmission on the SDA data bus are related to the clock bus SCL. When the clock signal in SCL is the first clock signal, the consumable chip 210 can start sending the response signal; when the clock signal in SCL changes to the second clock signal, the consumable chip 210 stops sending the response signal. Based on this, the consumable chip 210 is specifically used to: send a first transition signal to the printing device 110 via the serial data bus SDA when it receives the first clock signal via the clock bus SCL; and send a second transition signal to the printing device 110 via the SDA when it receives the second clock signal via the SCL.
[0065] The first transition signal refers to the consumable chip 210 switching from sending a second level signal or not sending a level signal to sending a first level signal; the second transition signal refers to the consumable chip 210 switching from sending a first level signal to sending a second level signal or not sending a level signal; the first clock signal refers to a clock signal with a level greater than the second preset potential, and the second clock signal refers to a clock signal with a level less than the second preset potential.
[0066] It should be understood that the second preset potential refers to the potential threshold that defines whether the clock signal is a high-level clock signal or a low-level clock signal. When the potential of the clock signal is greater than the second preset potential, the clock signal is a high-level clock signal. When the potential of the clock signal is less than the second preset potential, the clock signal is a low-level clock signal.
[0067] In other words, when the consumable chip receives the first clock signal via SCL, it indicates that it can send a response signal to the printing device 110. After a delay, the consumable chip 210 begins sending the response signal to the printing device 110. The consumable chip 210 can notify the printing device 110 to begin transmitting the response signal by sending a first transition signal. At this time, the consumable chip 210 switches from sending a second level signal or not sending a level signal to sending a first level signal. When the printing device 110 receives the first transition signal via SDA, it can determine that the consumable chip 210 has begun sending a response signal for the verification command. After the printing device 110 receives the response signal for a preset duration, it can send a second clock signal via SCL. At this time, after detecting that the clock signal sent in SCL has changed to the second clock signal, the consumable chip 210 can send a second transition signal in SDA to notify the printing device 110 that the response signal transmission is complete. At this time, the consumable chip 210 can switch from sending a first level signal to sending a second level signal or switch to not sending a level signal. When the printing device 110 receives the second transition signal, it can determine that the consumable chip 210 has finished sending the response signal. At this time, the printing device 110 can detect the legitimacy of the consumable chip 210 based on the received response signal.
[0068] As one possible implementation, the consumable chip 210 can also determine when to send a response signal to the printing device using its internal timer. Based on the fact that the start and end of signal transmission on the SDA data bus are related to the clock bus SCL when the consumable chip 210 and the printing device transmit response signals via the SDA data bus, when the SCL bus is a high-level signal, the SDA data bus signal transitions from a high-level signal to a low-level signal to begin data transmission, and transitions from a low-level signal to a high-level signal to end data transmission. Therefore, the response signal sent by the consumable chip 210 to the printing device 110 is a low-level signal. In some embodiments, the consumable chip 210 is specifically used for:
[0069] When the first clock signal is received via the clock bus SCL, the timer is triggered to start timing and a first transition signal is sent to the printing device 110 via the serial data bus SDA. During the timing process, a first level signal is continuously sent to the printing device 110 via SDA. When the timing duration reaches the preset response duration, the timer ends and a second transition signal is sent to the printing device 110 via SDA.
[0070] Specifically, during the verification of the validity of the consumable chip 210 by the printing device 110, the printing device 110 needs to send a clock signal with a potential greater than a second preset potential to the consumable chip 210. This means the printing device 110 sends a first clock signal to the consumable chip 210 via SCL. Upon receiving the first clock signal via SCL, the consumable chip 210, being a continuous high-level clock signal, cannot determine the corresponding time based on it. Instead, its internal timer is needed to keep track of the time. After receiving the first clock signal, before the target time is reached, the consumable chip 210 can send a high-level signal to the printing device 110 via SDA or not send a signal at all (i.e., send a second-level signal) or keep its SDA terminal in a high-impedance state, not sending a signal to the printing device 110. When the target time is reached, the timer is triggered to start counting. At this time, when the timer starts counting, the consumable chip 210 sends a first transition signal to the printing device 110 via SDA. When the timer starts, the consumable chip 210 switches from sending a second-level signal or not sending a level signal to sending a first-level signal via SDA to the printing device 110. In other words, the SDA terminal of the consumable chip 210 switches from sending a second-level signal or a high-impedance state to sending a first-level signal to the printing device 110. It continuously sends the first-level signal to the printing device 110 via SDA during the timer's countdown. When the timer reaches the preset response duration and SCL is in the second clock signal state, the timer stops, and the sending of the first-level signal to the printing device 110 ceases. At this time, the consumable chip 210 can send a second transition signal to the printing device 110. That is, the consumable chip 210 switches from sending a first-level signal to sending a second-level signal or not sending a level signal to the printing device 110. During this time, the SDA terminal of the consumable chip 210 switches from sending a first-level signal to sending a second-level signal to the printing device 110 or switches to a high-impedance state.
[0071] As one possible implementation, the consumable chip 210 is specifically used to: trigger a timer to start timing in response to the arrival of the target time and send a response signal of a verification instruction to the host during the timing process, and stop the timer timing when the timing duration reaches the preset response duration and stop sending the response signal of the verification instruction to the host.
[0072] In this embodiment, when the consumable chip 210 sends a response signal of the verification command to the printing device 110 within a preset response duration, the preset response duration can be timed using a timer within the consumable chip 210, without relying on a clock signal sent by the printing device 110. At this time, in response to reaching the target time, the consumable chip 210 triggers the timer to start timing, and sends the response signal of the verification command to the printing device 110 during the timer's timing process. When the timer's timing duration reaches the preset response duration, it indicates that the consumable chip 210 has sent a response signal of the preset response duration to the printing device 110. At this time, the consumable chip 210 stops timing and stops sending response signals to the printing device 110.
[0073] As one possible implementation, since the clock signal received by the consumable chip 210 during the verification time is also the first clock signal, the consumable chip 210 also needs to trigger a timer when it receives the verification command to confirm whether there has been a delay since the moment the verification command was received. In this case, the consumable chip 210 can trigger the timer to start counting when it receives the verification command sent by the printing device 110, and restart counting when the counting time reaches the delay duration. During this counting process, it sends a response signal for the verification command to the printing device 110, and stops counting when the counting time reaches the preset response duration, and stops sending response signals to the printing device 110.
[0074] The verification time refers to the time between receiving the verification command and sending the response signal.
[0075] Specifically, when the consumable chip 210 receives a verification command, it starts a timer and sends a second-level signal to the printing device 110 or does not send a signal during the timer period. When the timer reaches the delay period, the timer restarts, and the consumable chip 210 switches from sending a second-level signal or not sending a signal to sending a first-level signal. When the timer reaches the preset response period, it stops timing and stops sending the first-level signal to the printing device 110. In this way, the consumable chip 210, without relying on a clock signal, can send a response signal to the printing device 110 for the preset response period after a delay upon receiving a verification command.
[0076] As one possible implementation, the consumable chip 210 is also used to: disconnect the communication connection for sending signals to the printing device 110 after a preset response duration. That is, after sending a response signal to the printing device 110, the consumable chip 210 disconnects the communication connection for sending signals to the printing device 110 and no longer outputs signals to the printing device 110.
[0077] As one possible implementation, the consumable chip 210 is specifically used to switch from the signal output state of sending a response signal to the signal input state after a preset response duration.
[0078] In this embodiment, the consumable chip 210 communicates with the printing device 110 using a time-division multiplexing method to achieve bidirectional information transmission and reception. Specifically, when the printing device 110 sends a verification command to the consumable chip 210, the consumable chip 210 releases the bus, allowing the printing device 110 to send the verification command back to the consumable chip 210. When the consumable chip 210 releases the bus, it enters a signal input state or a high-impedance state. That is, the consumable chip 210 does not output a signal but is in a signal receiving state or a state awaiting signal reception. When the consumable chip 210 needs to send data, the printing device 110 releases the bus, allowing the consumable chip 210 to send a response signal to the printing device 110. When the printing device 110 releases the bus, it enters a signal input state. Therefore, after sending the verification command, the printing device 110 releases the bus and enters the signal input state to facilitate receiving the response signal. After receiving the verification command from the printing device 110 and determining the response signal based on the verification command, the consumable chip 210 needs to switch from a signal input state to a signal output state in order to send the response signal to the printing device 110. At this time, after reaching the target time, the consumable chip can send the response signal to the printing device 110 via the bus for a preset response duration. After the preset response duration has elapsed, the consumable chip 210 has finished sending the response signal, and at this point, the consumable chip 210 can disconnect the communication connection with the printing device 110.
[0079] Thus, in this embodiment of the application, after receiving the verification command, instead of directly sending a response signal, a response signal for the verification command is sent to the host within a preset response duration after the target time arrives. This achieves the purpose of verifying the legitimacy of the consumable chip 210. Furthermore, this application improves the flexibility of verifying the legitimacy of the consumable chip 210, thereby enhancing the user experience.
[0080] Corresponding to the above embodiments, this application also provides a consumable box on which any of the aforementioned consumable chips are installed.
[0081] Corresponding to the above embodiments, this application also provides a communication method, such as... Figure 6 As shown, this method is applied to a chip that communicates with a host computer. (Reference) Figure 6 As shown, the method includes:
[0082] Step S601: Receive the verification command sent by the host.
[0083] The verification instruction includes a first duration.
[0084] Step S602: After a delay period, send a response signal for the verification command to the host.
[0085] The duration of sending the response signal is a preset response duration, which is different from the first duration.
[0086] Corresponding to the above embodiments, this application also provides an image forming apparatus, which includes any of the aforementioned chips.
[0087] In a specific implementation, the present invention also provides a computer storage medium, wherein the computer storage medium may store a program, which, when executed, may include some or all of the steps of the various embodiments of the communication method provided by the present invention. The storage medium may be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.
[0088] Those skilled in the art will clearly understand that the techniques in the embodiments of the present invention can be implemented using software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or certain parts of the embodiments of the present invention.
[0089] The same or similar parts between the various embodiments in this specification can be referred to mutually. In particular, the device embodiments and terminal embodiments are basically similar to the method embodiments, so the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.
Claims
1. A chip for communicating with a host computer, characterized in that, The chip is used for: The chip receives a verification command sent by the host, the verification command containing a first duration, the first duration being a set duration during which the chip needs to send a response signal immediately after receiving the verification command; After a delay, a response signal for the verification command is sent to the host. The duration for sending the response signal is a preset response duration, which is different from the first duration. The response signal is a low-level signal. Obtain the preset response duration corresponding to the verification command, and determine the second duration based on the first duration; wherein the sum of the first duration and the second duration is not less than the preset response duration; The delay duration is determined based on the first duration, the second duration, and the preset response duration.
2. The chip according to claim 1, characterized in that, Also includes: In response to the arrival of the target time, a response signal for sending the verification command to the host is sent within the duration of the preset response duration; The target time is the time after the delay period following the time of receiving the verification instruction.
3. The chip according to claim 2, characterized in that, The ratio between the second duration and the first duration is less than 1.
4. The chip according to claim 2, characterized in that, The response signal of the verification command includes a first level signal; the potential of the first level signal is less than a first preset potential.
5. The chip according to claim 4, characterized in that, The chip is also used for: After the preset response duration has elapsed, a signal is sent to the host that switches from a first level signal to a second level signal, the second level signal being different from the first level signal.
6. The chip according to claim 5, characterized in that, The chip is specifically used for: When the chip receives the first clock signal via the clock bus SCL, it sends a first transition signal to the host via the serial data bus SDA. When the chip receives the second clock signal via the SCL, it sends a second transition signal to the host via the SDA. The first transition signal refers to the chip switching from sending a second level signal or not sending a level signal to sending a first level signal. The second switching signal is when the chip switches from sending a first level signal to sending the second level signal or not sending a level signal; The first clock signal refers to a clock signal with a level greater than the second preset potential, and the second clock signal refers to a clock signal with a level less than the second preset potential.
7. The chip according to claim 4, characterized in that, The chip is also used for: Before receiving the verification command and reaching the target time, a second level signal is sent to the host, the second level signal being different from the first level signal.
8. The chip according to any one of claims 1-7, characterized in that, The delay duration is greater than 0 milliseconds.
9. A communication method, characterized in that, Applied to a chip that communicates with a host; the method includes: The chip receives a verification command sent by the host, the verification command containing a first duration, the first duration being a set duration during which the chip needs to send a response signal immediately after receiving the verification command; Obtain the preset response duration corresponding to the verification command and determine the delay duration. After the delay duration, send the response signal of the verification command to the host. The duration of sending the response signal is the preset response duration, which is different from the first duration. The response signal is a low-level signal. The step of obtaining the preset response duration corresponding to the verification command and determining the delay duration includes: Obtain the preset response duration corresponding to the verification command, and determine the second duration based on the first duration; wherein the sum of the first duration and the second duration is not less than the preset response duration; The delay duration is determined based on the first duration, the second duration, and the preset response duration.
10. An image forming apparatus, characterized in that, Includes the chip described in any one of claims 1-8.
Citation Information
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