Method, device and equipment for processing problem of memory error causing downtime, and medium
By detecting memory error types in ARM architecture servers and performing degradation processing and physical isolation, the system resolved the downtime issue caused by memory errors, achieving stable system operation and fault log recording, which facilitates operation and maintenance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- INSPUR SUZHOU INTELLIGENT TECH CO LTD
- Filing Date
- 2023-07-21
- Publication Date
- 2026-07-14
AI Technical Summary
When the memory of an ARM architecture server generates an uncorrectable error (UCE) or a catastrophic failure (IERR), existing technologies only report the error to the logs, causing system crashes, impacting operations and user experience.
By detecting memory error types, distinguishing between correctable and uncorrectable errors, performing degradation processing, and physically isolating errors when the number of errors reaches a threshold, the system can avoid crashes by combining faulty memory isolation and degradation processing.
It effectively prevents system downtime, ensures normal business operations, and records clear fault logs, facilitating timely handling by maintenance personnel.
Smart Images

Figure CN116893923B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of memory testing technology, specifically to methods, apparatus, equipment, and media for handling memory errors that cause system crashes. Background Technology
[0002] ARM architecture chips are becoming increasingly popular due to their advantages such as low power consumption, low price, and strong scalability. In the server field, x86 architecture servers have always been dominant, but in recent years, due to the advantages of ARM architecture chips, the market share of ARM servers has gradually increased. Since the stability of ARM architecture servers is lower than that of x86 servers, the maintainability of ARM architecture servers has gradually become an important concern. As an important component of servers, memory reliability plays a crucial role in maintenance.
[0003] When a server runs various applications, it frequently interacts with the CPU, memory, hard drive, etc., generating various pressures. During the application process, the memory will inevitably generate uncorrectable errors (UCE) or catastrophic fault errors (IERR). The BIOS sends the fault information to the BMC and OS, which record it in the corresponding fault log.
[0004] Uncorrectable memory errors (UCE) or catastrophic error errors (IERR) generated by memory are not handled and are only reported to the log. Although the log can clearly show the current problem, it also causes the system to crash. While keeping the crash status makes it easier to analyze, it affects operations. When these errors occur, the entire system crashes, affecting program operation, and consequently, customers cannot access the system, affecting user experience and causing losses. Summary of the Invention
[0005] Uncorrectable memory errors (UCE) or catastrophic error errors (IERR) generated by memory are not handled and are only reported to the log. Although the log can clearly show the current problem, it also causes the system to crash. Although the crash can be kept for easy analysis, it affects operation. When these errors occur, the entire system crashes, affecting the operation of programs. This invention provides a method, device, equipment and medium for handling the problem of crash caused by memory errors.
[0006] In a first aspect, the present invention provides a method for handling system crashes caused by memory errors, comprising the following steps:
[0007] Detect memory errors and distinguish error types;
[0008] Determine if the error type is a memory-correctable error;
[0009] If so, send the fault information to the BMC and record the fault in the fault log;
[0010] Otherwise, downgrade the current memory error;
[0011] Determine whether the number of memory errors after downgrading reaches the corresponding module register threshold;
[0012] If so, physically isolate the faulty memory.
[0013] Otherwise, send a memory degradation error log to the BMC.
[0014] As a preferred embodiment of the technical solution of the present invention, the method includes:
[0015] When the memory error type is an uncorrectable error, the uncorrectable error is downgraded to a downgraded uncorrectable error.
[0016] Determine whether the number of uncorrectable errors after the current downgrade has reached the threshold of the uncorrectable error module register after the downgrade;
[0017] If not, proceed as follows: Send a memory degradation error log to the BMC;
[0018] If so, the procedure is to physically isolate the faulty memory.
[0019] As a preferred embodiment of the technical solution of the present invention, the method further includes:
[0020] When the memory error type is a catastrophic failure, the catastrophic failure is downgraded to a downgraded catastrophic failure.
[0021] Determine whether the number of catastrophic failures after degradation reaches the threshold of the catastrophic failure module register after degradation;
[0022] If not, proceed as follows: Send a memory degradation error log to the BMC;
[0023] If so, the procedure is to isolate the faulty memory.
[0024] The processing procedure is as follows: When a memory fault is detected, the fault type is first distinguished. For correctable errors (CE), no downgrading is performed; a fault message is sent to the BMC, and a fault log is recorded. This type of error will not cause a system crash. When an uncorrectable memory error (UCE) is detected, to prevent a system crash, the UCE needs to be downgraded. When a UCE is downgraded to a D-UCE fault, it is necessary to determine whether the current number of D-UCEs has reached the D-UCE module register threshold A. If the threshold is not reached, no crash will occur, and a fault message is sent to the BMC to record the fault log. If the threshold A is reached, to prevent a system crash, the faulty memory is physically isolated, which is equivalent to not configuring the faulty memory, thus preventing a crash. When a catastrophic memory error type (IERR) is detected, indicating a serious memory failure, the fault is downgraded to D-IERR. The system checks if the number of D-IERR faults has reached the D-IERR module register threshold B. If it hasn't reached threshold B, a fault message is sent to the BMC, and a fault log is recorded. If it reaches threshold B, the memory is isolated to prevent system crashes. The D-IERR module register threshold B is less than the D-UCE module register threshold A, meaning the number of D-IERR downgrades is low.
[0025] As a preferred embodiment of the technical solution of the present invention, after the step of determining whether the error type is a memory-correctable error, the following steps are included:
[0026] The procedure for handling memory degradation errors is set in the correctable machine check interrupt code within the operating system kernel;
[0027] Set the interrupt type for memory correctable errors to correctable machine check interrupt;
[0028] Configure data parsing functionality for the machine verification library within the correctable machine check interrupt handling;
[0029] Obtain a correctable machine check interrupt and handle memory errors through a program that processes memory degradation errors;
[0030] The specific fault memory address and error type can be obtained by correcting machine check interrupts and parsing the data of the machine verification library.
[0031] If the error type is a degradation error, the following steps are performed: Send a memory degradation error log to the BMC;
[0032] If the error type is a correctable memory error, the steps are: send the fault information to the BMC and record the fault in the fault log.
[0033] As a preferred embodiment of the technical solution of the present invention, the step of sending the memory degradation error log to the BMC includes the following:
[0034] After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
[0035] As a preferred embodiment of the technical solution of the present invention, the step of isolating the faulty memory includes:
[0036] Obtain memory information of the faulty memory;
[0037] Send a memory isolation message, which carries the memory information that needs to be isolated and isolation information;
[0038] The memory information requiring isolation and the isolation information in the memory isolation message are analyzed.
[0039] Based on the analysis results, an isolation command is sent, and hardware configuration is performed according to the isolation command to isolate the faulty memory.
[0040] As a preferred embodiment of the technical solution of the present invention, the step of obtaining information about faulty memory based on memory error information includes:
[0041] Send a command to retrieve memory information based on the memory error message;
[0042] In response to the acquisition instruction, determine the first address of the preset string that represents memory information;
[0043] A preset address range is generated based on the first address and the preset address offset information;
[0044] Read the preset string stored in the preset address range;
[0045] Based on the preset string, determine the memory information targeted by the acquisition instruction;
[0046] The determined memory information is returned based on the fetch instruction.
[0047] Secondly, the present invention provides a problem-solving device for memory error-induced crashes, including a detection module, a type judgment module, a sending module, a degradation processing module, a quantity judgment module, and an isolation processing module;
[0048] The detection module is used to detect memory errors and distinguish the error type;
[0049] The type determination module is used to determine whether the error type is a memory-correctable error;
[0050] The sending module is used to send fault information to the BMC and record fault logs.
[0051] The degradation processing module is used to degrade the current memory error.
[0052] The quantity judgment module is used to determine whether the number of memory errors after degradation has reached the threshold of the corresponding module register;
[0053] The isolation module is used to physically isolate faulty memory.
[0054] As a preferred embodiment of the technical solution of the present invention, the downgrade processing module is used to downgrade the uncorrectable error into a downgraded uncorrectable error when the memory error type is an uncorrectable error.
[0055] The quantity judgment module is used to determine whether the number of uncorrectable errors after the current downgrade has reached the threshold of the uncorrectable error module register after the downgrade. If not, it triggers the sending module to send the memory downgrade error log to the BMC; if so, it triggers the isolation module to perform physical isolation of the faulty memory.
[0056] As a preferred embodiment of the technical solution of the present invention, the degradation processing module is used to downgrade the catastrophic failure into a downgraded catastrophic failure when the memory error type is a catastrophic failure.
[0057] The quantity judgment module is used to determine whether the number of catastrophic failures after degradation has reached the threshold of the catastrophic failure module register after degradation. If not, it triggers the sending module to send the memory degradation error log to the BMC; if so, it triggers the isolation module to perform physical isolation of the faulty memory.
[0058] As a preferred embodiment of the technical solution of the present invention, the device further includes a setting inspection module, which includes a first setting unit, a second setting unit, a third setting unit, a processing unit, and an information acquisition and judgment unit.
[0059] The first setting unit is used to set the program for handling memory degradation errors in the correctable machine check interrupt code in the operating system kernel;
[0060] The second setting unit is used to set the interrupt type for memory correctable errors to correctable machine check interrupt;
[0061] The third setting unit is used to set the data parsing function of the machine verification library in the correctable machine check interrupt handling.
[0062] The processing unit is used to acquire correctable machine check interrupts and process memory errors through a program that handles memory degradation errors.
[0063] The information acquisition and judgment unit is used to obtain the specific faulty memory address and error type through the data parsing function of the machine verification library via the correctable machine check interrupt. If the error type is a degradation error, the sending module is triggered to send a memory degradation error log to the BMC. If the error type is a correctable memory error, the sending module is triggered to send fault information to the BMC and record the fault log. After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
[0064] As a preferred embodiment of the technical solution of the present invention, the isolation processing module includes a memory information acquisition unit, an isolation message sending unit, an isolation message analysis unit, an isolation instruction sending unit, and an isolation processing unit;
[0065] The memory information acquisition unit is used to acquire memory information of faulty memory.
[0066] An isolation message sending unit is used to send a memory isolation message, which carries memory information that needs to be isolated and isolation information.
[0067] The isolation message analysis unit is used to analyze the memory information that needs to be isolated and the isolation information in the memory isolation message;
[0068] The isolation command sending unit is used to send isolation commands based on the analysis results;
[0069] An isolation processing unit is used to perform hardware configuration according to the isolation instructions to isolate the faulty memory.
[0070] As a preferred embodiment of the technical solution of the present invention, the memory information acquisition unit includes an instruction sending submodule, an instruction response submodule, an address range acquisition submodule, a string acquisition submodule, and a memory information acquisition submodule;
[0071] The instruction sending submodule is used to send instructions to retrieve memory information based on memory error information.
[0072] The instruction response submodule is used to respond to the acquisition instruction and determine the first address of a preset string that records memory information.
[0073] The address range acquisition submodule is used to generate a preset address range based on the first address and preset address offset information.
[0074] The string retrieval submodule is used to read preset strings stored within a preset address range;
[0075] The memory information acquisition submodule is used to determine the memory information targeted by the acquisition instruction based on the preset string, and return the determined memory information based on the acquisition instruction.
[0076] Thirdly, the present invention also provides an electronic device, the electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; the memory storing computer program instructions executable by the at least one processor, the computer program instructions being executed by the at least one processor to enable the at least one processor to execute the problem handling method for memory error-induced crash as described in the first aspect.
[0077] Fourthly, the present invention also provides a non-transitory computer-readable storage medium that stores computer instructions that cause the computer to execute the problem-solving method for memory error-induced crashes as described in the first aspect.
[0078] As can be seen from the above technical solutions, the present invention has the following advantages: by adopting a combination of fault memory isolation and fault degradation, a single faulty memory is isolated. The main purpose is to prevent the system from crashing and to ensure normal business operations. At the same time, the memory log can be clearly recorded, which is convenient for timely handling by operation and maintenance.
[0079] Furthermore, the design principle of this invention is reliable, the structure is simple, and it has a very wide range of application prospects.
[0080] Therefore, it is evident that the present invention has outstanding substantive features and significant progress compared with the prior art, and the beneficial effects of its implementation are also obvious. Attached Figure Description
[0081] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0082] Figure 1 This is a schematic flowchart of a method according to an embodiment of the present invention.
[0083] Figure 2 This is a schematic flowchart of a method according to another embodiment of the present invention.
[0084] Figure 3 This is a schematic block diagram of an apparatus according to an embodiment of the present invention.
[0085] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0086] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.
[0087] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.
[0088] In the embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, or it may be an electrical, mechanical, or other form of connection.
[0089] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of the invention. However, those skilled in the art will recognize that the technical solutions of the invention can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc. In other cases, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring aspects of the invention. To enable those skilled in the art to better understand the technical solutions in the invention, the technical solutions in the embodiments of the invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the invention, not all embodiments. Based on the embodiments of the invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the invention. When memory generates an uncorrectable error (UCE) or a catastrophic fault error (IERR), the BIOS performs graded processing, using a combination of faulty memory isolation and fault degradation to isolate a single faulty memory without affecting the use of other memory, and optimize the fault log. The main purpose is to prevent system crashes and ensure normal business operations, while simultaneously clearly recording memory log information for convenient and timely maintenance. Figure 1 As shown, this embodiment of the invention provides a method for handling system crashes caused by memory errors, including the following steps:
[0090] Step 1: Detect memory errors and distinguish the error type;
[0091] Step 2: Determine if the error type is a memory-correctable error;
[0092] If yes, proceed to step 3; otherwise, proceed to step 4.
[0093] Step 3: Send fault information to BMC and record the fault in the fault log;
[0094] Step 4: Downgrade the current memory error;
[0095] Step 5: Determine whether the number of memory errors after downgrading reaches the corresponding module register threshold;
[0096] If yes, proceed to step 6; otherwise, proceed to step 7.
[0097] Step 6: Physically isolate the faulty memory;
[0098] Step 7: Send the memory degradation error log to the BMC.
[0099] Memory failure types are categorized as follows: Uncorrectable error (UCE), Correctable memory error (CE), Degraded uncorrectable error (D-UCE), Catastrophic failure (IERR), and Degraded catastrophic failure (D-IERR).
[0100] Uncorrectable errors (UCE) and catastrophic failures (IERR) can both cause system crashes. However, correctable memory errors (CE), degraded uncorrectable errors (D-UCE), and degraded catastrophic failures (D-IERR) will not cause system crashes. The difference is that correctable memory errors (CE) are not limited in number; even an infinite number of correctable errors (CE) will not cause a system crash. Degraded uncorrectable errors (D-UCE) and degraded catastrophic failures (D-IERR) are limited in number. When they exceed a certain value in the D-UCE module register and D-IERR module register, respectively, physical isolation of the faulty memory is performed, preventing system crashes.
[0101] like Figure 2 As shown, this embodiment of the invention provides a method for handling system crashes caused by memory errors, including the following steps:
[0102] S1: Detect memory error information;
[0103] S2: Determine the error type;
[0104] When the error type is a correctable memory error, execute S3; when the memory error type is an uncorrectable memory error, execute S4; when the memory error type is a catastrophic failure, execute S8.
[0105] S3: Send fault information to BMC and record fault log; execute step S10;
[0106] S4: Downgrade the uncorrectable error to a downgraded uncorrectable error;
[0107] S5: Determine whether the number of uncorrectable errors after the current downgrade has reached the threshold of the uncorrectable error module register after the downgrade;
[0108] If not, proceed to step S6; if yes, proceed to step S7.
[0109] S6: Send the memory degradation error log to the BMC; execute step S10;
[0110] S7: Physically isolate the faulty memory.
[0111] S8: Downgrade the catastrophic failure to a downgraded catastrophic failure.
[0112] S9: Determine whether the number of catastrophic failures after degradation has reached the threshold of the catastrophic failure module register after degradation;
[0113] If not, execute S6 to send a memory degradation error log to the BMC;
[0114] If so, execute S7 to isolate the faulty memory.
[0115] S10: After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
[0116] The processing procedure is as follows:
[0117] When the BIOS detects a memory fault, it first distinguishes the fault type. For correctable errors (CE), no downgrading is performed; a fault message is sent to the BMC, and a fault log is recorded. This type of error will not cause a system crash. When an uncorrectable memory error (UCE) is detected, to prevent a system crash, the UCE needs to be downgraded. When a UCE is downgraded to a D-UCE fault, it is necessary to check whether the current number of D-UCEs has reached the D-UCE module register threshold A. If the threshold is not reached, no crash will occur, and a fault message is sent to the BMC, which records the fault log. If the threshold A is reached, to prevent a system crash, the faulty memory is physically isolated, which is equivalent to not configuring the faulty memory, thus preventing a crash. When a catastrophic memory error type (IERR) is detected, indicating a serious memory failure, the fault is downgraded to D-IERR. The system checks if the number of D-IERR faults has reached the D-IERR module register threshold B. If it hasn't reached threshold B, a fault message is sent to the BMC, and a fault log is recorded. If it reaches threshold B, the memory is isolated to prevent system crashes. The D-IERR module register threshold B is less than the D-UCE module register threshold A, meaning the number of D-IERR downgrades is low.
[0118] This invention provides a method for handling system crashes caused by memory errors. In the above embodiments, the specific implementation process of sending logs to the BMC includes:
[0119] The procedure for handling memory degradation errors is set up in the correctable machine check interrupt code within the operating system kernel; the interrupt type for generating correctable memory errors is set to correctable machine check interrupt; the data parsing function for the machine check library is set up in the correctable machine check interrupt handling; the correctable machine check interrupt is obtained, and the memory error is handled by the procedure for handling memory degradation errors; the specific faulty memory address and error type are obtained through the data parsing function of the machine check library by the correctable machine check interrupt; if the error type is a degradation error, the following steps are executed: send the memory degradation error log to the BMC; if the error type is a correctable memory error, the following steps are executed: send the fault information to the BMC and record the fault log.
[0120] The specific steps for isolating faulty memory in the above embodiments include:
[0121] S71: Obtain memory information of the faulty memory;
[0122] S72: Send a memory isolation message, the isolation message carrying memory information that needs to be isolated and isolation information;
[0123] S73: Analyze the memory information that needs to be isolated and the isolation information in the memory isolation message;
[0124] S74: Send an isolation command based on the analysis results, and perform hardware configuration based on the isolation command to isolate the faulty memory.
[0125] In the above embodiments, the step of obtaining information about faulty memory based on memory error information includes:
[0126] Send an instruction to retrieve memory information based on memory error information; respond to the retrieval instruction and determine a first address containing a preset string representing memory information; generate a preset address range based on the first address and preset address offset information; read the preset string stored within the preset address range; determine the memory information targeted by the retrieval instruction based on the preset string; and return the determined memory information based on the retrieval instruction.
[0127] Memory fault types are categorized as follows: Uncorrectable Errors (UCE), Correctable Memory Errors (CE), Degraded Uncorrectable Errors (D-UCE), Catastrophic Faults (IERR), and Degraded Catastrophic Faults (D-IERR). Uncorrectable errors (UCE) and catastrophic faults (IERR) can both cause system crashes. Correctable errors (CE), degraded uncorrectable errors (D-UCE), and degraded catastrophic faults (D-IERR) do not cause system crashes. Correctable errors (CE) are unlimited in number; even an infinite number of correctable errors (CE) will not cause a system crash. Degraded uncorrectable errors (D-UCE) and degraded catastrophic faults (D-IERR) are limited in number. When the number exceeds a certain value in the D-UCE module register and the D-IERR module register, respectively, physical memory isolation is implemented, preventing system crashes.
[0128] like Figure 3 As shown, the present invention provides a problem-solving device for memory error-induced crashes, including a detection module, a type judgment module, a sending module, a degradation processing module, a quantity judgment module, and an isolation processing module;
[0129] The detection module is used to detect memory errors and distinguish the error type;
[0130] The type determination module is used to determine whether the error type is a memory-correctable error;
[0131] The sending module is used to send fault information to the BMC and record fault logs.
[0132] The degradation processing module is used to degrade the current memory error; when the memory error type is an uncorrectable error, it degrades the uncorrectable error to a downgraded uncorrectable error; when the memory error type is a catastrophic failure, it degrades the catastrophic failure to a downgraded catastrophic failure.
[0133] The quantity judgment module is used to determine whether the number of memory errors after degradation has reached the corresponding module register threshold; it is also used to determine whether the number of currently downgraded uncorrectable errors has reached the downgraded uncorrectable error module register threshold. If not, it triggers the sending module to send memory degradation error logs to the BMC; if so, it triggers the isolation module to physically isolate the faulty memory. Finally, it is used to determine whether the number of downgraded catastrophic faults has reached the downgraded catastrophic fault module register threshold. If not, it triggers the sending module to send memory degradation error logs to the BMC; if so, it triggers the isolation module to physically isolate the faulty memory.
[0134] The isolation module is used to physically isolate faulty memory.
[0135] The processing procedure is as follows:
[0136] When the BIOS detects a memory fault, it first distinguishes the fault type. For correctable errors (CE), no downgrading is performed; a fault message is sent to the BMC, and a fault log is recorded. This type of error will not cause a system crash. When an uncorrectable memory error (UCE) is detected, to prevent a system crash, the UCE needs to be downgraded. When a UCE is downgraded to a D-UCE fault, it is necessary to check whether the current number of D-UCEs has reached the D-UCE module register threshold A. If the threshold is not reached, no crash will occur, and a fault message is sent to the BMC, which records the fault log. If the threshold A is reached, to prevent a system crash, the faulty memory is physically isolated, which is equivalent to not configuring the faulty memory, thus preventing a crash. When a catastrophic memory error (IERR) is detected, indicating a serious memory failure, the fault is downgraded to D-IERR. The system checks if the number of D-IERR faults reaches the D-IERR module register threshold B. If it doesn't, a fault message is sent to the BMC, and a fault log is recorded. If the threshold B is reached, the memory is isolated to prevent system crashes. The D-IERR module register threshold B is less than the D-UCE module register threshold A, meaning the number of D-IERR downgrades is low. When memory generates an uncorrectable UCE or a catastrophic IERR error, the BIOS performs tiered processing, combining faulty memory isolation and fault downgrading. The primary goal is to prevent system crashes and maintain normal business operations, while simultaneously providing clear memory log information for timely maintenance.
[0137] In some embodiments, the device further includes a setting check module, which includes a first setting unit, a second setting unit, a third setting unit, a processing unit, and an information acquisition and judgment unit;
[0138] The first setting unit is used to set the program for handling memory degradation errors in the correctable machine check interrupt code in the operating system kernel;
[0139] The second setting unit is used to set the interrupt type for memory correctable errors to correctable machine check interrupt;
[0140] The third setting unit is used to set the data parsing function of the machine verification library in the correctable machine check interrupt handling.
[0141] The processing unit is used to acquire correctable machine check interrupts and process memory errors through a program that handles memory degradation errors.
[0142] The information acquisition and judgment unit is used to obtain the specific faulty memory address and error type through the data parsing function of the machine verification library via the correctable machine check interrupt. If the error type is a degradation error, the sending module is triggered to send a memory degradation error log to the BMC. If the error type is a correctable memory error, the sending module is triggered to send fault information to the BMC and record the fault log. After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
[0143] In some embodiments, the isolation processing module includes a memory information acquisition unit, an isolation message sending unit, an isolation message analysis unit, an isolation instruction sending unit, and an isolation processing unit;
[0144] The memory information acquisition unit is used to acquire memory information of faulty memory.
[0145] An isolation message sending unit is used to send a memory isolation message, which carries memory information that needs to be isolated and isolation information.
[0146] The isolation message analysis unit is used to analyze the memory information that needs to be isolated and the isolation information in the memory isolation message;
[0147] The isolation command sending unit is used to send isolation commands based on the analysis results;
[0148] An isolation processing unit is used to perform hardware configuration according to the isolation instructions to isolate the faulty memory.
[0149] In some embodiments, the memory information acquisition unit includes an instruction sending submodule, an instruction response submodule, an address range acquisition submodule, a string acquisition submodule, and a memory information acquisition submodule;
[0150] The instruction sending submodule is used to send instructions to retrieve memory information based on memory error information.
[0151] The instruction response submodule is used to respond to the acquisition instruction and determine the first address of a preset string that records memory information.
[0152] The address range acquisition submodule is used to generate a preset address range based on the first address and preset address offset information.
[0153] The string retrieval submodule is used to read preset strings stored within a preset address range;
[0154] The memory information acquisition submodule is used to determine the memory information targeted by the acquisition instruction based on the preset string, and return the determined memory information based on the acquisition instruction.
[0155] like Figure 4As shown, this embodiment of the invention also provides an electronic device, which includes a processor, a communication interface, a memory, and a communication bus. The processor, communication interface, and memory communicate with each other via the communication bus. The communication bus can be used for information transmission between the electronic device and sensors. The processor can call logical instructions in the memory to execute the following method: S1: Detect memory error information; S2: Determine the error type; when the error type is a correctable memory error, execute S3; when the memory error type is an uncorrectable error, execute S4; when the memory error type is a catastrophic failure, execute S8; S3: Send fault information to the BMC and record the fault log; execute step S10;
[0156] S4: Downgrade the uncorrectable error to a downgraded uncorrectable error; S5: Determine if the number of downgraded uncorrectable errors reaches the downgraded uncorrectable error module register threshold; if not, proceed to S6; if yes, proceed to step S7; S6: Send the memory downgrade error log to the BMC; proceed to step S10; S7: Physically isolate the faulty memory. S8: Downgrade the catastrophic fault to a downgraded catastrophic fault; S9: Determine if the number of downgraded catastrophic faults reaches the downgraded catastrophic fault module register threshold; if not, proceed to S6 and send the memory downgrade error log to the BMC; if yes, proceed to S7 and isolate the faulty memory. S10: After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
[0157] Furthermore, the logical instructions in the aforementioned memory can be implemented as software functional units and sold or used as independent products, and can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0158] This invention provides a non-transitory computer-readable storage medium storing computer instructions that cause a computer to execute the method provided in the above-described method embodiments, including, for example: S1: detecting memory error information; S2: determining the error type; when the error type is a correctable memory error, executing S3; when the memory error type is an uncorrectable memory error, executing S4; when the memory error type is a catastrophic failure, executing S8; S3: sending fault information to the BMC and recording a fault log; executing step S10; S4: downgrading the uncorrectable error to a downgraded uncorrectable error; S5: determining whether the number of currently downgraded uncorrectable errors reaches the threshold of the downgraded uncorrectable error module register; if not, executing S6; if yes, executing step S7; S6: sending a memory downgrade error log to the BMC; executing step S10; S7: physically isolating the faulty memory. S8: Downgrade the catastrophic failure to a lower-level catastrophic failure; S9: Determine if the number of lower-level catastrophic failures reaches the threshold of the lower-level catastrophic failure module register; if not, execute S6 to send a memory degradation error log to the BMC; if yes, execute S7 to isolate the faulty memory. S10: After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
[0159] The method, apparatus, device, and medium for handling memory error-induced crashes according to the present invention are the units and algorithm steps of various examples described in conjunction with the embodiments disclosed herein. They can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described in terms of functionality in the above description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of the present invention.
[0160] Although the present invention has been described in detail with reference to the accompanying drawings and preferred embodiments, the invention is not limited thereto. Various equivalent modifications or substitutions can be made to the embodiments of the invention by those skilled in the art without departing from the spirit and essence of the invention, and such modifications or substitutions should all be within the scope of the invention. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the invention should also be covered within the protection scope of the invention. Therefore, the protection scope of the invention should be determined by the scope of the claims.
Claims
1. A method for handling system crashes caused by memory errors, characterized in that, Includes the following steps: Detect memory errors and distinguish error types; determine whether the error type is a correctable memory error. If so, send a fault message to the BMC and record the fault in the fault log; otherwise, downgrade the current memory error. Determine whether the number of memory errors after downgrading reaches the corresponding module register threshold; If so, physically isolate the faulty memory. Otherwise, send a memory degradation error log to the BMC; When the memory error type is an uncorrectable error, the uncorrectable error is downgraded to a downgraded uncorrectable error; it is determined whether the number of downgraded uncorrectable errors reaches the threshold of the downgraded uncorrectable error module register; if not, the following steps are executed: send the memory downgrade error log to the BMC; if yes, the following steps are executed: physically isolate the faulty memory. When the memory error type is a catastrophic failure, the catastrophic failure is downgraded to a downgraded catastrophic failure; it is determined whether the number of downgraded catastrophic failures reaches the threshold of the downgraded catastrophic failure module register; if not, the following steps are executed: send the memory downgrade error log to the BMC; if yes, the following steps are executed: isolate the faulty memory. The procedure for handling memory degradation errors is set in the correctable machine check interrupt code within the operating system kernel; Set the interrupt type for correctable memory errors to correctable machine check interrupt; configure the data parsing function for the machine check library in the correctable machine check interrupt handling; obtain the correctable machine check interrupt and handle the memory error through the program that handles memory degradation errors; The specific faulty memory address and error type are obtained through the data parsing function of the machine verification library by the correctable machine check interrupt; if the error type is a downgrade error, the following steps are executed: send the memory downgrade error log to the BMC; if the error type is a memory correctable error, the following steps are executed: send the fault information to the BMC and record the fault log.
2. The method for handling system crashes caused by memory errors according to claim 1, characterized in that, The steps following sending the memory degradation error log to the BMC include: After receiving the log, the BMC obtains the memory location based on the faulty memory address and outputs a prompt message.
3. The method for handling system crashes caused by memory errors according to claim 1, characterized in that, The steps for isolating faulty memory include: Obtain memory information of the faulty memory; Send a memory isolation message, which carries the memory information that needs to be isolated and isolation information; The memory information requiring isolation and the isolation information in the memory isolation message are analyzed. Based on the analysis results, an isolation command is sent, and hardware configuration is performed according to the isolation command to isolate the faulty memory.
4. The method for handling system crashes caused by memory errors according to claim 3, characterized in that, The steps to obtain information about faulty memory based on memory error messages include: Send a command to retrieve memory information based on the memory error message; In response to the instruction to obtain memory information, determine the first address of the preset string that represents memory information; A preset address range is generated based on the first address and the preset address offset information; Read the preset string stored in the preset address range; Based on the preset string, determine the memory information targeted by the instruction to obtain memory information; Return the determined memory information.
5. A device for handling system crashes caused by memory errors, characterized in that, The apparatus for performing the method according to any one of claims 1-4 includes a detection module, a type determination module, a sending module, a degradation processing module, a quantity determination module, and an isolation processing module; The detection module is used to detect memory errors and distinguish the error type; The type determination module is used to determine whether the error type is a memory-correctable error; The sending module is used to send fault information to the BMC and record fault logs. The degradation processing module is used to degrade the current memory error. The quantity judgment module is used to determine whether the number of memory errors after degradation has reached the threshold of the corresponding module register; The isolation module is used to physically isolate faulty memory.
6. An electronic device, characterized in that, The electronic device includes: at least one processor; and a memory communicatively connected to the at least one processor; the memory stores computer program instructions executable by the at least one processor, the computer program instructions being executed by the at least one processor to enable the at least one processor to perform the problem handling method for memory error-induced crash as described in any one of claims 1 to 4.
7. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores computer instructions that cause the computer to execute the problem-solving method for memory error-induced crashes as described in any one of claims 1 to 4.