Discharge protection circuit and display device

Abstract

The present application belongs to the field of display, and specifically relates to a discharge protection circuit and a display device. The discharge protection circuit includes: a D flip-flop, a switch unit, a discharge control unit, and a discharge resistor. The D flip-flop includes a data input terminal, a control input terminal, a Q output terminal, and a Q non-output terminal. The data input terminal and the control input terminal are both connected to a control board. The control terminal of the switch unit is connected to one of the Q output terminal and the Q non-output terminal. The first terminal of the switch unit is connected to at least a portion of a plurality of GOA signal lines. The control terminal of the discharge control unit is connected to another of the Q output terminal and the Q non-output terminal. The first terminal of the discharge control unit is connected to the second terminal of the switch unit, and the second terminal of the discharge control unit is connected to the discharge resistor. When the display is shut down, the D flip-flop responds to a control signal from the control board to control the switch unit and the discharge control unit to turn on simultaneously, and connects the GOA signal line to the ground terminal through the discharge resistor, thereby preventing excessive inrush current from damaging electronic components during shutdown.

Description

Technical Field

[0001] The present application belongs to the field of display, and specifically relates to a discharge protection circuit and a display device. Background Art

[0002] A liquid crystal display (LCD) consists of an array substrate and an opposing substrate, which are arranged in a cell-like configuration. Thin-film transistors (TFTs) are mounted on the array substrates. Signals and voltages from the TFTs on the array substrates control the rotation of liquid crystal molecules in the liquid crystal layer, which in turn, react to the polarization of incident light to display images.

[0003] Liquid crystal displays can use gate driver on array (GOA) technology to drive the pixel array. When the GOA circuit provides a gate drive signal to the corresponding gate line, all TFTs connected to the gate line are switched on. Each pixel on that gate line receives a display signal from its corresponding data line, thereby controlling the rotation direction of the liquid crystal molecules to achieve pixel display. Using a GOA circuit instead of a gate driver chip can reduce the manufacturing cost of display devices.

[0004] When LCDs using GOA technology are turned off, to prevent in-plane charge from being trapped, they must open the in-plane TFTs for discharge. Specifically, the GOA signal voltage is raised and then lowered during shutdown. However, raising the GOA signal voltage causes the high-level signal surge current generated by the power supply chip to be excessive, potentially damaging electronic components. Furthermore, the high-level signal output duration during shutdown is relatively short, and the GOA circuit's drive signal output duration is also relatively short, resulting in insufficient in-plane TFT discharge. This can lead to anomalies such as screen ghosting, slow shutdown, and afterimages during shutdown. Summary of the Invention

[0005] The purpose of the present application is to provide a discharge protection circuit and a display device to prevent damage to electronic components caused by excessive surge current during shutdown.

[0006] In order to achieve the above object, the present application provides a discharge protection circuit, including a discharge resistor, wherein the discharge resistor is connected to a ground terminal, and the discharge protection circuit includes:

[0007] A D flip-flop, the D flip-flop comprising a data input terminal, a control input terminal, a Q output terminal and a Q non-output terminal, the data input terminal and the control input terminal both being connected to a control board;

[0008] a switch unit, the switch unit comprising a control end, a first end, and a second end, the control end of the switch unit being connected to one of the Q output end and the Q non-output end, and the first end of the switch unit being connected to at least part of the plurality of GOA signal lines;

[0009] A discharge control unit, the discharge control unit comprising a control end, a first end, and a second end, the control end of the discharge control unit being connected to the other of the Q output end and the Q non-output end, the first end of the discharge control unit being connected to the second end of the switch unit, and the second end of the discharge control unit being connected to the discharge resistor.

[0010] Optionally, the D trigger includes a falling edge D trigger.

[0011] Optionally, the control end of the switch unit is connected to the Q output end, and the control end of the discharge control unit is connected to the Q non-output end.

[0012] Optionally, the discharge protection circuit further includes a comparison unit, which includes a first input terminal, a second input terminal and an output terminal, the first input terminal of the comparison unit is connected to the Q non-output terminal, the second input terminal of the comparison unit is connected to a reference power line, the reference power line voltage is less than the Q non-output terminal voltage, and the comparison unit outputs a high-level signal to the discharge control unit.

[0013] Optionally, the multiple GOA signal lines include multiple clock signal lines, multiple low-frequency clock signal lines and a frame start signal line.

[0014] Optionally, the switching unit includes multiple switching transistors, all of which are N-type transistors, the number of the switching transistors corresponds one-to-one to the number of the GOA signal lines, the control ends of the switching transistors are all connected to the Q output end, the first end of the switching transistor is correspondingly connected to one of the GOA signal lines, and the second end of the switching transistor is connected to the first end of the discharge control unit.

[0015] Optionally, the switching unit includes m-1 switching transistors, where m is the number of the GOA signal lines, and all the switching transistors are N-type transistors;

[0016] The control ends of the m-1 switching transistors are all connected to the Q output end, the first ends of the m-1 switching transistors are connected one-to-one with the m-1 GOA signal lines, and among the m-1 switching transistors: the first end of the latter switching transistor and the second end of the previous switching transistor are cascaded in sequence, and the second end of the m-1th switching transistor and the mth GOA signal line are connected to the first end of the discharge control unit.

[0017] Optionally, the discharge protection circuit further includes a control resistor, wherein the control resistor is connected to the data input terminal and the control board, and the control resistor is a variable resistor.

[0018] Optionally, the discharge resistor is a variable resistor.

[0019] The present application also provides a display device, comprising:

[0020] The discharge protection circuit;

[0021] Display panel, including GOA circuit;

[0022] The control board includes a ground terminal, a power management chip and a level conversion chip. The power management chip is connected to the D trigger of the discharge protection circuit, and the ground terminal is connected to the discharge resistor of the discharge protection circuit.

[0023] The discharge protection circuit and display device disclosed in this application have the following beneficial effects:

[0024] In the present application, the data input and control input of a D flip-flop are both connected to a control board, the control end of a switch unit is connected to one of a Q output end and a Q non-output end, the first end of the switch unit is connected to at least a portion of a plurality of GOA signal lines, the control end of a discharge control unit is connected to the other of the Q output end and the Q non-output end, the first end of the discharge control unit is connected to the second end of the switch unit, the second end of the discharge control unit is connected to a discharge resistor, and the discharge resistor is connected to a ground terminal of the control board. When the display device is turned off, the D flip-flop responds to a control signal from the control board to control the switch unit and the discharge control unit to turn on simultaneously, connecting the GOA signal line to the ground terminal through the discharge resistor, thereby preventing damage to electronic components from excessive inrush current during shutdown.

[0025] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by practice of the present application.

[0026] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0028] Figure 1It is a structural diagram of the discharge protection circuit in Example 1 of the present application.

[0029] Figure 2 It is a structural diagram of the discharge protection circuit in Example 1 of the present application.

[0030] Figure 3 It is a structural diagram of the display device in Example 1 of the present application.

[0031] Description of reference numerals:

[0032] 100, discharge protection circuit; 110, D flip-flop; 111, data input terminal; 112, control input terminal; 113, Q output terminal; 114, Q non-output terminal; 120, switch unit; 121, switch transistor; 130, discharge control unit; 140, discharge resistor; 150, reference power line; 160, comparison unit; 170, control resistor;

[0033] 200, control board; 210, ground terminal; 220, power management chip; 230, level conversion chip;

[0034] 300, display panel; 310, GOA circuit;

[0035] 400, Chip-on-film; 500, GOA signal line. DETAILED DESCRIPTION

[0036] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0037] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0038] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0039] Example 1

[0040] See also Figure 1 As shown, the discharge protection circuit 100 in this embodiment includes a D flip-flop 110, a switch unit 120, a discharge control unit 130 and a discharge resistor 140. The D flip-flop 110 includes a data input terminal 111 (i.e., D terminal), a control input terminal 112, a Q output terminal 113 (i.e., Q terminal) and a Q non-output terminal 114 (i.e., The data input terminal 111 and the control input terminal 112 of the D flip-flop 110 are both connected to the control board 200.

[0041] Switch unit 120 includes a control terminal, a first terminal, and a second terminal. The control terminal of switch unit 120 is connected to one of Q output terminal 113 and Q non-output terminal 114, and the first terminal of switch unit 120 is connected to at least a portion of multiple GOA signal lines 500. Discharge control unit 130 includes a control terminal, a first terminal, and a second terminal. The control terminal of discharge control unit 130 is connected to the other of Q output terminal 113 and Q non-output terminal 114, the first terminal of discharge control unit 130 is connected to the second terminal of switch unit 120, and the second terminal of discharge control unit 130 is connected to discharge resistor 140. Discharge resistor 140 is connected to ground terminal 210 of control board 200.

[0042] The D flip-flop 110 is used to respond to the control signal of the control input terminal 112 and output the data input terminal 111 signal to the Q output terminal 113, that is, Q=D; the signal of the Q non-output terminal 114 is the inverted signal of the data input terminal 111 signal, that is, For example, the D flip-flop 110 responds to the control signal of the control input terminal 112 and outputs the data input terminal 111 signal to the Q output terminal 113 , the data input terminal 111 signal is a high level signal, and the Q non-output terminal 114 signal is a low level signal.

[0043] The discharge protection circuit 100 is used in a display device. When the display device is turned off: the control board 200 outputs a control signal to the control input terminal 112 of the D flip-flop 110, the Q output terminal 113 of the D flip-flop 110 will output the data input terminal 111 signal and the Q non-output terminal 114 will output the inverted signal of the data input terminal 111 signal, the switch unit 120 responds to the Q output terminal 113 (or Q non-output terminal 114) signal to turn on, and outputs the GOA signal line 500 signal to the first end of the discharge control unit 130; at the same time, the discharge control unit 130 responds to the Q non-output terminal 114 (or Q output terminal 113) signal to turn on, and connects the GOA signal line 500 to the ground terminal 210 through the discharge resistor 140.

[0044] When a display device using GOA technology is turned off, to prevent the in-plane charge from being discharged, the in-plane TFTs must be opened for discharge. Specifically, the GOA signal voltage is raised and then lowered during shutdown. However, raising the GOA signal voltage causes the high-level signal generated by the power chip to generate excessive surge current, damaging electronic components. Furthermore, the high-level signal output time during shutdown is relatively short, and the GOA circuit's drive signal output time is also short, resulting in insufficient discharge of the in-plane TFTs. This can lead to abnormalities such as screen ghosting, slow shutdown, and afterimages during shutdown.

[0045] In this embodiment, the data input terminal 111 and the control input terminal 112 of the D flip-flop 110 are both connected to the control board 200. The control terminal of the switch unit 120 is connected to one of the Q output terminal 113 and the Q non-output terminal 114. The first terminal of the switch unit 120 is connected to at least a portion of the plurality of GOA signal lines 500. The control terminal of the discharge control unit 130 is connected to the other of the Q output terminal 113 and the Q non-output terminal 114. The first terminal of the discharge control unit 130 is connected to the second terminal of the switch unit 120. The second terminal of the discharge control unit 130 is connected to the discharge resistor 140, and the discharge resistor 140 is connected to the ground terminal 210 of the control board 200. When the display device is turned off, the D flip-flop 110 responds to a control signal from the control board 200 to simultaneously turn on the switch unit 120 and the discharge control unit 130, connecting the GOA signal line 500 to the ground terminal 210 through the discharge resistor 140. This prevents damage to electronic components due to excessive inrush current during shutdown.

[0046] In addition, the GOA signal line 500 and the discharge resistor 140 discharge the ground terminal 210, so that the in-plane TFT can be fully discharged, thereby suppressing or eliminating abnormalities such as screen ghosting, slow shutdown, and afterimage when shutting down.

[0047] See also Figure 1 As shown, the D flip-flop 110 includes a falling-edge D flip-flop 110. The data input terminal 111 and the control input terminal 112 of the D flip-flop 110 are both connected to the control board 200. The control board 200 includes a power management chip 220. The data input terminal 111 and the control input terminal 112 of the D flip-flop 110 can be connected to the power management chip 220. Before the display device is turned off, the signal at the control input terminal 112 is a high-level signal. When the display device is turned off, the signal at the control input terminal 112 jumps to a low-level signal under the control of the power management chip 220. The Q output terminal 113 of the D flip-flop 110 will output the signal at the data input terminal 111, and the Q negative output terminal 114 will output the inverted signal of the signal at the data input terminal 111.

[0048] The D flip-flop 110 is a falling-edge D flip-flop 110. When the display device is turned off, the signal at the control input terminal 112 jumps to a low-level signal. The D flip-flop 110 controls the switch unit 120 and the discharge control unit 130 to be turned on simultaneously through the Q output terminal 113 and the Q non-output terminal 114. Compared with the solution of controlling the switch unit 120 and the discharge control unit 130 separately, the control method is simpler and the control synchronization is better.

[0049] It should be noted that the D flip-flop 110 may be a falling-edge D flip-flop 110 , but is not limited thereto. The D flip-flop 110 may be a rising-edge D flip-flop 110 or a level D flip-flop 110 , etc., depending on the specific situation.

[0050] See also Figure 1 As shown, the control terminal of the switch unit 120 is connected to the Q output terminal 113, and the control terminal of the discharge control unit 130 is connected to the Q non-output terminal 114. The D flip-flop 110 is a falling-edge D flip-flop 110. When the display device is turned off, the signal at the control input terminal 112 jumps to a low-level signal, the signal at the Q output terminal 113 is the signal at the data input terminal 111, that is, a high-level signal, and the signal at the Q non-output terminal 114 is the inverted signal of the signal at the data input terminal 111, that is, a low-level signal. The switch unit 120 includes multiple transistors, and the discharge control unit 130 includes one transistor. The multiple transistors controlled by the Q output terminal 113 signal are N-type transistors, and the one transistor controlled by the Q output terminal 113 signal is a P-type transistor.

[0051] The control end of the switch unit 120 is connected to the Q output end 113, and the control end of the discharge control unit 130 is connected to the Q non-output end 114. The multiple transistors of the switch unit 120 can be N-type transistors, and one transistor of the discharge control unit 130 is a P-type transistor. The manufacturing cost of N-type transistors is lower. Such a design can reduce the manufacturing cost of the discharge protection circuit 100.

[0052] See also Figure 1 As shown, the discharge protection circuit 100 further includes a comparison unit 160. The comparison unit 160 includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of the comparison unit 160 is connected to the Q non-output terminal 114, and the second input terminal of the comparison unit 160 is connected to the reference power line 150. The voltage of the reference power line 150 is Vref, and the voltage Vref of the reference power line 150 can be configured to always be less than the voltage of the Q non-output terminal 114. The comparison unit 160 outputs a high-level signal to the discharge control unit 130. The discharge control unit 130 is turned on in response to the high-level signal output by the comparison unit 160. The comparison unit 160 may include a comparator.

[0053] The discharge protection circuit 100 further includes a comparison unit 160 , which outputs a high-level signal to the discharge control unit 130 . The discharge control unit 130 is turned on in response to the high-level signal output by the comparison unit 160 . With this design, the discharge control unit 130 can use an N-type transistor, thereby reducing the manufacturing cost of the discharge protection circuit 100 .

[0054] It should be noted that comparison unit 160 may be a comparator, but is not limited thereto. Comparison unit 160 may also be an operational amplifier, depending on the specific circumstances. The voltage of reference power line 150 may be less than the voltage of Q non-output terminal 114, but is not limited thereto. The voltage of reference power line 150 may also be greater than the voltage of Q non-output terminal 114, and comparison unit 160 may output a low-level signal, depending on the specific circumstances.

[0055] In addition, the discharge protection circuit 100 may include a comparison unit 160, and the high-level signal output by the comparison unit 160 controls the discharge control unit 130 to turn on, but is not limited thereto. The discharge protection circuit 100 may also include an inverter, which converts the low-level signal of the Q non-output terminal 114 into a high-level signal to control the discharge control unit 130 to turn on, and the specific situation may be determined.

[0056] See also Figure 1 As shown, the multiple GOA signal lines 500 include multiple clock signal lines, multiple low-frequency clock signal lines, and a frame start signal line. The clock signal line transmits the clock signal CK, the low-frequency clock signal line transmits the low-frequency clock signal LC, and the frame start signal line transmits the frame start signal STV. In addition, the multiple GOA signal lines 500 may also include a reset signal line, a high-level signal line, and a low-level signal line, etc., depending on the specific situation. The level shift chip 230 (Level shift IC) generates scan drive signals such as the clock signal CK, the low-frequency clock signal LC, and the frame start signal STV, and outputs the scan drive signals to the GOA circuit 310 of the display panel 300 through the GOA signal line 500. The GOA circuit 310 generates a scan signal based on the scan drive signal to drive the in-plane TFT.

[0057] The multiple GOA signal lines 500 include multiple clock signal lines, multiple low-frequency clock signal lines and a frame start signal line. When the display device is turned off, the multiple GOA signal lines 500 are all connected to the ground through the discharge resistor 140, and no large current is generated while fully discharging the TFTs in the surface.

[0058] See also Figure 1 As shown, the switch unit 120 includes m-1 switch transistors 121, where m is the number of the GOA signal lines 500, and the switch transistors 121 are all N-type transistors.

[0059] The control terminals of the m-1 switching transistors 121 are all connected to the Q output terminal 113, and the first terminals of the m-1 switching transistors 121 are connected in a one-to-one correspondence with the m-1 GOA signal lines 500. Among the m-1 switching transistors 121, the first terminal of the subsequent switching transistor 121 and the second terminal of the previous switching transistor 121 are cascaded in sequence, and the second terminal of the m-1th switching transistor 121 and the mth GOA signal line 500 are connected to the first terminal of the discharge control unit 130.

[0060] m-1 switch transistors 121 are cascaded in sequence, and the m-1 switch transistors 121 can control the discharge of m GOA signal lines 500. Using one less switch transistor 121 can reduce the manufacturing cost of the discharge protection circuit 100 to a certain extent.

[0061] See also Figure 1 As shown, the discharge protection circuit 100 further includes a control resistor 170 . The control resistor 170 is connected to the data input terminal 111 and the control board 200 . The control resistor 170 is a variable resistor.

[0062] The control resistor 170 is a variable resistor. By adjusting the resistance value of the control resistor 170, the voltage of the data input terminal 111 can be adjusted, thereby controlling the opening degree of the switching transistor 121, and further controlling the discharge current to avoid excessive discharge current from damaging electronic components.

[0063] See also Figure 1 As shown, the discharge resistor 140 is a variable resistor.

[0064] The discharge resistor 140 is a variable resistor. By adjusting the resistance value of the discharge resistor 140 , the magnitude of the discharge current to ground can be adjusted to prevent the electronic components from being damaged by excessive discharge current.

[0065] Example 2

[0066] The difference between the second embodiment and the first embodiment is that the switch unit 120 is different.

[0067] See also Figure 2 As shown, in this embodiment, the switch unit 120 includes a plurality of switch transistors 121, each of which is an N-type transistor. The number of switch transistors 121 corresponds to the number of GOA signal lines 500. The control terminals of the switch transistors 121 are all connected to the Q output terminal 113. The first terminals of the switch transistors 121 are connected to a corresponding GOA signal line 500, and the second terminals of the switch transistors 121 are connected to the first terminal of a discharge control unit 130.

[0068] The first end of the switching transistor 121 is connected to a GOA signal line 500, and the second end of the switching transistor 121 is connected to the first end of a discharge control unit 130. With this design, the current of each switching transistor 121 during discharge is the same or similar, and all switching transistors 121 can use the same specifications, thereby reducing the manufacturing cost of the discharge protection circuit 100.

[0069] Example 3

[0070] See also Figure 3 As shown, the display device includes a discharge protection circuit 100, a control board 200, and a display panel 300. The display device may further include a chip-on-film 400, through which the control board 200 and the display panel 300 may be connected.

[0071] The discharge protection circuit 100 includes the discharge protection circuit 100 disclosed in the first and second embodiments. The discharge protection circuit 100 can be provided on the control board 200 or the display panel 300. The display panel 300 includes a GOA circuit 310. The control board 200 may include a ground terminal 210, a power management chip 220, and a level shifter chip 230. The ground terminal 210 is connected to the discharge resistor 140. The power management chip 220 is connected to the data input terminal 111 and the control input terminal 112 of the D flip-flop 110. The level shifter chip 230 is connected to the GOA circuit 310 via a GOA signal line 500.

[0072] The display device includes a discharge protection circuit 100. In the discharge protection circuit 100, a data input terminal 111 and a control input terminal 112 of a D flip-flop 110 are both connected to a control board 200. A control terminal of a switch unit 120 is connected to one of a Q output terminal 113 and a Q non-output terminal 114. A first terminal of the switch unit 120 is connected to at least a portion of a plurality of GOA signal lines 500. A control terminal of a discharge control unit 130 is connected to another of the Q output terminal 113 and the Q non-output terminal 114. A first terminal of the discharge control unit 130 is connected to a second terminal of the switch unit 120. A second terminal of the discharge control unit 130 is connected to a discharge resistor 140, which is connected to a ground terminal 210 of the control board 200. When the display device is shut down, the D flip-flop 110 responds to a control signal from the control board 200 to simultaneously turn on the switch unit 120 and the discharge control unit 130, connecting the GOA signal line 500 to the ground terminal 210 via the discharge resistor 140. This prevents excessive inrush current from damaging electronic components during shutdown.

[0073] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified with "first," "second," etc., may explicitly or implicitly include one or more of such features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0074] In this application, unless otherwise specified or limited, terms such as "assembly" and "connection" should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0075] In the description of this specification, the reference terms "some embodiments", "exemplarily", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0076] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent application.

Claims

1. A discharge protection circuit, comprising a discharge resistor, wherein the discharge resistor is connected to a ground terminal, wherein: include: A D flip-flop, the D flip-flop comprising a data input terminal, a control input terminal, a Q output terminal and a Q non-output terminal, the data input terminal and the control input terminal both being connected to a control board; a switch unit, the switch unit comprising a control end, a first end, and a second end, the control end of the switch unit being connected to one of the Q output end and the Q non-output end, and the first end of the switch unit being connected to at least part of the plurality of GOA signal lines; A discharge control unit, the discharge control unit comprising a control end, a first end, and a second end, the control end of the discharge control unit being connected to the other of the Q output end and the Q non-output end, the first end of the discharge control unit being connected to the second end of the switch unit, and the second end of the discharge control unit being connected to the discharge resistor.

2. The discharge protection circuit according to claim 1, characterized in that: The D flip-flop includes a falling-edge D flip-flop.

3. The discharge protection circuit according to claim 1, wherein: The control end of the switch unit is connected to the Q output end, and the control end of the discharge control unit is connected to the Q non-output end.

4. The discharge protection circuit according to claim 3, characterized in that: The discharge protection circuit further includes a comparison unit, which includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of the comparison unit is connected to the Q non-output terminal, and the second input terminal of the comparison unit is connected to a reference power line. The voltage of the reference power line is less than the voltage of the Q non-output terminal. The comparison unit outputs a high-level signal to the discharge control unit.

5. The discharge protection circuit according to claim 1, characterized in that: The multiple GOA signal lines include multiple clock signal lines, multiple low-frequency clock signal lines and one frame start signal line.

6. The discharge protection circuit according to claim 5, characterized in that: The switching unit includes a plurality of switching transistors, all of which are N-type transistors. The number of the switching transistors corresponds one-to-one to the number of the GOA signal lines. The control ends of the switching transistors are all connected to the Q output end. The first end of the switching transistor is correspondingly connected to one of the GOA signal lines, and the second end of the switching transistor is connected to the first end of one of the discharge control units.

7. The discharge protection circuit according to claim 5, characterized in that: The switch unit includes m-1 switch transistors, where m is the number of the GOA signal lines, and the switch transistors are all N-type transistors; The control ends of the m-1 switching transistors are all connected to the Q output end, the first ends of the m-1 switching transistors are connected one-to-one with the m-1 GOA signal lines, and among the m-1 switching transistors: the first end of the latter switching transistor and the second end of the previous switching transistor are cascaded in sequence, and the second end of the m-1th switching transistor and the mth GOA signal line are connected to the first end of the discharge control unit.

8. The discharge protection circuit according to claim 1, characterized in that: The discharge protection circuit further includes a control resistor, which is connected to the data input terminal and the control board, and is a variable resistor.

9. The discharge protection circuit according to claim 8, characterized in that: The discharge resistor is a variable resistor.

10. A display device, characterized in that: include: The discharge protection circuit according to any one of claims 1 to 9; Display panel, including GOA circuit; The control board includes a ground terminal, a power management chip and a level conversion chip. The power management chip is connected to the D trigger of the discharge protection circuit, and the ground terminal is connected to the discharge resistor of the discharge protection circuit.

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