Display panel and wearable device

Abstract

The application discloses a display panel and a wearable device. The display panel has a display area and a non-display area surrounding the display area. The non-display area includes a first sub-non-display area and a second sub-non-display area. The display panel includes: a display array in the display area, having multiple rows of sub-pixels arranged in sequence in a first direction; the first direction is perpendicular to the row direction of the sub-pixels and parallel to the plane in which the display panel lies; the first sub-non-display area and the second sub-non-display area are respectively located on both sides of a first diameter of the display area; a driving circuit, having a first part of the driving circuit located in the first sub-non-display area and a second part of the driving circuit located in the second sub-non-display area; the first diameter has a first end and a second end; at the first end, there is a gap area between the first part of the driving circuit and the second part of the driving circuit; a light-taking through hole is at least partially located in the gap area; at the second end, the non-display area has a binding area for fixedly connecting a control chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display devices, and more particularly, to a display panel and a wearable device. BACKGROUND

[0002] With the continuous development of science and technology, more and more display devices are widely used in people's daily life and work, which brings great convenience to people's daily life and work and becomes an indispensable important tool for people today.

[0003] At present, the wearable device with display function is a mainstream development direction of display devices. Limited by the wearable application scene, the size of the display panel in the wearable device is generally small. In the wearable device, due to the small size of the display panel, the design scheme of the conventional under-screen camera, the light collecting through hole required by the camera will occupy a large area of the display area, affecting the display effect. SUMMARY

[0004] Therefore, the present application provides a display panel and a wearable device, and the scheme is as follows:

[0005] A display panel, the display panel has a display area and a non-display area surrounding the display area, the display area is circular, and the non-display area includes a first sub-non-display area and a second sub-non-display area, the display panel includes:

[0006] a display array located in the display area, having a plurality of rows of sub-pixels arranged in a first direction; the first direction is perpendicular to the row direction of the sub-pixels and parallel to the plane of the display panel; the first sub-non-display area and the second sub-non-display area are respectively located on both sides of a first diameter of the display area, and the first diameter is parallel to the first direction;

[0007] a driving circuit having a first part driving circuit located in the first sub-non-display area and a second part driving circuit located in the second sub-non-display area; the first diameter has a first end and a second end; at the first end, there is a gap region between the first part driving circuit and the second part driving circuit;

[0008] a light collecting through hole, the light collecting through hole is at least partially located in the gap region;

[0009] wherein, at the second end, the non-display area has a binding area for fixedly connecting a control chip.

[0010] The display panel provided by the technical scheme has at least part of the light collecting through hole located in the gap region between the first part of the driving circuit and the second part of the driving circuit, the light collecting through hole can utilize the redundant region between the first part of the driving circuit and the second part of the driving circuit, thereby reducing the area occupation of the light collecting through hole on the display area, reducing the influence of the light collecting through hole on the display area, reducing the loss of the sub-pixels in the display area, and improving the display quality.

[0011] The application further provides a wearable device comprising the display panel.

[0012] The wearable device provided by the technical scheme utilizes the redundant region of the first part of the driving circuit and the second part of the driving circuit, thereby reducing the area occupation of the light collecting through hole on the display area, reducing the influence of the light collecting through hole on the display area, reducing the loss of the sub-pixels in the display area, and improving the display quality. BRIEF DESCRIPTION OF DRAWINGS

[0013] In order to more clearly illustrate the technical scheme in the embodiments of the present application or the related art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only embodiments of the present application, and those skilled in the art can obtain other drawings according to the provided drawings without creative labor.

[0014] The structures, proportions, sizes, etc. shown in the drawings of the present specification are only used to cooperate with the content disclosed in the specification, to enable those skilled in the art to understand and read, and are not used to limit the conditions that can be implemented by the present application, so they do not have technical significance. Any modification of structure, change of proportion relationship or adjustment of size, which does not affect the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed by the present application.

[0015] Figure 1 A structural schematic diagram of a display panel provided by an embodiment of the present application is shown in the figure;

[0016] Figure 2 A layout mode schematic diagram of a first signal line in a display panel provided by an embodiment of the present application is shown in the figure;

[0017] Figure 3 Another layout mode schematic diagram of a first signal line in a display panel provided by an embodiment of the present application is shown in the figure;

[0018] Figure 4 Still another layout mode schematic diagram of a first signal line in a display panel provided by an embodiment of the present application is shown in the figure;

[0019] Figure 5A section view of a display panel in a display area is provided for an embodiment of the present application.

[0020] Figure 6 A schematic diagram of a pixel circuit is provided for an embodiment of the present application.

[0021] Figure 7 A layout principle schematic diagram of a light collecting via in a display panel is provided for an embodiment of the present application.

[0022] Figure 8 Another layout principle schematic diagram of a light collecting via in a display panel is provided for an embodiment of the present application.

[0023] Figure 9 Still another layout principle schematic diagram of a light collecting via in a display panel is provided for an embodiment of the present application.

[0024] Figure 10 A section view of a display panel in a display area is provided for an embodiment of the present application. Figure 9 A section view in a P-P' direction is provided for an embodiment of the present application.

[0025] Figure 11 Still another layout principle schematic diagram of a light collecting via in a display panel is provided for an embodiment of the present application.

[0026] Figure 12 A layout principle schematic diagram of a light collecting via and a first signal line in a display panel is provided for an embodiment of the present application.

[0027] Figure 13 A layout principle schematic diagram of a first power signal line in a display panel is provided for an embodiment of the present application.

[0028] Figure 14 A section view of a display panel in a light collecting via area is provided for an embodiment of the present application.

[0029] Figure 15 A structure schematic diagram of a wearable device is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0030] The embodiments of the present application will be described in detail with reference to the drawings, obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of the present application.

[0031] In order to make the above purposes, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail with reference to the drawings and specific embodiments.

[0032] Reference Figure 1 is shown,Figure 1 A structural schematic diagram of a display panel is provided in an embodiment of the present application. The display panel has a display area AA and a non-display area BB surrounding the display area AA. The display area AA is circular, and the non-display area BB includes a first sub-non-display area BB1 and a second sub-non-display area BB2.

[0033] As shown in the structural schematic diagram of the display panel, the display panel includes: Figure 1

[0034] a display array 10 located in the display area AA. The display array 10 has a plurality of rows of sub-pixels 101 arranged in a first direction Y. The first direction Y is perpendicular to the row direction of the sub-pixels 101 and parallel to the plane on which the display panel is located. The first sub-non-display area BB1 and the second sub-non-display area BB2 are located on the two sides of a first diameter of the display area AA, respectively. The first diameter is parallel to the first direction Y.

[0035] a driving circuit 11. The driving circuit 11 has a first part driving circuit 111 located in the first sub-non-display area BB1 and a second part driving circuit 112 located in the second sub-non-display area BB2. The first diameter has a first end and a second end. At the first end, there is a gap region between the first part driving circuit 111 and the second part driving circuit 112.

[0036] a light collecting through hole 15. The light collecting through hole 15 is at least partially located in the gap region 12.

[0037] At the second end, the non-display area BB has a binding area 13 for fixedly connecting a control chip 14.

[0038] Since the first diameter is parallel to the first direction Y, it passes through the center of the display area AA and is parallel to the first direction Y. Figure 1 The first diameter is shown by a dashed line in the structural schematic diagram. The straight line L on which the first diameter is located divides the display area AA into two semicircular sub-display areas and divides the non-display area BB into the first sub-non-display area BB1 and the second sub-non-display area BB2. The first sub-non-display area BB1 and the second sub-non-display area BB2 surround the two semicircular sub-display areas, respectively.

[0039] In the display panel provided in the embodiment of the present application, at least part of the light collecting through hole 15 is located in the gap region 12 between the first part driving circuit 111 and the second part driving circuit 112. The light collecting through hole 15 can utilize the redundant region between the first part driving circuit 111 and the second part driving circuit 112, thereby reducing the area occupation of the light collecting through hole 15 on the display area AA, reducing the influence of the light collecting through hole 15 on the display area AA, and improving the display quality.

[0040] ​The binding area 13 is connected to an integral foldable area 16 on one side of the display area AA. The binding area 13 can be folded to the side of the display panel away from the display surface based on the foldable area 16, so as to reduce the frame width of the display panel at the second end.

[0041] In the embodiments of the present application, the first part driving circuit 111 and the second part driving circuit 112 each include a plurality of cascaded VSRs (shift registers). One of the first part driving circuit 111 and the second part driving circuit 112 can be connected to the odd-numbered rows of the sub-pixels 101, and the other can be connected to the even-numbered rows of the sub-pixels 101. In this way, the driving circuit 11 is divided into two parts and arranged in the first sub-non-display area BB1 and the second sub-non-display area BB2, respectively, so as to reduce the frame width of the non-display area BB. Each row of the sub-pixels 101 is connected to a corresponding shift register through a scanning signal line (not shown in the figure). Figure 1

[0042] Optionally, the driving circuit 11 scans each row of the sub-pixels 101 one by one based on a set timing sequence. The control chip 14 is connected to the first part driving circuit 111 and the second part driving circuit 112, respectively, to control the driving circuit 11 to scan each row of the sub-pixels 101 one by one.

[0043] In some embodiments of the present application, if the width of the non-display area BB is large enough, the light collecting through hole 15 can be theoretically arranged to be completely located in the non-display area BB.

[0044] In actual products, in order to improve the screen-to-body ratio of the display panel, the width of the non-display area BB is small, and in order to ensure that the light collecting through hole 15 has sufficient light transmittance, the peripheral diameter of the light collecting through hole 15 is generally larger than the width of the non-display area BB. Based on this, in the embodiments of the present application, as shown in Figure 1 , a part of the light collecting through hole 15 is located in the display area AA, and the other part is located in the non-display area BB. In this way, in the narrow-frame display panel, a part of the light collecting through hole 15 can be arranged in the gap area 12 between the first part driving circuit 111 and the second part driving circuit 112, so as to reduce the layout space of the light collecting through hole 15 in the display area AA, thereby reducing the loss of the sub-pixels 101 in the display area AA.

[0045] Referring to Figure 2 , the light collecting through hole 15 is arranged in the gap area 12 between the first part driving circuit 111 and the second part driving circuit 112. Figure 2 ​A layout mode schematic diagram of a first signal line in a display panel provided by an embodiment of the present application is shown in FIG. 1. The light taking through hole 15 includes a light taking area 151 and a non-light taking area 152 surrounding the light taking area 151. The display area AA has a plurality of first signal lines 21, and the extension direction of the first signal line 21 is parallel to the row direction. The first signal line 21 includes a first line segment 211 and a second line segment 212 located on the two sides of the light taking through hole 15 respectively. The non-light taking area 152 has an arc-shaped line segment 22 connecting the first line segment 211 and the second line segment 212 of the same first signal line 21.

[0046] Optionally, the diameter range of the outer circle corresponding to the non-light taking area 152 is 3000-4000 μm, and is preferably set to 3500 μm. The diameter range of the inner circle corresponding to the light taking area 151 is 2000-3000 μm, and is preferably set to 2500 μm.

[0047] Figure 2 FIG. 2 is a partial enlarged view of the display panel. In order to facilitate the illustration, Figure 2 The display array 10 in the display area AA and the driving circuit 11 and the control chip 14 structure in the non-display area BB are not shown in FIG. 2.

[0048] In Figure 2 In the mode shown in FIG. 1, the non-light taking area 152 is the frame area of the light taking through hole 15. The non-light taking area 152 can not only be used to form the second packaging structure below to prevent water vapor from invading the inside of the display panel through the light taking area 151, but also be used to set the arc-shaped line segment 22 so that the first signal line 21 can bypass the light taking area 151, facilitating the wiring of the first signal line 21.

[0049] In the embodiment of the present application, the display panel can be an OLED (organic light emitting diode) panel, and the sub-pixel 101 is an OLED, or the display panel is a micro-LED (light emitting diode) panel, and the sub-pixel 101 is a micro-LED. The micro-LED can be a Mini LED or a Micro LED.

[0050] The display area AA has a pixel circuit connected with the sub-pixel 101. The pixel circuit can be a 7T1C (7 transistors and 1 capacitor) pixel circuit, an 8T1C (8 transistors and 1 capacitor) pixel circuit, or a pixel circuit composed of a plurality of transistors and a plurality of capacitors. The implementation mode of the corresponding pixel circuit is not limited in the embodiment of the present application. The pixel circuit is connected with a scanning signal line, a light emitting signal line, a data signal line, and a positive power supply signal line. The driving circuit 11 is connected with the sub-pixel 101 through the scanning signal line.

[0051] The scanning signal line is used to input the scanning signal, the light emission signal line is used to input the light emission signal, and the positive power supply signal line is used to input the DC high voltage PVDD. The extension directions of the scanning signal line and the light emission signal line are parallel to the row direction of the sub-pixel 101. The extension directions of the data signal line and the positive power supply signal line are parallel to the first direction Y.

[0052] The pixel circuits connected to sub-pixels 101 in the same row are connected to the same scan signal line, which is connected to either the first part of the driving circuit 111 or the second part of the driving circuit 112. The first part of the driving circuit 111 and the second part of the driving circuit 112 provide scan signals to the connected pixel circuits through the corresponding scan signal lines to control the switching state of the thin-film transistors in the pixel circuits.

[0053] In this embodiment, the first signal line 21 includes: a scanning signal line whose extension path passes through the opaque area 152, and / or a light-emitting signal line whose extension path passes through the opaque area 152. When the first signal line 21 includes a scanning signal line whose extension path passes through the opaque area 152, the scanning signal line can be wound around the opaque area 152 to connect the two line segments located on both sides of the light-collecting aperture 15. When the first signal line 21 includes a light-emitting signal line whose extension path passes through the opaque area 152, the light-emitting signal line can be wound around the opaque area 152 to connect the two line segments located on both sides of the light-collecting aperture 15.

[0054] In some embodiments of this application, the non-transparent region 152 has a first sub-non-transparent region 152a and a second sub-non-transparent region 152b, the first sub-non-transparent region 152a and the second sub-non-transparent region 152b being located at reference lines ( Figure 2 On both sides of the horizontal dashed line, the reference line is parallel to the row direction and passes through the center of the light-transmitting area 151. At least a portion of the arc-shaped line segment 22 connected by the first signal line 21 is located in the first sub-opaque area 152a, and / or, at least a portion of the arc-shaped line segment 22 connected by the first signal line 21 is located in the second sub-opaque area 152b.

[0055] It should be noted that, in combination Figure 1 and Figure 2 As shown, the portion of the opaque area 152 on the side of the reference line away from the gap region 12 is designated as the second sub-opaque area 152b, and the other portion of the opaque area 152 on the side of the reference line facing the gap region 12 is designated as the first sub-opaque area 152a. Figure 2In the illustrated manner, for the first signal line 21 whose extension path passes through the non-light-transmitting region 152, the arc-shaped line segment 22 connected by each first signal line 21 is located in the second sub-non-light-transmitting region 152b. It should be noted that in the drawings of the embodiments of the present application, the reference line is used to indicate the corresponding regions of the first sub-non-light-transmitting region 152a and the second sub-non-light-transmitting region 152b in the display panel, and there is no visible reference line in the actual display panel.

[0056] Reference Figure 3 As shown, Figure 3 Another layout mode of the first signal line in the display panel provided by the embodiments of the present application is shown in the schematic diagram. In this mode, for the first signal line 21 whose extension path passes through the non-light-transmitting region 152, part of the arc-shaped line segments 22 connected by the first signal line 21 are located in the first sub-non-light-transmitting region 152a, and the other part of the arc-shaped line segments 22 connected by the first signal line 21 are located in the second sub-non-light-transmitting region 152b.

[0057] In other embodiments, for the first signal line 21 whose extension path passes through the non-light-transmitting region 152, the arc-shaped line segments 22 connected by each first signal line 21 are located in the first sub-non-light-transmitting region 152a.

[0058] As Figure 3 shown, when the arc-shaped line segment 22 is located in the first sub-non-light-transmitting region 152a, for the first signal line 21 located on the side of the reference line away from the gap region 12, the two ends of the arc-shaped line segment 22 need to be extended to the second sub-non-light-transmitting region 152b to connect the first line segment 211 and the second line segment 212, respectively.

[0059] Similarly, when the arc-shaped line segment 22 is located in the second sub-non-light-transmitting region 152b, for the first signal line located on the side of the reference line toward the gap region 12, the two ends of the arc-shaped line segment 22 need to be extended to the first sub-non-light-transmitting region 152a to connect the first line segment 211 and the second line segment 212, respectively.

[0060] In order to reduce the frame width of the light collecting through hole 15, in some embodiments of the present application, the connection line located in the display area AA can also be used to realize the winding of the first signal line 21.

[0061] Reference Figure 4 As shown, Figure 4 Another layout mode of the first signal line in the display panel provided by the embodiments of the present application is shown in the schematic diagram. In this mode, for the first signal line 21 whose extension path passes through the non-light-transmitting region 152, part of the arc-shaped line segments 22 connected by the first signal line 21 are located in the first sub-non-light-transmitting region 152a, and the other part of the arc-shaped line segments 22 connected by the first signal line 21 are located in the second sub-non-light-transmitting region 152b.

[0062] In Figure 4 In the illustrated manner, the first connection line 23 is arranged in the display area AA to connect the first line segment 211 and the second line segment 212 of the first signal line 21 without occupying the non-light-transmitting area 152 as in Figure 3 In the illustrated manner, the display area AA occupies the non-light-transmitting area 152, so Figure 4 In the illustrated manner, the display area AA occupies the non-light-transmitting area 152, so

[0063] In some embodiments of the present application, as shown in Figure 1 and Figure 4 In some embodiments of the present application, as shown in

[0064] The display area AA has a plurality of signal lines extending in the row direction, such as scan signal lines and light-emitting signal lines, and a plurality of signal lines extending in the first direction Y, such as data signal lines and positive power supply signal lines. The first direction and the row direction intersect. Two signal lines transmitting different signals and extending in different directions need to be insulated from each other in different planes to avoid signal short circuit.

[0065] In the illustrated manner, the second sub-connection line 232 and the third sub-connection line 233 are arranged in the same layer and different from the first sub-connection line 231, so that the second sub-connection line 232 and the third sub-connection line 233 are prepared in the metal layer in which the signal lines extending in the first direction Y are arranged in the display area AA, and the first sub-connection line 231 is prepared in the metal layer in which the signal lines extending in the row direction are arranged in the display area AA, so that two signal lines transmitting different signals and extending in different directions are insulated from each other in different planes, avoiding short circuit of different signal lines transmitting different signals and extending in different directions, and facilitating wiring in the display area AA. Figure 4 In the illustrated manner, the second sub-connection line 232 and the third sub-connection line 233 are arranged in the same layer and different from the first sub-connection line 231, so that the second sub-connection line 232 and the third sub-connection line 233 are prepared in the metal layer in which the signal lines extending in the first direction Y are arranged in the display area AA, and the first sub-connection line 231 is prepared in the metal layer in which the signal lines extending in the row direction are arranged in the display area AA, so that two signal lines transmitting different signals and extending in different directions are insulated from each other in different planes, avoiding short circuit of different signal lines transmitting different signals and extending in different directions, and facilitating wiring in the display area AA.

[0066] Figure 5 In the illustrated manner, the display area AA occupies the non-light-transmitting area 152, so Figure 6 Figure 5 ​​A display panel provided by an embodiment of the present application has a cross-sectional view of a display area, Figure 6 A schematic diagram of a pixel circuit provided by an embodiment of the present application, the display panel has a substrate 100, one side of the substrate 100 is provided with a display array 10, the display array 10 has a plurality of sub-pixels 101. The substrate 100 and the display array 10 have a circuit layer 30, the circuit layer 30 includes a pixel circuit connected to the sub-pixel 101, the pixel circuit includes a thin film transistor. Figure 5 In the figure, the sub-pixel 101 is an OLED, in the direction of the substrate 100 pointing to the display array 10, the sub-pixel 101 includes an anode 31, an organic light-emitting layer 32 and a cathode 33 arranged in sequence. The anode 31 and the cathode 33 have a pixel definition layer 34, the pixel definition layer has a pixel opening corresponding to the area of the sub-pixel 101, the pixel opening exposes part of the anode 31, and the organic light-emitting layer 32 is arranged in the pixel opening. Figure 6 The pixel circuit shown in the figure is an example of a 7T1C structure, the pixel circuit shown has six transistors and one capacitor.

[0067] Specifically, the pixel circuit includes: a first transistor Q1 to a seventh transistor Q7 and a storage capacitor Cst. The first electrode of the first transistor Q1 is connected to a direct-current high voltage PVDD, the second electrode is connected to a second node N2, and the gate electrode is connected to a light-emitting control signal Emit. The gate electrode of the second transistor Q2 is connected to a second scan signal S2, the first electrode is connected to a data signal Vdata, and the second electrode is connected to the second node N2. The gate electrode of the third transistor Q3 is connected to a first node N1, the first electrode is connected to the second node N2, and the second electrode is connected to a third node N3. The gate electrode of the fourth transistor Q4 is connected to the second scan signal S2, the first electrode is connected to the first node N1, and the second electrode is connected to the third node N3. The gate electrode of the fifth transistor Q5 is connected to a first scan signal S1, the first electrode is connected to a reference voltage Vref, and the second electrode is connected to the first node N1. The gate electrode of the sixth transistor Q6 is connected to the light-emitting control signal Emit, the first electrode is connected to the third node N3, and the second electrode is connected to a fourth node N4. The gate electrode of the seventh transistor Q7 is connected to the first scan signal S1, the first electrode is connected to the reference voltage Vref, and the second electrode is connected to the fourth node. The anode 31 of the sub-pixel 101 is connected to the fourth node N4, and the cathode 33 is connected to a direct-current low voltage PVEE.

[0068] As can be known, the implementation of the pixel circuit can be based on the requirements and is not limited to Figure 6 The 7T1C structure shown, the pixel circuit can also be an 8T1C structure with eight transistors and one capacitor, the specific implementation of the pixel circuit is not limited by the embodiments of the present application.

[0069] The first metal layer M1 between the substrate 100 and the display array 10 includes scan signal lines for transmitting scan signals, light emitting signal lines for transmitting light emitting control signals Emit, and gates of thin film transistors. The second metal layer M2 between the first metal layer M1 and the display array 10 includes data signal lines for transmitting data signals Vdata, and signal lines to which sources and drains of the thin film transistors are connected. The third metal layer M3 is between the display array 10 and the second metal layer M2. The fourth metal layer Mc is between the first metal layer M1 and the second metal layer M2. The second metal layer M2 or the third metal layer M3 can be used to make a positive power signal line for transmitting a direct current high voltage PVDD, and the second metal layer M2 or the third metal layer M3 can also be used to form a first power signal line for transmitting a direct current low voltage PVEE. The fourth metal layer Mc can be used to form one plate of a capacitor, and the other plate of the capacitor is formed by the first metal layer M1. When the positive power signal line has a horizontal (row direction) portion, the fourth metal layer Mc can also be used to form a horizontal positive power signal line for transmitting the direct current low voltage PVEE.

[0070] In the embodiments of the present application, the first metal layer M1 can be used to form signal lines whose extension direction is parallel to the row direction, and the second metal layer M2 and / or M3 can be used to form signal lines whose extension direction is parallel to the first direction Y. Therefore, the first sub-connection line 231 can be made by using the first metal layer M1, and the second sub-connection line 232 and the third sub-connection line 233 can be made by using the second metal layer M2 and / or M3.

[0071] Reference Figure 7 As shown in the drawings, Figure 7 A layout principle diagram of a light collecting via in a display panel is provided in the embodiments of the present application, which is combined with Figure 1 and Figure 7 As shown in the drawings, on the straight line L where the first diameter is located, the outer edge of the light collecting via 15 located in the gap region 12 has a first distance D1 from the outer edge of the adjacent non-display area BB, and the outer edge of the light collecting via 15 located in the gap region 12 has a second distance D2 from the edge of the adjacent display area AA; wherein the first distance D1 is less than the second distance D2. In this way, by setting the first distance D1 to be less than the second distance D2, the outer diameter of the light collecting via 15 can be close to the outer edge of the display panel, so that the light collecting via 15 can be arranged in the gap region 12 to a greater extent, so as to reduce the area of the light collecting via 15 in the display area AA, and to reduce the loss of the sub-pixel 101 in the display area AA as much as possible.

[0072] Wherein, in the way shown in the drawings, Figure 7 In the way shown in the drawings, D1 is greater than 0, and D2 is less than the width of the gap region 12 in the first direction Y.

[0073] In addition, the first distance D1 is less than the second distance D2, which can make the light collecting through hole 15 close to the upper frame of the display panel, and there is no pixel circuit above the light collecting through hole 15, so that the signal line (such as the positive power signal line or the data signal line) in the display panel extending in the first direction Y does not need to be wound.

[0074] In other modes, if the signal line extending in the first direction Y in the display panel is cut into two parts by the light collecting through hole 15 in the first direction Y, the winding design can be achieved based on the display area AA or the non-light-transmitting area 152, and the implementation principle is the same as that of the first signal line 21, which will not be described herein.

[0075] Reference Figure 8 As shown in the figure, Figure 8 Another layout principle diagram of the light collecting through hole in the display panel provided by the embodiment of the present application is different from the mode shown in the figure in that, Figure 7 As shown in the figure, Figure 8 In the mode shown in the figure, D1 is equal to or approximately equal to 0, and D2 is equal to the width of the gap area 12 in the first direction Y, at this time, the outer diameter of the light collecting through hole 15 coincides with the outer edge of the display panel, which can maximize the use of the gap area 12 to layout the light collecting through hole 15, so as to maximize the reduction of the area of the light collecting through hole 15 in the display area AA, which can make the light collecting through hole 15 close to half of the area region arranged in the above gap area 12, so as to greatly reduce the loss of the sub-pixel 101 in the display area AA. This mode can adopt Figure 2 Or Figure 4 The first signal line 21 can be wound in the non-light-transmitting area 152 or the display area AA, and the packaging structure (the second packaging structure 42 described below) around the light collecting through hole 15 and the packaging structure (the first packaging structure 41 described below) around the entire display panel can have a common part.

[0076] Reference Figure 9 As shown in the figure, Figure 10 Another layout principle diagram of the light collecting through hole in the display panel provided by the embodiment of the present application is different from the mode shown in the figure in that, Figure 9 As shown in the figure, Figure 10 As shown in the figure, Figure 9 The sectional view in the P-P' direction, Figure 9 The partial enlarged view of the display panel, Figure 10The schematic diagram shows the display panel after the formation of the current back, without the formation of the encapsulation film and the through hole in the light transmission region 151. In this mode, the non-display region BB has the first encapsulation structure 41 surrounding the display region AA; the light collecting through hole 15 includes: the light transmission region 151 and the non-light transmission region 152 surrounding the light transmission region 151; the non-light transmission region 152 has the second encapsulation structure 42 surrounding the light transmission region 151; wherein the first encapsulation structure 41 and the second encapsulation structure 42 have a common part.

[0077] The first encapsulation structure 41 and the second encapsulation structure 42 both have a barrier wall 60. The barrier wall 60 includes a stack structure formed by a metal layer and an interlayer inorganic layer. Figure 10 In the shown mode, the metal layer in the barrier wall 60 includes the second metal layer M2, the third metal layer M3 and the metal layer where the anode 31 is located. The barrier wall 60 also includes a support column 63 located above the stack structure. At least one barrier wall 60 is included in the first encapsulation structure 41 and the second encapsulation structure 42, which is not limited to Figure 10 The two barrier walls 60 shown.

[0078] In Figure 10 In the shown mode, in the non-light transmission region 152, the local region of the barrier wall 60 facing the display region AA can be used to set the arc-shaped line segment 22, that is, the first signal line 21 adopts Figure 2 The shown winding mode. As described above, in order to reduce the frame width of the light collecting through hole 15, the winding of the first signal line 21 can also be realized by using the display region AA.

[0079] In Figure 9 In the shown mode, the first encapsulation structure 41 and the second encapsulation structure 42 have a common part, in which part the light collecting through hole 15 can be encapsulated by using part of the first encapsulation structure 41 of the display panel, and in the common part, the barrier wall 60 of the first encapsulation structure 41 can be reused as the barrier wall 60 of the second encapsulation structure 42, without occupying additional space to encapsulate the light collecting through hole 15 and the display panel respectively.

[0080] The first encapsulation structure 41 is located in the non-display region BB and is arranged close to the outer edge of the display panel, for preventing water vapor from invading the inside of the display panel. The first encapsulation structure 41 is used to encapsulate and protect the periphery of the entire display panel, and the outer edge of the first encapsulation structure 41 coincides or approximately coincides with the outer edge of the entire display panel. For the display panel with a circular or other special-shaped display region AA, after encapsulation, cutting needs to be performed based on the outer edge of the first encapsulation structure 41, and within the cutting process precision range, the outer edge of the first encapsulation structure 41 coincides or approximately coincides with the outer edge of the entire display panel. Circuit structures and various signal lines are also arranged in the non-display region BB between the first encapsulation structure 41 and the display region AA.

[0081] In Figure 9 In the illustrated manner, the first signal line 21 can be routed in the manner shown in FIG. 2A, and the first connection line 23 is arranged using the display area AA, without occupying the non-light-transmitting area 152 as shown in FIG. 1A, so as to reduce the frame width of the light-transmitting through hole 15. Figure 4 Figure 3 In the illustrated manner, the first signal line 21 can be routed in the manner shown in FIG. 2A, and the first connection line 23 is arranged using the display area AA, without occupying the non-light-transmitting area 152 as shown in FIG. 1A, so as to reduce the frame width of the light-transmitting through hole 15.

[0082] Referring to Figure 11 , it is shown that Figure 11 In another layout principle diagram of a light-transmitting through hole in a display panel provided by an embodiment of the present application, in combination with Figure 1 and Figure 11 , in the illustrated manner, the non-display area BB has a first encapsulation structure 41 surrounding the display area; the light-transmitting through hole 15 includes a light-transmitting area 151 and a non-light-transmitting area 152 surrounding the light-transmitting area 151; the non-light-transmitting area 152 has a second encapsulation structure 42 surrounding the light-transmitting area 151. The second encapsulation structure 42 is located on a side of the first encapsulation structure 41 close to the display area AA; on the straight line L where the first diameter is located, the part of the second encapsulation structure 42 located in the gap area 12 has a spacing from the opposite first encapsulation structure 41.

[0083] Different from Figure 9 , in the illustrated manner, Figure 11 In the illustrated manner, the second encapsulation structure 42 and the first encapsulation structure 41 do not share a part, and have a preset spacing therebetween, so as to use the spacing to layout the connection line for connecting the first line segment 211 and the second line segment 212 of the first signal line 21, so as to save the wiring space in the display area AA.

[0084] Referring to Figure 12 , it is shown that Figure 12 In a layout principle diagram of a light-transmitting through hole and a first signal line in a display panel provided by an embodiment of the present application, in the illustrated manner, the display area AA has a plurality of first signal lines 21, and the extension direction of the first signal line 21 is parallel to the row direction; the first signal line 21 is cut off by the light-transmitting through hole 15 into a first line segment 211 and a second line segment 212; at least part of the first line segment 211 and the second line segment 212 of the first signal line 21 are connected by a second connection line 51; on the first direction Y, the second connection line 51 is located on one side of the spacing. This manner can use the preset spacing between the first encapsulation structure 41 and the second encapsulation structure 42 to layout the second connection line 51, so as to save the wiring space in the display area AA.

[0085] ​In this embodiment of the application, on the straight line L containing the first diameter, when the portion of the second packaging structure 42 located within the gap region 12 has a distance from the opposing first packaging structure 41, for the first signal line 21 whose extension path passes through the light-collecting aperture, since it is cut into a first segment 211 and a second segment 212 by the light-collecting aperture 15, in order to connect the first segment 211 and the second segment 212, the following can be used: Figure 4 The wiring method shown configures all first signal lines 21 to connect the first segment 211 and the second segment 212 via the first connecting line 23. Alternatively, the wiring method can be... Figure 12 The wiring method shown allows all first signal lines 21 to be connected to the first segment 211 and the second segment 212 via the second connecting line 51. Alternatively, a portion of the first signal lines 21 can be connected to the first segment 211 and the second segment 212 via the first connecting line 23, while another portion of the first signal lines 21 can be connected to the first segment 211 and the second segment 212 via the second connecting line 51.

[0086] In some embodiments of this application, for a first signal line 21 whose extension path passes through a light-collecting aperture, when the first signal line connects the first segment 211 and the second segment 212 based on the second connecting line 51, such as Figure 12 As shown, the second connecting line 51 includes: a first routing segment 511, the extension direction of the first routing segment 511 being parallel to the row direction and passing through the area corresponding to the aforementioned spacing; a second routing segment 512 and a third routing segment 513 extending along the first direction Y, the second routing segment 512 and the third routing segment 513 being located on both sides of the light-transmitting hole 15 respectively, one end of the second routing segment 512 being connected to the first line segment 211, and one end of the third routing segment 513 being connected to the second line segment 212; one end of the first routing segment 511 being connected to the other end of the second routing segment 512, and the other end of the first routing segment 511 being connected to the other end of the third routing segment 513; wherein, the second routing segment 512 and the third routing segment 513 are on the same layer, but not on the same layer as the first routing segment 511.

[0087] By setting the second routing segment 512 and the third routing segment 513 to the same layer, but not to the first routing segment 511, the second routing segment 512 and the third routing segment 513 can be fabricated using the metal layer where the signal line extending in the display area AA is parallel to the first direction Y. The first routing segment 511 can be fabricated using the metal layer where the signal line extending in the display area AA is parallel to the row direction. This allows the signal lines with intersecting extension directions and transmitting different signals to intersect with insulated surfaces, avoiding short circuits between different signal lines transmitting different signals and intersecting in the extension direction. This facilitates wiring in the display area AA. Furthermore, the second connecting line 51 can be set using the spacing between the first packaging structure 41 and the second packaging structure 42, saving wiring space in the display area AA.

[0088] refer to Figure 13As shown, Figure 13 This application provides a schematic diagram illustrating the layout principle of a first power signal line in a display panel, in conjunction with... Figure 1 and Figure 13 As shown, in this configuration, the non-display area BB has a first encapsulation structure 41 surrounding the display area AA; the light-receiving aperture 15 includes a light-transmitting area 151 and a non-light-transmitting area 152 surrounding the light-transmitting area 151; the non-light-transmitting area 152 has a second encapsulation structure 42 surrounding the light-transmitting area 151; the non-display area BB has a first power signal line 52, which has a first power signal segment 521 and a second power signal segment 522 located on both sides of the light-receiving aperture 15, and the first power signal segment 521 and the second power signal segment 522 are connected by a third connecting line 53. The portion of the second encapsulation structure 42 located within the gap region 12 includes the third connecting line 53.

[0089] The first power signal line 52 is used to input a low-voltage DC PVEE. The first power signal line 52 surrounds the display area AA, preventing external electrostatic discharge from damaging the metal structure of the display panel. The first power signal line 52 can be connected to the control chip 14, through which the low-voltage DC PVEE is input.

[0090] exist Figure 13 In the illustrated configuration, the first power signal line 52 is cut into a first power signal line segment 521 and a second power signal line segment 522 by the light-collecting through-hole 15. The metal layer in the second packaging structure 42 is reused to connect the first power signal line segment 521 and the second power signal line segment 522, eliminating the need for separate wiring to connect the first power signal line segment 521 and the second power signal line segment 522.

[0091] refer to Figure 14 As shown, Figure 14 This application provides a cross-sectional view of a display panel in the light-transmitting via area 15, which includes a light-transmitting area 151 and a non-light-transmitting area 152 surrounding the light-transmitting area 151. A second encapsulation structure 42 within the non-light-transmitting area 152 includes a barrier 60. The barrier 60 includes a stacked structure disposed on the surface of a substrate 100 and a support pillar 63 disposed on the side of the stacked structure facing away from the substrate 100. The stacked structure includes a metal layer 61 and an inorganic layer 62. The metal layer 61 in the stacked structure includes at least one of the first metal layer M1 to the fourth metal layer Mc described above. Figure 14 The diagram illustrates a barrier 60 comprising two metal layers 61. An organic layer 64 within the display area AA terminates at the barrier 60 to prevent moisture from penetrating the display panel via the organic layer. At least one metal layer 61 in the stacked structure of the barrier 60 is reused to form a third connecting line 53.

[0092] In the embodiments of the present application, the substrate 100 is a flexible material, such as a PI (polyimide) flexible substrate, so as to form a light-transmitting region 151 of a conventional display panel.

[0093] Compared with a rigid substrate, the flexible substrate is more likely to form a through hole in the light-transmitting region 151. Moreover, the display panel provided in the present application can combine the design space characteristics of a special-shaped display area, and adopt the design optimization of the winding of the first signal line in any of the above-mentioned embodiments, so as to meet the design requirements of customers.

[0094] In the embodiments of the present application, the center of the light-permeable through hole 15 is located on a straight line where the first diameter is located, so as to utilize the gap region 12 to layout the light-permeable through hole 15 to a greater extent, and reduce the loss of the sub-pixel 101 in the display area AA.

[0095] Based on the display panel described in the above embodiments, another embodiment of the present application further provides a wearable device, as shown in Figure 15 .

[0096] Referring to Figure 15 , Figure 15 is a structural schematic diagram of a wearable device provided in the embodiments of the present application, and the wearable device 500 includes a display panel 510, which is the display panel described in any of the above-mentioned embodiments.

[0097] Figure 15 Taking a watch as an example, the wearable device further includes a wearable component 520, which is used to wear the wearable device 500 on the wrist of a user.

[0098] The wearable device described in the embodiments of the present application adopts the display panel 510 provided in the above-mentioned embodiments, and part of the light-permeable through hole 15 is arranged in the above-mentioned gap region 12, so as to reduce the area of the light-permeable through hole 15 in the display area AA, thereby reducing the loss of the sub-pixel 101 in the display area AA.

[0099] In the present specification, each embodiment is described in a progressive, or parallel, or progressive and parallel manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts of each embodiment can be referred to. For the wearable device disclosed in the embodiments, since it corresponds to the display panel disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the relevant part of the display panel.

[0100] It is to be understood that the drawings and description are illustrative of exemplary embodiments and not restrictive. Like reference numerals in different drawings denote like elements. Additionally, for purposes of explanation and ease of understanding, the drawings can exaggerate the thickness of some layers, films, panels, regions, etc. It is also to be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In addition, "on" refers to positioning an element on or under another element, but not necessarily to the above side of the other element in terms of gravitational orientation.

[0101] The terms "upper", "lower", "top", "bottom", "inner", "outer", and the like, refer to orientation or positional relationships based on the orientation or position as shown in the drawings, and are used merely to facilitate the description of the application and are not intended to limit or confine the application to a particular orientation, to be constructed and operated in a particular orientation, and therefore cannot be construed as limiting the application. When one component is considered to be "connected" to another component, it can be directly connected to the other component or there can be a component disposed therebetween.

[0102] It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting, since the scope of the present application will be limited to the appended claims. It is also to be understood that the terminology used in the description is for the purpose of describing the particular versions or embodiments only and is not intended to be limiting, as the scope of the present application will be limited to the appended claims. Furthermore, the use of the terms "including", "containing", or "comprising" and variations thereof, is meant to encompass the presence of successors, equivalents, and / or alternatives of a given feature, not the exclusion of any such. The use of the terms "including", "containing", or "comprising" and variations thereof, is meant to encompass the presence of successors, equivalents, and / or alternatives of a given feature, not the exclusion of any such. The use of the terms "including", "containing", or "comprising" and variations thereof, is meant to encompass the presence of successors, equivalents, and / or alternatives of a given feature, not the exclusion of any such. The use of the terms "including", "containing", or "comprising" and variations thereof, is meant to encompass the presence of successors, equivalents, and / or alternatives of a given feature, not the exclusion of any such.

[0103] The above description of disclosed embodiments provides enough information to enable those skilled in the art to make or use the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Therefore, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized by, The display panel has a display area and a non-display area surrounding the display area, the display area is circular, the non-display area includes a first sub-non-display area and a second sub-non-display area, and the display panel includes: a display array located in the display area, having a plurality of rows of sub-pixels arranged in a first direction; the first direction is perpendicular to the row direction of the sub-pixels and parallel to the plane on which the display panel is located; the first sub-non-display area and the second sub-non-display area are located on both sides of a first diameter of the display area, and the first diameter is parallel to the first direction; a driving circuit having a first part driving circuit located in the first sub-non-display area and a second part driving circuit located in the second sub-non-display area; the first diameter has a first end and a second end; at the first end, there is a gap area between the first part driving circuit and the second part driving circuit; a light collecting through hole, at least partially located in the gap area; a part of the light collecting through hole is located in the display area, and another part is located in the non-display area; wherein, at the second end, the non-display area has a binding area for fixedly connecting a control chip.

2. The display panel of claim 1, wherein, The light collecting through hole includes a light transmission area and a non-light transmission area surrounding the light transmission area; The display area has a plurality of first signal lines, and the extension direction of the first signal lines is parallel to the row direction; the first signal lines include first line segments and second line segments located on both sides of the light collecting through hole respectively; the non-light transmission area has arc-shaped line segments, and the arc-shaped line segments connect the first line segments and the second line segments of the same first signal line.

3. The display panel of claim 2, wherein, The non-light transmission area has a first sub-non-light transmission area and a second sub-non-light transmission area, and the first sub-non-light transmission area and the second sub-non-light transmission area are located on both sides of a reference line, the reference line is parallel to the row direction and passes through the center of the light transmission area; At least part of the arc-shaped line segments connected by the first signal lines are located in the first sub-non-light transmission area, and / or at least part of the arc-shaped line segments connected by the first signal lines are located in the second sub-non-light transmission area.

4. The display panel of claim 1, wherein, The display area has a plurality of first signal lines, and the extension direction of the first signal lines is parallel to the row direction; the first signal lines are cut off by the light collecting through hole into first line segments and second line segments; The first line segments and the second line segments of the same first signal line are connected by a first connecting line, and the first connecting line is located in the display area.

5. The display panel of claim 4, wherein, The first connecting line includes: a first sub-connecting line, the extension direction of the first sub-connecting line is parallel to the row direction, and the first sub-connecting line is located on one side of the light collecting through hole away from the gap area; a second sub-connecting line and a third sub-connecting line extending in the first direction, one end of the second sub-connecting line is connected with the first line segment, and one end of the third sub-connecting line is connected with the second line segment; one end of the first sub-connecting line is connected with the other end of the second sub-connecting line, and the other end of the first sub-connecting line is connected with the other end of the third sub-connecting line; The second sub-connection line and the third sub-connection line are in the same layer and different from the first sub-connection line.

6. The display panel of claim 1, wherein, On a straight line where the first diameter is located, an outer edge of the light-taking via located in the gap region has a first distance from an outer edge adjacent to the non-display area, and an outer edge of the light-taking via located in the gap region has a second distance from an edge adjacent to the display area. The first distance is less than the second distance.

7. The display panel of claim 1, wherein, The non-display area has a first encapsulation structure surrounding the display area. The light-taking via includes a light-transmitting region and a non-light-transmitting region surrounding the light-transmitting region, and the non-light-transmitting region has a second encapsulation structure surrounding the light-transmitting region. The first encapsulation structure and the second encapsulation structure have a common part.

8. The display panel of claim 1 or 4, wherein, The non-display area has a first encapsulation structure surrounding the display area. The light-taking via includes a light-transmitting region and a non-light-transmitting region surrounding the light-transmitting region, and the non-light-transmitting region has a second encapsulation structure surrounding the light-transmitting region. The second encapsulation structure is located on a side of the first encapsulation structure close to the display area, and on a straight line where the first diameter is located, a part of the second encapsulation structure located in the gap region has a spacing from the opposite first encapsulation structure.

9. The display panel of claim 8, wherein, The display area has a plurality of first signal lines, and the first signal lines have a direction of extension parallel to the row direction; the first signal lines are cut by the light-taking via into first line segments and second line segments. The first line segments and the second line segments of at least part of the first signal lines are connected by a second connection line. In the first direction, the second connection line is located on a side of the second encapsulation structure facing the spacing.

10. The display panel of claim 9, wherein, The second connection line includes: A first wire segment, the first wire segment has a direction of extension parallel to the row direction, and passes through a region corresponding to the spacing; Second and third wire segments extending in the first direction, one end of the second wire segment is connected to the first line segment, and one end of the third wire segment is connected to the second line segment; one end of the first wire segment is connected to the other end of the second wire segment, and the other end of the first wire segment is connected to the other end of the third wire segment; The second wire segment and the third wire segment are in the same layer and different from the first wire segment.

11. The display panel of claim 1, wherein, The non-display area has a first encapsulation structure surrounding the display area. The light-taking via includes a light-transmitting region and a non-light-transmitting region surrounding the light-transmitting region, and the non-light-transmitting region has a second encapsulation structure surrounding the light-transmitting region. The non-display area has a first power signal line, and the first power signal line has a first power signal line segment and a second power signal line segment located on two sides of the light-taking via, respectively; the first power signal line segment and the second power signal line segment are connected by a third connection line. The part of the second encapsulation structure located in the gap region includes the third connection line.

12. A wearable device, comprising: The display panel includes any one of claims 1-11.

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