A method of processing a circuit board
Patent Information
- Application Number
- CN202210364103.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-07
- Publication Date
- 2026-08-11
- Estimated Expiration
- 2042-04-07
AI Technical Summary
[0004]本申请提供了一种电路板的加工方法,以解决现有技术中的电路板的加工方法在曝光显影中,存在侧蚀现象,以致将给电子产品带来很大的可靠性风险的问题
[0015] The beneficial effects of this application are as follows: Unlike the prior art, the circuit board processing method of this application forms a solder resist layer on the circuit core board and exposes and develops the solder resist layer to expose the circuit layer facing the solder resist layer in the circuit core board. Then, by filling the gap between the exposed and developed solder resist layer and the circuit layer with solder resist ink, the possible side etching can be effectively eliminated to ensure the quality requirements of the circuit board product.
Smart Images

Figure CN116939989B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit board technology, and in particular to a method for processing a circuit board. Background Technology
[0002] With the development of electronic products, the market's requirements for electronic devices are becoming increasingly stringent, and how to achieve more functions in a smaller space is one of the most important key points.
[0003] To ensure high-density packaging requirements, some customer products currently employ flip-chip designs, which are the smallest and thinnest of all packaging technologies. However, this design also places special demands on the side etching after ink development. In existing conventional solder mask processes for circuit board manufacturing, the ink on the board is exposed and then developed. The developing solution bites into the underlying ink, inevitably causing side etching, which is typically as high as 15µm. Furthermore, the etched areas inevitably retain some of the developing solution, posing a significant reliability risk to the corresponding electronic products. Summary of the Invention
[0004] This application provides a method for processing circuit boards to solve the problem that in the prior art, the side etching phenomenon exists in the exposure and development process of circuit board processing, which will bring great reliability risks to electronic products.
[0005] To solve the above-mentioned technical problems, one technical solution adopted in this application is: to provide a method for processing a circuit board, wherein the method includes: providing a circuit core board and forming a solder resist layer on the circuit core board; exposing and developing the solder resist layer to expose the circuit layer facing the solder resist layer in the circuit core board; and filling the gap between the exposed and developed solder resist layer and the circuit layer with solder resist ink.
[0006] The step of providing a circuit core board and, after forming a solder resist layer on the circuit core board, exposing and developing the solder resist layer to reveal the circuit layers on the circuit core board, further includes: performing a preliminary curing treatment on the solder resist layer; the step of exposing and developing the solder resist layer to reveal the circuit layers on the side of the circuit core board facing the solder resist layer includes: exposing and developing the solder resist layer after the preliminary curing treatment to reveal the circuit layers on the side of the circuit core board facing the solder resist layer.
[0007] The initial curing step of the solder resist layer includes baking the solder resist layer at 65-80℃ for 35-45 minutes to allow the solder resist layer to initially cure.
[0008] The step of filling the gap between the solder resist layer and the circuit layer after exposure and development with solder resist ink also includes: pre-curing the solder resist ink.
[0009] The step of pre-curing the solder resist ink includes irradiating the solder resist ink with an ultraviolet lamp to pre-cur it.
[0010] The step of pre-curing the solder resist ink includes baking the solder resist ink at 145-155℃ for 25-35 minutes to pre-cur the solder resist layer.
[0011] The process includes a pre-curing treatment of the solder resist ink followed by a post-curing treatment of the solder resist layer and the solder resist ink.
[0012] The process includes, after the pre-curing step of the solder resist ink, pressing the solder resist layer and the solder resist ink together.
[0013] The solder resist layer and solder resist ink are placed in an environment of 170-190℃ and pre-pressed with a pressure of 8-12 kg for 8-12 seconds; then, the pre-pressed solder resist layer and solder resist ink are pressed together with a pressure of 45-55 kg for 70-90 seconds.
[0014] The thickness of the solder resist ink should not exceed the thickness of the circuit layer.
[0015] The beneficial effects of this application are as follows: Unlike the prior art, the circuit board processing method of this application forms a solder resist layer on the circuit core board and exposes and develops the solder resist layer to expose the circuit layer facing the solder resist layer in the circuit core board. Then, by filling the gap between the exposed and developed solder resist layer and the circuit layer with solder resist ink, the possible side etching can be effectively eliminated to ensure the quality requirements of the circuit board product. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:
[0017] Figure 1a This is a flowchart illustrating the first embodiment of the circuit board processing method of this application;
[0018] Figures 1b-1e yes Figure 1a A structural schematic diagram of an embodiment corresponding to S11-S13;
[0019] Figure 2 This is a flowchart illustrating the second embodiment of the circuit board processing method of this application. Detailed Implementation
[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0021] Currently, the conventional solder mask processing method is as follows: pretreatment (removing dirt from the board surface to prevent insufficient ink adhesion) — solder mask (printing a layer of ink on the circuit board) — pre-baking (preliminarily curing the ink to facilitate subsequent exposure operations) — exposure (completing the photopolymerization reaction) — development (peeling off the ink that has not been exposed to light so that the customer can solder) — post-curing (increasing the hardness of the ink).
[0022] However, since the ink on the board is specifically developed after exposure, the developing solution will bite the ink on the bottom, inevitably resulting in side etching. Although this situation can be mitigated through process optimization, it cannot be eliminated. Customers usually require that this problem not exist. Therefore, this anomaly is one of the problems that urgently needs to be solved in the industry.
[0023] Please see Figures 1a-1e ,in, Figure 1a This is a schematic flowchart of the first embodiment of the circuit board manufacturing method of this application. Figures 1b-1e yes Figure 1a A structural schematic diagram of an embodiment corresponding to S11-S13. This embodiment includes the following steps:
[0024] S11: Provide a circuit core board, on which a solder resist layer is formed.
[0025] Specifically, such as Figure 1b and Figure 1c As shown, a circuit core board 21 is provided. Specifically, the circuit core board 21 can be a single-layer copper-clad laminate, or it can include at least two layers of copper-clad laminate, and a half-cured sheet is stacked between each two adjacent copper-clad laminates in the at least two layers of copper-clad laminate; or, the circuit core board 21 can further include copper plates, electroplated copper layers, conductive pillars, heat sinks, embedded components, thermally conductive adhesives, and other arbitrary and reasonable materials that can be used to manufacture circuit boards, so that the pre-designed circuit logic can be realized through the corresponding patterned copper-clad laminates and embedded components, etc. This application does not limit this.
[0026] For ease of understanding, in this embodiment, the circuit core board 21 specifically includes a circuit base plate 221 and a circuit layer 212 disposed on the outside of the circuit base plate 221 as an example. The circuit base plate 221 is the functional layer inside the circuit core board 21, and the circuit layer 212 is the outermost conductor layer of the circuit core board 21 intended to achieve electrical connection with other external components or electronic devices, or the component of the outermost conductor layer of the circuit core board 21 intended to form solder pads. After obtaining the circuit core board 21, a solder resist layer 22 needs to be formed on the circuit core board 21. For example, inkjet printing technology is used to print pre-prepared ink onto the circuit core board 21 so that the corresponding solder resist layer 22 covers the circuit layer 212.
[0027] S12: Expose and develop the solder mask layer to reveal the circuit layers on the side of the circuit board facing the solder mask layer.
[0028] Furthermore, such as Figure 1d As shown, the solder resist layer 22 is exposed. For example, an exposure film is first attached to the solder resist layer 22, and UV (ultraviolet) light is irradiated onto the solder resist layer 22 on which the exposure film is attached to expose the solder resist layer 22.
[0029] The exposed film has light-blocking points at designated locations. This means that when the areas of the solder resist layer 22 not blocked by the light-blocking points are irradiated with UV light, they will undergo a polymerization and cross-linking reaction, generating a high-molecular polymer that is insoluble in the developing solution. The areas of the solder resist layer 22 blocked by the light-blocking points are protected from this polymerization and cross-linking reaction, allowing them to be dissolved in the developing solution during the subsequent developing process. Furthermore, the exposed film can be removed after exposure.
[0030] Therefore, the setting position of the exposure film can specifically correspond to the location of the circuit layer 212 in the circuit core board 21. When the solder mask 22 is exposed and developed, for example, when the circuit core board 21 and the exposed solder mask 22 are immersed in the developing solution, the part of the solder mask 22 that is blocked by the light blocking point will be dissolved and removed, so that the circuit layer 212 facing the solder mask 22 in the circuit core board 21 can be exposed.
[0031] S13: Fill the gap between the solder resist layer and the circuit layer after exposure and development with solder resist ink.
[0032] Understandably, such as Figure 1eAs shown, the solder resist layer 22 on the circuit core board 21 is specifically developed after exposure, and the developing solution will bite the solder resist layer 22 material at the bottom, inevitably resulting in side etching. That is, the developed solder resist layer 22 will form a gap with the circuit layer 212, and the surface area of the part of the solder resist layer 22 that is not removed by development will be larger than the surface area of the part facing the circuit core board 21, thus forming a corner area that is easy to store the developing solution.
[0033] Specifically, after the solder resist layer 22 is exposed and developed, solder resist ink 23 is then filled into the gap between the exposed and developed solder resist layer 22 and the circuit layer 212. For example, inkjet technology or any other reasonable drip irrigation technology is used to drip the pre-prepared solder resist ink 23 into the gap between the developed solder resist layer 22 and the circuit layer 212 to prevent the gap from becoming a storage area for chemicals.
[0034] The above solution effectively eliminates potential side etching by filling the gap between the solder resist layer 22 and the circuit layer 212 with solder resist ink 23 after exposure and development, thereby solving the quality problems caused by side etching and ensuring the quality requirements of the corresponding circuit board products.
[0035] Optionally, the solder resist ink 23 and the solder resist layer 22 are made of the same material. However, in other embodiments, the solder resist ink 23 and the solder resist layer 22 may be made of different materials. This application does not limit this.
[0036] In one embodiment, the filling thickness of the solder resist ink 23 is no greater than the thickness of the circuit layer 212, so as to effectively eliminate the side etching phenomenon without affecting the electrical connection between the circuit layer 212 and external components or electronic devices.
[0037] Furthermore, in one embodiment, the above-mentioned S13 may further include: making CAM (Computer Aided Manufacturing) data from the position information of the circuit core board 21 that needs to be filled with solder resist ink 23, and transmitting it to a dedicated inkjet printing device, so as to convert the CAM data through the inkjet printing device, and then control the print head to dispense ink, so as to ensure that the position that needs to be printed with ink can be filled with solder resist ink 23.
[0038] Furthermore, in one embodiment, after S13 described above, the process may further include post-curing the solder resist layer 22 and the solder resist ink 23.
[0039] Understandably, in order to improve the hardness of the solder resist layer 22 and the solder resist ink 23 so that they can function as insulation and protect the copper surface of the circuit board, after filling the solder resist ink 23, the solder resist layer 22 and the solder resist ink 23 need to undergo post-curing treatment. For example, the solder resist layer 22 and the solder resist ink 23 can be heated to 145-155℃ in an oven and held for 3600s-4200s to perform post-curing treatment, thereby improving the hardness of the solder resist layer 22 and the solder resist ink 23.
[0040] Furthermore, in one embodiment, after S13 described above, the process may further include: pre-curing the solder resist ink 23.
[0041] Understandably, after the solder resist ink 23 is filled into the gap between the exposed and developed solder resist layer 22 and the circuit layer 212, it needs to be pre-cured to reduce its fluidity in order to prevent the solder resist ink 23 from overflowing onto the circuit layer 212 and / or the solder resist layer 22.
[0042] Furthermore, in one embodiment, the pre-curing treatment of the solder resist ink 23 described above can specifically be: irradiating the solder resist ink 23 with an ultraviolet lamp to pre-cur the solder resist ink 23.
[0043] Optionally, the ultraviolet lamp uses light energy of 450-550 mJ (millijoules) to irradiate the solder resist ink 23 so that the solder resist ink 23 is pre-cured.
[0044] Furthermore, in one embodiment, the pre-curing treatment of the solder resist ink 23 described above may specifically be: baking the solder resist ink 23 at 145-155°C for 25-35 minutes to pre-cur the solder resist layer 22.
[0045] Furthermore, in one embodiment, after pre-curing the solder resist ink 23, the process may further include post-curing the pre-cured solder resist layer 22 and the solder resist ink 23 to improve the hardness of the solder resist layer 22 and the solder resist ink 23.
[0046] Furthermore, in one embodiment, after pre-curing the solder resist ink 23, the process may further include: pressing the solder resist layer 22 and the solder resist ink 23 together.
[0047] In one embodiment, the pressing of the solder resist layer 22 and the solder resist ink 23 may specifically include: placing the solder resist layer 22 and the solder resist ink 23 in an environment of 170-190°C, and pre-pressing the solder resist layer 22 and the solder resist ink 23 with a pressure of 8-12 kg for 8-12 seconds; and pressing the pre-pressed solder resist layer 22 and the solder resist ink 23 with a pressure of 45-55 kg for 70-90 seconds.
[0048] Understandably, by pressing the solder resist layer 22 and the solder resist ink 23 together, the quality of the solder resist layer 22 and the solder resist ink 23 on the circuit core board 21 can be ensured, and the high pressure can also make the solder resist ink 23 in the position prone to side corrosion more compact, thereby solving the quality problems caused by side corrosion.
[0049] Furthermore, in one embodiment, after laminating the solder resist layer 22 and the solder resist ink 23, the process may further include: performing a post-curing treatment on the solder resist layer 22 and the solder resist ink 23 to improve the hardness of the solder resist layer 22 and the solder resist ink 23.
[0050] Please see Figure 2 , Figure 2 This is a flowchart illustrating the second embodiment of the circuit board fabrication method of this application. The circuit board fabrication method of this embodiment... Figure 1a A detailed embodiment of the circuit board processing method is shown in the flowchart. This embodiment includes the following steps:
[0051] S31: Provide a circuit core board, on which a solder resist layer is formed.
[0052] Among them, S31 and Figure 1a The same applies to S11. Please refer to S11 and its related textual descriptions for details, which will not be repeated here.
[0053] S32: Perform preliminary curing treatment on the solder resist layer.
[0054] Understandably, after the circuit board is solder resisted, in order to ensure the smooth progress of subsequent exposure and development, it is necessary to reduce the fluidity of the solder resist ink in order to perform preliminary curing treatment on the solder resist layer.
[0055] S33: Expose and develop the solder mask layer after preliminary curing to reveal the circuit layer on the side of the circuit core board facing the solder mask layer.
[0056] Furthermore, the solder resist layer after preliminary curing is exposed. For example, an exposure film is first attached to the solder resist layer after preliminary curing, and UV light is irradiated onto the solder resist layer on which the exposure film is attached to expose the solder resist layer. Then, when the circuit board and the exposed solder resist layer are immersed in the developing solution, they are developed to expose the circuit layer on the side of the circuit board facing the solder resist layer.
[0057] S34: Fill the gap between the solder resist layer and the circuit layer after exposure and development with solder resist ink.
[0058] Among them, S34 and Figure 1a The same applies to S13 in the text. Please refer to S13 and its related textual descriptions for details, which will not be repeated here.
[0059] Furthermore, in one embodiment, S32 may further include: baking the solder resist layer at 65-80°C for 35-45 minutes to allow the solder resist layer to initially cure.
[0060] The beneficial effects of this application are as follows: Unlike the prior art, the circuit board processing method of this application forms a solder resist layer on the circuit core board and exposes and develops the solder resist layer to expose the circuit layer facing the solder resist layer in the circuit core board. Then, by filling the gap between the exposed and developed solder resist layer and the circuit layer with solder resist ink, the possible side etching can be effectively eliminated to ensure the quality requirements of the circuit board product.
[0061] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.
Claims
1. A method of processing a circuit board, characterized by, The processing method of the circuit board includes: A circuit core board is provided, and a solder resist layer is formed on the circuit core board; The solder mask layer is exposed and developed to reveal the circuit layers on the side of the circuit core board facing the solder mask layer. Solder resist ink is filled into the gap between the solder resist layer and the circuit layer after exposure and development; wherein the surface area of the portion of the solder resist layer that is not removed by development on the side away from the circuit core board is greater than its surface area on the side facing the circuit core board.
2. The method of processing a circuit board according to claim 1, wherein After the step of providing the circuit core board and forming a solder resist layer on the circuit core board, and before the step of exposing and developing the solder resist layer to expose the circuit layers facing the solder resist layer in the circuit core board, the method further includes: The solder resist layer is subjected to preliminary curing treatment; The step of exposing and developing the solder mask layer to reveal the circuit layers on the circuit core board includes: The solder resist layer after preliminary curing is exposed and developed to reveal the circuit layer on the side of the circuit core board facing the solder resist layer.
3. The method of processing a circuit board according to claim 2, wherein The step of initially curing the solder resist layer includes: The solder resist layer is baked at 65-80℃ for 35-45 minutes to allow it to initially cure.
4. The method of processing a circuit board according to claim 1, wherein After the step of filling the gap between the solder resist layer and the circuit layer after exposure and development with solder resist ink, the method further includes: The solder resist ink is pre-cured.
5. The method of processing a circuit board according to claim 4, wherein The step of pre-curing the solder resist ink includes: The solder resist ink is irradiated with ultraviolet light to pre-cur it.
6. The method of processing a circuit board according to claim 5, wherein The step of pre-curing the solder resist ink includes: The solder resist ink is baked at 145-155℃ for 25-35 minutes to pre-cur the solder resist layer.
7. The method of processing a circuit board according to claim 4, wherein After the step of pre-curing the solder resist ink, the method further includes: The solder resist layer and the solder resist ink are subjected to post-curing treatment.
8. The circuit board processing method according to claim 4, characterized in that, After the step of pre-curing the solder resist ink, the method further includes: The solder resist layer and the solder resist ink are pressed together.
9. The method for processing a circuit board according to claim 8, characterized in that, The step of laminating the solder resist layer and the solder resist ink includes: The solder resist layer and the solder resist ink are placed in an environment of 170-190°C, and the solder resist layer and the solder resist ink are pre-pressed with a pressure of 8-12 kg for 8-12 seconds. Apply a pressure of 45-55 kg to press the pre-compressed solder resist layer and the solder resist ink together for 70-90 seconds.
10. A method for processing a circuit board according to any one of claims 1-9, characterized in that, The thickness of the solder resist ink is no greater than the thickness of the circuit layer.
Citation Information
Patent Citations
Printed circuit board solder mask repairing method
CN111405776A
Manufacturing method of circuit board solder mask layer and circuit board
CN113747662A
