An inter-line DC power flow controller with fault tolerance

Abstract

The present invention discloses an inter-line DC power flow controller with fault tolerance ability, and its topological structure consists of a full-bridge sub-module arm, an arm inductor, and an antiparallel thyristor valve group. One end of arm A0 is connected to terminal 1 through T 11 / T 12 and connected to terminal 2 through T 21 / T 22 and the other end is connected to terminal 3 through the first arm inductor; one end of arm A1 is connected to terminal 1, and the other end is respectively connected to T 31 / T 32 and T 41 / T 42 through the second arm inductor. T 31 / T 32 is connected to terminal 2, and T 41 / T 42 is connected to terminal 3; one end of arm A2 is connected to terminal 2, and the other end is respectively connected to T 51 / T 52 and T 61 / T 62 through the third arm inductor. T 51 / T 52 is connected to terminal 3, and T 61 / T 62 is connected to terminal 1. This inter-line DC power flow controller can achieve fault-tolerant operation and improve the reliability of the DC power flow controller.

Description

Technical Field

[0001] The present invention relates to an inter-line DC power flow controller, and particularly to an inter-line DC power flow controller with fault tolerance ability. Background Art

[0002] Compared with the traditional AC power transmission technology, the flexible DC power transmission technology has great advantages in long-distance power transmission. It has high flexibility, is easy to construct a power grid, has relatively low long-distance construction cost, does not need to consider reactance, and has small line losses. To ensure the reliability of DC power transmission, it is necessary to ensure that the current of each line in the DC power grid is controllable. At this time, a DC power flow controller (DCPFC, DC-Power Flow Controller) needs to be installed to increase the control freedom of the DC power grid. Since the DC power flow controller is an auxiliary device of the DC power grid, ensuring its operation reliability is the key design in engineering applications. Summary of the Invention

[0003] The purpose of the present invention is to provide an inter-line DC power flow controller with fault tolerance ability. After a thyristor fails, the inter-line DC power flow controller can continue to maintain the previous power flow regulation ability by converting the operation mode, realizing fault-tolerant operation and improving the reliability of the DC power flow controller.

[0004] The purpose of the present invention is realized through the following technical solutions:

[0005] An inter-line DC power flow controller with fault tolerance ability, whose topological structure consists of a full-bridge sub-module arm, an arm inductor, and an anti-parallel thyristor valve group, where:

[0006] The full-bridge sub-module arm includes arm A0, arm A1, and arm A2;

[0007] The arm inductor includes a first arm inductor, a second arm inductor, and a third arm inductor;

[0008] The anti-parallel thyristor valve group includes anti-parallel thyristor valve group T 11 / T 12 , anti-parallel thyristor valve group T 21 / T 22 , anti-parallel thyristor valve group T 31 / T 32 , anti-parallel thyristor valve group T 41 / T 42 , anti-parallel thyristor valve group T 51 / T 52 and anti-parallel thyristor valve group T 61 / T 62 ;

[0009] One end of the arm A0 is connected to terminal 1 through the antiparallel thyristor valve bank T 11 / T 12 and to terminal 2 through the antiparallel thyristor valve bank T 21 / T 22 ; the other end of the arm A0 is connected to terminal 3 through the first arm inductor;

[0010] One end of the arm A1 is connected to terminal 1, and the other end of the arm A1 is connected to the antiparallel thyristor valve bank T 31 / T 32 and the antiparallel thyristor valve bank T 41 / T 42 respectively through the second arm inductor; the antiparallel thyristor valve bank T 31 / T 32 is connected to terminal 2, and the antiparallel thyristor valve bank T 41 / T 42 is connected to terminal 3;

[0011] One end of the arm A2 is connected to terminal 2, and the other end of the arm A2 is connected to the antiparallel thyristor valve bank T 51 / T 52 and the antiparallel thyristor valve bank T 61 / T 62 respectively through the third arm inductor; the antiparallel thyristor valve bank T 51 / T 52 is connected to terminal 3, and the antiparallel thyristor valve bank T 61 / T 62 is connected to terminal 1;

[0012] The inter-line DC power flow controller has three operating modes. In each operating mode, two arms serve as energy storage arms, which are always connected in series to two DC lines to provide the voltage difference required for power flow regulation. The other arm is a commutation arm, and its current is controlled to be two trapezoidal waves to maintain the energy balance of the energy storage arms. Specifically: in operating mode I, the commutation arm is arm A0, and the energy storage arms are arm A1 and arm A2; in operating mode II, the commutation arm is arm A2, and the energy storage arms are arm A0 and arm A1; in operating mode III, the commutation arm is arm A1, and the energy storage arms are arm A0 and arm A2.

[0013] A control method for the above inter-line DC power flow controller includes the following steps:

[0014] Step 1: Control of the commutation arm:

[0015] It is divided into arm voltage feedforward, arm energy balance control, arm current control, thyristor converter valve turn-on and turn-off control, sub-module capacitor voltage equalization, and carrier phase-shifted modulation. Among them: the arm voltage feedforward is calculated based on the voltages required for power flow regulation U 1 and U 2; the arm energy balance control and the arm current control are controlled by a PI controller to follow the reference values; the thyristor converter valve turn-on and turn-off control is used to provide the trigger signals and reverse turn-off voltages for the two thyristor converter valves connected to the converter arm U RE ; finally, the obtained converter arm voltage reference signal is sent to the sub-module capacitor voltage equalization and carrier phase-shifted modulation to obtain the IGBT drive signal of the arm sub-module;

[0016] Step 2: Control of the energy storage arm:

[0017] The energy storage arm is always connected to the DC line to provide the voltage required for power flow regulation, and there is no need for thyristor converter valve turn-on and turn-off control. The remaining controls are the same as those of the converter arm.

[0018] A method for converting the operating mode of the above inter-line DC power flow controller includes the following steps:

[0019] (1) T 11 / T 12 A short-circuit fault occurs

[0020] Assume that the inter-line DCPFC is operating normally in operating mode I. If the thyristor converter valve T 11 / T 12 has a short-circuit fault, the controller will control the inter-line DCPFC to switch to operating mode III. It needs to go through transient process I and transient process II. In transient process I, control the commutation between arm A1 and arm A0 to achieve reliable turn-off of the thyristor converter valve T 42 , and in transient process II, control the commutation between the thyristor converter valve T 51 and T 62 to achieve reliable turn-off of T 51 . Finally, the inter-line DCPFC switches to operating mode III for operation and continues to achieve the same power flow regulation effect. The specific control steps are as follows:

[0021] If the thyristor converter valve T 11 / T 12 has a short-circuit fault during the commutation between arm A0 and arm A1, after the commutation is completed, arm A0 will output the thyristor turn-off voltage U RE to make T 12 reliably turn off. At this time, T 12 has already had a short circuit, so arm A0 will be under reverse voltage URE A reverse current is generated under the action of 12 . If a large reverse current appears in arm A0 of the bridge, it is considered that the thyristor commutation valve T

[0022] has a short-circuit fault. At this time, the following short-circuit fault mode conversion scheme will be used for control: 42 First, enter the transient process I. The goal of this process is to control the commutation between arm A1 and arm A0 of the bridge to achieve reliable turn-off of the thyristor commutation valve T U 1,Ⅰ . The specific implementation method is as follows: Control the voltage of energy storage arm A1 to remain at the voltage in operation mode I U 2,Ⅰ , and the voltage of energy storage arm A2 to remain at the voltage in operation mode I U 1,Ⅰ ; Control the voltage of commutation arm A0 to be the voltage of energy storage arm A1, that is 42 plus the reverse turn-off voltage of the thyristor commutation valve T U RE . At this time, since I the direction of 1 is positive and the voltage of arm A0 is less than that of arm A1, arm A1 commutates to arm A0, and the current of arm A0 rises from the reverse current at a rising rate of U RE / 2 L to I 1, and the current of arm A1 decreases from U RE / 2 L to 0 at a decreasing rate. After the commutation between arm A1 and arm A0 ends, that is, when the current of arm A0 rises to I 1, apply a reverse voltage longer than the thyristor turn-off time I 42 across the thyristor commutation valve T q t RE to ensure reliable turn-off of T U RE . During this stage, arm A2 does not participate in any commutation, and its arm current remains 42 2 unchanged; I After the thyristor commutation valve T

[0023] is reliably turned off, enter the transient process II. The goal of this process is to control the commutation between the thyristor commutation valve T 42 and T 51 to achieve reliable turn-off of T 62 . The specific implementation method is as follows: Control the voltage of arm A0 to be the reverse turn-off voltage of the thyristor commutation valve T 51 51 minus U RE ​, control the voltage of arm A1 to be the voltage in operating mode III - U 1,Ⅲ , the voltage of arm A2 is the port voltage U 1,Ⅲ , during this period, control the thyristor converter valve T to trigger 62 , because I the direction of 2 is positive, and the voltage across T 62 is U RE , so T 62 is successfully triggered and conducted. Under the action of the negative voltage of arm A0 - U RE , the thyristor converter valve T 51 and T 62 commutate. The current flowing through T 51 decreases at a rate of U RE / L from I 2 to 0, and the current of arm A0 increases at a rate of U RE / L from I 1 to I 1 + I 2. When the commutation between the thyristor converter valve T 51 and T 62 ends, that is, when the current of the thyristor converter valve T 51 drops to 0, continue to control the voltage of arm A0 to be the reverse turn-off voltage of the thyristor converter valve T 51 - U RE for a period of time, which is longer than the turn-off time of the thyristor t q , so as to reliably turn off the thyristor converter valve T 51 . In this stage, arms A1 and A2 do not participate in any commutation, and their arm currents remain unchanged at the current values of the previous stage. After the thyristor converter valve T 51 is reliably turned off, the inter-line power flow controller is converted to operating mode III, and arm A1 replaces arm A0 in operating mode I as the new commutation arm; by alternately conducting the thyristor converter valves T 32 and T 42 , realize the parallel commutation of the commutation arm A1 with the energy storage arms A0 and A2, and control the feed-forward of the arm voltage of the energy storage arm A0 to be U 2,Ⅲ , and the feed-forward of the arm voltage of the energy storage arm A2 to be U 1,Ⅲ , and according to the control scheme of the three arms, maintain the same power flow regulation effect as in operating mode I;

[0024] (2) T 11 / T 12 Open circuit fault occurs

[0025] Assume that the line - to - line DCPFC is operating normally in operating mode I. If the thyristor converter valve T 11 / T 12 has an open - circuit fault, the controller will control the line - to - line DCPFC to switch to operating mode II. It needs to go through transient process I and transient process II. In transient process I, the control bridge arm A2 commutates with bridge arm A0 to achieve reliable turn - off of the thyristor converter valve T 51 . In transient process II, control the thyristor converter valve T 42 and T 31 to commutate to achieve reliable turn - off of T 42 . Finally, the line - to - line DCPFC switches to operating mode II for operation and continues to achieve the same power flow regulation effect. The specific control steps are as follows:

[0026] If the thyristor converter valve T 11 / T 12 has an open - circuit fault during the commutation between bridge arm A0 and bridge arm A2, after the commutation ends, the voltage of commutation bridge arm A0 will gradually switch from U 2,Ⅰ to U 1,Ⅰ . At the same time, the thyristor converter valve T 11 / T 12 receives a trigger signal. At this time, T 12 has already had an open - circuit fault and cannot be triggered to conduct. There will be no positive current in commutation bridge arm A0, and its current should always be 0. If it is detected that the zero current in bridge arm A0 exceeds the set dead - time, it is considered that the thyristor converter valve T 12 has had an open - circuit fault. At this time, the following open - circuit fault mode conversion scheme will be used for control:

[0027] First, enter transient process I. The goal of this process is to control bridge arm A2 to commutate with bridge arm A0 to achieve reliable turn - off of the thyristor converter valve T 51 . The specific implementation method is: first trigger the thyristor converter valve T 21 . Since I the direction of 2 is positive, the thyristor converter valve T 21 is successfully triggered to conduct. After that, control the voltage of energy - storage bridge arm A1 to remain at the voltage U 1,Ⅰ in operating mode I, the voltage of energy - storage bridge arm A2 to remain at the voltage U 2,Ⅰ in operating mode I, control the voltage of commutation bridge arm A0 to be the voltage of energy - storage bridge arm A2, that is U 2,Ⅰ plus the thyristor converter valve T51 Reverse turn-off voltage - U RE , at this time, since I the direction of 2 is positive and the voltage of arm A0 is less than that of arm A2, so arm A2 commutates to arm A0, and the current of arm A0 rises from 0 at a rate of U RE / 2 L to I 2. The current of arm A2 decreases from U RE / 2 L at a rate of I 2 to 0. After the commutation between arm A2 and arm A0 ends, that is, after the current of arm A0 rises to I 2, a reverse voltage longer than the thyristor turn-off time 51 is applied across T t q to reliably turn off T U RE . During this stage, arm A1 does not participate in any commutation and its arm current remains 51 1 unchanged; I

[0028] After the thyristor commutation valve T 51 is reliably turned off, the transition process II is entered. The goal of this process is to control the commutation between the thyristor commutation valve T 42 and T 31 to achieve the reliable turn-off of T 42 . The specific implementation method is: control the voltage of arm A0 to be the reverse turn-off voltage of the thyristor commutation valve T 42 - U RE , control the voltage of arm A1 to be the voltage in operation mode II U 1,Ⅱ , and the voltage of arm A2 to be the voltage in operation mode II U 2,Ⅱ . During this period, control the triggering of the thyristor commutation valve T 31 . Since I the direction of 2 is positive and the voltage across T 31 is U RE , so T 31 is successfully triggered and turned on. Under the action of the negative voltage of arm A0 - U RE , the thyristor commutation valve T 42 and T 31 commutate. The current flowing through T 42 decreases at a rate of U RE / L from​I 1 drops to 0, and the current of arm A0 decreases at a U RE / L rising rate of I from 2 to I 1 + I 2. When the thyristor commutation valve T 42 and T 31 complete commutation, that is, when the current of the thyristor commutation valve T 42 drops to 0, continue to control the voltage of arm A0 as the reverse turn-off voltage of the thyristor commutation valve T 42 - U RE for a period of time, which is longer than the turn-off time of the thyristor t q so as to ensure reliable turn-off of the thyristor commutation valve T 42 . During this stage, arms A1 and A2 do not participate in any commutation, and their arm currents remain unchanged at the current values of the previous stage. After the reliable turn-off of the thyristor T 42 , the inter-line power flow controller switches to operation mode II. Arm A2 replaces arm A0 in operation mode I as the new commutation arm. By alternately turning on the thyristor commutation valves T 51 and T 61 , parallel commutation between the commutation arm A2 and the energy storage arms A0 and A1 is achieved. Control the feed-forward of the arm voltage of the energy storage arm A0 as U 2,Ⅱ , and the feed-forward of the arm voltage of the energy storage arm A1 as U 1,Ⅱ , and according to the control schemes of the three arms, maintain the same power flow regulation effect as in operation mode I.

[0029] Compared with the prior art, the present invention has the following advantages:

[0030] 1. In terms of circuit topology, the inter-line DC power flow controller proposed by the present invention is based on the complementary advantages of the wide-range voltage flexible output ability of modular multilevel in flexible DC technology and the on-off ability of large-capacity thyristors in conventional DC technology, and can achieve power flow control under high-voltage and large-capacity DC conditions.

[0031] 2. In terms of control strategy, the present invention designs an inter-line energy balance method. The arm does not need to exchange energy with the external power grid through an external power supply, with low cost; all modular multilevel arms adopt full-bridge sub-modules, which can achieve bidirectional DC power flow control; the inter-line DC power flow controller designed by the present invention does not need to introduce a circulating current path and an AC filter circuit, which can reduce device stress and quantity, reduce investment costs, and avoid the efficiency problem of AC circulating current.

[0032] 3. In terms of operation protection, the interline DC power flow controller designed in the present invention has three operation modes, and an operation mode switching method is designed; after a short - circuit or open - circuit fault occurs in the thyristor converter valve, it can maintain the power flow control ability and achieve fault - tolerant operation by switching the operation mode.

[0033] 4. In terms of engineering practice, in the present invention, considering that the thyristor valve group has no self - turn - off ability, in order to achieve reliable on - off of the thyristor valve group and reduce the d i / dt, d u / dt stress, a coordinated operation method is designed based on the flexible voltage output ability of the full - bridge arm, improving the reliability of topological engineering applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is the topology of the interline DCPFC with fault - tolerant ability;

[0035] Figure 2 are the three operation modes of the interline DCPFC with fault - tolerant ability;

[0036] Figure 3 is the theoretical waveform of the interline DCPFC with fault - tolerant ability;

[0037] Figure 4 is the control scheme of the interline DCPFC with fault - tolerant ability;

[0038] Figure 5 is for the thyristor converter valve T 11 / T 12 is the mode conversion process after a short - circuit fault occurs;

[0039] Figure 6 is for the thyristor converter valve T 11 / T 12 is the arm current waveform during the conversion process after a short - circuit fault occurs;

[0040] Figure 7 is for the thyristor converter valve T 11 / T 12 is the mode conversion process after an open - circuit fault occurs;

[0041] Figure 8 is for the thyristor converter valve T 11 / T 12 is the arm current waveform during the conversion process after an open - circuit fault occurs;

[0042] Figure 9 is for the thyristor converter valve T 11 / T 12 is the simulation waveform before and after a short - circuit fault occurs;

[0043] Figure 10For the thyristor converter valve T 11 / T 12 The simulation waveforms before and after the open - circuit fault occurs. Specific implementation manners

[0044] The technical solution of the present invention will be further described below in conjunction with the accompanying drawings, but is not limited thereto. Any modification or equivalent replacement of the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention shall be covered by the protection scope of the present invention.

[0045] The present invention provides an inter - line DC power flow controller with fault tolerance ability. The topology of the inter - line DCPFC is as Figure 1 shown. It is composed of 3 full - bridge sub - module arms (arm A0, arm A1, arm A2), 3 arm inductors, and 6 anti - parallel thyristor valve groups. R 1 is the equivalent series resistance of line 1, R 2 is the equivalent series resistance of line 2. In this topology, one end of the arm A0 is connected to terminal 1 through the anti - parallel thyristor valve group T 11 / T 12 and connected to terminal 2 through the anti - parallel thyristor valve group T 21 / T 22 ; the other end of the arm A0 is connected to terminal 3 through the first arm inductor; one end of the arm A1 is connected to terminal 1, and the other end of the arm A1 is respectively connected to the anti - parallel thyristor valve group T 31 / T 32 and the anti - parallel thyristor valve group T 41 / T 42 ; the anti - parallel thyristor valve group T 31 / T 32 is connected to terminal 2, and the anti - parallel thyristor valve group T 41 / T 42 is connected to terminal 3; one end of the arm A2 is connected to terminal 2, and the other end of the arm A2 is respectively connected to the anti - parallel thyristor valve group T 51 / T 52 and the anti - parallel thyristor valve group T 61 / T 62 ; the anti - parallel thyristor valve group T 51 / T 52 is connected to terminal 3, and the anti - parallel thyristor valve group T 61 / T 62 is connected to terminal 1. Among them, each of the three arms is composed of N= 10 full - bridge sub - modules connected in series, and the positive directions of relevant electrical quantities are as Figure 1 marked.

[0046] In the present invention, the inter-line DCPFC has three operating modes, as Figure 2 shown. In each operating mode, two arms serve as energy storage arms, which are always connected in series to two DC lines to provide the voltage difference required for power flow regulation. The other arm is a commutation arm, and its current is controlled to be two trapezoidal waves to maintain the energy balance of the energy storage arms. The working waveforms of the inter-line DCPFC are as Figure 3 shown. In operating mode I, the commutation arm is arm A0, and the energy storage arms are arm A1 and arm A2; in operating mode II, the commutation arm is arm A2, and the energy storage arms are arm A0 and arm A1; in operating mode III, the commutation arm is arm A1, and the energy storage arms are arm A0 and arm A2.

[0047] In the present invention, in order to ensure the normal operation of the inter-line DCPFC, a reasonable control scheme is required. Taking operating mode I as an example, different control schemes should be adopted for the commutation arm A0 and the energy storage arms A1 and A2 in the inter-line DCPFC topology, as Figure 4 shown. As Figure 4 (a), for the control of the commutation arm A0, it is divided into arm energy balance control, arm current control, thyristor commutation valve on-off control, arm voltage feedforward, sub-module capacitor voltage equalization, and carrier phase shift modulation. Since losses will be generated during the operation of the inter-line DCPFC, arm energy balance control needs to be introduced. This part of the control is to multiply the deviation between the total capacitance voltage reference value U C_ref * N 0 ( U C_ref is the reference capacitance voltage of each full-bridge sub-module, N 0 is the number of sub-modules of the commutation arm A0) and its actual value U C_sum by the direction of the current of the commutation arm A0 at this time, and adjust the voltage amplitude of the commutation arm A0 through its output u ESR_a so as to keep the total energy of the commutation arm A0 balanced. In order to ensure that the actual current of the commutation arm A0 can track its reference signal i A0_ref , arm current control also needs to be introduced. This part of the control is to obtain the commutation arm A0 current reference signal i A0_ref according to the theoretical waveform, subtract the actual current i A0 of the commutation arm A0 from the reference signal i A0_ref , send the difference into a proportional-integral (PI) controller, and obtain the arm voltage adjustment amount ucurrent_control_a Meanwhile, to achieve rapid tracking of the current in commutation leg A0, a commutation voltage feedforward is also required. U 0 and the arm voltage feedforward control. This part of the control multiplies the voltage when charging commutation leg A0 U 1,Ⅰ以及 the voltage when discharging U 2,Ⅰ分别 with waveform generator 1 and waveform generator 2 to obtain the voltage feedforward signal of commutation leg A0. The thyristor commutation valve turn-on and turn-off control is used to provide the trigger signals and reverse turn-off voltages for the two thyristor commutation valves connected to commutation leg A0 U RE ; finally, the obtained voltage reference signal of commutation leg A0 is sent to the sub-module capacitor voltage balancing and carrier phase-shifted modulation to obtain the IGBT drive signals of each sub-module of the commutation leg; as Figure 4 (b), for energy storage legs A1 and A2, since they are always connected to the DC line to provide the voltage required for power flow regulation, they do not require thyristor commutation valve turn-on and turn-off control, and the remaining control is the same as that of commutation leg A0.

[0048] In the present invention, the inter-line DCPFC has a certain fault tolerance ability. In each operating mode, there are two thyristor valve groups that are always on and always off. When the thyristor valve group T 11 / T 12 fails, it can continue to achieve the same power flow regulation effect by switching the operating mode. The specific control strategy of the operating mode switching method is as follows:

[0049] (1) T 11 / T 12 has a short-circuit fault

[0050] Assume that the inter-line DCPFC is operating normally in operating mode I. If the thyristor commutation valve T 11 / T 12 has a short-circuit fault, the controller will control the inter-line DCPFC to switch to operating mode III, which requires passing through transient process I and transient process II, as Figure 5 shown.

[0051] As Figure 6 shows the theoretical current waveforms of the three legs in the four stages after the thyristor commutation valve T 11 / T 12 has a short-circuit fault. In transient process I, control leg A1 to commutate with leg A0 to reliably turn off the thyristor commutation valve T Figure 5 shown. In transient process II, control the thyristor commutation valve T 42 to commutate with T 51 and T 62 to commutate to achieve T51 Reliable turn-off. Finally, the inter-phase DCPFC is converted to operating mode III to continue to achieve the same power flow regulation effect.

[0052] The specific control strategy is as follows:

[0053] If the thyristor converter valve T 11 / T 12 When commuting between arm A0 and arm A1 ( Figure 6 [0, t 1] stage), a short-circuit fault occurs. After commutation, arm A0 will output the thyristor turn-off voltage U RE to turn off T 12 reliably. However, since T 12 has already short-circuited at this time, arm A0 will generate a reverse current under the action of the reverse voltage U RE , as shown in Figure 6 t 1, t 2] stage. Therefore, if a large reverse current is detected in arm A0, it is considered that the thyristor converter valve T 12 has short-circuited, and at this time, control will be carried out according to the short-circuit fault mode conversion scheme shown in Figure 5 .

[0054] First, enter the Figure 5 shown transient process I ( Figure 6 t 2, t 3] stage). The goal of this process is to control the commutation between arm A1 and arm A0 to achieve reliable turn-off of the thyristor converter valve T 42 . The specific implementation method is to control the voltage of energy storage arm A1 to remain at the voltage U 1,Ⅰ in operating mode I, and the voltage of energy storage arm A2 to remain at the voltage U 2,Ⅰ in operating mode I. Control the voltage of commutation arm A0 to be the voltage of energy storage arm A1, that is, U 1,Ⅰ plus the reverse turn-off voltage - 42 of the thyristor converter valve T U RE . At this time, since I the direction of 1 is positive and the voltage of arm A0 is less than that of arm A1, arm A1 commutes to arm A0, and the current of arm A0 rises from the reverse current to U RE / 2 L at a rising rate, and the current of arm A1 decreases at a rate of I 1, and the current of arm A1 decreases at a rate of URE / 2 L The rate of decrease of I 1 drops to 0. It should be noted that when the commutation between bridge arm A1 and bridge arm A0 ends, the current of bridge arm A0 rises to I 1, it is also necessary to switch the thyristor valve T 42 The voltage across the two ends is longer than the thyristor turn-off time. t q Back pressure U RE , so that T 42 In this stage, bridge arm A2 does not participate in any commutation, and its bridge arm current remains I 2Unchanged.

[0055] In the thyristor valve T 42 After reliable shutdown, enter Figure 5 The transition process II shown Figure 6 [ t 3, t 4] stage), the goal of this process is to control the thyristor commutation valve T 51 With T 62 Commutation, achieving T 51 The specific implementation method is to control the voltage of bridge arm A0 to be the thyristor commutation valve T 51 The reverse shutdown voltage of U RE , the voltage of control bridge arm A1 is the voltage under operation mode III - U 1,Ⅲ , the voltage of bridge arm A2 is the port voltage U 1,Ⅲ During this period, the control triggers the thyristor commutation valve T 62 ,because I 2 direction is positive, and T 62 The voltage across the terminals is U RE , so T 62 Successfully triggered conduction. At the negative voltage of bridge arm A0 - U RE Under the action of the thyristor valve T 51 With T 62 Commutation, flowing through T 51 The current is U RE / L The rate of decrease of I 2 drops to 0, and the current of bridge arm A0 is U RE / L The rate of increase of I 1 rises to I 1+ I2. It should be noted that when the thyristor commutation valve T 51 and T 62 complete commutation, that is, when the current of the thyristor commutation valve T 51 drops to 0, it is still necessary to continue to control the voltage of arm A0 to be the reverse turn-off voltage of the thyristor commutation valve T 51 - U RE for a period of time, which is longer than the turn-off time of the thyristor t q , so as to reliably turn off the thyristor commutation valve T 51 . In this stage, arms A1 and A2 do not participate in any commutation, and the arm currents thereof remain unchanged at the current values of the previous stage. After the thyristor commutation valve T 51 is reliably turned off ( Figure 6 t after 4), the proposed inter-line power flow controller is converted to operation mode III, and arm A1 replaces arm A0 in operation mode I to become the new commutation arm. By alternately conducting the thyristor commutation valves T 32 and T 42 , the parallel commutation of commutation arm A1 with energy storage arms A0 and A2 can be achieved. By controlling the feedforward of the arm voltage of energy storage arm A0 to be U 2,Ⅲ , and the feedforward of the arm voltage of energy storage arm A2 to be U 1,Ⅲ , according to the control scheme of the three arms proposed above, the same power flow regulation effect as that in operation mode I can be maintained.

[0056] T 11 / T 12 Fault-tolerant operation result after short circuit:

[0057] To verify the rationality of the design of the above operation mode conversion method, Figure 9 for T 11 / T 12 are the corresponding simulation results before and after a short circuit fault occurs. In the simulation, arm a, arm b, and arm c respectively correspond to Figure 1 arms A0, A1, and A2 in. As can be seen from Figure 9 , the directions of line 1 current I 1 and line 2 current I 2 are the same, which are I 1 = 1800 A and I 2 = 1200 A respectively. The inter-line DCPFC works normally in operation mode I before 2 s, and a short circuit fault occurs in T 12 after 2 s. It can be seen from the waveforms in the period of [2.000 s, 2.012 s] on the right that after a large reverse current is generated in commutation arm a of the inter-line power flow controller, it is considered that thyristor T12 A short circuit fault occurs, and then the operation mode is switched. First, the bridge arm a and bridge arm b are controlled to commutate, and the current of bridge arm a increases from the reverse current to the line 1 current. I 1 is 1800A, and the current of bridge arm b is I 1 drops to 0. Then the thyristor commutation valve T 51 With T 62 Commutation, flowing through the thyristor commutation valve T 51 The current from I 2 gradually decreases to 0, so that the current of bridge arm a is I 1 rises to I 1+ I 2. After these two transition processes, the line power flow controller is finally converted to Figure 2 In the operation mode III shown in the figure, the commutation bridge arm changes from the previous bridge arm a to bridge arm b. At this time, the power flow controller works in the operation mode III, and the line 1 current I 1 Keep 1800A unchanged, maintaining the previous flow regulation effect.

[0058] (2) T 11 / T 12 A circuit breaker failure occurs

[0059] Assume that the proposed line DCPFC works normally in operation mode I. If the thyristor valve T 11 / T 12 When a circuit breaker fault occurs, the controller switches the DCPFC between control lines to operation mode II, which requires transition process I and transition process II. Figure 7 shown.

[0060] like Figure 8 The thyristor valve T 11 / T 12 After the circuit breaker fault occurs, the three bridge arms Figure 7 The current theoretical waveforms in the four stages are shown. In the transition process I, the bridge arm A2 is controlled to commutate with the bridge arm A0 to realize the thyristor commutation valve T 51 Reliable shutdown. In the transition process II, the thyristor commutation valve T 42 With T 31 Commutation, achieving T 42 Finally, the proposed line-to-line DCPFC is switched to operation mode II and continues to play the same power flow regulation effect.

[0061] The specific control strategies are as follows:

[0062] If the thyristor valve T 11 / T 12 When bridge arm A0 and bridge arm A2 are commutating ( Figure 8 [0,t 1) In the short - circuit fault stage, after commutation ends, the voltage of converter bridge arm A0 will change from U 2,Ⅰ gradually switch to U 1,Ⅰ , and at the same time, thyristor converter valve T 11 / T 12 receives a trigger signal. However, since T 12 has already had an open - circuit fault at this time and cannot be triggered to conduct, there will be no forward current in converter bridge arm A0, and its current should always be 0, as shown in Figure 8 t 1, t 2) stage. Therefore, if it is detected that the zero - current in bridge arm A0 exceeds the set dead - time ( Figure 3 T d stage), it is considered that thyristor converter valve T 12 has had an open - circuit fault. At this time, control will be carried out according to the open - circuit fault mode conversion scheme shown in Figure 7 .

[0063] First, enter the transition process I shown in Figure 7 ( Figure 8 t 2, t 3) stage). The goal of this process is to control the commutation between bridge arm A2 and bridge arm A0 to achieve reliable turn - off of thyristor converter valve T 51 . The specific implementation method is as follows: First, trigger thyristor converter valve T 21 . Since I the direction of 2 is positive, thyristor converter valve T 21 is successfully triggered to conduct. Then, control the voltage of energy - storage bridge arm A1 to be maintained at the voltage U 1,Ⅰ in operation mode I, and the voltage of energy - storage bridge arm A2 to be maintained at the voltage U 2,Ⅰ in operation mode I. Control the voltage of converter bridge arm A0 to be the voltage of energy - storage bridge arm A2, that is, U 2,Ⅰ plus the reverse turn - off voltage - 51 U RE <000060>. At this time, since I the direction of 2 is positive, and the voltage of bridge arm A0 is less than that of bridge arm A2, bridge arm A2 commutates to bridge arm A0. The current of bridge arm A0 rises from 0 to U RE <000065> / 2 L at a rising rate of I 2, and the current of bridge arm A2 decreases from U RE / 2 LThe rate of decrease of I 2 drops to 0. It should be noted that when the commutation between bridge arm A2 and bridge arm A0 is completed, the current of bridge arm A0 rises to I 2, you also need to 51 The voltage across the two ends is longer than the thyristor turn-off time. t q Back pressure U RE , so that T 51 In this stage, bridge arm A1 does not participate in any commutation, and its bridge arm current remains I 1Unchanged.

[0064] In the thyristor valve T 51 After reliable shutdown, enter Figure 7 The transition process II shown Figure 8 [ t 3, t 4] stage), the goal of this process is to control the thyristor commutation valve T 42 With T 31 Commutation, achieving T 42 The specific implementation method is to control the voltage of bridge arm A0 to be the thyristor commutation valve T 42 The reverse shutdown voltage of U RE , the voltage of control bridge arm A1 is the voltage under operation mode II U 1,Ⅱ , the voltage of bridge arm A2 is the voltage in operation mode II U 2,Ⅱ During this period, the control triggers the thyristor commutation valve T 31 ,because I 2 direction is positive, and T 31 The voltage across the terminals is U RE , so T 31 Successfully triggered conduction. At the negative voltage of bridge arm A0 - U RE Under the action of the thyristor valve T 42 With T 31 Commutation, flowing through T 42 The current is U RE / L The rate of decrease of I 1 drops to 0, the current of bridge arm A0 is U RE / L The rate of increase of I 2 rise to I 1+ I 2. It should be noted that when the thyristor commutator valve T 42 With T31 After the commutation ends, that is, when the current of the thyristor commutation valve T 42 drops to 0, it is still necessary to continue to control the voltage of arm A0 to be the reverse turn-off voltage of the thyristor commutation valve T 42 - U RE for a period of time, which is longer than the turn-off time of the thyristor t q so as to turn off the thyristor commutation valve T 42 reliably. In this stage, arm A1 and arm A2 do not participate in any commutation, and the arm currents thereof remain unchanged at the current values of the previous stage. After the thyristor T 42 is reliably turned off ( Figure 8 t after 4), the proposed inter-line power flow controller is converted to operation mode II, and arm A2 replaces arm A0 in operation mode I to become the new commutation arm. By alternately turning on the thyristor commutation valves T 51 and T 61 , the parallel commutation of commutation arm A2 with energy storage arms A0 and A1 can be achieved, and the feedforward of the arm voltage of energy storage arm A0 is controlled to be U 2,Ⅱ , and the feedforward of the arm voltage of energy storage arm A1 is controlled to be U 1,Ⅱ , and according to the control scheme of the three arms proposed above, the same power flow regulation effect as that in operation mode I can be maintained.

[0065] T 11 / T 12 Fault-tolerant operation result after T

[0066] Figure 10 For T 11 / T 12 are the corresponding simulation results before and after the open-circuit fault occurs. In the simulation, arm a, arm b, and arm c respectively correspond to Figure 1 arms A0, A1, and A2 in 12 . The inter-line DCPFC works normally in operation mode I before 2 s, and the open-circuit fault of T 12 occurs after 2 s. It can be seen from the waveforms in the period of [1.999 s, 2.002 s] on the right that the inter-line power flow controller determines that the thyristor T 12 has an open-circuit fault after triggering T 42 in the theoretical time but the current of arm a is still 0, and then the operation mode is switched. First, control the commutation of arm a and arm c. The current of arm a rises from 0 to the current of line 2 I 2, that is, 1200 A, and the current of arm b drops from I 2 to 0. Then control the thyristor commutation valves T 31Commutation, the current flowing through the thyristor commutation valve T 42 decreases from I 1 to 0 gradually, so that the current of arm a increases from I 2 to I 1 + I 2. After these two transition processes, the inter-line power flow controller finally converts to Figure 2 the operating mode II as shown, and the commutation arm changes from the previous arm a to arm c. At this time, the power flow controller operates in operating mode III, and at the same time, the current of line 1 I 1 remains unchanged at 1800 A, maintaining the previous power flow regulation effect.

Claims

1. A line-interval DC power flow controller with fault tolerance ability, characterized in that The topology of the inter-line DC power flow controller consists of a full-bridge sub-module arm, an arm inductor, and an anti-parallel thyristor valve group, where: The full-bridge sub-module arm includes arm A0, arm A1, and arm A2; The arm inductors include a first arm inductor, a second arm inductor, and a third arm inductor; The antiparallel thyristor valve bank includes the antiparallel thyristor valve bank T 11 / T 12 and the antiparallel thyristor valve bank T 21 / T 22 and the antiparallel thyristor valve bank T 31 / T 32 and the antiparallel thyristor valve bank T 41 / T 42 and the antiparallel thyristor valve bank T 51 / T 52 and the antiparallel thyristor valve bank T 61 / T 62 ; One end of the arm A0 is connected to terminal 1 through the antiparallel thyristor valve bank T 11 / T 12 and is connected to terminal 2 through the antiparallel thyristor valve bank T 21 / T 22 and the other end of the arm A0 is connected to terminal 3 through the first arm inductor; One end of the bridge arm A1 is connected to terminal 1, and the other end of the bridge arm A1 is connected to the anti-parallel thyristor valve bank T 31 / T 32 and the anti-parallel thyristor valve bank T 41 / T 42 through the second bridge arm inductor, and the anti-parallel thyristor valve bank T 31 / T 32 is connected to terminal 2, and the anti-parallel thyristor valve bank T 41 / T 42 is connected to terminal 3; One end of the bridge arm A2 is connected to terminal 2, and the other end of the bridge arm A2 is respectively connected to the anti-parallel thyristor valve bank T 51 / T 52 and the anti-parallel thyristor valve bank T 61 / T 62 through the third bridge arm inductor. The anti-parallel thyristor valve bank T 51 / T 52 is connected to terminal 3, and the anti-parallel thyristor valve bank T 61 / T 62 is connected to terminal 1; The inter-line DC power flow controller has three operating modes. In each operating mode, two arms serve as energy storage arms, which are always connected in series to two DC lines to provide the voltage difference required for power flow regulation. The other arm is a commutation arm, and its current is controlled to be two trapezoidal waves to maintain the energy balance of the energy storage arms. Specifically: in operating mode I, the commutation arm is arm A0, and the energy storage arms are arm A1 and arm A2; in operating mode II, the commutation arm is arm A2, and the energy storage arms are arm A0 and arm A1; in operating mode III, the commutation arm is arm A1, and the energy storage arms are arm A0 and arm A2; The method for switching the operating mode of the inter-line DC power flow controller includes the following steps: (1) T 11 / T 12 A short circuit fault occurs Assume that the inter-line DCPFC is operating normally in operating mode I. If the thyristor converter valve T 11 / T 12 experiences a short-circuit fault, the controller will control the inter-line DCPFC to switch to operating mode III. This requires passing through transition process I and transition process II. During transition process I, the control bridge arm A1 commutates with bridge arm A0 to achieve reliable turn-off of the thyristor converter valve T 42 . During transition process II, the thyristor converter valve T 51 is commutated with T 62 to achieve reliable turn-off of T 51 . Finally, the inter-line DCPFC switches to operating mode III for operation, continuing to achieve the same power flow regulation effect. The specific control steps are as follows: If the thyristor commutation valve T 11 / T 12 has a short-circuit fault during commutation between arm A0 and arm A1, after the commutation ends, arm A0 will output the thyristor turn-off voltage U RE to make T 12 turn off reliably. At this time, T 12 has already short-circuited, so arm A0 will generate a reverse current under the action of U RE If a large reverse current is detected in arm A0, it is considered that the thyristor commutation valve T 12 has a short-circuit fault. At this time, the control will be carried out according to the following short-circuit fault mode conversion scheme: First, enter the transition process I. The goal of this process is to control the commutation between arm A1 and arm A0 to achieve reliable turn-off of the thyristor commutation valve T. The specific implementation method is as follows: Control the voltage of the energy storage arm A1 to remain at the voltage in operating mode I, and the voltage of the energy storage arm A2 to remain at the voltage in operating mode I. Control the voltage of the commutation arm A0 to be -; at this time, since the direction of 1 is positive and the voltage of arm A0 is less than that of arm A1, arm A1 commutates to arm A0. The current of arm A0 rises from the reverse current to 1 at a rising rate of / 2, and the current of arm A1 decreases from 1 to 0 at a decreasing rate of / 2. After the commutation between arm A1 and arm A0 ends, that is, after the current of arm A0 rises to 1, apply a voltage longer than the thyristor turn-off time at both ends of the thyristor commutation valve T to enable reliable turn-off of T. During this stage, arm A2 does not participate in any commutation, and its arm current remains unchanged at 2. 42 Keep the voltage of the energy storage arm A1 at the voltage in operating mode I U 1,Ⅰ and the voltage of the energy storage arm A2 at the voltage in operating mode I U 2,Ⅰ ; Control the voltage of the commutation arm A0 to be U 1,Ⅰ - U RE At this time, since I the direction of 1 is positive and the voltage of arm A0 is less than that of arm A1, arm A1 commutates to arm A0. The current of arm A0 rises from the reverse current to 1 at a rising rate of U RE / 2 L and the current of arm A1 decreases from I 1 to 0 at a decreasing rate of U RE / 2 L After the commutation between arm A1 and arm A0 ends, that is, after the current of arm A0 rises to I 1, apply a voltage longer than the thyristor turn-off time I at both ends of the thyristor commutation valve T 42 to enable reliable turn-off of T. During this stage, arm A2 does not participate in any commutation, and its arm current remains t q unchanged at U RE 2; 42 During this stage, arm A2 does not participate in any commutation, and its arm current remains I unchanged at 2; After the thyristor converter valve T 42 is reliably turned off, the transition process II is entered. The goal of this process is to control the thyristor converter valve T 51 and T 62 to commutate, so as to achieve the reliable turn-off of T 51 . The specific implementation method is: control the voltage of arm A0 to be - U RE , control the voltage of arm A1 to be the voltage - U 1,Ⅲ in operation mode III, the voltage of arm A2 is the port voltage U 1,Ⅲ . During this period, control the thyristor converter valve T 62 to be triggered. Since I the direction of 2 is positive and the voltage across T 62 is U RE , so T 62 is successfully triggered and turned on. Under the action of the voltage of arm A0 - U RE , the thyristor converter valve T 51 and T 62 commutate. The current flowing through T 51 decreases at a rate of U RE / L from I 2 to 0, and the current of arm A0 increases at a rate of U RE / L from I 1 to I 1 + I 2. When the commutation between the thyristor converter valve T 51 and T 62 ends, that is, the current of the thyristor converter valve T 51 drops to 0, continue to control the voltage of arm A0 to be - U RE for a period of time, and this period of time should be longer than the turn-off time of the thyristor t q , so as to make the thyristor converter valve T 51 reliably turned off. In this stage, arms A1 and A2 do not participate in any commutation, and their arm currents remain unchanged at the current values of the previous stage. After the thyristor converter valve T 51 is reliably turned off, the inter-line power flow controller is converted to operation mode III, and arm A1 replaces arm A0 in operation mode I as the new commutation arm; by alternately turning on the thyristor converter valves T 32 and T 42 , the parallel commutation of commutation arm A1 with energy storage arms A0 and A2 is realized, and the feed-forward of the arm voltage of energy storage arm A0 is controlled to be U 2,Ⅲ , the arm voltage feedforward of the energy storage arm A2 is U 1,Ⅲ , according to the control scheme of the three arms, maintaining the same power flow regulation effect as that in the operation mode I; (2) T 11 / T 12 Open circuit fault occurs Assume that the inter-line DCPFC is operating normally in operating mode I. If the thyristor converter valve T 11 / T 12 experiences an open-circuit fault, the controller will control the inter-line DCPFC to switch to operating mode II. This requires passing through transient process I and transient process II. During transient process I, the control arm A2 commutates with arm A0 to achieve reliable turn-off of the thyristor converter valve T 51 . During transient process II, the control thyristor converter valve T 42 commutates with T 31 to achieve reliable turn-off of T 42 . Finally, the inter-line DCPFC switches to operating mode II for operation and continues to achieve the same power flow regulation effect. The specific control steps are as follows: If the thyristor converter valve T 11 / T 12 experiences an open - circuit fault during commutation between arm A0 and arm A2, after the commutation is completed, the voltage of commutation arm A0 will change from U 2,Ⅰ step - by - step to U 1,Ⅰ , and at the same time, the thyristor converter valve T 11 / T 12 receives a trigger signal. At this time, T 12 has already experienced an open - circuit fault and cannot be triggered to conduct. No forward current will appear in commutation arm A0, and its current should always be 0. If zero current exceeding the set dead - time is detected in arm A0, it is considered that the thyristor converter valve T 12 has experienced an open - circuit fault, and then the following open - circuit fault mode conversion scheme will be used for control: First, enter the transition process I. The goal of this process is to control the commutation between arm A2 and arm A0 to achieve the reliable turn-off of the thyristor commutation valve T. 51 The specific implementation method is as follows: First, trigger the thyristor commutation valve T. 21 Since I the direction of 2 is positive, the thyristor commutation valve T 21 is triggered and conducts smoothly. After that, control the voltage of the energy storage arm A1 to remain at the voltage in operating mode I U 1,Ⅰ and the voltage of the energy storage arm A2 to remain at the voltage in operating mode I U 2,Ⅰ Control the voltage of the commutation arm A0 to be U 2,Ⅰ - U RE At this time, since I the direction of 2 is positive and the voltage of arm A0 is less than that of arm A2, arm A2 commutates to arm A0. The current of arm A0 rises from 0 to U RE / 2 L at a rising rate of I 2, and the current of arm A2 decreases from U RE / 2 L to 0 at a decreasing rate. After the commutation between arm A2 and arm A0 ends, that is, when the current of arm A0 rises to I 2, apply a I longer than the thyristor turn-off time 51 t q at both ends of T U RE to ensure the reliable turn-off of T 51 . During this stage, arm A1 does not participate in any commutation, and its arm current remains I 1 unchanged;​ After the thyristor converter valve T 51 is reliably turned off, it enters the transition process II. The goal of this process is to control the thyristor converter valve T 42 and T 31 to commutate, so as to achieve the reliable turn-off of T 42 . The specific implementation method is: control the voltage of arm A0 to be - U RE , control the voltage of arm A1 to be the voltage in operation mode II U 1,Ⅱ , and the voltage of arm A2 to be the voltage in operation mode II U 2,Ⅱ . During this period, control the thyristor converter valve T 31 to be triggered. Since I the direction of 2 is positive, and the voltage across T 31 is U RE , so T 31 is successfully triggered and turned on. Under the action of the voltage - U RE of arm A0, the thyristor converter valve T 42 and T 31 commutate. The current flowing through T 42 decreases at a rate of U RE / L from I 1 to 0, and the current of arm A0 increases at a rate of U RE / L from I 2 to I 1 + I 2. When the commutation between the thyristor converter valve T 42 and T 31 ends, that is, the current of the thyristor converter valve T 42 drops to 0, continue to control the voltage of arm A0 to be - U RE for a period of time, which is longer than the turn-off time t q of the thyristor, so as to make the thyristor converter valve T 42 reliably turned off. In this stage, arms A1 and A2 do not participate in any commutation, and their arm currents remain unchanged at the current values of the previous stage. After the thyristor T 42 is reliably turned off, the inter-line power flow controller switches to operation mode II. Arm A2 replaces arm A0 in operation mode I as the new commutation arm. By alternately turning on the thyristor converter valves T 51 and T 61 , the parallel commutation between the commutation arm A2 and the energy storage arms A0 and A1 is achieved, and the feed-forward of the arm voltage of the energy storage arm A0 is controlled to be U 2,Ⅱ , the arm voltage feedforward of the energy storage arm A1 is U 1,Ⅱ , according to the control schemes of the three arms, maintaining the same power flow regulation effect as that in the operation mode I.

2. The control method of the inter-line DC power flow controller according to claim 1, characterized in that The method includes the following steps: Step 1: Control of the commutation arm; It is divided into bridge arm voltage feedforward, bridge arm energy balance control, bridge arm current control, thyristor converter valve turn-on and turn-off control, sub-module capacitor voltage equalization and carrier phase-shifted modulation. Among them: the bridge arm voltage feedforward is calculated according to the voltages U 1 and U 2; the bridge arm energy balance control and the bridge arm current control are controlled by a PI controller to follow the reference values; the thyristor converter valve turn-on and turn-off control is used to provide the trigger signals for the two thyristor converter valves connected to the commutation bridge arm and U RE ; finally, the obtained commutation bridge arm voltage reference signal is sent to the sub-module capacitor voltage equalization and carrier phase-shifted modulation to obtain the IGBT drive signal of the bridge arm sub-module; Step 2: Control of the energy storage arm; The energy storage arm is always connected to the DC line to provide the voltage required for power flow regulation, without the need for on-off control of the thyristor converter valve. The remaining control is the same as that of the commutation arm.

Images