Linear power supply, DC power supply system and control method of linear power supply

Abstract

This application provides a linear power supply, a DC power supply system, and a control method for the linear power supply. The linear power supply includes a power supply circuit, a power control circuit, and a voltage control circuit, and the power supply circuit includes a transistor. When the load connected to the power supply circuit is a high-power pulse load, the power control circuit outputs an enable signal (such as a high level or low level) and a reference voltage based on the load power and the transistor's output voltage. Furthermore, the voltage control circuit outputs a first drive signal for the transistor based on the reference voltage and the output voltage, and controls the transistor's operation based on the first drive signal and the enable signal. This avoids the transistor being in a high-impedance state and large voltage drops in the transistor's output voltage, thereby improving the safety and stability of the power supply and making it highly applicable.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a linear power supply, a DC power supply system, and a control method for the linear power supply. Background Technology

[0002] Common DC power supplies are divided into linear power supplies and switching power supplies. Because linear power supplies have advantages such as low ripple, high stability and no high-frequency interference, they are widely used in applications where the load frequency is in the high-frequency range.

[0003] For ease of description, the following explanation will use a low dropout linear regulator (LDO) in a linear power supply as an example. Generally, an LDO includes a control system and a main power supply circuit. The control system can acquire the output voltage of the main power supply circuit in real time. Based on the acquired output voltage and the reference voltage of the main power supply circuit, it generates a drive signal for the transistors in the main power supply circuit. This drive signal then changes the on-state voltage drop of the transistors to dynamically adjust the output voltage of the main power supply circuit to supply power to the load. However, when a LDO supplies power to a pulsed load (i.e., a load with a pulsed power waveform), the transistors are in a high-impedance state when the load power momentarily drops to zero. Therefore, a very large instantaneous loss occurs when the power increases from zero, increasing the thermal stress on the LDO and resulting in low safety. Summary of the Invention

[0004] This application provides a linear power supply, a DC power supply system, and a control method for the linear power supply, which can avoid transistors being in a high impedance state and large drops in transistor output voltage, thereby improving the safety and stability of power supply and having strong applicability.

[0005] Firstly, this application provides a linear power supply, which includes a power supply circuit (i.e., the main circuit of the linear power supply), a power control circuit, and a voltage control circuit. The input terminal of the power supply circuit can be connected to a DC voltage source, and the output terminal of the power supply circuit can be connected to a load (such as a pulse load or other types of load). The power supply circuit includes a transistor. When the load is a high-power pulse load, the power control circuit outputs an enable signal (such as a high or low level) and a reference voltage based on the load power and the transistor's output voltage. This allows for real-time control of the reference voltage and enable signal in conjunction with the load power to ensure their accuracy. After obtaining the enable signal and reference voltage, the voltage control circuit outputs a first drive signal for the transistor based on the reference voltage and output voltage, and controls the transistor's operation based on the first drive signal and enable signal. This avoids integral saturation of the voltage control circuit, preventing the transistor from being in a high-impedance state, thus reducing the overall transistor loss and reducing the thermal stress of the linear power supply to improve power supply safety. Simultaneously, it also prevents large drops in the transistor's output voltage, improving power supply stability and enhancing the linear power supply's anti-interference capability, making it highly applicable.

[0006] In conjunction with the first aspect, in a first possible implementation, the voltage control circuit described above is used to control the transistor to turn on and adjust the on-state voltage drop of the transistor based on the first drive signal when the enable signal is high. This can prevent the transistor from being in a high impedance state due to the integral saturation of the voltage control circuit, thereby reducing the overall loss of the transistor and reducing the thermal stress of the linear power supply to improve the safety of the power supply. At the same time, it can also prevent the transistor's output voltage from dropping significantly to improve the stability of the power supply and improve the anti-interference capability of the linear power supply, making it highly applicable.

[0007] In conjunction with the first possible implementation of the first aspect, in the second possible implementation, the circuit topology of the voltage control circuit may include, but is not limited to, an analog circuit. To ensure the rapid control response of the voltage control circuit, the voltage control circuit is an analog circuit. In this case, the voltage control circuit includes a first regulator, a first diode, a second diode, a voltage follower, and a first control circuit. Specifically, the first input terminal of the first regulator can serve as the first input terminal of the voltage control circuit, the second input terminal of the first regulator can serve as the second input terminal of the voltage control circuit and be connected to the first output terminal of the power control circuit, the output terminal of the first regulator can be connected to the anode of the first diode, the cathode of the first diode and the anode of the second diode are connected to the non-inverting input terminal of the voltage follower, and the cathode of the second diode can serve as the third input terminal of the voltage control circuit and be connected to the second output terminal of the power control circuit.

[0008] During the control of the transistor's operation, when the enable signal is high, the first regulator outputs the first drive signal to the voltage follower based on the reference voltage and the output voltage. At this time, the voltage follower outputs the first drive signal to the first control circuit when the enable signal is high. Since the drive signal output by the voltage follower and the drive signal output by the first regulator are the same drive signal (i.e., the first drive signal), the transistor's output voltage can be quickly adjusted to a stable state, thereby avoiding large drops in the transistor's output voltage (i.e., reducing output voltage fluctuations in the linear power supply) to improve power supply stability and enhance the linear power supply's anti-interference capability. Furthermore, the first control circuit controls the transistor's conduction based on the first drive signal and adjusts the transistor's on-state voltage drop, thereby preventing integral saturation of the voltage control circuit from causing the transistor to be in a high-impedance state, reducing the overall transistor loss, and further reducing the thermal stress of the linear power supply to improve power supply safety and broaden its applicability.

[0009] In conjunction with the second possible implementation of the first aspect, in the third possible implementation, when the enable signal is low, the voltage follower is further used to output a low level to the first control circuit as a second drive signal for the transistor when the enable signal is low. Furthermore, the first control circuit is also used to control the transistor to turn off based on the second drive signal to stop adjusting the on-state voltage drop of the transistor. Since the reference voltage is equal to the real-time sampled output voltage and the transistor is off at this time, the control parameters corresponding to the voltage control circuit (i.e., the voltage controller or the voltage control loop of the transistor) remain basically unchanged, thereby avoiding the transistor from being in a high impedance state to reduce the overall loss of the transistor, thereby reducing the thermal stress of the linear power supply to improve the safety of the power supply and making it more applicable.

[0010] In a fourth possible embodiment, combining any one of the first to third possible implementations of the first aspect, after obtaining the load power and output voltage, the power control circuit is used to output an enable signal at a low level when the load power is equal to 0, or to output an enable signal at a high level when the load power is greater than 0. This allows for real-time control of the enable signal based on the load power, ensuring the real-time performance and accuracy of the enable signal. Furthermore, the power control circuit is also used to output the output voltage as a reference voltage when the enable signal is low, or to output a power control voltage as a reference voltage when the enable signal is high. The power control voltage can be determined by the load power and a preset reference power. Therefore, the power control circuit can select different voltages (such as output voltage or power control voltage) as reference voltages according to different enable signals, ensuring the real-time performance and accuracy of the reference voltage and enabling the reference voltage to meet the different operating requirements of the transistor, resulting in greater flexibility and adaptability.

[0011] In conjunction with the fourth possible implementation of the first aspect, in the fifth possible implementation, the power control circuit described above may include, but is not limited to, digital chips and analog circuits. The digital chip may include, but is not limited to, digital signal processing (DSP) chips (hereinafter referred to as DSP chips) and field-programmable gate array (FPGA) chips (hereinafter referred to as FPGA chips). When the power control circuit is a digital chip, it includes a comparator, a second regulator, and a selector. The input terminal of the comparator is connected to the input terminal of the second regulator to serve as the first input terminal of the power control circuit. The output terminal of the comparator can be connected to the first input terminal of the selector, and the output terminal of the comparator can serve as the second output terminal of the power control circuit. The output terminal of the second regulator can be connected to the second input terminal of the selector. The third input terminal of the selector can serve as the second input terminal of the power control circuit, and the output terminal of the selector can serve as the first output terminal of the power control circuit.

[0012] During the output of the enable signal and reference voltage, the comparator outputs a low-level enable signal to the selector when the load power is 0, or a high-level enable signal when the load power is greater than 0. This allows for control of the enable signal based on the load power, resulting in a more precise and real-time changing enable signal. The second regulator then outputs a power control voltage to the selector based on the load power and a preset reference power. Furthermore, the selector outputs this voltage as a reference voltage when the enable signal is low, or outputs the power control voltage as a reference voltage when the enable signal is high. Different voltages (such as the output voltage or the power control voltage) can be selected as the reference voltage based on different enable signals, ensuring the real-time performance and accuracy of the reference voltage. This allows the reference voltage to meet the different operating requirements of the transistor, resulting in greater flexibility and adaptability.

[0013] In conjunction with the fifth possible implementation of the first aspect, in the sixth possible implementation, the linear power supply further includes a voltage detection circuit. The input terminal of this voltage detection circuit can be connected to the output terminal of the power supply circuit, and the output terminal of this voltage detection circuit can be connected to the second input terminal of the power control circuit and the first input terminal of the voltage control circuit. The voltage detection circuit (also referred to as a voltage sampling circuit) may include, but is not limited to, a differential detection circuit, a voltage divider resistor sampling circuit, or a voltage Hall sensor. This voltage detection circuit is used to detect the output voltage of the transistor in real time and output the output voltage to the power control circuit and the voltage control circuit, thereby ensuring the real-time and rapid detection of the output voltage, resulting in higher voltage detection efficiency and wider applicability.

[0014] In a seventh possible implementation, in conjunction with the fifth or sixth possible implementation of the first aspect, the linear power supply further includes a power detection circuit. The input terminal of this power detection circuit can be connected to the output terminal of the power supply circuit, and the output terminal of the power detection circuit can be connected to the first input terminal of the power control circuit. This power detection circuit can detect the load power in real time and output the load power to the power control circuit, thereby ensuring the real-time performance and accuracy of the load power, improving power detection efficiency, and enhancing applicability.

[0015] In conjunction with the seventh possible implementation of the first aspect, in the eighth possible implementation, the power detection circuit includes a voltage detection circuit, a current detection circuit, a multiplication circuit, and a second control circuit. The input terminals of both the voltage detection circuit and the current detection circuit serve as input terminals of the power detection circuit. The output terminal of the voltage detection circuit can be connected to the first input terminal of the multiplication circuit, the output terminal of the current detection circuit can be connected to the second input terminal of the multiplication circuit, and the output terminal of the multiplication circuit can be connected to the input terminal of the second control circuit. The output terminal of the second control circuit also serves as the output terminal of the power detection circuit. The voltage detection circuit is used to detect the transistor's output voltage in real time and output the transistor's output voltage to the multiplication circuit, thereby ensuring the real-time performance and accuracy of the output voltage. The current detection circuit is used to detect the transistor's output current in real time and output a differential voltage to the multiplication circuit based on the output current, thereby ensuring the real-time performance and accuracy of the differential voltage. Furthermore, the multiplication circuit outputs the detected power of the load to the second control circuit based on the transistor's output voltage and the differential voltage. The second control circuit outputs the load power to the power control circuit based on the detected power. Since the detected power is determined by the real-time detected output voltage and differential voltage, a more accurate and real-time changing load power can be output based on the detected power, resulting in higher power detection efficiency and stronger adaptability.

[0016] In a ninth possible implementation, in conjunction with the fifth or sixth possible implementation of the first aspect, the power supply circuit further includes a switch during the process of obtaining load power through other means. The transistor can be connected to the load via the switch, and the linear power supply also includes a switch control circuit, which can be connected to the first input terminal of the power control circuit. The switch control circuit is used to obtain load control information from the host computer. When the control information is high, it controls the switch to conduct (i.e., the load is energized) to obtain the load power as the rated power of the load; or when the control information is low, it controls the switch to disconnect (i.e., the load is de-energized) to obtain a load power of 0. Thus, the load power can be controlled by synchronizing the high and low states of the control information (i.e., high or low level) with the on / off state of the load (i.e., energized or de-energized state). This eliminates the need for a power detection circuit to detect the load power, resulting in a simpler structure, lower cost, and wider applicability. The control information may include, but is not limited to, the load's pulse period and pulse duty cycle. After obtaining the load power, the switch control circuit is also used to output the load power to the power control circuit.

[0017] Secondly, this application provides a DC power supply system, which includes a DC voltage source and a linear power supply as provided in any of the first to ninth possible embodiments described above. The output terminal of the DC voltage source can be connected to the input terminal of the power supply circuit in the linear power supply, and the output terminal of the power supply circuit can be connected to a load. The DC voltage source may include, but is not limited to, photovoltaic power generation devices, electrochemical batteries, or alternating current (AC) / direct current (DC) power supplies. The specific type of the DC voltage source can be determined by the actual application scenario and is not limited here. The load may include, but is not limited to, pulse loads or other types of loads. Under normal AC mains power supply conditions, the DC voltage source can perform power conversion and power factor correction on the AC mains to obtain a DC voltage and output this DC voltage to the linear power supply. Furthermore, the linear power supply can perform power conversion on the DC voltage based on the voltage level and performance requirements of the load to output a target DC voltage to power the load. Because the linear power supply offers higher safety and stability, it can improve the safety and stability of the entire DC power supply system, thereby improving system power supply efficiency and broadening its applicability.

[0018] Thirdly, this application provides a control method for a linear power supply. This method is applicable to the control system of a linear power supply (such as the linear power supply provided in any of the first to ninth possible embodiments of the first aspect above). The linear power supply further includes a power supply circuit, the input terminal of which can be connected to a DC voltage source, and the output terminal of which can be connected to a load. The power supply circuit includes a transistor. In this method, the control system can obtain an enable signal and a reference voltage based on the load power and the transistor's output voltage. The reference voltage and enable signal can then be controlled in conjunction with the load power to ensure their accuracy. After obtaining the enable signal and reference voltage, the control system can also generate a first drive signal for the transistor based on the reference voltage and output voltage, and control the transistor's operation based on the first drive signal and enable signal. This avoids the integral saturation of the voltage controller in the control system, which could cause the transistor to be in a high-impedance state, thus reducing the overall loss of the transistor and reducing the thermal stress of the linear power supply to improve power supply safety. Simultaneously, it can also prevent large drops in the transistor's output voltage to improve power supply stability and enhance the anti-interference capability of the linear power supply, making it highly applicable.

[0019] In conjunction with the third aspect, in the first possible implementation, the control system can control the transistor to turn on and adjust the on-state voltage drop of the transistor based on the first drive signal when the enable signal is high. This can avoid the transistor being in a high impedance state due to the integral saturation of the voltage control circuit, thereby reducing the overall loss of the transistor and reducing the thermal stress of the linear power supply to improve the safety of the power supply. At the same time, it can also avoid large drops in the output voltage of the transistor to improve the stability of the power supply and improve the anti-interference capability of the linear power supply, making it highly applicable.

[0020] In conjunction with the third aspect or the first possible implementation of the third aspect, in the second possible implementation, the above-mentioned control system can also obtain that the second drive signal of the transistor is low when the enable signal is low, and control the transistor to turn off based on the second drive signal to stop adjusting the on-state voltage drop of the transistor. Since the reference voltage is equal to the real-time sampled output voltage and the transistor is off at this time, the control parameters corresponding to the voltage controller in the control system are basically unchanged. Therefore, the transistor can be avoided from being in a high impedance state to reduce the overall loss of the transistor, thereby reducing the thermal stress of the linear power supply to improve the safety of power supply and making it more applicable.

[0021] In a third possible implementation, combining any of the third aspect to the second possible implementation, the control system can obtain an enable signal at a low level when the load power is equal to 0, or at a high level when the load power is greater than 0. This allows the enable signal to be controlled according to the load power, resulting in a more precise and real-time changing enable signal. Furthermore, the control system can also obtain a power control voltage based on the load power and a preset reference power. When the enable signal is low, the reference voltage is the output voltage; when the enable signal is high, the reference voltage is the power control voltage. Different voltages (such as output voltage or power control voltage) can be set as reference voltages according to different enable signals, thereby ensuring that the reference voltage meets the different operating requirements of the transistor, resulting in greater flexibility and adaptability.

[0022] In conjunction with any of the third aspect to the third possible implementation, in the fourth possible implementation, before obtaining the enable signal and reference voltage based on the load power and the transistor output voltage, the above-mentioned control system can also obtain the load power of the load and the output voltage of the transistor, so that the reference voltage and enable signal can be controlled in real time based on the load power and the output voltage, which has strong applicability.

[0023] In conjunction with the fourth possible implementation of the third aspect, in the fifth possible implementation, the above-mentioned control system can also obtain the load power in other ways. For example, if the power supply circuit also includes a switch, and the transistor can be connected to the load via the switch, the control system can obtain the load control information. When the control information is high, the switch is controlled to turn on to obtain the load power as the rated power of the load; or when the control information is low, the switch is controlled to turn off to obtain the load power as 0. The load control information may include, but is not limited to, the load's pulse period and pulse duty cycle. Therefore, the above-mentioned control system can control the load power by synchronizing the high and low states of the control information (i.e., high level or low level) with the load's on / off state (i.e., on state or off state), eliminating the need for complex digital or analog circuits to detect the load power, resulting in lower cost and wider applicability.

[0024] In this application, the integral saturation of the voltage control circuit can be avoided, which would cause the transistor to be in a high impedance state, thereby reducing the overall loss of the transistor and thus reducing the thermal stress of the linear power supply to improve the safety of the power supply. At the same time, it can also avoid large drops in the output voltage of the transistor to improve the stability of the power supply and improve the anti-interference capability of the linear power supply. It has strong applicability and wider applicability. Attached Figure Description

[0025] Figure 1 This is a schematic diagram illustrating the application scenario of the linear power supply provided in this application;

[0026] Figure 2 This is a schematic diagram of the structure of the linear power supply provided in this application;

[0027] Figure 3 This is another schematic diagram of the linear power supply provided in this application;

[0028] Figure 4 This is a schematic diagram of the circuit structure of the voltage detection circuit provided in this application;

[0029] Figure 5 This is another schematic diagram of the linear power supply provided in this application;

[0030] Figure 6 This is another schematic diagram of the linear power supply provided in this application;

[0031] Figure 7 This is a schematic diagram of the circuit structure of the current detection circuit provided in this application;

[0032] Figure 8 This is another schematic diagram of the linear power supply provided in this application;

[0033] Figure 9This is a schematic diagram of the circuit structure of the power control circuit provided in this application;

[0034] Figure 10 This is a functional logic waveform diagram of the power control circuit provided in this application;

[0035] Figure 11 This is a schematic diagram of the circuit structure of the voltage control circuit provided in this application;

[0036] Figure 12 This is a control timing diagram of the linear power supply provided in this application;

[0037] Figure 13 This is another control timing diagram of the linear power supply provided in this application;

[0038] Figure 14 This is another control timing diagram of the linear power supply provided in this application;

[0039] Figure 15 This is a flowchart illustrating the control method for the linear power supply provided in this application. Detailed Implementation

[0040] The linear power supply provided in this application is applicable to scientific research, industrial and mining, electrical fields (such as various electrical equipment), electroplating, and other fields. It is suitable for substations, audio equipment, computer cases, and other types of electrical equipment. The linear power supply provided in this application is adaptable to different application scenarios, such as computer applications, audio applications, electroplating applications, or other high-frequency megahertz (MHz) load power supply scenarios (such as high-power pulse load power supply scenarios). The following explanation will use the computer application scenario as an example, and will not be elaborated further.

[0041] Please see also Figure 1 , Figure 1 This is a schematic diagram illustrating an application scenario of the linear power supply provided in this application. In an application scenario where a user is using a computer, such as... Figure 1 As shown, the computer chassis includes a central processing unit (CPU) and a DC power supply system. The DC power supply system can consist of an AC / DC rectified power supply (i.e., a DC voltage source) and a linear power supply (a type of DC / DC power supply). Under normal AC mains power supply conditions, the AC / DC rectified power supply converts the AC mains power into DC voltage and corrects its power factor to output this DC voltage to the linear power supply. Furthermore, the linear power supply can convert the DC voltage based on the voltage level and performance requirements of the CPU (i.e., the load), outputting the target DC voltage to power the CPU, thus enabling the computer chassis to operate normally, allowing the user to use the computer.

[0042] Assuming the aforementioned CPU is a pulsed load, during the process of the linear power supply supplying power to the CPU, the instantaneous drop in CPU power to zero causes the transistors to be in a high-impedance state. Therefore, when the CPU power increases from zero, a very large instantaneous loss occurs, increasing the thermal stress on the linear power supply and reducing its safety. To improve power supply safety, the linear power supply controls the conduction of its internal transistors and adjusts their on-state voltage drop based on the CPU's load power, thereby outputting a stable and high-precision target DC voltage to power the CPU. This process avoids transistors being in a high-impedance state and large voltage drops in the transistor output, thus improving the safety and stability of the power supply, thereby enhancing system power efficiency and user experience, and making it more versatile. The following will combine... Figures 2 to 14 The linear power supply provided in this application and its working principle are illustrated with examples.

[0043] See Figure 2 , Figure 2 This is a schematic diagram of the structure of a linear power supply provided in this application. For example... Figure 2 As shown, the linear power supply includes a power supply circuit 10 (i.e., the main circuit of the linear power supply), a power control circuit 20, and a voltage control circuit 30. The input terminal of the power supply circuit 10 can be connected to a DC voltage source (as described above). Figure 1 The power supply circuit 10 can be connected to a load RL (such as an AC / DC rectified power supply or other DC voltage source). The power supply circuit 10 includes a transistor S, which can be understood as the output power transistor in a linear power supply, and can also be called a regulating transistor. The transistor S may include, but is not limited to, metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs). The load RL may include, but is not limited to, pulsed loads (such as high-power pulsed loads) or other types of loads.

[0044] In some feasible implementations, when the load RL is a high-power pulsed load, that is, when the linear power supply is used in a high-power pulsed load power supply scenario, the power control circuit 20 can output an enable signal EN and a reference voltage Vref based on the load power Po of the load RL and the output voltage Vo of the transistor S. This allows for real-time control of the enable signal EN and the reference voltage Vref in conjunction with the load power Po, thereby ensuring the accuracy of the enable signal EN and the reference voltage Vref. After obtaining the enable signal EN and the reference voltage Vref, the voltage control circuit 30 can output a first drive signal for the transistor S based on the reference voltage Vref and the output voltage Vo. Based on the first drive signal and the enable signal EN, the circuit controls the operation of the transistor S. This avoids the integral saturation of the voltage control circuit 30, which could cause the transistor S to be in a high-impedance state, thus reducing the overall loss of the transistor S and reducing the thermal stress of the linear power supply to improve the safety of the power supply. Simultaneously, it also avoids large voltage drops in the output voltage of the transistor S, improving the stability of the power supply and enhancing the anti-interference capability of the linear power supply. This, in turn, improves the performance of the linear power supply in high-power pulsed load power supply scenarios, making it more versatile.

[0045] In some feasible implementations, after obtaining the load power Po and the output voltage Vo, the power control circuit 20 can output an enable signal EN at a low level when the load power Po is equal to 0, or output an enable signal EN at a high level when the load power Po is greater than 0. This allows for real-time control of the enable signal EN based on the magnitude of the load power Po, ensuring the real-time performance and accuracy of the enable signal EN. Furthermore, the power control circuit 20 can also output the output voltage Vo as a reference voltage Vref when the enable signal EN is low, or output a power control voltage as a reference voltage Vref when the enable signal EN is high. The power control voltage can be determined by the load power Po and the preset reference power Pref. Therefore, the power control circuit 20 can select different voltages (such as the output voltage or the power control voltage) as the reference voltage Vref according to different enable signals EN, ensuring the real-time performance and accuracy of the reference voltage Vref, and making the reference voltage Vref meet the different operating requirements of the transistor S, thus offering greater flexibility and adaptability.

[0046] In some feasible implementations, after obtaining the enable signal EN and the reference voltage Vref, the voltage control circuit 30 can output a first drive signal for transistor S based on the reference voltage Vref and the output voltage Vo. When the enable signal EN is high, the circuit controls transistor S to turn on based on the first drive signal and adjusts the on-state voltage drop of transistor S. This avoids the integral saturation of the voltage control circuit 30, which would cause transistor S to be in a high-impedance state, thus reducing the overall loss of transistor S and reducing the thermal stress of the linear power supply to improve the safety of the power supply. Simultaneously, it also avoids large drops in the output voltage of transistor S, improving the stability of the power supply and enhancing the anti-interference capability of the linear power supply, making it highly applicable. At this time, the operating state of transistor S is the impedance adjustment state, which refers to the operating state when transistor S is turned on and its on-state voltage drop is adjusted. That is, the voltage control circuit 30 can control transistor S to be in the impedance adjustment state based on the first drive signal when the enable signal EN is high, thereby improving the stability and safety of the power supply. Alternatively, the operating state of transistor S can also be either on or off. The specific operating state of transistor S can be determined according to the actual application scenario and is not limited here.

[0047] In some feasible implementations, the voltage control circuit 30 can control the transistor S to turn on based on the first drive signal and adjust the on-state voltage drop of the transistor S, so that the power supply circuit 10 outputs a high-precision and stable output voltage to supply power to the load RL, thereby improving the power supply efficiency of the linear power supply and making it highly applicable. Alternatively, as described above... Figure 2 As shown, the linear power supply also includes a filter capacitor C0, which is connected in parallel with the load RL. The two ends of the filter capacitor C0 can serve as the output terminals of the power supply circuit 10. The filter capacitor C0 filters the output voltage signal of the power supply circuit 10 to obtain an output voltage (i.e., the output voltage of the power supply circuit 10) that supplies power to the load RL. This results in a smoother waveform corresponding to the output voltage, further improving the power supply efficiency of the linear power supply and broadening its applicability. Please refer to [link to relevant documentation]. Figure 3 , Figure 3 This is another schematic diagram of the linear power supply provided in this application.

[0048] In some feasible implementations, such as Figure 3 As shown above, Figure 2The linear power supply shown also includes a voltage detection circuit 40. The input terminal of the voltage detection circuit 40 can be connected to the output terminal of the power supply circuit 10. The input terminal of the voltage detection circuit 40 may include a positive input terminal and a negative input terminal. The output terminal of the power supply circuit 10 may include a positive output terminal and a negative output terminal. The positive input terminal of the voltage detection circuit 40 is connected to the positive output terminal of the power supply circuit 10, and the negative input terminal of the voltage detection circuit 40 is connected to the negative output terminal of the power supply circuit 10. The negative output terminal of the power supply circuit 10 is grounded. The output terminal of the voltage detection circuit 40 can be connected to the second input terminal of the power control circuit 20 and the first input terminal of the voltage control circuit 30. This application can refer to one or more functional circuits in the linear power supply used to detect the output voltage Vo of transistor S as voltage detection circuit 40. The voltage detection circuit 40 can detect the output voltage Vo of transistor S in real time and output the output voltage Vo of transistor S to the power control circuit 20 and the voltage control circuit 30, thereby ensuring the real-time and rapid detection of the output voltage Vo, resulting in higher voltage detection efficiency and wider applicability.

[0049] Specifically, the voltage detection circuit 40 described above can detect the voltage V of transistor S. DC (i.e., the voltage of the load RL) is converted into the output voltage Vo of transistor S, where the detected voltage V of transistor S is... DC The voltage V can be understood as the voltage of the power supply circuit 10 (i.e., the high-voltage system), and the output voltage Vo of the transistor S can be understood as the voltage of the aforementioned control system (i.e., the low-voltage system). In other words, the voltage detection circuit 40 will detect the voltage V of the power supply circuit 10 (i.e., the detected voltage V). DC The voltage is converted into the voltage of the control system (i.e., the output voltage Vo), and electrical isolation between the two systems (i.e., the power supply circuit 10 and the control system) is achieved, thereby reducing mutual interference between the power supply circuit 10 and the control system, and thus improving the accuracy of the output voltage Vo and making it more applicable.

[0050] In some feasible implementations, the voltage detection circuit 40 (also referred to as a voltage sampling circuit) described above may include, but is not limited to, a differential detection circuit, a voltage divider resistor sampling circuit, or a voltage Hall sensor. When the voltage detection circuit 40 is a differential detection circuit, please refer to the circuit topology of the voltage detection circuit 40. Figure 4 , Figure 4 This is a schematic diagram of the circuit structure of the voltage detection circuit provided in this application. Figure 4 As shown above, Figure 3The voltage detection circuit 40 shown includes two resistors R1, two resistors R2, and an operational amplifier CF1. One end of one resistor R1 can be used as the negative input terminal of the voltage detection circuit 40, and the other end of the resistor R1 is connected to the first input terminal (such as the inverting input terminal) of the operational amplifier CF1. The other end of the resistor R1 is connected to the output terminal of the operational amplifier CF1 through one of the two resistors R2, and the output terminal of the operational amplifier CF1 can be used as the output terminal of the voltage detection circuit 40. One end of the other resistor R1 can be used as the positive input terminal of the voltage detection circuit 40, and the other end of the other resistor R1 is connected to the second input terminal (such as the inverting input terminal) of the operational amplifier CF1. The other end of the other resistor R1 is grounded through the other resistor R2. The voltage detection circuit 40 can detect the voltage V of transistor S using the following formula (1). DC Converted to the output voltage Vo of transistor S:

[0051]

[0052] Where R1 represents the resistance value of resistor R1, and R2 represents the resistance value of resistor R2. Please refer to [link / reference needed]. Figure 5 , Figure 5 This is another schematic diagram of the linear power supply provided in this application.

[0053] In some feasible implementations, such as Figure 5 As shown above, Figure 3 The linear power supply shown also includes a power detection circuit 50. The power control circuit 20, voltage control circuit 30, voltage detection circuit 40, and power detection circuit 50 can constitute a control system in the linear power supply, and this control system is used to control the operation of transistor S. The input terminal of the power detection circuit 50 can be connected to the output terminal of the power supply circuit 10. The input terminal of the power detection circuit 50 may include a positive input terminal and a negative input terminal. The output terminal of the power supply circuit 10 may include a positive output terminal and a negative output terminal. The positive input terminal of the power detection circuit 50 is connected to the positive output terminal of the power supply circuit 10, and the negative input terminal of the power detection circuit 50 is connected to the negative output terminal of the power supply circuit 10. The negative output terminal of the power supply circuit 10 is grounded. The output terminal of the power detection circuit 50 can be connected to the first input terminal of the power control circuit 20. In this application, one or more functional circuits used for detecting load power in the above-mentioned linear power supply can be collectively referred to as the power detection circuit 50. The power detection circuit 50 described above can detect the load power Po of the load RL in real time and output the load power Po to the power control circuit 20, thereby ensuring the real-time performance and accuracy of the load power Po, thus improving the power detection efficiency and making it more applicable.

[0054] In some feasible implementations, the power detection circuit 50 may include, but is not limited to, analog circuits. When the power detection circuit 50 is an analog circuit, please refer to the specific circuit topology of the power detection circuit 50. Figure 6 , Figure 6 This is another structural schematic diagram of the linear power supply provided in this application. For example... Figure 6 As shown above, Figure 5 The power detection circuit 50 shown includes a voltage detection circuit 501, a current detection circuit 502, a multiplication circuit 503, and a second control circuit 504. These components together constitute the power detection circuit. The input terminals of both the voltage detection circuit 501 and the current detection circuit 502 serve as input terminals of the power detection circuit 50. The voltage detection circuit 501 has a positive input terminal and a negative input terminal, as does the current detection circuit 502. Both the positive and negative input terminals of the voltage detection circuit 501 and the current detection circuit 502 serve as positive input terminals of the power detection circuit 50, and vice versa. The output terminal of the voltage detection circuit 501 can be connected to the first input terminal of the multiplication circuit 503, the output terminal of the current detection circuit 502 can be connected to the second input terminal of the multiplication circuit 503, the output terminal of the multiplication circuit 503 can be connected to the input terminal of the second control circuit 504, and the output terminal of the second control circuit 504 can be used as the output terminal of the power detection circuit 50.

[0055] In some feasible implementations, the voltage detection circuit 501 described above can detect the output voltage Vo of transistor S in real time and output the output voltage Vo of transistor S to the multiplication circuit 503, thereby ensuring the real-time performance and accuracy of the output voltage Vo. The specific circuit topology of the voltage detection circuit 501 can be found above. Figure 4 The circuit topology of the voltage detection circuit 40 shown will not be described again here. Furthermore, the voltage detection circuit 501 and the voltage detection circuit 40 can be the same voltage detection circuit or different voltage detection circuits, depending on the actual application scenario, and are not restricted here. In this case, the voltage detection circuit 501 can use the above formula (1) to detect the voltage V of transistor S. DCThe current is converted into the output voltage Vo of transistor S and output to the multiplication circuit 503. The current detection circuit 502 can detect the output current Io of transistor S in real time and output a differential voltage VI to the multiplication circuit 503 based on this output current Io, thus ensuring the real-time performance and accuracy of the differential voltage VI. When the current detection circuit 502 is a differential detection circuit, its specific circuit topology can be found in [reference needed]. Figure 7 , Figure 7 This is a schematic diagram of the circuit structure of the current detection circuit provided in this application.

[0056] In some feasible implementations, such as Figure 7 As shown, the current detection circuit 502 includes two resistors R3, two resistors R4, a sampling resistor Rs, and an operational amplifier CF2. One end of one of the two resistors R3 is connected to one end of the sampling resistor Rs and serves as the positive input terminal of the current detection circuit 502. The other end of the resistor R3 is connected to the first input terminal (such as the inverting input terminal) of the operational amplifier CF2, and the other end of the resistor R3 is grounded through one of the two resistors R4. One end of the other resistor R3 is connected to the other end of the sampling resistor Rs and serves as the negative input terminal of the current detection circuit 502. The other end of the other resistor R3 is connected to the second input terminal (such as the inverting input terminal) of the operational amplifier CF2, and the other end of the other resistor R3 is connected to the output terminal of the operational amplifier CF2 through the other resistor R4. The output terminal of the operational amplifier CF2 can serve as the output terminal of the current detection circuit 502. The above-mentioned current detection circuit 502 can convert the output current Io of transistor S (also called the detected current Io) into a differential voltage VI using the following formula (2):

[0057]

[0058] Where R3 can represent the resistance value of resistor R3, R4 can represent the resistance value of resistor R4, and Rs can represent the resistance value of sampling resistor Rs.

[0059] In some feasible implementations, after obtaining the output voltage Vo and the differential voltage VI, the multiplication circuit 503 can output the detected power Ps of the load RL to the second control circuit 504 based on the output voltage Vo and the differential voltage VI of the transistor S. Specifically, the multiplication circuit 503 can calculate the product of the output voltage Vo and the differential voltage VI of the transistor S to obtain the detected power Ps of the load RL using the following formula (3):

[0060]

[0061] Wherein, R1 can represent the resistance value of resistor R1, R2 can represent the resistance value of resistor R2, R3 can represent the resistance value of resistor R3, R4 can represent the resistance value of resistor R4, Rs can represent the resistance value of sampling resistor Rs, and Po can represent the load power. Further, the second control circuit 504 can output the load power Po to the power control circuit 20 based on the detected power Ps. Since the detected power Ps is determined by the real-time detected output voltage Vo and differential voltage VI, the load power Po can be output more accurately and in real-time based on the detected power Ps, resulting in higher power detection efficiency and stronger adaptability. It can be understood that, as can be obtained from the above (3), the power value corresponding to the detected power Ps and the power value corresponding to the load power Po are in a fixed ratio, and this fixed ratio is determined by the resistance values ​​of resistor R1, resistor R2, resistor R3 and resistor R4. Therefore, the second control circuit 504 can compensate the detected power Ps based on formula (3) to obtain the load power Po (i.e., the actual output power of the power supply circuit 10). Since the voltage detection circuit 501, the current detection circuit 502, and the multiplication circuit 503 are all analog circuits, the detection speed of the load power Po can be guaranteed, the detection efficiency of the load power Po is higher, and the adaptability is stronger.

[0062] In some feasible implementations, the circuit topology of the linear power supply can be found in the process of obtaining load power through other means. Figure 8 , Figure 8 This is another structural schematic diagram of the linear power supply provided in this application. For example... Figure 8 As shown above, Figure 3 The power supply circuit 10 shown also includes a switch K (also called a load switch). The transistor S can be connected to the load RL via the switch K, and the two ends of the filter capacitor C0 can serve as the output terminal of the power supply circuit 10 to be connected to the input terminal of the voltage detection circuit 40. Figure 3 The linear power supply shown also includes a switch control circuit 51, which can be connected to the first input terminal of the power control circuit 20, meaning the switch control circuit 51 is located outside the power control circuit 20. Optionally, the switch control circuit 51 can also be located within the power control circuit 20, depending on the actual application scenario, and is not limited here. The power control circuit 20, voltage control circuit 30, voltage detection circuit 40, and switch control circuit 51 can constitute a control system in the linear power supply, and this control system is used to control the operation of transistor S.

[0063] In some feasible implementations, the aforementioned switch control circuit 51 can establish wired or wireless communication with the host computer to transmit data (such as the control information of the load RL described below). The specific implementation can be determined according to the actual application scenario and is not limited here. The aforementioned switch control circuit 51 can obtain the control information of the load RL from the host computer. When the control information is high (also referred to as high potential), it controls switch K to conduct to obtain the load power Po as the rated power of the load RL; or when the control information is low (also referred to as low potential), it controls switch K to deactivate to obtain the load power Po as 0. The control information of the load RL may include, but is not limited to, the pulse period and pulse duty cycle of the load RL. It can be understood that when switch K is on (also referred to as turned on), the equivalent load corresponding to the output terminal of the power supply circuit 10 is the rated load (i.e., the load power Po is the rated power); conversely, when switch K is off, the equivalent load corresponding to the output terminal of the power supply circuit 10 is 0 (i.e., the load power Po is 0). After obtaining the load power Po, the switch control circuit 51 can output the load power Po to the power control circuit 20.

[0064] In some feasible implementations, the control information of the load RL (hereinafter referred to as load control information) can be used to control the switching state of switch K (such as on or off state), and the load control information can also be sent to the switch control circuit 51. Since the load control information and the switching state of switch K are completely synchronized, when the load control information is high, switch K is on (i.e. closed), and the load RL is energized (i.e., the load power Po is the rated power P1); conversely, when the load control information is low (e.g., 0), switch K is off, and the load RL is de-energized (i.e., the load power Po is 0). It can be seen that the switch control circuit 51 can control the load power Po by synchronizing the high and low states of the load control information (i.e., high level or low level) with the on and off states of the load RL (i.e., energized state or de-energized state). Therefore, there is no need to use the power detection circuit 50 to detect the load power Po, the structure is simpler, the cost is lower, and the applicability is stronger. Optionally, the linear power supply may also obtain the load power Po through other means besides the power detection circuit 50 and the switch control circuit 51. These other means may include, but are not limited to, power detection devices (such as power meters and ammeters), which can be determined according to the actual application scenario and are not limited here.

[0065] In some feasible implementations, the power control circuit 20 described above may include, but is not limited to, digital chips and analog circuits. The digital chip may include, but is not limited to, DSP chips and FPGA chips. When the power control circuit 20 is a digital chip, the integrated circuit structure on the digital chip can be found in [reference needed]. Figure 9 , Figure 9 This is a schematic diagram of the circuit structure of the power control circuit provided in this application. Figure 9As shown above, Figures 2 to 8 The power control circuit 20 shown includes a comparator 201, a second regulator 202, and a selector 203. The input terminal of the comparator 201 (e.g., the first input terminal) and the input terminal of the second regulator 202 (e.g., the first input terminal) are connected to serve as the first input terminal of the power control circuit 20. The output terminal of the comparator 201 can be connected to the first input terminal of the selector 203, and the output terminal of the comparator 201 can serve as the second output terminal of the power control circuit 20. The output terminal of the second regulator 202 can be connected to the second input terminal of the selector 203. The third input terminal of the selector 203 can serve as the second input terminal of the power control circuit 20, and the output terminal of the selector 203 can serve as the first output terminal of the power control circuit 20. Furthermore, the second input terminal of the comparator 201 can be connected to 0, and the second input terminal of the second regulator 202 can be connected to a preset reference power Pref. The preset reference power Pref can be a parameter configured by the second regulator 202 or a parameter set by the user, which can be determined according to the actual application scenario and is not limited here.

[0066] In some feasible implementations, the comparator 201 described above can compare the load power Po and 0 using the following formula (4) to output an enable signal EN:

[0067]

[0068] Specifically, the comparator 201 can output an enable signal EN at a low level (EN = 0) to the selector 203 when the load power Po is equal to 0, or output an enable signal EN at a high level (EN = 1) to the selector 203 when the load power Po is greater than 0 (Po > 0, i.e., the load power Po is non-zero). This allows for real-time control of the enable signal EN based on the magnitude of the load power Po, resulting in a more accurate and real-time changing enable signal EN. After obtaining the enable signal EN, the comparator 201 can also output the enable signal EN to the voltage control circuit 30.

[0069] In some feasible implementations, the second regulator 202 (i.e., the power regulator) can output a power control voltage Vp-control (also referred to as a voltage command Vp-control) to the selector 203 based on the load power Po and the preset reference power Pref. When the second regulator 202 is a proportional-integral regulator, the second regulator 202 can compare the load power Po and the preset reference power Pref to output the power control voltage Vp-control using the following formula (5):

[0070]

[0071] Wherein, Kp represents the proportional parameter, Ki represents the integral parameter, s represents the complex s-domain (i.e., complex variable), and S is the denominator that can be used to represent integral operations. The proportional parameter Kp and the integral parameter Ki are the preset control parameters of the second regulator 202.

[0072] In some feasible implementations, the selector 203 described above can select the output reference voltage Vref based on the enable signal EN using the following formula (6):

[0073]

[0074] The selector 203 can output the output voltage Vo as a reference voltage Vref (i.e., Vref = Vo) when the enable signal EN is low (e.g., EN = 0), or output the power control voltage Vp-control as a reference voltage Vref (i.e., Vref = Vp-control) when the enable signal EN is high (e.g., EN = 1). Different voltages (e.g., output voltage Vo or power control voltage Vp-control) can be selected as the reference voltage Vref based on different enable signals EN, thus ensuring the real-time performance and accuracy of the reference voltage Vref and enabling it to meet the different operating requirements of the transistor S, resulting in greater flexibility and adaptability. After obtaining the reference voltage Vref, the selector 203 can also output the reference voltage Vref to the voltage control circuit 30.

[0075] In some feasible implementations, the power control circuit 20 described above can select different enable signals EN and reference voltage Vref based on the load power Po and the output voltage Vo to meet the different operating requirements of the transistor S. In the process of selecting different enable signals EN, the comparator 201 will output the enable signal EN as high level when the load power Po is greater than 0 (i.e., high load). In other words, the enable signal EN will be set to the enabled state when the load is high. At this time, the voltage regulation of the linear power supply is enabled (i.e., the on-state voltage drop of the transistor S is adjusted), thereby outputting a stable and high-precision output voltage Vo to power the load RL, resulting in higher power supply efficiency and stronger applicability. Conversely, when the load power Po is equal to 0 (i.e., zero load), comparator 201 outputs an enable signal EN at a low level. In other words, at zero load, the enable signal EN is set to the disabled state, thus disabling voltage regulation of the linear power supply (i.e., stopping the regulation of the on-state voltage drop of transistor S). This ensures that, when the impedance of transistor S is relatively low, the input voltage fluctuations of the power supply circuit 10 are isolated from the output voltage Vo (which can be used to power the load RL), thereby improving the stability of the power supply and enhancing its adaptability. Therefore, comparator 201 can select different enable signals EN (such as high or low levels) based on different load powers Po, thus meeting the different operating requirements of transistor S and providing greater flexibility in application.

[0076] In some feasible implementations, during the process of selecting different reference voltages Vref, the selector 203 can output a power control voltage Vp-control as the reference voltage Vref when the enable signal EN is high. In other words, when the load power Po is greater than 0 (i.e., high load), the power control voltage Vp-control is set as the reference voltage Vref, meaning the voltage value corresponding to the reference voltage Vref is equal to the voltage value corresponding to the power control voltage Vp-control output by the power loop corresponding to the second regulator 202 (i.e., the voltage reference value). Conversely, the selector 203 can output a real-time sampled output voltage Vo as the reference voltage Vref when the enable signal EN is low. In other words, when the load power Po is equal to 0 (i.e., zero load), the real-time sampled output voltage Vo is set as the reference voltage Vref, meaning the voltage value corresponding to the reference voltage Vref is equal to the voltage value corresponding to the real-time sampled output voltage Vo (which can be simply referred to as the output voltage value). Therefore, the selector 203 can select different voltages (such as power control voltage Vp-control or real-time sampled output voltage Vo) as reference voltage Vref based on different enable signals EN, thereby ensuring the real-time performance and accuracy of the reference voltage Vref, and making the reference voltage Vref meet the different operating requirements of transistor S, thus making it more flexible in application.

[0077] In some feasible implementations, the functional logic waveforms of the power control circuit 20 during the selection of different enable signals EN and reference voltage Vref are also provided. Figure 10 , Figure 10 This is a functional logic waveform diagram of the power control circuit provided in this application. (Example:) Figure 10 As shown, when the load power Po is greater than 0 (e.g., the load power Po is the rated power P1, i.e., the pulse waveform of the load RL is high), the reference voltage Vref output by the power control circuit 20 is the power control voltage Vp-control, and the enable signal EN output by the power control circuit 20 is high (e.g., 1). When the load power Po is equal to 0 (e.g., the pulse waveform of the load RL is low), the reference voltage Vref output by the power control circuit 20 is the real-time sampled output voltage Vo, and the enable signal EN output by the power control circuit 20 is low (e.g., 0). Therefore, the power control circuit 20 selects different reference voltages Vref and enable signals EN based on different load powers Po, thus meeting the different operating requirements of the transistor S, resulting in greater flexibility and adaptability.

[0078] In some feasible implementations, the voltage control circuit 30 may include, but is not limited to, an analog circuit. Its specific structure can be determined according to the actual application scenario and is not limited here. To ensure the fast control response of the voltage control circuit 30, the circuit topology of the voltage control circuit 30 is an analog circuit. In this case, the specific circuit topology of the voltage control circuit 30 can be found in [reference needed]. Figure 11 , Figure 11 This is a schematic diagram of the circuit structure of the voltage control circuit provided in this application. For example... Figure 11 As shown above, Figures 2 to 8 The voltage control circuit 30 shown includes a first regulator 301, a first diode D1, a second diode D2, a voltage follower CF3, and a first control circuit 300. The first input terminal of the first regulator 301 can be used as the first input terminal of the voltage control circuit 30. The second input terminal of the first regulator 301 can be used as the second input terminal of the voltage control circuit 30 and connected to the first output terminal of the power control circuit 20. The output terminal of the first regulator 301 can be connected to the positive terminal of the first diode D1. The negative terminal of the first diode D1 and the positive terminal of the second diode D2 are both connected to the non-inverting input terminal of the voltage follower CF3. The negative terminal of the second diode D2 can be used as the third input terminal of the voltage control circuit 30 and connected to the second output terminal of the power control circuit 20.

[0079] In some feasible implementations, when the enable signal EN is high, the first regulator 301 can obtain the first drive signal Vc of transistor S based on the reference voltage Vref and the output voltage Vo, and output the first drive signal Vc to the voltage follower CF3. When the first regulator 301 is a proportional-integral regulator (e.g., a subtractor), the first regulator 301 can compare the reference voltage Vref and the output voltage Vo, and obtain the first drive signal Vc of transistor S based on the error between the reference voltage Vref and the output voltage Vo. The specific circuit topology of the first regulator 301 is as described above. Figure 11 As shown, the first regulator 301 includes two resistors R5, two resistors R6, a capacitor C1, and an operational amplifier CF4.

[0080] In this configuration, one end of one of the two resistors R5 can serve as the first input terminal of the first regulator 301 to connect to the output voltage Vo, and the other end of the other resistor R5 is connected to the first input terminal (such as the inverting input terminal) of the operational amplifier CF4. The other end of the other resistor R5 is grounded through one of the two resistors R6. One end of the other resistor R5 can serve as the second input terminal of the first regulator 301 to connect to the reference voltage Vref, and the other end of the other resistor R5 is connected to the second input terminal (such as the inverting input terminal) of the operational amplifier CF4. The other end of the other resistor R5 is connected to the output terminal of the operational amplifier CF4 through capacitor C1 and the other resistor R6. The output terminal of the operational amplifier CF4 can serve as the output terminal of the first regulator 301 to output the first drive signal Vc (i.e., the output control quantity of the first regulator 301).

[0081] After receiving the first drive signal Vc, the voltage follower CF3 can output the first drive signal Vc to the first control circuit 300 when the enable signal EN is high. The voltage follower CF3 can establish wired or wireless communication with the first control circuit 300 to transmit the drive signal of transistor S (such as the first drive signal Vc or the second drive signal described below). Since the drive signal output by the voltage follower CF3 and the drive signal output by the first regulator 301 are the same drive signal (i.e., the first drive signal Vc), the output voltage of transistor S can be quickly adjusted to a stable state, thereby avoiding a large drop in the output voltage of transistor S (i.e., reducing the output voltage fluctuation of the linear power supply) to improve the stability of the power supply and enhance the anti-interference capability of the linear power supply. Furthermore, the first control circuit 300 can control the transistor S to turn on and adjust the on-state voltage drop of transistor S based on the first drive signal Vc, thereby avoiding the integral saturation of the voltage control circuit 30, which would cause transistor S to be in a high impedance state, thus reducing the overall loss of transistor S, thereby reducing the thermal stress of the linear power supply and improving the safety of the power supply. It has strong applicability.

[0082] In some feasible implementations, when the enable signal EN is low, the voltage follower CF3 can also output a low level to the first control circuit 300 as a second drive signal for the transistor S. At this time, the first control circuit 300 can also control the transistor S to turn off based on the second drive signal to stop adjusting the on-state voltage drop of the transistor S. Since the reference voltage Vref is equal to the real-time sampled output voltage Vo and the transistor S is off at this time, the control parameters corresponding to the voltage control circuit 30 (i.e., the voltage controller or the voltage control loop of the transistor S) remain basically unchanged. This avoids the transistor S from being in a high impedance state, thereby reducing the overall loss of the transistor S and reducing the thermal stress of the linear power supply to improve the safety of the power supply and make it more applicable.

[0083] In some feasible implementations, the first diode D1, the second diode D2, and the voltage follower CF3 can constitute an enable judgment unit in the voltage control circuit 30. This enable judgment unit can logically judge the first drive signal Vc of transistor S (i.e., the output control quantity of the first regulator 301) and the enable signal EN, thereby outputting different drive signals for transistor S. Specifically, when the enable signal EN is high (i.e., the load power Po is greater than 0 or the enable signal EN is in an enabled state), the enable judgment unit outputs the first drive signal Vc to the first control circuit 300 to control transistor S to conduct and adjust the on-state voltage drop of transistor S. This can prevent a large drop in the output voltage Vo of transistor S, thereby improving the stability of power supply and the anti-interference capability of linear power supply, and making it highly applicable.

[0084] In some feasible implementations, the aforementioned enable judgment unit can also output a second drive signal (i.e., the second drive signal is set to zero) to control the transistor S to turn off when the enable signal EN is low (i.e., the load power Po is equal to 0 or the enable signal EN is in a disabled state). When the load power Po is equal to 0 (i.e., zero load), the reference voltage Vref of the input voltage control circuit 30 and the output voltage Vo (i.e., the actual output voltage of the transistor S) are equal. That is, the difference between the reference voltage Vref and the output voltage Vo is zero. At this time, the voltage control circuit 30 will stop integrating (i.e., it is equivalent to shielding the integration control loop corresponding to the voltage control circuit 30), thereby avoiding large fluctuations in the first drive signal Vc output by the first regulator 301 (i.e., voltage loop) and avoiding the transistor S being in a high impedance state, thereby improving the safety and stability of the power supply and making it more applicable.

[0085] In some feasible implementations, the power control circuit 20, voltage control circuit 30, voltage detection circuit 40, and power detection circuit 50 (or switch control circuit 51) described above can constitute the control system in the linear power supply. During the process of this control system controlling the operation of transistor S, please refer to the control timing of the linear power supply. Figure 12 , Figure 12 This is a control timing diagram of the linear power supply provided in this application. For example... Figure 12 As shown, when the load power Po is greater than 0 (e.g., the load power Po is the rated power P1), that is, when the load power pulse of the load RL is high, the reference voltage Vref is the power control voltage Vp-control, the enable signal EN is high (e.g., 1) to adjust the on-state voltage drop of transistor S, the voltage value corresponding to the output voltage Vo of transistor S is V1, the impedance state Zs of transistor S is zero, and the loss L of transistor S will decrease from loss L2 to loss L1.

[0086] Therefore, when the enable signal EN is high, the control system can adjust the on-state voltage drop of transistor S, thereby preventing a large drop in the output voltage Vo of transistor S, thus improving the stability of the power supply and further reducing the overall loss L of transistor S, making it more versatile. When the load power Po is equal to 0 (i.e., low load or the load power pulse of load RL is low), the reference voltage Vref is the real-time sampled output voltage Vo. When the enable signal EN is low (e.g., 0) to control transistor S to turn off, the voltage value corresponding to the output voltage Vo of transistor S is V2, the impedance state Zs of transistor S is zero, and the loss L of transistor S is 0. Therefore, when the enable signal EN is low, the above control system can control transistor S to turn off to stop adjusting the on-state voltage drop of transistor S, thereby preventing the impedance state Zs of transistor S from being in a high impedance state, significantly reducing the overall loss L of transistor S, thereby reducing the thermal stress of the linear power supply and improving the safety of the power supply, making it highly adaptable.

[0087] In some feasible implementations, where the power control circuit 20 and the power detection circuit 50 (or the switch control circuit 51) are not included in the above-described control system (or linear power supply), please refer to the control timing of the above-described linear power supply. Figure 13 , Figure 13 This is another control timing diagram of the linear power supply provided in this application. For ease of description, the following will use a complete pulse period of the load RL (e.g., the time interval t1-t3) as an example for illustration. Figure 13 As shown, during the time interval t1-t2, the load power pulse corresponding to the load power Po is low and the load power Po equals 0, meaning the t1-t2 time interval can be understood as the time interval corresponding to zero load; during the time interval t2-t3, the load power pulse corresponding to the load power Po is high and the load power Po is greater than 0, meaning the t2-t3 time interval can be understood as the time interval corresponding to high load. The following explanation uses an IGBT as an example. Since the above control system does not differentiate and adjust the reference voltage Vref based on the specific condition of the load power pulse (e.g., high or low level), the reference voltage Vref is equal to the power control voltage Vp-control at any moment during the t1-t3 time interval, and the control system continuously adjusts the drive voltage V of transistor S. GE (Even if the driving function of transistor S is enabled), thereby adjusting the on-state voltage drop V of transistor S. CE .

[0088] In some feasible implementations, such as Figure 13As shown, at time t1 (the moment when the load power Po equals zero), the output voltage Vo of transistor S will instantaneously rise to close to V3. Since no current flows through the load RL during the time interval t1-t2, the control system cannot adjust the output voltage Vo to the power control voltage Vp-control. At this time, the drive voltage V of transistor S... GE The impedance state of transistor S and the driving voltage V will gradually decrease as its driving function is enabled (i.e., the integrator is enabled), and the impedance state of transistor S and the driving voltage V will also decrease. GE This is inversely proportional, causing transistor S to be in a high-impedance state. It can be seen that the continuous voltage error during the time interval t1-t2 (i.e., the time interval corresponding to zero load) will keep transistor S in a high-impedance state. Therefore, at time t2 (i.e., the moment when the load power Po increases from zero), transistor S will generate very large losses L (e.g., instantaneous losses exceeding L1, where L1 can be 600W or other values). Furthermore, during the time interval t2-t3, transistor S will also generate significant losses L (e.g., average losses exceeding 200W or other values), thus increasing the thermal stress on the linear power supply and reducing its safety. Additionally, the large drop in the output voltage Vo of transistor S at time t2 will lengthen the voltage regulation time of transistor S, further reducing the stability of the power supply and making it less applicable.

[0089] In some feasible implementations, to avoid the continuous voltage error during the t1-t2 time interval causing transistor S to be in a high impedance state, resulting in very large instantaneous losses in transistor S at time t2 and a large drop in the output voltage Vo of transistor S, a power control circuit 20 and a power detection circuit 50 (or a switching control circuit 51) can be set in the above-mentioned control system (or linear power supply). For the control timing of the linear power supply, please refer to [reference needed]. Figure 14 , Figure 14 This is another control timing diagram of the linear power supply provided in this application. For ease of description, the following will use a complete pulse period of the load RL (e.g., the time interval t1-t3) as an example for illustration. Figure 14 As shown, within the time interval t1-t3, time t1 is the time when the load power Po changes from non-zero to zero, time t2 is the time when the load power Po changes from zero to non-zero, and time t3 is the time when the load power Po changes from non-zero to zero. In other words, there is a difference of one load pulse cycle between time t1 and time t3.

[0090] In some feasible implementations, at time t1, the load power Po becomes zero, and the output voltage Vo of transistor S rises instantaneously. The power control circuit 20 in the aforementioned control system can compare the load power Po with 0 to obtain an enable signal EN that is low (e.g., EN = 0), and adjust the reference voltage Vref to the output voltage Vo based on the enable signal EN. Figure 14 From this, we can obtain that within the time interval t1-t2, the reference voltage Vref is equal to the real-time sampled output voltage Vo, and the driving voltage V of transistor S is... GE The voltage is set to a low potential and kept constant, meaning that the voltage control circuit 30 in this control system will stop adjusting the on-state voltage drop V of transistor S during the time interval t1-t2. CE It should be noted that because the enable signal EN is low, the first drive signal Vc output by the voltage control circuit 30 (i.e., the voltage controller) in the control system is shielded by the enable signal EN, and the first drive signal Vc is not zero. Therefore, the drive voltage Vc of transistor S... GE It will be placed at a low potential (i.e., drive voltage V). GE The load power Po becomes non-zero (i.e., high power, and the load power Po is greater than 0) and remains constant. At time t2, the load power Po becomes non-zero (i.e., high power, and the load power Po is greater than 0). The power control circuit 20 in the above control system can compare the load power Po with 0 to obtain an enable signal EN that is high (e.g., EN = 1), and adjust the reference voltage Vref to the power control voltage Vp-control according to the enable signal EN. Figure 14 From this, we can see that during the time interval t2-t3, the reference voltage Vref is equal to the power control voltage Vp-control, and the driving voltage V of transistor S is equal to... GE The voltage is set to a high potential, meaning that the voltage control circuit 30 in this control system will adjust the on-state voltage drop V of transistor S during the time interval t2-t3. CE .

[0091] In some feasible implementations, comparing the time intervals t1-t2 and t2-t3 reveals that at the instant the load power Po becomes zero (i.e., at time t1), the output voltage Vo will rise instantaneously, and this output voltage Vo will exceed the reference voltage Vref (i.e., the power control voltage Vp-control) during the t2-t3 time interval. Since the reference voltage Vref is equal to the real-time sampled output voltage Vo during the t1-t2 time interval, and the drive voltage V of transistor S... GEWhen the transistor S is placed at a low potential (i.e., the driving function of the transistor S is not enabled), the control parameters of the voltage control circuit 30 (i.e., the voltage control loop of the transistor S) in the control system remain basically unchanged. This avoids the transistor S from being in a high impedance state, reduces the overall loss L of the transistor S (e.g., L = 0), reduces the thermal stress of the linear power supply, and thus improves the safety of the power supply.

[0092] In some feasible implementations, comparing the time intervals t1-t2 and t2-t3 reveals that at the instant the load power Po becomes high (i.e., at time t2), the sudden increase in load power Po causes the output voltage Vo of transistor S to drop instantaneously. Since the first drive signal Vc output by the voltage control circuit 30 in the control system remains essentially unchanged, the control system can quickly adjust the output voltage Vo to a stable state (i.e., the fluctuation of the output voltage Vo is not large) within the t2-t3 time interval. This avoids a large drop in the output voltage Vo of transistor S (i.e., the fluctuation of the output voltage Vo is not large), improves the stability of the power supply, and further reduces the overall loss L of transistor S (such as instantaneous loss). The instantaneous loss of transistor S = (input voltage of transistor S - Vo) * Io, where the input voltage of transistor S can be understood as the DC voltage provided by the DC voltage source DC. Figure 14 The waveform corresponding to the loss L of transistor S can be obtained. The peak loss of transistor S is less than L1 (such as 600W or other values), and the loss L of transistor S is lower than a certain loss value (such as 200W or other values) for most of the time interval between t2 and t3.

[0093] In the linear power supply provided in this application, during the time interval when the load power Po is equal to 0, the voltage control circuit 30 can be prevented from continuously operating, causing the transistor S to be in a high impedance state. This reduces the overall loss of the transistor S, thereby reducing the thermal stress of the linear power supply and improving the safety of the power supply. During the time interval when the load power Po is greater than 0, a large drop in the output voltage Vo of the transistor S can be avoided (i.e., the fluctuation of the output voltage Vo is small), thus improving the stability of the power supply and enhancing the anti-interference capability of the linear power supply, making it more versatile.

[0094] Please see Figure 15 , Figure 15 This is a flowchart illustrating the control method for a linear power supply provided in this application. This method is applicable to linear power supplies (such as those described above). Figures 2 to 14 The control system in the linear power supply shown includes a power supply circuit whose input can be connected to a DC voltage source and whose output can be connected to a load (such as a pulse load or other type of load). The power supply circuit includes transistors. Figure 15As shown, the method includes the following steps S101 to S102:

[0095] Step S101: Based on the load power of the load and the output voltage of the transistor, an enable signal and a reference voltage are obtained.

[0096] In some feasible implementations, before obtaining the enable signal and reference voltage based on the load power and transistor output voltage, the aforementioned control system can acquire the load power and transistor output voltage, thereby enabling real-time control of the reference voltage and enable signal based on the load power and output voltage, thus offering broad applicability. Specifically, the control system can detect the transistor output voltage in real time through a voltage detection circuit and the load power in real time through a power detection circuit or other means, ensuring the real-time and rapid detection of output voltage and load power, resulting in higher detection efficiency and wider applicability.

[0097] In some feasible implementations, the control system can also obtain load power through other means. When the power supply circuit further includes a switch, and the transistor can be connected to the load via the switch, the control system can obtain load control information. When the control information is high, it controls the switch to conduct to obtain the load power as its rated power; or when the control information is low, it controls the switch to disconnect to obtain zero load power. The load control information may include, but is not limited to, the load's pulse period and pulse duty cycle. Therefore, the control system can control the load power by synchronizing the high and low states of the control information (i.e., high or low level) with the load's on / off state (i.e., energized or de-energized state), eliminating the need for complex digital or analog circuits to detect load power, resulting in lower cost and wider applicability.

[0098] In some feasible implementations, after obtaining the output voltage and load power, the control system can obtain an enable signal at a low level when the load power is equal to 0, or at a high level when the load power is greater than 0. This allows the control system to adjust the enable signal according to the load power, resulting in a more precise and real-time changing enable signal. Furthermore, the control system can obtain a power control voltage based on the load power and a preset reference power. When the enable signal is low, the reference voltage is the transistor's output voltage; when the enable signal is high, the reference voltage is the power control voltage. Different voltages (such as output voltage or power control voltage) can be set as the reference voltage according to different enable signals, thus ensuring that the reference voltage meets the different operating requirements of the transistor, providing greater flexibility and adaptability. Therefore, the control system can combine load power to perform real-time control of the reference voltage and enable signal to ensure their accuracy.

[0099] Step S102: Generate a first drive signal for the transistor based on the reference voltage and the output voltage, and control the transistor operation based on the first drive signal and the enable signal.

[0100] In some feasible implementations, when the enable signal is high, the control system controls the transistor to turn on based on the first drive signal and adjusts the transistor's on-state voltage drop. This avoids the transistor being in a high-impedance state due to the integral saturation of the voltage control circuit, thereby reducing the overall loss of the transistor and reducing the thermal stress of the linear power supply to improve the safety of the power supply. At the same time, it also avoids large drops in the transistor's output voltage to improve the stability of the power supply and improves the anti-interference capability of the linear power supply, making it highly applicable.

[0101] In some feasible implementations, when the enable signal is low, the control system obtains that the second drive signal of the transistor is low, and controls the transistor to turn off based on the second drive signal to stop adjusting the on-state voltage drop of the transistor. Since the reference voltage is equal to the real-time sampled output voltage and the transistor is off at this time, the control parameters corresponding to the voltage controller in the control system remain basically unchanged. Therefore, the transistor can be avoided from being in a high impedance state, thereby reducing the overall loss of the transistor and reducing the thermal stress of the linear power supply to improve the safety of the power supply and make it more applicable.

[0102] In specific implementation, further details regarding the operations performed by the control system in the linear power supply control method provided in this application can be found in [reference needed]. Figures 2 to 14 The implementation of the linear power supply and its working principle shown, and the control system (i.e., power control circuit 20, voltage control circuit 30, voltage detection circuit 40, and power detection circuit 50 (or switch control circuit 51)) will not be described in detail here.

[0103] In the method provided in this application, when the load power is equal to 0, the continuous operation of the voltage controller in the control system can be avoided, causing the transistor to be in a high-impedance state. This reduces the overall loss of the transistor, thereby reducing the thermal stress of the linear power supply and improving the safety of the power supply. When the load power is greater than 0, a large drop in the output voltage of the transistor can be avoided (i.e., the output voltage fluctuation is small), thus improving the stability of the power supply. At the same time, the anti-interference capability of the linear power supply is improved, further reducing the overall loss of the transistor and making it more versatile.

[0104] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A linear power supply, characterized in that, The linear power supply includes a power supply circuit, a power control circuit, and a voltage control circuit; the input terminal of the power supply circuit is connected to a DC voltage source, the output terminal of the power supply circuit is connected to a load, and the power supply circuit includes a transistor. The power control circuit is configured to output an enable signal at a low level when the load power of the load is equal to 0. When the enable signal is low, the power control circuit is also configured to output the output voltage of the transistor as a reference voltage; or... The power control circuit is used to output the enable signal as high level when the load power is greater than 0. When the enable signal is high level, the power control circuit is also used to output a power control voltage as the reference voltage. The power control voltage is determined by the load power and the preset reference power. The voltage control circuit is used to output a first drive signal for the transistor based on the reference voltage and the output voltage, and when the enable signal is high, to control the transistor to turn on and adjust the on-state voltage drop of the transistor based on the first drive signal.

2. The linear power supply according to claim 1, characterized in that, The voltage control circuit includes a first regulator, a first diode, a second diode, a voltage follower, and a first control circuit. The first input terminal of the first regulator serves as the first input terminal of the voltage control circuit, and the second input terminal of the first regulator serves as the second input terminal of the voltage control circuit and is connected to the first output terminal of the power control circuit. The output terminal of the first regulator is connected to the anode of the first diode. The cathode of the first diode and the anode of the second diode are connected to the non-inverting input terminal of the voltage follower. The cathode of the second diode serves as the third input terminal of the voltage control circuit and is connected to the second output terminal of the power control circuit. The first regulator is used to output the first drive signal to the voltage follower based on the reference voltage and the output voltage; The voltage follower is used to output the first drive signal to the first control circuit when the enable signal is high. The first control circuit is used to control the transistor to turn on and adjust the on-state voltage drop of the transistor based on the first drive signal.

3. The linear power supply according to claim 2, characterized in that, The voltage follower is also used to output a low level to the first control circuit when the enable signal is low, as a second drive signal for the transistor. The first control circuit is also used to control the transistor to disconnect based on the second drive signal.

4. The linear power supply according to claim 2 or 3, characterized in that, The power control circuit includes a comparator, a second regulator, and a selector. The input terminal of the comparator is connected to the input terminal of the second regulator and serves as the first input terminal of the power control circuit. The output terminal of the comparator is connected to the first input terminal of the selector and serves as the second output terminal of the power control circuit. The output terminal of the second regulator is connected to the second input terminal of the selector. The third input terminal of the selector serves as the second input terminal of the power control circuit, and the output terminal of the selector serves as the first output terminal of the power control circuit. The comparator is used to output the enable signal as low level to the selector when the load power is equal to 0, or to output the enable signal as high level to the selector when the load power is greater than 0; the second regulator is used to output a power control voltage to the selector based on the load power and a preset reference power; The selector is used to output the transistor's output voltage as the reference voltage when the enable signal is low, or to output the power control voltage as the reference voltage when the enable signal is high.

5. The linear power supply according to claim 4, characterized in that, The linear power supply also includes a voltage detection circuit, the input terminal of which is connected to the output terminal of the power supply circuit, and the output terminal of which is connected to the second input terminal of the power control circuit and the first input terminal of the voltage control circuit. The voltage detection circuit is used to detect the output voltage of the transistor and output the output voltage to the power control circuit and the voltage control circuit.

6. The linear power supply according to claim 4, characterized in that, The linear power supply also includes a power detection circuit, the input of which is connected to the output of the power supply circuit, and the output of which is connected to the first input of the power control circuit. The power detection circuit is used to detect the load power and output the load power to the power control circuit.

7. The linear power supply according to claim 6, characterized in that, The power detection circuit includes a voltage detection circuit, a current detection circuit, a multiplication circuit, and a second control circuit. The input terminals of the voltage detection circuit and the current detection circuit are both used as input terminals of the power detection circuit. The output terminal of the voltage detection circuit is connected to the first input terminal of the multiplication circuit, the output terminal of the current detection circuit is connected to the second input terminal of the multiplication circuit, and the output terminal of the multiplication circuit is connected to the input terminal of the second control circuit. The output terminal of the second control circuit is used as the output terminal of the power detection circuit. The voltage detection circuit is used to detect the output voltage and output the output voltage to the multiplication circuit; The current detection circuit is used to detect the output current of the transistor and output a differential voltage to the multiplication circuit based on the output current. The multiplication circuit is used to output the detected power of the load to the second control circuit based on the output voltage and the differential voltage; the second control circuit is used to output the load power to the power control circuit based on the detected power.

8. The linear power supply according to claim 4, characterized in that, The power supply circuit also includes a switch, and the transistor is connected to the load through the switch. The linear power supply also includes a switch control circuit, which is connected to the first input terminal of the power control circuit. The switch control circuit is used to obtain control information of the load from the host computer. When the control information is high, it controls the switch to be turned on so that the load power is the rated power of the load. Or when the control information is low, it controls the switch to be turned off so that the load power is 0. The control information includes the pulse period and pulse duty cycle of the load. The switch control circuit is also used to output the load power to the power control circuit.

9. A DC power supply system, characterized in that, The DC power supply system includes a DC voltage source and a linear power supply as described in any one of claims 1-8, wherein the output terminal of the DC voltage source is connected to the input terminal of the power supply circuit in the linear power supply, and the output terminal of the power supply circuit is connected to a load.

10. A control method for a linear power supply, characterized in that, The linear power supply includes a power supply circuit, the input terminal of which is connected to a DC voltage source, and the output terminal of which is connected to a load. The power supply circuit includes a transistor. The method includes: The enable signal is low when the load power of the load is equal to 0, or high when the load power is greater than 0. When the enable signal is low, the reference voltage is the output voltage of the transistor; or when the enable signal is high, the reference voltage is the power control voltage, wherein the power control voltage is determined by the load power and the preset reference power. A first drive signal for the transistor is generated based on the reference voltage and the output voltage. When the enable signal is high, the transistor is controlled to turn on based on the first drive signal, and the on-state voltage drop of the transistor is adjusted.

11. The method according to claim 10, characterized in that, The method further includes: When the enable signal is low, the second drive signal of the transistor is low, and the transistor is controlled to turn off based on the second drive signal.

12. The method according to claim 10 or 11, characterized in that, Before the enable signal is low when the load power of the load is equal to 0, or high when the enable signal is greater than 0, the following steps are included: Obtain the load power of the load and the output voltage of the transistor.

13. The method according to claim 12, characterized in that, The power supply circuit further includes a switch, and the transistor is connected to the load through the switch; obtaining the load power of the load includes: The control information of the load is obtained. When the control information is high, the switch is turned on to obtain the load power of the load as the rated power of the load. Alternatively, when the control information is low, the switch is turned off to obtain the load power as 0. The control information includes the pulse period and pulse duty cycle of the load.

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