High-efficiency memristor neural network in-situ training system

Abstract

This invention discloses a high-efficiency in-situ training system for memristor neural networks, comprising a model database, an input module, and a model editing module. For input data, the system extracts a corresponding memristor neural network processing model from the model database, builds and trains an optimized in-situ training model, and stores it in a memory for later use. This in-situ training model uses a dual memristor array to represent network weights and simulates the non-ideal characteristics of memristors through a Vteam memristor neural network. Experimental simulations demonstrate the effectiveness and robustness of the proposed in-situ training scheme. Through an optimized algorithm combining hardware and neural network training, high-accuracy, simple-to-operate, and efficient in-situ training of memristor neural networks is achieved.

Description

Technical Field

[0001] This invention belongs to the field of artificial intelligence technology, and in particular relates to an in-situ training system based on memristor neural networks. Background Technology

[0002] In recent years, thanks to the rapid improvement in computing power, algorithms and applications based on artificial intelligence technology have made great progress. However, the increasing prominence of the memory wall and Moore's Law problem has revealed certain limitations of computing platforms based on the traditional von Neumann architecture. Due to the integration of storage and computation in neuromorphic computing, it is considered a new alternative to the traditional von Neumann architecture. Therefore, hardware implementations of neural networks have attracted widespread attention due to their low power consumption and fast parallel computing capabilities. Neural networks involve a large number of matrix multiplication operations. In memristor-based neural networks, matrix multiplication and accumulation operations can be effectively implemented using Ohm's law and Kirchhoff's laws, while the weights of the neural network can be effectively stored in a memristor cross array. However, existing memristors typically have many non-ideal characteristics, such as device-to-device, period-to-period, and pulse-to-pulse variations. This leads to uncertainty in the weight encoding of memristor neural networks, resulting in catastrophic failures during in-situ training. Therefore, to address the difficulty in controlling memristor conductance updates during in-situ training, an efficient in-situ training system for memristor neural networks is designed. This system combines hardware and neural network training to optimize the algorithm and achieve efficient in-situ training of memristor neural networks. Summary of the Invention

[0003] To address the problems mentioned in the background art, the present invention provides an efficient in-situ training system for memristor neural networks.

[0004] The technical solution is as follows:

[0005] A high-efficiency in-situ training system for memristor neural networks is characterized by including a model database, an input module, and a model editing module; the model database stores Vteam memristor neural networks and a series of memristor neural network processing models.

[0006] The input module is used to send preprocessed input data to the model editing module.

[0007] The model editing module is used to: extract the memristor neural network processing model corresponding to the input data from the model database, extract the Vteam memristor neural network, build and train the optimized memristor neural network in-situ training model, and store it in the memory for later use.

[0008] Preferably, the input module performs preprocessing, or performs analog-to-digital conversion on the input signal to obtain a digital signal with the characteristics of the input signal.

[0009] With the above structure, the system can build a corresponding memristor neural network in-situ training model for the type of input signal. This model can perform in-situ training accurately and efficiently, perform neuromorphic calculations on the preprocessed digital signal, and store the input signal data in the memory in the form of current for later use.

[0010] As a preferred option, before inputting input data into the in-situ training model of the memristor neural network, the memristor array module in the in-situ training model needs to be initialized. The initialization settings are as follows:

[0011] (1) Set all memristors to low conductivity state.

[0012] (2) Initialize weights The intervals are divided into weighted segments from -1 to 1 with a spacing of 2 / N, and the index of each segment is (1, K).

[0013] (3) Determine the current weight range K l And calculate the corresponding number of pulses.

[0014] When W l <0, determine the current weight interval K. l The corresponding number of pulses |K is obtained. l -(N+1) / 2| and apply the corresponding enhancement pulse to the negative array, when W l If the value is greater than 0, determine the current weight interval K. l The corresponding number of pulses K is obtained. l -(N+1) / 2, and apply the corresponding potential pulse to the positive array, when W l =0, maintain the current state.

[0015] Among them, W l Let n represent the weights of the l-th layer. l-1 K represents the number of neurons in layer 1l1, and N represents the initial conductance state. For ease of distinction, K is defined similarly to N. l This indicates the weight interval number to which the current weight belongs; after initialization, the weights of each layer are quantized, and the quantized weights are encoded into a corresponding number of pulses, which are then applied to the memristor array.

[0016] The memristor weight update scheme directly uses a pulse input instead of calculating the pulse time based on the gradient update amount. This can effectively reduce the computational complexity and is easy to control by the peripheral circuit, thereby achieving efficient and low-power in-situ training of the memristor.

[0017] Preferably, the memristor array is a dual memristor array, which is composed of two identical n×n memristor cross arrays in parallel, connected together to its front-end neuron set, and the output of the dual memristor array is connected to its back-end neuron set.

[0018] The output of each layer of the memristor array is shown below:

[0019] I j =∑ m V m G mj (1)

[0020] Where Vm represents the input of each layer, which exists in the form of voltage, and Gmj represents the conductance of the memristor. The multiplication and accumulation operation of 0(1) can be achieved through simple Ohm's law and Kirchhoff's current law. The output is the current of each column. By converting the current signal to voltage, it is input into the array of the next layer to realize the forward propagation of MLP.

[0021] The dual memristor cross array applies the same voltage to both the positive and negative arrays. The output current is obtained by subtracting the currents of corresponding columns. The positive and negative values ​​of the memristors are represented by the output current, as shown in the formula below:

[0022]

[0023] Where In+ and In- represent the currents of the nth layer positive and negative arrays, respectively, and G+ and G- represent the conductances of the positive and negative arrays, respectively.

[0024] Each column of the memristor cross-array outputs a current. This current signal is converted to voltage and input to the next layer of the array, enabling forward propagation of the MLP. Current values ​​are only positive; however, the dual memristor array approach allows for both positive and negative memristor weights. The dual memristor array approach provides a wider conductance range and achieves higher bit precision. Furthermore, it effectively reduces the driver load on the input voltage and the current density of the bit lines.

[0025] Preferably, in the nxn memristor cross array, all memristor array units are configured as Vteam memristor neural networks, which are composed of Vteam memristors and whose state variables w are changed by adding random noise.

[0026] As a preferred embodiment, the voltage-current relationship and internal state variable changes of the Vteam memristor are shown in Equation 3 and Formula 4.

[0027]

[0028] i(t)=G(w,v)v(t) (4)

[0029] Where w represents the state variable inside the memristor, v(t) is the voltage applied across the memristor, i(t) is the current flowing through the memristor, G(w, v) is the conductance of the memristor, and t is time.

[0030] Preferably, the state variable of the Vteam memristor has a threshold voltage, as shown in Formula 5;

[0031]

[0032] Where, k off k on α on α off It is a constant, v off and v on It is the voltage threshold; f on (w) and f off (w) is a window function for the memristor state variable w, controlling the rate of change of state variable w and limiting the value of state variable w. The limited range of state variable w is [w on w off The relationship between the state variable w and the conductance G(w, v) is set as an exponential relationship, as shown in Formula 6.

[0033]

[0034] As a preferred embodiment, the Vteam memristor neural network modifies the state variable w of the Vteam memristor by adding random noise as follows;

[0035]

[0036] By adding random noise to the control variable w, the Vteam memristor can achieve random variations in the non-ideal characteristics of the memristor; among which, the non-ideal characteristics include device-to-device variations, period-to-period variations, and pulse-to-pulse variations.

[0037] The Vteam model is a voltage threshold memristor model suitable for memristor neural network applications. By adding random noise to the control variable w, the Vteam model can achieve a large number of non-ideal characteristics of the actual memristor, making the model more realistic in terms of the state of the actual device, thereby realizing the quantification of device-to-device, period-to-period, and pulse-to-pulse changes.

[0038] Preferably, the dual memristor array includes an in-situ trainer, which is configured with:

[0039] A device for analyzing and encoding preprocessed data to obtain an encoded voltage in the range of [0V, 0.5V].

[0040] A device for performing neuromorphic calculations on encoded voltages and differentially calculating the current output of corresponding coordinate memristor cells in a dual memristor array.

[0041] A device used to encode the differential current into a voltage to obtain an encoded voltage, and then output it to the next layer of memristor cell.

[0042] A device for storing the output current of the last layer.

[0043] A device for calculating the updated value Δw.

[0044] A device for determining whether the updated value Δw is greater than a threshold.

[0045] If it is less than or equal to, then connect the means for dynamically accumulating the update value Δw and incorporate the update value Δw into the update value Δw calculated from the next batch of training data.

[0046] If the value is greater than the specified value, a weight update is performed, and the means for applying a SET or RESET pulse to the corresponding memristor array to perform the weight update is connected.

[0047] The weight updates are performed column-by-column. When the weight update amount of a layer in a certain column exceeds a threshold, updates are performed layer by layer starting from that column and layer, and then updated for all layers from the next column to the last column. The subsequent layers in that column are then compared, and the weights are either increased or accumulated for the next batch of training data.

[0048] In the in-situ trainer set within the dual memristor array, the fusion of variable threshold (DT) and gradient accumulation (GA) can tolerate nonlinear changes in the memristor and requires little computation when updating the memristor in situ, thus achieving a simple and efficient implementation that is highly effective in improving network performance.

[0049] As a preferred embodiment, in the device for voltage encoding of the differential current, the encoding rule for voltage encoding is shown in Formula 8.

[0050]

[0051] Where x is the current after differential calculation; f(x) is the value of the current after differential calculation after passing through the activation function f(·); f(x) max and f(x) min These are the maximum and minimum values ​​after activation function f(·), respectively. The entire network uses ReLU activation function. max and V minThese represent the maximum and minimum values ​​of the voltage range, i.e., 0.5 and 0, respectively; x represents the current after differential calculation.

[0052] The use of a binary error function ensures that the error function between the system output and the true value is minimized. The setting of the threshold σ plays an important role in improving the convergence of the algorithm, while reducing the number of memristor updates and enhancing the network performance.

[0053] Preferably, in the device for calculating the updated value Δw, a binary error function is used to calculate the error between the model output current value and the actual current value, as shown in Formula 9.

[0054]

[0055] Where E represents the error value, y o The output current of the last layer of coordinate memristor cells represents t, and the actual input label represents y. Applying formula 2... o The partial derivatives yield the formula for calculating backpropagation, as shown below;

[0056]

[0057] The gradient of each layer is propagated by Equation 7. According to the chain rule, the gradient of each layer is as shown in Equation 11.

[0058]

[0059] Where En represents the error between the output current value and the actual current value of the nth layer. n This represents the output of the nth layer, where n equals 1, 2, ..., o-1, W n+1 This represents the weight of the (n+1)th layer, expressed through a formula.

[0060] Equations 12 and 13 calculate the weight update value ΔW for each layer using the gradient value of each layer;

[0061]

[0062]

[0063] Among them, W ni，j Let X be the weight of the nth layer. n This is the input for the nth layer, where n is 1, 2, ..., o-1.

[0064] As a preferred embodiment, the formula for dynamically accumulating the rights update value Δw is shown in Formula 14;

[0065]

[0066] in Let α represent the updated weight of layer n in the p-th batch, where α is the learning rate. Represented as the network's regularization parameters. This represents the cumulative momentum during weight updates in the (p-1)th batch. The calculation method is shown in Formula 15;

[0067]

[0068] in, This represents the updated value of the nth layer weight in the (p-1)th batch. If the weight update amount in the (p-1)th batch is less than the threshold, it will be accumulated in the next weight update.

[0069] Momentum accumulation can compensate for the slow convergence speed of memristor weight update schemes. Memristor weight updates can be influenced by gradients from multiple previous training batches, thus accumulating in the next update and ensuring that the memristor updates in a defined direction. By accumulating momentum, harmful noise containing little information can be filtered out to smooth the weight evolution process and achieve robust updates in the correct direction, thereby achieving better convergence during training.

[0070] Preferably, in the device for determining whether the updated value Δw is greater than the threshold, the value of the threshold σ is determined using a dynamic threshold function, which enables the network to converge in the correct direction. The dynamic threshold function has two schemes: SDT and CDT. In the SDT scheme, the threshold change increases with the number of iterations, and the threshold is set to be non-zero to limit frequent updates of memristor weights. In the CDT scheme, the threshold change decreases with the number of iterations.

[0071] The weights are updated by judging the threshold and then controlling the weight update. Using a dynamic threshold function to determine the threshold σ can make the network converge in the correct direction.

[0072] Preferably, the data stored in the memory can be quickly restored to the original data through reverse operation.

[0073] Preferably, the series of memristor neural network processing models stored in the model database are either image memristor neural network processing models, sinusoidal radio wave memristor neural network processing models, or three-dimensional image memristor neural network processing models.

[0074] The system senses that the input signal is processed using the corresponding memristor neural network processing model to obtain an in-situ trained memristor neural network model for the input signal. After the model processes the input signal, the input signal is stored in the memory in the form of current. The stored current data can be quickly retrieved by reversing the operation.

[0075] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0076] The high-efficiency memristor neural network in-situ training system using the above technical solutions can combine hardware and neural network training to optimize the algorithm, achieve efficient in-situ training of memristor neural networks, complete on-chip learning based on memristor neural networks, and provide a new solution for the hardware implementation of memristor neural networks. Attached Figure Description

[0077] Figure 1 This is a schematic diagram of the simulation curves for the non-ideal characteristics of a memristor.

[0078] Figure 2 This is a schematic diagram of an MLP implemented using memristors.

[0079] Figure 3 This is a schematic diagram of weight storage and calculation for a memristor array;

[0080] Figure 4 Here is a flowchart of the in-situ training scheme;

[0081] Figure 5 This is a schematic diagram of a variable threshold curve;

[0082] Figure 6 A schematic diagram of a two-layer neural network based on memristors implementing an MLP on the MNIST dataset;

[0083] Figure 7 This is a schematic diagram of the weight statistical distribution results of the CDTGA scheme;

[0084] Figure 8 The histogram of the weight distribution of the first layer memristor array before and after training;

[0085] Figure 9 This is a histogram showing the distribution of the weights of the second-layer memristor array before and after training. Detailed Implementation

[0086] The present invention will be further described below with reference to the embodiments and accompanying drawings.

[0087] Example 1

[0088] like Figure 6The high-efficiency memristor neural network in-situ training system describes a memristor neural network in-situ training model built and optimized for input data such as images. The input module uses an image processing module, and the editing module extracts an image memristor neural network processing model and a Vteam memristor neural network from the model database. An optimized two-layer neural network model based on memristors to implement MLP is then built and trained. This two-layer neural network model uses a dual memristor array to represent network weights. During the forward propagation of the MLP, the input vector is multiplied by the synaptic matrix. The implementation steps of this model are as follows:

[0089] S1, the image processing module is used to obtain the pixel values ​​of the MNIST image in advance.

[0090] S2. The voltage encoding module is used to perform voltage encoding on the pixel value to obtain the original encoded voltage. The range of the encoded voltage is [0V, 0.5V]. The original voltage encoding is output to the first layer dual memristor array module through the input neural network.

[0091] S3. The first-layer dual memristor array module performs the first-layer neuromorphic calculation on the original encoded voltage and performs differential calculation on the current output of the corresponding column in the array to obtain the output current of the layer.

[0092] S4. The voltage encoding module encodes the output current of the first layer to obtain the second layer encoded voltage, and the second layer encoded voltage is output to the hidden nerve; the second layer encoded voltage is output to the second layer dual memristor array module through the hidden nerve.

[0093] S5. The second layer dual memristor array module performs neuromorphic calculations on the original encoded voltage and performs differential calculations on the current output of the corresponding column in the array to obtain the output of that layer. The output current of the last layer is not encoded and is output through the output neuron.

[0094] Before inputting the input data into the two-layer neural network model, the memristor array needs to be initialized. The initialization settings are as follows:

[0095] (1) Set all memristors to low conductivity state.

[0096] (2) Initialize weights The intervals are divided into weighted segments from -1 to 1 with a spacing of 2 / N, and the index of each segment is (1, K).

[0097] (3) Determine which range the current weight belongs to and calculate the corresponding number of pulses.

[0098] When W l <0, determine which interval K the current weight belongs to. l The corresponding number of pulses |K is obtained. l-(N+1) / 2| and apply the corresponding enhancement pulse to the negative array, when W l If the value is greater than 0, determine which interval K the current weight belongs to. l The corresponding number of pulses K is obtained. l -(N+1) / 2, and apply the corresponding potential pulse to the positive array, when W l =0, maintain the current state.

[0099] Among them, W l Let n represent the weights of the l-th layer. l-1 K represents the number of neurons in layer l-1, and N represents the initial conductance state. For ease of distinction, K is defined similarly to N. l This indicates the weight interval number to which the current weight belongs. After initialization, the weights of each layer are quantized, and the quantized weights are encoded into a corresponding number of pulses, which are then applied to the memristor array.

[0100] The variable threshold (DT) and gradient accumulation (GA) schemes were combined. The two schemes are highly compatible and significantly improve the network performance. According to the analysis of Table 4, the proposed CDTGA and SDTGA schemes achieved the top two test accuracies on all three thresholds, with the highest accuracy reaching 96.15%, which is 14.07% higher than the original accuracy of 82.08%.

[0101] Table 4. Test accuracy of MLP based on memristors

[0102]

[0103] like Figure 2 As shown, a typical multilayer perceptron neural network consists of multiple fully connected layers executed sequentially, with the output of each layer as shown below.

[0104] I j =∑ m V m G mj (1)

[0105] Here, Vm represents the input of each layer, which exists in the form of voltage, and Gmj represents the conductance of the memristor. The 0(1) multiplication and accumulation operation can be achieved through simple Ohm's law and Kirchhoff's current law. The output is the current of each column. By converting the current signal to voltage, it is input into the array of the next layer to realize the forward propagation of the MLP.

[0106] like Figure 3 As shown, the dual memristor cross array applies the same voltage to both the positive and negative arrays. The output current is obtained by subtracting the currents of corresponding columns. The positive and negative values ​​of the memristor weights are represented by the output current shown. The formula for the output current is as follows:

[0107]

[0108] Where In+ and In- represent the currents of the nth layer positive and negative arrays, respectively, and G+ and G- represent the conductances of the positive and negative arrays, respectively.

[0109] like Figure 1 As shown, in the nxn memristor cross array, all memristor array cells are configured as Vteam memristor neural networks. The Vteam memristor neural network is composed of Vteam memristors, and the state variable w of the Vteam memristors is modified by adding random noise. The modified state variable w is shown below:

[0110]

[0111] Where, k off k on α on α off It is a constant, v off and v on It is the voltage threshold; f on (w) and f off (w) is a window function for the memristor state variable w, controlling the rate of change of state variable w and limiting the value of state variable w. The limited range of state variable w is [w on w off ], a*rand(1,1) is random noise. The Vteam memristor neural network can simulate the conductance changes of 5 memristors in one cycle, reflecting the actual D2D characteristics of memristors; or simulate the conductance of a single memristor in 5 cycles, demonstrating the quantitative representation of the overall P2P of memristors.

[0112] like Figure 7 As shown in the diagram, the weight distribution in the positive and negative arrays of the CDTGA scheme shows that the weights in the first layer are mostly small values ​​in both the positive and negative arrays, with the positive array being more obvious and darker in color; in the weights of the second layer, the colors are more distinct.

[0113] like Figure 8 , 9 As shown, the weight changes of the two-layer memristor array before and after in-situ training are illustrated. The weights are represented by the difference in memristor conductance between the positive and negative arrays. Figure 8 The weights of the first layer have been changed, with nearly half of the zero weights being reduced compared to before training. Figure 9 The change in the weights of the second layer is similar; nearly half of the zero weights were reduced compared to before training, and these were redistributed to the weights at both ends. The weights of both layers follow a Gaussian distribution.

[0114] Example 2

[0115] like Figure 4 As shown, the in-situ training process of the memristor neural network in-situ training model is as follows:

[0116] S1. Convert the input data, such as image pixel values, into voltage signals, limiting them to the range of [0, 0.5V], and input them into the dual memristor array.

[0117] S2. Input the voltage signal into the first layer dual memristor array, and perform differential analysis on the current output of the corresponding column in the dual memristor array to obtain the output current of this layer. Then, encode the output current with voltage and input it into the next layer. Repeat the operation to advance. The final output layer does not perform voltage encoding processing.

[0118] S3. Calculate the updated value Δw.

[0119] S4. Determine whether the updated value Δw is greater than the threshold σ. If the updated value Δw is less than the threshold σ, perform momentum accumulation to accumulate the updated value Δw into the next batch of parallel training data. If the updated value Δw is greater than the threshold σ, apply a SET / RESET pulse to the corresponding memristor array to update the weights.

[0120] The encoding rules in the voltage encoding module are shown in Formula 4;

[0121]

[0122] Where x is the current after differential calculation; f(x) is the value of the current after differential calculation after passing through the activation function f(·); f(x) max and f(x) min These are the maximum and minimum values ​​after activation function f(·), respectively. The entire network uses ReLU activation function. max and V min These represent the maximum and minimum values ​​of the voltage range, i.e., 0.5 and 0, respectively; x represents the current after differential calculation.

[0123] When updating the value Δw, a binary error function is used to calculate the error between the model output current value and the actual current value. This binary error function is shown in Formula 5.

[0124]

[0125] Where E represents the error value, y o This represents the output of the last layer, where t represents the true input label. Applying formula 5 to y... o The partial derivatives yield the formula for calculating backpropagation, as shown below;

[0126]

[0127] The gradient of each layer is propagated by Equation 5. According to the chain rule, the gradient of each layer is as shown in Equation 7.

[0128]

[0129] Among them, y n This represents the output of the nth layer, where n equals 1, 2, ..., o-1, W n+1 This represents the weights of the (n+1)th layer. The activation function used in this paper is the ReLU function, and Formula 11 omits the gradient value of the activation function. After calculating the gradient value of each layer, the weight update value ΔW of each layer is calculated using the gradient value of each layer through Formulas 8 and 9.

[0130]

[0131]

[0132] Among them, W ni，j Let X be the weight of the nth layer. n This is the input for the nth layer, where n is 1, 2, ..., o-1.

[0133] The rules for applying the SET or RESET pulses are as follows: when the updated value Δw of the weight is greater than zero, if the weight is greater than or equal to zero, apply an enhancement pulse to the positive array; if the weight is less than zero, apply an enhancement pulse to the negative array. When the updated value Δw of the weight is less than zero, if the weight is greater than zero, apply an enhancement pulse to the positive array; if the weight is less than or equal to zero, apply an enhancement pulse to the negative array.

[0134] The momentum accumulation refers to accumulating the calculated weight update value Δw into the next update, as shown in Formula 10;

[0135]

[0136] in Let α represent the updated weight of layer n in the p-th batch, where α is the learning rate. Represented as the network's regularization parameters. This represents the cumulative momentum during weight updates in the (p-1)th batch. The calculation method is shown in Formula 11;

[0137]

[0138] in, This represents the updated value of the nth layer weight in the (p-1)th batch. If the weight update amount of the (p-1)th batch is less than the threshold, the updated value is accumulated in the next weight update.

[0139] like Figure 5 As shown, the dynamic threshold function uses two schemes, SDT and CDT, to determine the threshold σ. Weight updates are performed by comparing the weights with the threshold σ and then controlling the weight updates accordingly. The dynamic threshold function helps the network converge in the correct direction. In the SDT scheme, the threshold changes with the number of iterations; the initial threshold is not set to 0 to limit frequent memristor weight updates. In the CDT scheme, the threshold changes with the number of iterations.

[0140] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention. Those skilled in the art, under the guidance of the present invention, can make various similar representations without departing from the spirit and claims of the present invention, and such modifications all fall within the protection scope of the present invention.

Claims

1. A high-efficiency in-situ training system for memristor neural networks, characterized in that: It includes a model database, an input module, and a model editing module; the model database stores Vteam memristor neural networks and a series of memristor neural network processing models; The input module is used to: send preprocessed input data to the model editing module; The model editing module is used to: extract the memristor neural network processing model corresponding to the input data from the model database, extract the Vteam memristor neural network, build and train the optimized memristor neural network in-situ training model, and store it in the memory for later use. The memristor neural network in-situ training model is equipped with a memristor array module. The memristor array is a dual memristor array, which is composed of two identical nxn memristor cross arrays in parallel, which are connected to its front-end neuron set. The output of the dual memristor array is connected to its back-end neuron set. An in-situ trainer is provided within the dual memristor array, and the in-situ trainer is equipped with: A device for analyzing and encoding preprocessed data to obtain encoded voltage; A device for performing neuromorphic calculations on encoded voltages and differentially calculating the current output of corresponding coordinate memristor cells in a dual memristor array. A device used to encode the differential current into a voltage to obtain an encoded voltage and output it to the next layer of memristor cell; A device for storing the output current of the last layer of memristor cells; A device for calculating the updated value Δw; A device for determining whether the updated value Δw is greater than a threshold; If it is less than or equal to, then connect the device for dynamically accumulating the update value △w and incorporate the update value △w into the update value △w calculated from the next batch of training data; If the value is greater than the specified value, a weight update is performed, and the means for applying a SET or RESET pulse to the corresponding memristor array to perform the weight update is connected.

2. The high-efficiency memristor neural network in-situ training system according to claim 1, characterized in that, The preprocessing in the input module refers to the process of performing analog-to-digital conversion on the input signal to obtain input data with the characteristics of the input signal.

3. The high-efficiency memristor neural network in-situ training system according to claim 1, characterized in that: Before inputting preprocessed data into the memristor neural network in-situ training model, the memristor array module in the memristor neural network in-situ training model needs to be initialized. The initialization process is as follows: (1) Set all memristors to low conductivity state; (2) Initialize weights The intervals are divided into weighted segments from -1 to 1 with a spacing of 2 / N, and the index of each segment is (1, K). (3) Determine the current weight range And calculate the corresponding number of pulses: when Determine the current weight interval. The corresponding number of pulses is obtained. And apply corresponding enhancement pulses to the negative array, when Determine the current weight interval. The corresponding number of pulses is obtained. And apply the corresponding potential pulse to the positive array, when Maintain the current state; in, Represented as the weights of the l-th layer, K represents the number of neurons in layer l-1, and N represents the initial conductance state. For ease of distinction, K and N are defined similarly. This indicates the weight interval number to which the current weight belongs; after initialization, the weights of each layer are quantized, and the quantized weights are encoded into different numbers of pulses, which are then applied to the memristor array.

4. The high-efficiency memristor neural network in-situ training system according to claim 1, characterized in that, In the nxn memristor cross array, all memristor array units are configured as Vteam memristor neural networks. The Vteam memristor neural network is composed of Vteam memristors, and the state variable w of the Vteam memristors is changed by adding random noise. The voltage-current relationship and internal state variable changes of the Vteam memristor are shown in Formula 1 and Formula 2. (1) (2) Where w represents the state variable inside the memristor, v(t) is the voltage applied across the memristor, i(t) is the current flowing through the memristor, G(w,v) is the conductance of the memristor, and t is time; The state variable of the Vteam memristor has a threshold voltage, as shown in Formula 3. (3) in, , , , It is a constant. and It is the voltage threshold; and It is a window function for the memristor state variable w, controlling the rate of change of the state variable w and limiting the value of the state variable w; the state variable w and the conductance The relationship is set as an exponential relationship, as shown in Formula 4; （4） The Vteam memristor neural network modifies the state variable w of the Vteam memristor by adding random noise as follows: (5) By adding random noise to the control variable w, the Vteam memristor can achieve random variations in the non-ideal characteristics of the memristor; among which, the non-ideal characteristics include device-to-device variations, period-to-period variations, and pulse-to-pulse variations.

5. The high-efficiency memristor neural network in-situ training system according to claim 1, characterized in that: In the device for voltage encoding of the differential current, the encoding rule for voltage encoding is shown in Formula 6. (6) Where x is the current after differential operation; f(x) is the current after differential operation processed by the activation function. The value after; and Each is activated by a different function. The maximum and minimum values ​​are obtained after that, and the ReLU activation function is used throughout the network. and These represent the maximum and minimum values ​​for the voltage range, i.e., 0.5 and 0 respectively; x represents the differential current. In the device for calculating the updated value Δw, a binary error function is used to calculate the error between the model output current value and the actual current value, as shown in Formula 7. (7) Where E represents the error value, The output current of the last layer of coordinate memristor cells represents t, which represents the actual input label. Applying Equation 7... The partial derivatives yield the formula for calculating backpropagation, as shown below; (8) The gradient of each layer is propagated by Equation 7. According to the chain rule, the gradient of each layer is as shown in Equation 9. (9) Where En represents the error between the output current value and the actual current value of the nth layer. This represents the output of the nth layer, where n equals 1, 2, ..., 0-1. This represents the weights of the (n+1)th layer. The updated weight values ​​for each layer are calculated using the gradient values ​​of each layer through formulas 10 and 11. ; (10) （11） in, Represented as the weight of the nth layer, Here, represents the encoded voltage value of the input at layer n, where n is 1, 2, ..., 0-1. In the device for dynamically accumulating and updating the value Δw, the formula for dynamically accumulating the value Δw is as shown in Formula 12; (12) in This represents the updated value of the weight of layer n in the p-th batch. For learning rate, Represented as the network's regularization parameters. This represents the cumulative momentum during weight updates in the (p-1)th batch. The calculation method is shown in Formula 13; (13) in, This represents the updated value of the nth layer weight in the (p-1)th batch. If the weight update amount of the (p-1)th batch is less than the threshold, it will be accumulated in the next weight update. In the device for determining whether the updated value Δw is greater than a threshold, the threshold is... The value is determined using a dynamic threshold function, which enables the network to converge in the correct direction. This dynamic threshold function has two schemes: SDT and CDT. In the SDT scheme, the threshold changes with the number of iterations, and the threshold is set to be non-zero at the beginning to limit frequent updates of memristor weights. In the CDT scheme, the threshold changes with the number of iterations.

6. The high-efficiency memristor neural network in-situ training system according to claim 1, characterized in that, The backup data stored in the memory can be quickly restored to the original data through reverse operation.

7. The high-efficiency memristor neural network in-situ training system according to claim 1, characterized in that: The series of memristor neural network processing models are either image memristor neural network processing models, sinusoidal radio wave memristor neural network processing models, or three-dimensional image memristor neural network processing models.

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