Programmable High-Precision Impact-Resistant Bridge Wire Adaptive Delay Circuit for Electronic Detonator

Abstract

The present invention discloses a programmable high-precision impact-resistant bridge wire adaptive delay circuit for an electronic detonator, which mainly includes two parts: a programmable high-precision impact-resistant delay device and a bridge wire adaptive detection delay compensation module. In the programmable high-precision impact-resistant delay device, a novel adaptive precision control circuit is adopted to automatically adjust the precision of the circuit according to a preset clock signal, and then correct the delay data and compensation delay data according to the precision, greatly improving the convenience and flexibility of delay setting and time delay compensation. The bridge wire adaptive detection delay compensation module adopts a novel circuit based on non-destructive detection of the bridge wire to compensate for the inconsistency of the ignition time of the bridge wire type ignition charge. The simulation results show that this circuit can effectively compensate the delay time of the bridge wire type ignition charge with inconsistent ignition times, thus achieving high-precision delay and delay compensation, and enhancing the effect of millisecond blasting.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and particularly to a programmable high-precision impact-resistant bridge wire adaptive delay circuit for electronic detonators. Background Art

[0002] Electronic detonators are mainly applied in fields such as building blasting, mines, drilling, military, and geological exploration. In practical applications, it is usually necessary to network hundreds or even more than a thousand electronic detonators for blasting. If detonated simultaneously, it is equivalent to a small earthquake, which will cause great damage to surrounding buildings and even threaten personal and property safety. Based on the principle of millisecond-delay blasting to precisely control the detonation time of each electronic detonator and detonate the explosives in sequence with a millisecond-level time difference, the blasting shock wave, vibration, and noise can be effectively controlled, and the safety and production efficiency can be improved. Although this method is easy to operate and has high safety, it has very high requirements for delay accuracy. If the actual detonation time between adjacent detonators deviates too much from the preset value, the effect of millisecond-delay blasting will be greatly reduced.

[0003] According to the national standard regulations, the upper limit of the firing energy of ordinary electronic detonators is 7.9 A 2 ms. Although the firing energy of each electronic detonator is a definite value, there are large differences in the firing energy between different electronic detonators due to process deviations. Therefore, under a certain current condition, there are certain differences in the ignition time of different electronic detonators, that is, there are certain differences in the firing time of the ignition heads of electronic detonators. Currently, the methods to reduce the error of the ignition heads of electronic detonators include: improving the process, performing secondary or multiple treatments on the primer heads, reducing the differences in the area of the bridge wire heating the agent and the heat conduction process; increasing the output current or voltage of the bridge wire ignition to reduce the error by reducing the firing time of the bridge wire type ignition primer; reducing the cross-sectional area of the bridge wire to shorten the firing time. The basic principle of these typical methods is to reduce the firing time, so that the standard deviation and range of the firing time are reduced, but they are not real bridge wire compensation, and the error still exists. Moreover, it will cause a rapid increase in cost and power consumption, and a sharp decrease in the maximum networking scale of electronic detonators. Therefore, it is necessary to design an adaptive compensation delay circuit that can truly adjust the delay automatically according to the actual heating situation of the ignition head, and can reduce these errors to the minimum through high-precision delay compensation. Summary of the Invention

[0004] The problem to be solved by the present invention is to reduce the delay error caused by different heating situations of the bridge wire type ignition primers between different detonators, and provide a programmable high-precision impact-resistant bridge wire adaptive delay circuit for electronic detonators.

[0005] To solve the above problems, the present invention is realized through the following technical solutions:

[0006] The programmable high-precision impact-resistant bridge wire adaptive delay circuit for an electronic detonator consists of a bridge wire adaptive detection delay compensation module and a programmable high-precision impact-resistant delay module; the bridge wire adaptive detection delay compensation module includes a bridge wire non-destructive detection operation core, a DAC, a bridge wire detection bridge, a single ADC dual-channel acquisition circuit, and an ADC; the programmable high-precision impact-resistant delay module includes an adaptive precision controller, a crystal oscillator, an RC resonant oscillator, a counting period generator, a reference pulse generator, and three counters.

[0007] The external enable signal Wiredete_EN is connected to the enable input terminal of the bridge wire non-destructive detection operation core; the data output terminal of the bridge wire non-destructive detection operation core is connected to the input terminal of the DAC, and the output terminal of the DAC is connected to the differential pressure control input terminal of the bridge wire detection bridge; the calibration current enable output terminal and the measurement current enable output terminal of the bridge wire non-destructive detection operation core are respectively connected to the calibration current enable input terminal and the measurement current enable input terminal of the bridge wire detection bridge; the switch control output terminal of the bridge wire non-destructive detection operation core is connected to the switch control input terminal of the single ADC dual-channel acquisition circuit; the bridge wire calibration voltage output terminal and the bridge wire measurement voltage output terminal of the bridge wire detection bridge are respectively connected to the bridge wire calibration voltage input terminal and the bridge wire measurement voltage input terminal of the single ADC dual-channel acquisition circuit; the voltage output terminal of the single ADC dual-channel acquisition circuit is connected to the input terminal of the DAC, and the output terminal of the DAC is connected to the data input terminal of the bridge wire non-destructive detection operation core.

[0008] The external preset delay signal Preset_data is connected to the preset delay input terminal of the adaptive precision controller, and the compensation delay output terminal of the bridge wire non-destructive detection operation core is connected to the compensation delay input terminal of the adaptive precision controller; the precision control output terminal of the adaptive precision controller is connected to the precision control input terminal of the first counter, the corrected preset delay output terminal of the adaptive precision controller is connected to the corrected preset delay input terminal of the second counter, and the corrected compensation delay output terminal of the adaptive precision controller is connected to the corrected compensation delay input terminal of the third counter; the external start signal Start_up is connected to the start input terminals of the first counter and the counting period generator; the precision clock output terminal of the crystal oscillator is connected to the precision clock input terminal of the first counter, and the counting output terminal of the first counter is connected to the counting input terminals of the counting period generator, the reference pulse generator, and the second counter; the stable clock output terminal of the RC resonant oscillator is connected to the stable clock input terminals of the counting period generator and the reference pulse generator; the counting period output terminal of the counting period generator is connected to the counting period input terminal of the reference pulse generator; the reference clock output terminal of the reference pulse generator is connected to the reference clock input terminals of the second counter and the third counter; the counting output terminal of the second counter is connected to the counting input terminal of the third counter; the counting output terminal of the third counter is connected to the ignition circuit of the electronic detonator.

[0009] In the above solution, the bridge wire detection bridge consists of PMOS transistors M1 to M8, NMOS transistor M9, two current sources Idc1 to Idc2, and resistors R1 to R2; the source electrodes of PMOS transistor M1, PMOS transistor M4, PMOS transistor M5, and PMOS transistor M8 are commonly connected to the power supply VDD; the drain electrode of PMOS transistor M1 is connected to the source electrode of PMOS transistor M2, the drain electrode of PMOS transistor M4 is connected to the source electrode of PMOS transistor M3, the drain electrode of PMOS transistor M5 is connected to the source electrode of PMOS transistor M6, and the drain electrode of PMOS transistor M8 is connected to the source electrode of PMOS transistor M7; the gate electrodes of PMOS transistor M1 and PMOS transistor M8 together form the calibration current enable input terminal of the bridge wire detection bridge, and the gate electrodes of PMOS transistor M4 and PMOS transistor M5 together form the measurement current enable input terminal of the bridge wire detection bridge; the gate electrode and drain electrode of PMOS transistor M2, and the gate electrode of PMOS transistor M7 are connected to the positive electrode of current source Idc1, and the gate electrode and drain electrode of PMOS transistor M3, and the gate electrode of PMOS transistor M6 are connected to the positive electrode of current source Idc2; the drain electrode of PMOS transistor M6, the drain electrode of PMOS transistor M7, one end of resistor R1, and one end of resistor R2 are connected; the gate electrode of NMOS transistor M9 forms the differential pressure control input terminal of the bridge wire detection bridge; the other end of resistor R1 and the drain electrode of NMOS transistor M9 together form the bridge wire calibration voltage output terminal of the bridge wire detection bridge; the other end of resistor R2 and the positive electrode of the bridge wire of the electronic detonator together form the bridge wire measurement voltage output terminal of the bridge wire detection bridge; the negative electrode of current source Idc1, the negative electrode of current source Idc2, the source electrode of NMOS transistor M9, and the negative electrode of the bridge wire of the electronic detonator are commonly grounded.

[0010] In the above solution, the current value of current source Idc2 is greater than the current value of the first current source Idc.

[0011] In the above solution, the current value of current source Idc2 is greater than or equal to 10 times the current value of the first current source Idc.

[0012] In the above solution, the single ADC dual-channel acquisition circuit consists of PMOS transistors M1 and M3, NMOS transistors M2 and M4, and inverter INV1;

[0013] The drain of PMOS transistor M1 and the source of NMOS transistor M2 jointly form the bridge wire calibration voltage input terminal of the single ADC dual-channel acquisition circuit; the drain of PMOS transistor M3 and the source of NMOS transistor M4 jointly form the bridge wire measurement voltage input terminal of the single ADC dual-channel acquisition circuit; the gate of PMOS transistor M1, the gate of NMOS transistor M4 and the input terminal of inverter INV1 jointly form the switch control input terminal of the single ADC dual-channel acquisition circuit; the output terminal of inverter INV1 is connected to the gates of NMOS transistor M2 and PMOS transistor M3; the source of PMOS transistor M1, the drain of NMOS transistor M2, the source of PMOS transistor M3 and the drain of NMOS transistor M4 jointly form the voltage output terminal of the single ADC dual-channel acquisition circuit.

[0014] Compared with the prior art, the present invention has the following characteristics:

[0015] 1. An adaptive delay precision control circuit is added while inputting delay data. There is no need to manually set the delay precision, and the precision can be automatically adjusted according to the delay data, which has better convenience and flexibility in setting the delay data and the compensated delay data.

[0016] 2. A scheme based on non-destructive detection of the bridge wire is adopted to predict the firing time of the bridge wire type ignition cartridge and compensate the delay circuit. Compared with the traditional method of reducing the firing time of the firing head to reduce the error, it has higher precision, lower cost and power consumption. Therefore, it can also expand the maximum networking scale of electronic detonators, and at the same time, it can detect the quality of the bridge wire in the ignition cartridge.

[0017] 3. The single ADC dual-channel acquisition technology is adopted. The traditional single ADC acquisition circuit requires a differential-to-single-ended circuit and a level boosting circuit composed of three operational amplifiers. The method adopted by the present invention reduces the power consumption and area overhead and improves the precision of the ADC. Description of the Drawings

[0018] Figure 1 It is the schematic diagram of the programmable high-precision impact-resistant bridge wire adaptive delay circuit for electronic detonators.

[0019] Figure 2 It is the schematic diagram of the bridge wire detection bridge.

[0020] Figure 3 It is the working flow chart of the bridge wire adaptive detection delay compensation module.

[0021] Figure 4 It is the working flow chart of the programmable high-precision impact-resistant delay module.

[0022] Figure 5 It is the adaptive bridge wire detection simulation result diagram when the bridge wire heats up quickly.

[0023] Figure 6 It is a simulation result diagram of adaptive bridge wire detection when the bridge wire heats up slowly.

[0024] Figure 7 It is a simulation result diagram when the preset delay data is a small delay.

[0025] Figure 8 It is a simulation result diagram when the preset delay data is a medium delay.

[0026] Figure 9 It is a simulation comparison result diagram of the overall delay after the adaptive compensation is completed when the bridge wire heats up quickly.

[0027] Figure 10 It is a simulation comparison result diagram of the overall delay after the adaptive compensation is completed when the bridge wire heats up slowly. Specific implementation manner

[0028] To make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0029] An electronic detonator uses a programmable high-precision impact-resistant bridge wire adaptive delay circuit, as Figure 1 shown, which is composed of a bridge wire adaptive detection delay compensation module and a programmable high-precision impact-resistant delay module. The input of the bridge wire adaptive detection delay compensation module is connected to the external enable signal Wiredete_EN, the output signal Compen_data of the bridge wire adaptive detection delay compensation module is connected to the input of the programmable high-precision impact-resistant delay module, and the bridge wire adaptive detection delay compensation module performs non-destructive detection on the bridge wire of the ignition charge head of the access electronic detonator, and obtains the compensation delay data Compen_data according to the detection result to compensate the delay. The input of the programmable high-precision impact-resistant delay module is connected to the external start signal Start_up, the external preset delay data Preset_data and the compensation delay data Compen_data output by the bridge wire adaptive detection delay compensation module. The output signal count3_over of the programmable high-precision impact-resistant delay module is connected to the ignition circuit of the electronic detonator. The programmable high-precision impact-resistant delay module is responsible for delay setting and compensates the delay according to the compensation delay data Compen_data to achieve the high-precision delay function. In the present invention, the external enable signal Wiredete_EN, the external start signal Start_up and the external preset delay data Preset_data are all provided by an external CPU.

[0030] The bridge wire adaptive detection delay compensation module includes a bridge wire non-destructive detection operation core, a DAC, a bridge wire detection bridge, a single ADC dual-channel acquisition circuit, and an ADC. The external enable signal Wiredete_EN is connected to the enable input terminal of the bridge wire non-destructive detection operation core. The data output terminal of the bridge wire non-destructive detection operation core is connected to the input terminal of the DAC, and the output terminal of the DAC is connected to the differential pressure control input terminal of the bridge wire detection bridge. The calibration current enable output terminal and the measurement current enable output terminal of the bridge wire non-destructive detection operation core are respectively connected to the calibration current enable input terminal and the measurement current enable input terminal of the bridge wire detection bridge. The switch control output terminal of the bridge wire non-destructive detection operation core is connected to the switch control input terminal of the single ADC dual-channel acquisition circuit. The bridge wire calibration voltage output terminal and the bridge wire measurement voltage output terminal of the bridge wire detection bridge are respectively connected to the bridge wire calibration voltage input terminal and the bridge wire measurement voltage input terminal of the single ADC dual-channel acquisition circuit. The voltage output terminal of the single ADC dual-channel acquisition circuit is connected to the input terminal of the DAC, and the output terminal of the DAC is connected to the data input terminal of the bridge wire non-destructive detection operation core.

[0031] The bridge wire detection bridge consists of PMOS transistors M1 to M8, NMOS transistor M9, two current sources Idc1 to Idc2, and resistors R1 to R2, as Figure 2As shown. The current value of current source Idc2 is greater than that of the first current source Idc, and the current value of current source Idc2 is more than 10 times that of the first current source Idc. In a preferred embodiment of the present invention, current sources Idc1 and Idc2 output currents of 10 mA and 100 mA respectively. The small current is used for calibrating the bridge resistance for bridge wires of different specifications, and the large current is used for measuring the temperature rise of the bridge wire. The sources of PMOS transistor M1, PMOS transistor M4, PMOS transistor M5, and PMOS transistor M8 are commonly connected to power supply VDD. The drain of PMOS transistor M1 is connected to the source of PMOS transistor M2, the drain of PMOS transistor M4 is connected to the source of PMOS transistor M3, the drain of PMOS transistor M5 is connected to the source of PMOS transistor M6, and the drain of PMOS transistor M8 is connected to the source of PMOS transistor M7. The gates of PMOS transistor M1 and PMOS transistor M8 together form the calibration current enabling input terminal of the bridge wire detection bridge, and the gates of PMOS transistor M4 and PMOS transistor M5 together form the measurement current enabling input terminal of the bridge wire detection bridge. The gate and drain of PMOS transistor M2, and the gate of PMOS transistor M7 are connected to the positive pole of current source Idc1, and the gate and drain of PMOS transistor M3, and the gate of PMOS transistor M6 are connected to the positive pole of current source Idc2. The drains of PMOS transistor M6, the drain of PMOS transistor M7, one end of resistor R1, and one end of resistor R2 are connected. The gate of NMOS transistor M9 forms the differential pressure control input terminal of the bridge wire detection bridge. The other end of resistor R1 and the drain of NMOS transistor M9 together form the bridge wire calibration voltage output terminal of the bridge wire detection bridge. The other end of resistor R2 and the positive pole of the bridge wire of the electronic detonator together form the bridge wire measurement voltage output terminal of the bridge wire detection bridge. The negative poles of current source Idc1, the negative pole of current source Idc2, the source of NMOS transistor M9, and the negative pole of the bridge wire of the electronic detonator are commonly grounded.

[0032] The single ADC dual-channel acquisition circuit consists of PMOS transistors M1 and M3, NMOS transistors M2 and M4, and an inverter INV1. The drain of PMOS transistor M1 and the source of NMOS transistor M2 together form the bridge wire calibration voltage input terminal of the single ADC dual-channel acquisition circuit. The drain of PMOS transistor M3 and the source of NMOS transistor M4 together form the bridge wire measurement voltage input terminal of the single ADC dual-channel acquisition circuit. The gate of PMOS transistor M1, the gate of NMOS transistor M4, and the input terminal of inverter INV1 together form the switch control input terminal of the single ADC dual-channel acquisition circuit. The output terminal of inverter INV1 is connected to the gates of NMOS transistor M2 and PMOS transistor M3. The source of PMOS transistor M1, the drain of NMOS transistor M2, the source of PMOS transistor M3, and the drain of NMOS transistor M4 together form the voltage output terminal of the single ADC dual-channel acquisition circuit. The above single ADC dual-channel acquisition circuit adopts a switch structure of a double transmission gate composed of transmission gates formed by MOS transistors M1 to M4. Two voltage signals U1 and U2 are respectively connected to the inputs of the two transmission gates, and the outputs of the two transmission gates formed by MOS transistors M1 to M4 are connected together to the input of the ADC. Compared with the traditional three-op amp differential-to-single-ended method, the single ADC dual-channel acquisition circuit with the switch structure of the double transmission gate of the present invention has lower area and power consumption, and because there is no need for level shifting, the ADC can use a lower reference voltage and power supply, reducing the power consumption of the ADC and improving the accuracy of the ADC.

[0033] See Figure 3 , the bridge wire non-destructive detection operation core serves as the control core of the entire circuit. The external enable signal Wiredete_EN input to the bridge wire non-destructive detection operation core is responsible for starting the measurement. The control signal ADC_Channel output by the bridge wire non-destructive detection operation core is connected to the single ADC dual-channel acquisition circuit to control the ADC to collect signals. The control signals Idc1_en and Idc2_en output by the bridge wire non-destructive detection operation core are connected to the bridge wire detection bridge to control the current source in the bridge wire detection bridge to output current. The 8-bit digital signal OutResData<7:0> output by the bridge wire non-destructive detection operation core is connected to the input of the DAC, and the output DACOUT of the DAC is then connected to the bridge wire detection bridge to control the voltage difference across the bridge. The bridge wire detection bridge calibrates the bridge wire with a small current and measures the temperature rise of the bridge wire with a large current. The voltages at both ends of the bridge, namely the bridge wire calibration voltage U1 and the bridge wire measurement voltage U2, are connected to the input of the ADC through the single ADC dual-channel acquisition circuit, and the ADC outputs a 12-bit digital signal Involt<11:0> which is connected to the input of the bridge wire non-destructive operation core. After measuring all the data, the bridge wire non-destructive detection operation core performs fitting processing on the data, predicts the final temperature rise curve of the bridge wire, and outputs the compensation delay data Compen_data obtained according to the temperature rise curve to the adaptive precision controller of the programmable high-precision anti-shock delay module.

[0034] The programmable high-precision impact-resistant delay module includes an adaptive precision controller, a crystal oscillator, an RC resonant oscillator, a counting period generator, a reference pulse generator, and three counters. The externally preset delay signal Preset_data is connected to the preset delay input end of the adaptive precision controller, and the compensation delay output end of the bridge wire non-destructive detection operation core is connected to the compensation delay input end of the adaptive precision controller. The precision control output end of the adaptive precision controller is connected to the precision control input end of the first counter, the corrected preset delay output end of the adaptive precision controller is connected to the corrected preset delay input end of the second counter, and the corrected compensation delay output end of the adaptive precision controller is connected to the corrected compensation delay input end of the third counter. The external start signal Start_up is connected to the start input ends of the first counter and the counting period generator. The precision clock output end of the crystal oscillator is connected to the precision clock input end of the first counter, and the counting output end of the first counter is connected to the counting input ends of the counting period generator, the reference pulse generator, and the second counter. The stable clock output end of the RC resonant oscillator is connected to the stable clock input ends of the counting period generator and the reference pulse generator. The counting period output end of the counting period generator is connected to the counting period input end of the reference pulse generator. The reference clock output end of the reference pulse generator is connected to the reference clock input ends of the second counter and the third counter. The counting output end of the second counter is connected to the counting input end of the third counter. The counting output end of the third counter is connected to the ignition circuit of the electronic detonator.

[0035] See Figure 4, the adaptive precision controller receives the preset delay data Preset_data from the outside and the compensated delay data Compen_data output by the bridge wire adaptive detection delay compensation module. The adaptive precision controller automatically adjusts the precision according to the preset delay data Preset_data, and outputs the precision control data Accuracy_data to the first counter; outputs the delay data Preset_data_rectify corrected according to the precision to the second counter of the main delay device; outputs the compensated delay data Compen_data_rectify corrected according to the precision to the third counter of the compensation delay device. The crystal oscillator outputs a high-precision clock accurate_clk, the frequency of this clock signal is not affected by process, temperature and voltage, has extremely high stability, and is used as the reference clock of the first counter. accurate_clk is connected to the clock input of the first counter, and the counting time of the first counter can be configured for timing. After the counting time of the first counter arrives, the output signal count1_over of the first counter is connected to the counting period generator, the reference pulse generator and the second counter. When the impact signal arrives, the crystal oscillator may be damaged and has poor anti-impact performance, while the RC resonant oscillator, as a solid-state device, will not be affected too much. The RC resonant oscillator utilizes the characteristics of the resonant circuit to output an anti-impact clock signal stable_clk. When the impact signal arrives, the RC resonant oscillator can still work normally. stable_clk is connected to the clock inputs of the counting period generator and the reference pulse generator to provide a high-performance clock signal for them. The counting period generator generates the counting period period_data, and its data output is connected to the data input of the reference pulse generator. The reference pulse generator then generates the reference reference pulse refer_clk based on the input data period_data with the stable_clk output by the RC resonant oscillator as the clock. refer_clk will be used as the clock input of the second counter and the third counter. After the counting time of the second counter arrives, the output signal count2_over of the second counter is connected to the input of the third counter. After the counting time of the third counter arrives, the output signal count3_over of the third counter is connected to the ignition circuit of the electronic detonator, and the ignition charge of the electronic detonator is detonated through the ignition circuit.

[0036] The working principle of the present invention is as follows:

[0037] In the wire detection bridge of the wire self - adaptive detection delay compensation module, M1 - M8 form two current mirrors, which are respectively used to copy the current of the 10mA current source and the current of the 100mA current source for wire measurement. In the enabled state of Idc1_en, the current flowing through the bridge is 10mA. Since the current is too small, the heating rate of the wire is lower than the heat dissipation rate of the ignition cartridge head, so the temperature change of the wire is not significant and the wire resistance will not change greatly. In the enabled state of Idc2_en, the current flowing through the bridge is 100mA. The heating rate of the wire is higher than the heat dissipation rate of the ignition cartridge head, so the temperature of the wire will gradually increase. Due to the positive temperature characteristic of the wire, the wire resistance will change greatly. Therefore, a 10mA current is used for wire matching calibration to reduce errors. R1 and R2 are fixed resistors, M9 is an NMOS operating in the deep linear region. In the deep linear region, when V DS << 2(V GS - V TH ), there is:

[0038]

[0039] That is, the drain - source current I DS of the NMOS is a linear function of the drain - source voltage V DS , where V TH is the threshold voltage of the NMOS. Then the resistance between the source and the drain can be expressed as:

[0040]

[0041] At this time, the source - drain resistance is a voltage - controlled resistor controlled by the gate - source voltage V GS . Therefore, the NMOS operating in the deep linear region can be regarded as a voltage - controlled resistor whose resistance value changes according to the input signal. By changing the gate voltage of M9, the drain - source resistance r DS of M9 can be changed. When calibrating the wire with a small current, adjust the drain - source resistance of M9 so that △U = 0, that is, the calibration is completed.

[0042] After the circuit is powered on and reset, the wire non - destructive detection operation core waits for the enable signal Wiredete_EN. After the enable signal arrives, wire calibration is first performed. Since different wires are connected to the circuit, △U will not be 0 due to different wire resistances. Then, by adjusting the output voltage of the DAC, the drain - source resistance r ds, while the ADC reads the voltage data at both ends. Since it is a small current, the resistance of the bridge wire does not change significantly. Therefore, the resistance of the bridge wire is first read as U2. When adjusting the DAC output, the voltage value of the NMOS voltage-controlled resistor is continuously read as U1, and ΔU = U1 - U2 is obtained. The DAC output voltage is adjusted until ΔU = 0. At this time, the first step of bridge wire self-adaptive calibration is completed. After the calibration is completed, the data acquisition of the bridge wire temperature rise begins. At this time, the current source needs to enable Idc2_en to switch to the large current mode. Only the large current bridge wire can heat up. At this time, the voltage-controlled resistor NMOS transistor M9 remains unchanged after calibration, and its voltage also remains unchanged. When the bridge wire heats up, because the bridge wire has a positive temperature characteristic, the voltage U1 of the NMOS voltage-controlled resistor is measured once when the large current is connected, and then the resistance U2 of the bridge wire is continuously measured, and the pressure difference ΔU = U2 - U1 at both ends is obtained. Generally speaking, the ignition temperature of the ignition heads with different pharmaceutical specifications is not fixed, but there is a range for its ignition temperature. After mapping this temperature range to the pressure difference range at both ends of the bridge wire, it detonates after the pressure difference reaches 90% - 95% of the maximum pressure difference. In the simulation results of the present invention, the maximum pressure difference is about 48 mV. Therefore, it is possible to detonate when the pressure difference is between 43.2 mV and 45.6 mV. In this simulation, it is preset to detonate when the pressure difference reaches 44.8 mV, that is, when U2 - U1 is 44.8 mV, it is the detonation voltage. In actual use, this parameter can be set according to the actual measured ignition pressure difference of the bridge wire type ignition head. Continuously record this data, which is the temperature rise data of the bridge wire. To ensure safety and not damage the bridge wire, the heating is stopped after the bridge wire heats up to a certain extent, and the collected temperature rise data is used for fitting calculation to predict the temperature rise curve of the bridge wire. The fitting calculation process is as follows:

[0043] First, substitute three groups of test data (t 1 , y 1 ), (t 2 , y 2 ), (t 3 , y 3 ) into the following equations to solve the following equations:

[0044] t 1 = ay 1 2 + by 1 + c (1)

[0045] t 2 = ay 2 2 + by 2 + c (2)

[0046] t 3 = ay 3 2 + by 3 + c (3)

[0047] The values of coefficients a, b, and c of the fitting equation can be obtained

[0048]

[0049]

[0050] c = t 3 -ay 3 2 -by 3 (6)

[0051] After data fitting is completed, the prediction of the bridge wire ignition time is carried out. According to the voltage difference corresponding to the bridge wire ignition temperature obtained above, let y x = 44.8 mV, substitute y x into the formula, and the value of t x can be obtained, that is:

[0052] t x = ay x 2 + by x + c (7)

[0053] According to the average ignition time of the bridge wire and the predicted bridge wire ignition time t x , the corresponding compensation delay data can be obtained.

[0054] Figure 5 This is the simulation result of the adaptive bridge wire detection compensation delay when the bridge wire heats up rapidly. In the case where the bridge wire heats up relatively fast, after the enable signal Wiredete_EN arrives, the bridge wire first starts to calibrate. At this time, Idc1_en is enabled. After calibration is completed, detection starts. At this time, Idc1_en is turned off and Idc2_en is enabled, and the bridge wire starts to heat up. As can be seen from Figure 5 , the voltage at both ends of the bridge wire gradually increases, that is, its resistance starts to increase, U2 starts to increase. At this time, the differential pressure data of U2 and U1 between the bridge wire and the equivalent NMOS voltage-controlled resistor M9 at both ends is collected. In order not to damage the bridge wire and ensure safety, when the bridge wire heats up to a certain extent, the current source output is stopped to allow the bridge wire to dissipate heat to avoid the risk of detonation. As a result, the current source output was stopped at 12 ms. At this time, U2 was about 145 mV, and the differential pressure between the bridge wire and the equivalent NMOS voltage-controlled resistor M9 at both ends was about 36 mV, which was within the safe range. Subsequently, the collected bridge wire temperature rise data was processed, and the final compensation delay result Compen_data was 51068 (us). In order to cope with the situation where the ignition time is faster or slower than the standard time, the default delay value is preset to 45000 (us) during compensation delay. If the bridge wire heats up fast, this time is increased to balance the bridge wire with a slow heating rate. If the bridge wire heats up slowly, this time is reduced to balance the bridge wire with a fast heating rate. As can be seen fromFigure 5 It can be seen from the results that the result of compensating for the delay is 51068 (us), which increases the time of the default delay, that is, the bridge wire heats up faster. The delay time should be increased to balance with the bridge wire with slower heating. Figure 6 Simulation results of the adaptive bridge wire detection compensation delay when the bridge wire heats up slowly. When the bridge wire heats up slowly and the enable signal Wiredete_EN is received, after the bridge wire calibration is completed, the large current mode, that is, the Idc2_en enable, is enabled to make the bridge wire start to heat up. As the resistance value of the bridge wire increases, the differential pressure data of U2 and U1 at both ends of the bridge wire and the equivalent NMOS voltage-controlled resistor M9 are collected. For safety reasons, when the bridge wire heats up to a certain extent, the current source is stopped to dissipate heat and the detonation risk is avoided. Figure 6 The acquisition stops only at 30 ms. At this time, U2 is about 145 mV, and the differential pressure at both ends of the bridge wire and the equivalent NMOS voltage-controlled resistor M9 is also about 36 mV, which is within the safe range. It can be known from this time Figure 6 The heating rate of the bridge wire is slower than Figure 5 Even slower. After the data processing is completed, the output compensation delay result is 6639 (us). Compared with the default delay, the delay time is reduced, that is, the bridge wire heats up slower. The compensation delay time needs to be reduced to make the bridge wire ignite faster to match the bridge wire with faster heating. The simulation results show that the bridge wire adaptive detection delay compensation module can effectively perform non-destructive detection on the bridge wire, predict the final ignition time of the bridge wire and perform delay compensation.

[0055] After power-on reset of the circuit, the programmable high-precision impact-resistant delay module writes the preset delay time data Preset_data into the adaptive precision controller to automatically adjust the precision of the circuit according to the preset delay time Preset_data. After calculating the precision data Accuracy_data, the data is written into the first counter to complete the automatic adjustment of the precision, and the delay data of the second counter and the third counter is set according to the adjusted precision. The second counter is the main delay unit, and the third counter is the compensation delay unit. After receiving the Compen_data data output from the bridge wire adaptive detection delay compensation module, the adaptive precision controller writes the corrected Compen_data_rectify data into the third counter according to the precision for compensation delay. After the start signal Start_up arrives, the first counter and the counting period generator start counting simultaneously. The first counter counts with the crystal oscillator as the clock to achieve high-precision delay, while the counting period generator counts with the RC oscillator as the clock source. The RC resonant oscillator can achieve the function of impact resistance. After the first counter reaches the timing time, the output signal count1_over stops the timing of the counting period generator. At this time, the counting period generator outputs its own counting data period_data as the timing data of the reference pulse generator. This data is the counting period guaranteed by the crystal oscillator in terms of precision. Subsequently, the reference pulse generator generates a reference pulse as the counting clock for the second counter and the third counter. After the second counter reaches the counting time, the output signal count2_over starts the third counter to count. After the third counter reaches the counting time, the ignition signal count3_over is output. Compared with the traditional method, the present invention has an adaptive delay precision control circuit, which can automatically adjust the precision according to the preset delay time Preset_data. After Preset_data arrives, the adaptive delay precision control circuit automatically adjusts the precision, writes Accuracy_data into the first counter, writes Preset_data_rectify into the second counter, and writes Compen_data_rectify into the third counter.

[0056] Figure 7 It is the simulation result when the preset delay Preset_data is 142 ms (the small delay is 0 s to 150 ms). The clock frequency of the designed RC resonant oscillator here is 20 MHz, and the delay precision is guaranteed by the crystal oscillator. In the actual circuit, the crystal oscillator achieves high precision, and the RC resonant oscillator ensures that the circuit has strong impact resistance. Figure 7The simulation results show that marking line V1 is the moment when the CPU startup signal Start_up arrives, and marking line V2 is the moment when the ignition signal count3_over is output at the end of timing. When simply testing the delay performance, the compensation delay data Compen_data is set to 0, that is, the third counter for compensating delay does not have a delay. Accuracy_data is the automatically adjusted accuracy data, with the unit of μs. It can be seen from the simulation results that the result of automatic accuracy adjustment at this time is 10 μs. ref_clk is the reference clock generated according to the adaptive accuracy, and Preset_data is the preset delay data, with the unit of ms. It can be seen from the simulation results that at the preset delay of 142 ms at this time, the data Preset_data_rectify written into the second counter after correction according to the accuracy is 14200, the compensated delay data Compen_data_rectify after correction is 0, and the counting period data period_data generated by the counting period generator for generating reference pulses is 175. Timing starts at the moment of V1. The counting period generator obtains the counting period data period_data, and the reference pulse generator generates the reference pulse ref_clk. The actual simulation delay of marking line V2 - V1 is 141.108316 ms, and the error is 0.891684 ms, which is less than 1 ms. Figure 8 It is the simulation result graph under the preset delay Preset_data of 1100 ms (the wide delay is 151 ms to 30 s). The simulation results show that the automatically adjusted accuracy data Accuracy_data at this time is 100 μs, ref_clk is the reference pulse generated by the reference pulse generator, count3_over is the ignition signal. At this time, the data Preset_data_rectify written into the second counter after correction according to the accuracy result is 11000, the compensated delay data Compen_data_rectify after correction is 0, the counting period data period_data is 1751, and the actual simulation delay of V2 - V1 is 1.099426 s, and the error is 574 μs, which is less than 1%.

[0057] Next, simulate and test the bridge wires with two firing times, and finally obtain the delay results after non-destructive detection delay compensation. Figure 9 It is the simulation result of the adaptive accuracy and compensation delay device of the present invention applied to the ignition delay of electronic detonators when the bridge wire heats up quickly. Figure 10 It is the simulation result of the adaptive accuracy and compensation delay device of the present invention applied to the ignition delay of electronic detonators when the bridge wire heats up slowly. The preset delay Set_data is 120 ms, and the adaptive delay accuracy Accuracy_data at this time is 10 μs. After the non-destructive detection delay compensation of the bridge wire, it can be seen from the results. Figure 9The compensation delay Compen_data is 52314 (us), Figure 10 The Compen_data is 11757 (us). After the compensated delay data Compen_data_rectify corrected according to the delay accuracy is written into the third counter, the delay circuit is started, and finally Figure 9 The delay of the circuit is 171.222572 ms, Figure 10 The delay of is 130.924596 ms. It can be seen that Figure 9 The heating rate of the bridge wire in the circuit is higher, with a difference of 40.298 ms between the two. Assuming that the ignition voltage of the bridge wire is about 44.8 mV, Figure 9 The ignition time is faster, about 24 ms, Figure 10 The ignition is slower, about 65 ms. The difference in ignition time between the two is about 41 ms. Compared with the final simulation result after compensation delay in Figure 9 The error is 0.702 ms.

[0058] Table 1 shows the analysis of the delay data examples of the present invention under different ignition times. The simulation results show that the actual ignition times of these two bridge wires are 24 ms and 65 ms respectively. The main delay is the preset delay time during the final delay simulation. In order to reflect the prediction accuracy of the present invention for bridge wires with different ignition times, the main delay times of the two groups of final delay simulation ignition times are kept the same. The actual compensation delay is the compensation delay data obtained by the bridge wire adaptive detection delay compensation module in the simulation for bridge wires with different ignition times. The actual total delay is the total delay obtained after passing through the main delay module and the compensation delay module, which is theoretically the sum of the main delay and the actual compensation delay. In fact, it includes the error of the delay circuit. After the actual total delay ends, the ignition signal is output and the bridge wire starts to ignite. Therefore, the ignition time after the actual total delay is the sum of the actual ignition time and the actual total delay. The bridge wire with a faster ignition time is delayed for a longer time after adaptive compensation to match the bridge wire with a slower ignition time. The present invention successfully realizes the adaptive accuracy and compensation delay applied to the initiation delay of electronic detonators.

[0059] Table 1 Analysis of Delay Data Examples under Different Ignition Times

[0060]

[0061] The present invention is applicable to the initiation delay of digital electronic detonators based on the millisecond blasting theory, such as mountain blasting, etc. Using the non-destructive detection principle of bridge wire electro-explosive devices, the bridge wire is non-destructively detected within a safe range before blasting. On the one hand, it detects the quality of the bridge wire electro-explosive device, and on the other hand, it measures the ignition time of the bridge wire. At the same time, in order to minimize the ignition time error as much as possible to improve the millisecond blasting effect, combined with the predicted ignition time, programmable high-precision adaptive delay compensation is carried out to achieve millisecond blasting.

[0062] Different from the traditional method of shortening the ignition time of the bridge wire and reducing the standard deviation of the delay error by increasing the ignition energy of the bridge wire, the present invention truly adapts and compensates for the ignition time of bridge wires of different specifications. It has greater simplicity and flexibility in delay setting and compensation, with relatively high precision. At the same time, in the ADC acquisition circuit, instead of using the traditional three-op amp single-ended to differential method, a dual transmission gate structure is used, resulting in significant performance improvements in both area and power consumption. In terms of delay accuracy, the present invention uses a crystal oscillator to maintain high precision and an RC resonant oscillator to ensure shock resistance. Meanwhile, the present invention also designs an analog bridge wire heating circuit to understand the heating characteristics of the actual bridge wire of the electro-explosive device through simulation. By changing the capacitive elements in the circuit, the simulation of bridge wires with various temperature rise curves can be achieved, providing great convenience for the design and simulation of the programmable high-precision shock-resistant bridge wire adaptive delay circuit.

[0063] The present invention adopts a novel adaptive precision control circuit in the programmable high-precision shock-resistant delay device, which automatically adjusts the precision of the circuit according to the preset clock signal, and then corrects the delay data and compensated delay data according to the precision, greatly improving the convenience and flexibility of delay setting and delay compensation. The bridge wire adaptive detection delay compensation module of the present invention adopts a novel circuit based on non-destructive detection of the bridge wire to compensate for the inconsistency of the ignition time of the bridge wire type ignition charge. The simulation results show that this circuit can effectively compensate the delay time of the bridge wire type ignition charge with inconsistent ignition time, thus achieving high-precision delay and delay compensation, and enhancing the effect of millisecond blasting.

[0064] It should be noted that although the embodiments described above of the present invention are illustrative, they are not limitations of the present invention. Therefore, the present invention is not limited to the above specific embodiments. Without departing from the principle of the present invention, any other embodiments obtained by those skilled in the art under the inspiration of the present invention are deemed to be within the protection scope of the present invention.

Claims

1. A programmable high-precision impact-resistant bridge wire adaptive delay circuit for an electronic detonator, characterized in that, it consists of a bridge wire adaptive detection delay compensation module and a programmable high-precision impact-resistant delay module; the bridge wire adaptive detection delay compensation module includes a bridge wire non-destructive detection operation core, a DAC, a bridge wire detection bridge, a single ADC dual-channel acquisition circuit and an ADC; the programmable high-precision impact-resistant delay module includes an adaptive precision controller, a crystal oscillator, an RC resonant oscillator, a counting period generator, a reference pulse generator and three counters; The single ADC dual-channel acquisition circuit consists of PMOS transistors M1 and M3, NMOS transistors M2 and M4, and an inverter INV1; the drain of PMOS transistor M1 and the source of NMOS transistor M2 jointly form the bridge wire calibration voltage input terminal of the single ADC dual-channel acquisition circuit; the drain of PMOS transistor M3 and the source of NMOS transistor M4 jointly form the bridge wire measurement voltage input terminal of the single ADC dual-channel acquisition circuit; the gate of PMOS transistor M1, the gate of NMOS transistor M4 and the input terminal of inverter INV1 jointly form the switch control input terminal of the single ADC dual-channel acquisition circuit; the output terminal of inverter INV1 is connected to the gates of NMOS transistor M2 and PMOS transistor M3; the source of PMOS transistor M1, the drain of NMOS transistor M2, the source of PMOS transistor M3 and the drain of NMOS transistor M4 jointly form the voltage output terminal of the single ADC dual-channel acquisition circuit; The external enable signal Wiredete_EN is connected to the enable input terminal of the bridge wire non-destructive detection operation core; the data output terminal of the bridge wire non-destructive detection operation core is connected to the input terminal of the DAC, and the output terminal of the DAC is connected to the differential pressure control input terminal of the bridge wire detection bridge; the calibration current enable output terminal and the measurement current enable output terminal of the bridge wire non-destructive detection operation core are respectively connected to the calibration current enable input terminal and the measurement current enable input terminal of the bridge wire detection bridge; the switch control output terminal of the bridge wire non-destructive detection operation core is connected to the switch control input terminal of the single ADC dual-channel acquisition circuit; the bridge wire calibration voltage output terminal and the bridge wire measurement voltage output terminal of the bridge wire detection bridge are respectively connected to the bridge wire calibration voltage input terminal and the bridge wire measurement voltage input terminal of the single ADC dual-channel acquisition circuit; the voltage output terminal of the single ADC dual-channel acquisition circuit is connected to the input terminal of the DAC, and the output terminal of the DAC is connected to the data input terminal of the bridge wire non-destructive detection operation core; The external preset delay signal Preset_data is connected to the preset delay input terminal of the adaptive precision controller, and the compensation delay output terminal of the bridge wire non-destructive detection operation core is connected to the compensation delay input terminal of the adaptive precision controller; the precision control output terminal of the adaptive precision controller is connected to the precision control input terminal of the first counter, the corrected preset delay output terminal of the adaptive precision controller is connected to the corrected preset delay input terminal of the second counter, and the corrected compensation delay output terminal of the adaptive precision controller is connected to the corrected compensation delay input terminal of the third counter; the external start signal Start_up is connected to the start input terminals of the first counter and the counting period generator; The precision clock output terminal of the crystal oscillator is connected to the precision clock input terminal of the first counter, and the counting output terminal of the first counter is connected to the counting period generator, the reference pulse generator, and the counting input terminal of the second counter; The stable clock output terminal of the RC resonant oscillator is connected to the stable clock input terminals of the counting period generator and the reference pulse generator; The counting period output terminal of the counting period generator is connected to the counting period input terminal of the reference pulse generator; the reference clock output terminal of the reference pulse generator is connected to the reference clock input terminals of the second counter and the third counter; the counting output terminal of the second counter is connected to the counting input terminal of the third counter; the counting output terminal of the third counter is connected to the ignition circuit of the electronic detonator.

2. The programmable high-precision impact-resistant bridge wire adaptive delay circuit for electronic detonators according to claim 1, characterized in that the bridge wire detection bridge consists of PMOS transistors M1 to M8, NMOS transistor M9, two current sources Idc1 to Idc2, and resistors R1 to R2; The source electrodes of PMOS transistor M1, PMOS transistor M4, PMOS transistor M5, and PMOS transistor M8 are commonly connected to the power supply VDD; the drain electrode of PMOS transistor M1 is connected to the source electrode of PMOS transistor M2, the drain electrode of PMOS transistor M4 is connected to the source electrode of PMOS transistor M3, the drain electrode of PMOS transistor M5 is connected to the source electrode of PMOS transistor M6, and the drain electrode of PMOS transistor M8 is connected to the source electrode of PMOS transistor M7; the gates of PMOS transistor M1 and PMOS transistor M8 together form the calibration current enabling input terminal of the bridge wire detection bridge, and the gates of PMOS transistor M4 and PMOS transistor M5 together form the measurement current enabling input terminal of the bridge wire detection bridge; the gates and drain electrodes of PMOS transistor M2 and PMOS transistor M7 are connected to the positive pole of current source Idc1, and the gates and drain electrodes of PMOS transistor M3 and PMOS transistor M6 are connected to the positive pole of current source Idc2; the drain electrodes of PMOS transistor M6, PMOS transistor M7, one end of resistor R1, and one end of resistor R2 are connected; the gate of NMOS transistor M9 forms the differential pressure control input terminal of the bridge wire detection bridge; the other end of resistor R1 and the drain electrode of NMOS transistor M9 together form the bridge wire calibration voltage output terminal of the bridge wire detection bridge; the other end of resistor R2 and the positive pole of the bridge wire of the electronic detonator together form the bridge wire measurement voltage output terminal of the bridge wire detection bridge; the negative poles of current source Idc1, current source Idc2, the source electrode of NMOS transistor M9, and the negative pole of the bridge wire of the electronic detonator are commonly grounded.

3. The programmable high-precision impact-resistant bridge wire adaptive delay circuit for electronic detonators according to claim 2, characterized in that the current value of current source Idc2 is greater than the current value of the first current source Idc.

4. The programmable high-precision impact-resistant bridge wire adaptive delay circuit for electronic detonators according to claim 3, characterized in that the current value of current source Idc2 is greater than or equal to 10 times the current value of the first current source Idc.

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