A gallium oxide non-polar heterojunction multi-channel fin-HEMT device and a preparation method thereof

Abstract

The application discloses a gallium oxide non-polar heterojunction multi-channel Fin-HEMT device and a preparation method thereof. x Ga 1‑x )2O3 / Ga2O3 heterojunction structure, a two-dimensional electron gas (2DEG) is generated at the heterojunction interface of each channel by intentionally doped δ-Si, and the on-resistance is reduced; the 2DEG of each channel is connected with the source-drain region in a way of source-drain region regrowth, the wafer flatness is improved, the process risk is reduced, and meanwhile, good ohmic contact is formed; a gate electrode in a Fin structure is adopted to form a half-enclosing structure of a side gate and a top gate to the channel, the control ability of the gate to the lower channel is ensured, multi-threshold coupling is improved to improve the linearity of the device, and the channel carrier mobility is improved to a certain extent.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, specifically relating to a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device and its fabrication method. Background Technology

[0002] Gallium oxide (Ga₂O₃) is an emerging ultra-wide bandgap semiconductor material. Its most common crystal structures include α, β, γ, δ, ε, and the transition state κ phase. The bandgap reaches 4.8–5.2 eV, and the breakdown electric field is as high as 8 MV / cm. The most stable structure is the β phase. β-phase Ga₂O₃ is widely used due to its stability. Because the β phase is non-polar, it cannot generate high concentrations of 2DEG at the heterojunction through spontaneous polarization, but it can be generated through δ-modulation doping. Although its mobility is lower than GaAs and GaN, combined with the material's high critical breakdown electric field, its saturation drift velocity reaches 1.8–2 × 10⁻⁶. 7 cm / s, exceeding GaAs's 1.2×10 7 cm / s, compared to GaN's 2.5 × 10⁻⁶. 7 It is equivalent to cm / s.

[0003] In high-voltage, high-irradiation operating environments, GaAs devices are limited in their breakdown voltage and radiation resistance due to their narrow bandgap and low critical breakdown field. GaN devices, due to their high epitaxial defect density on heterostructure substrates and numerous defect levels in the bandgap, not only experience current collapse but also suffer from reduced breakdown voltage and radiation resistance, severely impacting device reliability. β-Ga₂O₃, through δ-modulation doping to generate 2DEG, exhibits significantly improved mobility. Combined with its ultra-wide bandgap and high critical breakdown field, it holds immense application potential in high-voltage, radiation-resistant high-frequency applications. However, based on β-phase (Al₂O₃)... x Ga 1-x Single-channel HEMTs with Ga2O3 / Ga2O3 heterojunctions have poor channel confinement and low single-channel output power, making them difficult to meet the application requirements of high-frequency and high-power applications. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device and its fabrication method to meet the application requirements of high-frequency and high-power applications.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] This invention provides a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device, comprising, from bottom to top, a substrate, a buffer layer, a multichannel layer, a T-type gate, a source, and a drain. The left and right sides of the multichannel layer are the source region and the drain region, respectively. The multichannel layer includes N β-Ga2O3-based heterojunctions, each heterojunction being composed of a channel layer, a δ-modulation doped layer, and a barrier layer stacked together, where N≥2. The T-type gate is a Fin-structured gate electrode.

[0007] Furthermore, the substrate is one of SiC, GaN, Ga2O3, diamond, or sapphire.

[0008] Furthermore, the buffer layer is unintentionally doped β-Ga2O3.

[0009] Furthermore, the heterojunction channel layer is unintentionally doped β-Ga2O3, and the δ modulation doped layer is δ-Si doped β-(Al2O3)2O3. x Ga 1-x )2O3, the barrier layer is unintentionally doped β-(Al) x Ga 1-x )2O3, where 0 < x < 1.

[0010] Furthermore, the source / drain region is heavily doped N-type Ga2O3 or ohmic metal.

[0011] Furthermore, the gate length of the T-type gate is less than or equal to the Fin length.

[0012] The present invention also provides a method for fabricating the above-mentioned gallium oxide nonpolar heterojunction multichannel Fin-HEMT device, comprising the following steps:

[0013] S1. A buffer layer and a multi-channel layer are epitaxially grown sequentially on a substrate to obtain a multi-channel epitaxial wafer;

[0014] S2. Deposit a mask on a multi-channel epitaxial wafer. After photolithography pattern transfer, etch the multi-channel to the buffer layer in the source and drain regions, and then grow back to form the source and drain regions.

[0015] S3. Deposit ohmic metal on the source and drain regions to form the source and drain electrodes;

[0016] S4. Selectively etch a multi-channel layer down to the buffer layer in the gate region to form a Fin structure;

[0017] S5. Deposit gate metal on the Fin structure in the gate region to form a Fin structure gate.

[0018] Furthermore, in step S1, the epitaxial growth is performed using MOCVD or MBE.

[0019] Furthermore, step S3 includes annealing after depositing the ohmic metal.

[0020] Furthermore, the annealing temperature is 400~600℃, the annealing atmosphere is nitrogen, and the annealing time is 30~60s.

[0021] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0022] This invention is based on a nonpolar β-Ga2O3 material system, employing two or more β-phase (Al) x Ga 1-x The Ga2O3 / Ga2O3 heterojunction structure generates 2DEGs at the heterojunction interface of each channel through deliberate doping of δ-Si modulation, reducing on-resistance. Between adjacent channels, the barrier layer of the lower channel serves as the back barrier layer of the upper channel, improving the confinement of the 2DEGs within the channel. The 2DEGs in each channel are connected to the source and drain regions through source-drain region regrowth, improving wafer flatness, reducing process risks, and also contributing to the formation of good ohmic contacts. Fin-structured gate electrodes are used to form a semi-enclosed structure of the side gate and top gate around the channel, ensuring the gate's control over the lower channel while achieving multi-threshold coupling to improve device linearity and also improving channel carrier mobility. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of the gallium oxide nonpolar heterojunction multichannel Fin-HEMT device of the present invention;

[0024] Figure 2 for Figure 1 Schematic diagram of the structure at section A-A';

[0025] Figure 3 for Figure 1 Schematic diagram of the structure at section B-B';

[0026] Figure 4 The epitaxial preparation process is shown in the fabrication flow diagram;

[0027] Figure 5 The hard mask deposition process is shown in the fabrication flow diagram;

[0028] Figure 6 This illustrates the mask pattern transfer during the fabrication process;

[0029] Figure 7 The etching of the source and drain electrode regions in the fabrication process is shown;

[0030] Figure 8 The regrowth of the source and drain electrode regions in the fabrication process is shown.

[0031] Figure 9 The hard mask removal process in the fabrication procedure is shown.

[0032] Figure 10 The photolithographic deposition of ohmic electrodes in the source / drain regions is shown in the fabrication process.

[0033] Figure 11 This illustrates the ohmic electrode stripping process in the source / drain regions during fabrication.

[0034] Figure 12 The etching of the gate region Fin structure is shown in the fabrication process.

[0035] Figure 13 The gate metal deposition process in the fabrication process is shown.

[0036] Figure reference numerals: 1-substrate, 2-buffer layer, 3-multi-channel layer, 301-channel layer, 302-δ-modulation doped layer, 303-barrier layer, 4-T-type gate, 5-source region, 6-drain region, 7-source, 8-drain. Detailed Implementation

[0037] The present invention will be further described in detail below with reference to specific embodiments, so that those skilled in the art can more clearly understand the present invention. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention. In the embodiments of the present invention, unless otherwise specified, all raw material components are commercially available products well known to those skilled in the art; unless specifically specified, the technical means used are all conventional means well known to those skilled in the art.

[0038] The present invention provides a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device structure as follows: Figure 1-3 As shown, from bottom to top, it includes a substrate 1, a buffer layer 2, a multi-channel layer 3, a T-type gate 4, a source 7, and a drain 8. The left and right sides of the multi-channel layer 3 are the source region 5 and the drain region 6, respectively. The source 7 and the drain 8 are located on the source region 5 and the drain region 6, respectively. The multi-channel layer 3 includes N β-Ga2O3-based heterojunctions. Each heterojunction is composed of a channel layer 301, a δ modulation doped layer 302, and a barrier layer 303 stacked together, where N≥2. The T-type gate 4 is a Fin-structured gate electrode.

[0039] Multi-channel architectures can reduce resistance and increase device output power by vertically increasing the number of conduction channels without increasing gate width or occupying more wafer area. Furthermore, the barrier layer of the lower channel can serve as the back barrier layer of the upper channel between adjacent channels, improving 2DEG confinement. When fabricating HEMT devices using multi-channel heterojunctions, it is difficult to achieve good control of the lower channel by the gate. Therefore, it is necessary to combine the gate with a Fin structure, using both the top and side gates to control the channel.

[0040] In some preferred embodiments, the substrate 1 can be selected from various high-resistivity substrates such as SiC, GaN, Ga2O3, diamond, or sapphire.

[0041] In some preferred embodiments, the buffer layer 2 is made of unintentionally doped β-Ga2O3.

[0042] In some preferred embodiments, the heterojunction channel layer 301 is made of unintentionally doped β-Ga₂O₃, and the δ modulation doped layer 302 is made of δ-Si doped β-(Al₂O₃)₂O₃. x Ga 1-x )2O3, the barrier layer 303 is made of unintentionally doped β-(Al)2O3. x Ga 1-x )2O3, where 0 < x < 1. The doped layer is obtained by modulating the doping layer with δ-Si in β-(Al) x Ga 1-x 2DEG is generated at the interface of Ga2O3 / Ga2O3 heterojunction, which improves the channel carrier mobility.

[0043] In some preferred embodiments, source region 5 / drain region 6 is heavily doped N-type Ga2O3. In other preferred embodiments, the number of channel layers is less, and source region 5 / drain region 6 is ohmic metal.

[0044] In some preferred embodiments, the Fin length of the T-type gate 4 is equal to the gate length, without sacrificing the channel width between the gate source and the gate drain, thus reducing parasitic resistance.

[0045] The method for fabricating a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device provided in this invention includes the following steps:

[0046] S1. A buffer layer and a multi-channel layer are epitaxially grown sequentially on a substrate to obtain a multi-channel epitaxial wafer;

[0047] S2. Deposit a mask on a multi-channel epitaxial wafer. After photolithography pattern transfer, etch the multi-channel to the buffer layer in the source and drain regions, and then grow back to form the source and drain regions.

[0048] S3. Deposit ohmic metal on the source and drain regions to form the source and drain electrodes;

[0049] S4. Selectively etch a multi-channel layer down to the buffer layer in the gate region to form a Fin structure;

[0050] S5. Deposit gate metal on the Fin structure in the gate region to form a Fin structure gate.

[0051] In some preferred embodiments, in step S1, epitaxial growth is performed using MOCVD or MBE.

[0052] In some preferred embodiments, to ensure good contact between each channel and the source / drain electrodes, selective etching and regrowth are used to fabricate the source / drain electrodes. Since Ga2O3 has relatively limited etching selectivity compared to photoresist in Cl-based ICP etching, and high-power, long-term etching carries the risk of photoresist slagging, the soft mask in step S2 is insufficient to meet etching requirements when the number of channels is large. Therefore, a hard mask is used. The hard mask can be any type of dielectric layer or metal mask, such as one of SiO2, SiN, or Ni. When the number of channels is small, the etching depth of the source / drain regrowth region is within the tolerance range of the soft mask, and the soft mask method can be used for etching.

[0053] In some preferred embodiments, the number of channel layers is small, the etching depth required for source-drain regrowth is shallow, and the impact on wafer flatness is not significant. After the source-drain region is etched, the secondary epitaxial growth can be omitted, and ohmic metal can be directly deposited so that the 2DEG directly contacts the sidewall metal, and the groove metal ohmic electrode is formed after annealing.

[0054] In some preferred embodiments, step S3, after depositing the ohmic metal, further includes annealing at a temperature of 400-600°C, in a nitrogen atmosphere, for 30-60 seconds. Annealing allows the ohmic metal to form good ohmic contact with the source and drain regions.

[0055] In some preferred embodiments, with fewer channel layers and the etching depth of the gate fin structure within the tolerance range of the soft mask, a fin structure with equal gate length can be fabricated using a combination of a hard mask and a self-aligned soft mask. The length of the fin is not controlled by the etched area of ​​the hard mask, thereby enhancing the process flexibility of the hard mask pattern. Since the fin length is equal to the gate length, the channel width between the gate source and gate drain is not lost, reducing parasitic resistance.

[0056] Example 1

[0057] This embodiment uses a three-channel configuration as an example to illustrate the fabrication method of the gallium oxide non-polarized heterojunction multi-channel Fin-HEMT device of the present invention. The specific steps are as follows: Figure 2 As shown:

[0058] (1) A buffer layer and three heterojunction channel layers are grown on a Fe-doped β-Ga2O3 substrate by MOCVD or MBE. The buffer layer can be β-Ga2O3 with an unintentional doping thickness of 100 nm, the heterojunction channel layer can be β-Ga2O3 with an unintentional doping thickness of 30 nm, and the δ modulation doping layer can be β-(Al2O3) doped with δ-Si with a thickness of 5 nm. x Ga 1-x The barrier layer is an unintentionally doped β-(Al₂O₃)₂ with a thickness of 25 nm. xGa 1-x )2O3, where 0 < x < 1;

[0059] (2) A Ni mask layer with a thickness of 200 nm was sputtered and deposited on a multi-channel epitaxial wafer;

[0060] (3) After photolithography stripping, the soft mask pattern is transferred to the hard mask, and then dry etching is performed using Cl-based plasma. The etching ends in the bottom buffer layer structure to form the source and drain regions.

[0061] (4) The source and drain regions were regrown using MBE, and a heavily doped N-type Ga2O3 contact layer was grown by secondary epitaxy. Then, the Ni mask was removed using hydrochloric acid solution.

[0062] (5) Deposit source and drain metal electrodes using electron beam evaporation or magnetron sputtering, with the metal system being Ti / Al / Ni / Au;

[0063] (6) Electron beam lithography is used for gate electrode lithography. PMMA series electron photoresist is selected and three spin coatings are performed. The sensitivity and resolution of the photoresist are changed by changing the baking temperature. With appropriate exposure area and exposure dose, the composite layer photoresist forms a T-shaped gate electrode lithography morphology after one exposure and one development. Then, the gate metal is deposited by electron beam evaporation or magnetron sputtering. Ni / Au is selected as the metal system to form a Fin structure gate electrode. After the gate electrode is deposited, it is stripped to complete the fabrication of the device.

[0064] The gallium oxide nonpolar heterojunction multichannel Fin-HEMT device fabricated in this embodiment has the following properties:

[0065] (1) High withstand voltage: Compared with GaAs and GaN, β-Ga2O3 has a band gap of ~5eV and a critical breakdown field strength of ~8MV / cm, which effectively improves the withstand voltage characteristics of the device.

[0066] (2) High mobility: through δ-Si modulation doping in β-(Al x Ga 1-x The formation of 2DEG at the interface of 2O3 / Ga2O3 heterojunction improves mobility, and the Fin structure further enhances the channel carrier mobility.

[0067] (3) Low current collapse: Compared with GaN-based HEMT epitaxy on heterostructure substrates, β-Ga2O3 can be used on homostructure substrates for heterostructure epitaxy, and the small defect density effectively improves the current collapse phenomenon.

[0068] (4) Radiation resistance: Compared with the small band gap of GaAs and the many defect levels of GaN, β-Ga2O3 has not only a large band gap, but also a small density of homoepitaxial defects, which gives it a significant advantage in radiation resistance.

[0069] (5) High output power: β-(Al x Ga 1-x The high channel carrier mobility of the 2O3 / Ga2O3 heterojunction, combined with the material's critical breakdown field strength of up to 8MV / cm, allows it to be applied to high-voltage, high-current operating scenarios, generating high output power.

[0070] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A gallium oxide nonpolar heterojunction multichannel Fin-HEMT device, characterized in that, From bottom to top, it includes a substrate, a buffer layer, a multi-channel layer, a T-type gate, a source, and a drain. The left and right sides of the multi-channel layer are the source region and the drain region, respectively. The multi-channel layer includes N β-Ga2O3-based heterojunctions. Each heterojunction is composed of a channel layer, a δ-modulation doped layer, and a barrier layer stacked together, where N≥2. The T-type gate is a Fin-structured gate electrode. The heterojunction channel layer is unintentionally doped β-Ga₂O₃, and the δ modulation doped layer is δ-Si doped β-(Al₂O₃)₃. x Ga 1-x )2O3, the barrier layer is unintentionally doped β-(Al) x Ga 1-x )2O3, where 0 < x < 1.

2. The gallium oxide non-polar heterojunction multi-channel Fin-HEMT device according to claim 1, characterized in that, The substrate is one of SiC, GaN, Ga2O3, diamond, or sapphire.

3. The gallium oxide non-polar heterojunction multi-channel Fin-HEMT device according to claim 1, characterized in that, The buffer layer is unintentionally doped β-Ga2O3.

4. The gallium oxide non-polar heterojunction multi-channel Fin-HEMT device according to claim 1, characterized in that, The source / drain regions are heavily doped N-type Ga2O3 or ohmic metals.

5. The gallium oxide non-polar heterojunction multi-channel Fin-HEMT device according to claim 1, characterized in that, The gate length of the T-type gate is less than or equal to the Fin length.

6. The method for fabricating the gallium oxide nonpolar heterojunction multichannel Fin-HEMT device according to any one of claims 1 to 5, characterized in that, Includes the following steps: S1. A buffer layer and a multi-channel layer are epitaxially grown sequentially on a substrate to obtain a multi-channel epitaxial wafer; S2. Deposit a mask on a multi-channel epitaxial wafer. After photolithography pattern transfer, etch the multi-channel to the buffer layer in the source and drain regions, and then grow back to form the source and drain regions. S3. Deposit ohmic metal on the source and drain regions to form the source and drain electrodes; S4. Selectively etch a multi-channel layer down to the buffer layer in the gate region to form a Fin structure; S5. Deposit gate metal on the Fin structure in the gate region to form a Fin structure gate.

7. The method for fabricating a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device according to claim 6, characterized in that, In step S1, the epitaxial growth is performed using MOCVD or MBE.

8. The method for fabricating a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device according to claim 6, characterized in that, In step S3, annealing is also included after depositing the ohmic metal.

9. The method for fabricating a gallium oxide nonpolar heterojunction multichannel Fin-HEMT device according to claim 8, characterized in that, The annealing temperature is 400~600℃, the annealing atmosphere is nitrogen, and the annealing time is 30~60s.

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