Quantum chip state monitoring apparatus, method and quantum computer

Abstract

The application discloses a quantum chip state monitoring device and method and a quantum computer, and belongs to the field of quantum information. The monitoring device comprises an acquisition module, a judgment module and a feedback module. The acquisition module is used for regularly acquiring information of a quantum chip. The judgment module is used for judging whether the states of each quantum bit involved in the information are available based on the information of the quantum chip and a check operation database. The feedback module is used for feeding back parameter information of quantum bits with unavailable states. The application can be used for managing the states of quantum bits on a quantum chip, monitoring whether the states of quantum bits in the quantum chip are abnormal, providing quantum bit parameters of specific quantum bits on each quantum chip which have drifted in a server system of a quantum computer in a timely and accurate manner, and providing strong support for the update and maintenance of the working state of the quantum chip.

Description

Technical Field

[0001] This application relates to the field of quantum information, and in particular to a quantum chip state monitoring device, method, and quantum computer. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. Because quantum computers have the potential to far surpass the performance of classical computers in solving specific problems, realizing a quantum computer requires a quantum chip containing a sufficient number and quality of qubits, and the ability to perform extremely high-fidelity quantum logic gate operations and readouts of these qubits.

[0003] Quantum chips are the core components of quantum computers, integrating multiple qubits. With the continuous advancement of quantum computing technologies, the number of qubits on quantum chips is increasing year by year. It is foreseeable that larger-scale quantum chips will emerge in the future, containing even more qubits, and quantum computers will also incorporate larger-scale quantum chips. Because qubits are fragile, even extremely small environmental changes can cause parameter drift. Therefore, with the increase in the number of qubits in quantum chips, the problem of parameter drift in some qubits will inevitably arise during use, leading to abnormal operating states of the quantum chip. In such cases, appropriate calibration operations are required for these qubits. Currently, when performing quantum computing tasks on a quantum chip, it is difficult to promptly and accurately determine which qubits on the chip are experiencing abnormal states, and specifically which qubit(s) parameter drift caused the abnormal state.

[0004] Therefore, in order to obtain the specific qubit parameters of which qubits have drifted in a timely and accurate manner, constructing a quantum chip state monitoring device has become an urgent problem to be solved in this field. Summary of the Invention

[0005] The purpose of this application is to provide a quantum chip state monitoring device, method, and quantum computer to overcome the shortcomings of the prior art. It can be used to manage the state of qubits on a quantum chip and realize timely and accurate acquisition of the qubit parameters of specific qubits on the quantum chip that have drifted.

[0006] To achieve the above objectives, a first aspect of this application provides a quantum chip state monitoring device, comprising:

[0007] An acquisition module is used to periodically acquire information about the quantum chip, wherein the information about the quantum chip includes parameter information of all qubits set on the quantum chip;

[0008] The judgment module is used to determine whether the state of each qubit involved in the information is available based on the information of the quantum chip and the inspection operation database, wherein the inspection operation database pre-stores multiple qubit parameters for characterizing the qubit;

[0009] The feedback module is used to provide feedback on the parameter information of qubits whose output state is unavailable. The parameter information includes the qubit number and the parameters of the qubit that has drifted with the corresponding number.

[0010] Optionally, the determination module includes:

[0011] The bit information judgment unit is used to determine whether the parameter information of the quantum bit to be checked in the information of the quantum chip is empty;

[0012] The first type of determination unit is used to check whether the parameter information of the qubit to be checked has drifted according to the set inspection strategy based on the inspection operation database when the parameter information of the qubit to be checked is not empty; if the parameter information of the qubit to be checked has drifted, the state of the qubit to be checked is determined to be unusable, and the qubit to be checked is obtained as a qubit to be calibrated.

[0013] Optionally, the determination module further includes:

[0014] The second type of determination unit is used to determine that the state of the quantum bit to be checked is unavailable when the parameter information of the quantum bit to be checked is empty, and to obtain the quantum bit to be checked as the quantum bit to be tested.

[0015] Optionally, the first type determination unit includes:

[0016] The parameter drift checking subunit is used to select one or more qubit parameters from the checking operation database according to the set checking strategy to check the parameter information of the qubit to be calibrated, and determine whether the parameter information of the qubit to be calibrated has drifted based on the checking results.

[0017] Optionally, the parameter drift checking subunit includes:

[0018] The first subunit is used to perform a quantum test experiment corresponding to the selected one or more qubit parameters on the qubit to be calibrated, and to obtain the current experimental data of the qubit to be calibrated at the corresponding qubit parameters. The quantum test experiment is an experiment to obtain the experimental data of the qubit at the corresponding qubit parameters.

[0019] The second subunit is used to compare the current experimental data of the qubit to be calibrated with the corresponding qubit parameter threshold, wherein the qubit parameter threshold is stored in the historical dataset of each qubit parameter.

[0020] Optionally, the device further includes:

[0021] The monitoring status adjustment module is used to determine the working status of the acquisition module, the judgment module, and the feedback module based on the working status of the quantum chip. The working status of the quantum chip includes parameter debugging status and online use status, and the working status of the acquisition module, the judgment module, and the feedback module includes silent status and active status.

[0022] Optionally, the monitoring status adjustment module includes:

[0023] A chip status acquisition unit is used to acquire the working status of the quantum chip, wherein the working status of the quantum chip includes parameter debugging status and online usage status;

[0024] The monitoring state adjustment unit is used to adjust the working states of the acquisition module, the judgment module, and the feedback module to a silent state when the state of the quantum bit is in parameter debugging state and the parameter information of all quantum bits in the information of the quantum chip obtained by the acquisition module is empty; otherwise, it adjusts the working states of the acquisition module, the judgment module, and the feedback module to an active state. When the working state of the quantum chip is in online use state, it adjusts the working states of the acquisition module, the judgment module, and the feedback module to an active state.

[0025] Optionally, the device further includes:

[0026] The processing module is used to perform corresponding processing operations on the unavailable qubits according to the preset unavailable state, the parameter information of the unavailable qubits, and the preset processing strategy.

[0027] Optionally, the preset unavailable qubit states include a test state and a calibration state, the processing strategy includes a testing strategy and a calibration strategy, and the processing module includes:

[0028] The test processing unit is used to perform test operations on a qubit in the state to be tested using the test strategy based on the parameter information of the qubit.

[0029] The calibration processing unit is used to perform calibration operations on a qubit in the state of being to be calibrated using the calibration strategy based on the parameter information of the qubit.

[0030] Optionally, both the testing strategy and the calibration strategy employ a method of traversing a preset directed acyclic graph, wherein the directed acyclic graph represents multiple qubit parameters and the dependencies between these multiple qubit parameters.

[0031] Optionally, the processing module further includes:

[0032] The parallel processing decision unit is used to determine whether there is a coupling relationship between the quantum bit to be tested received by the test processing unit and the quantum bit to be calibrated received by the calibration processing unit. If not, the test processing unit and the calibration processing unit are started to execute in parallel.

[0033] Optionally, the device further includes:

[0034] The user information prompt module is used to output a user prompt message to the user terminal when the processing module fails to perform the processing operation, so as to remind the user to intervene.

[0035] A second aspect of this application provides a method for monitoring the state of a quantum chip, including:

[0036] Periodically acquire information about the quantum chip, wherein the information about the quantum chip includes parameter information of all qubits set on the quantum chip;

[0037] Based on the information of the quantum chip and the inspection operation database, it is determined whether the state of each quantum bit involved in the information is available. The inspection operation database pre-stores multiple quantum bit parameters for characterizing the quantum bits.

[0038] The feedback outputs parameter information for qubits whose status is unavailable, wherein the parameter information includes the qubit number and the parameters of the qubit that has drifted with the corresponding number.

[0039] A third aspect of this application provides a quantum computer including a quantum chip state monitoring device as shown in any of the foregoing embodiments, or a quantum chip state monitoring method as shown in the foregoing embodiments to perform state monitoring on all quantum chips thereon.

[0040] Compared with the prior art, this application has the following beneficial effects:

[0041] The quantum chip state monitoring device of this application includes an acquisition module, a judgment module, and a feedback module. The acquisition module periodically acquires information about the quantum chip, including parameter information of each qubit on the chip. The judgment module, based on the quantum chip information and multiple qubit parameters pre-stored in a check operation database to characterize the qubits, determines whether the state of each qubit in the quantum chip is available. This enables monitoring of whether the state of the qubits in the quantum chip is abnormal. The feedback module outputs parameter information of qubits whose state is unavailable, thus providing timely and accurate information to the server system about which qubits on the quantum chip have experienced parameter drift. This provides strong support for performing corresponding calibration operations on qubits with drifted parameters and ensures that available qubit resources are allocated to quantum computing tasks to ensure smooth operation on the quantum chip. Furthermore, this application embodiment can manage the state of qubits on the quantum chip, providing strong support for updating and maintaining the working state of the quantum chip.

[0042] These or other aspects of this application will become more apparent from the description of the following embodiments. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application, and therefore should not be regarded as a limitation of the scope. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a schematic diagram of the structure of a quantum computer provided in an exemplary embodiment of this application;

[0045] Figure 2 This is a schematic diagram of the structure of a quantum chip state monitoring device provided in an exemplary embodiment of this application;

[0046] Figure 3 This is a schematic diagram of the structure of the determination module in an exemplary embodiment of the present application;

[0047] Figure 4 This is a schematic diagram of the structure of the determination module in the apparatus provided in another exemplary embodiment of this application;

[0048] Figure 5 This is a schematic diagram of the structure of a quantum chip state monitoring device provided in another exemplary embodiment of this application;

[0049] Figure 6 This is a schematic diagram of the structure of a quantum chip state monitoring device provided in another exemplary embodiment of this application;

[0050] Figure 7 This is a schematic diagram of a directed acyclic graph provided in an exemplary embodiment of this application;

[0051] Figure 8 This is a schematic diagram of the structure of a quantum chip state monitoring device provided in another exemplary embodiment of this application;

[0052] Figure 9 This is a schematic diagram of the workflow of a quantum chip state monitoring method provided in an exemplary embodiment of this application. Detailed Implementation

[0053] The specific embodiments of this application will be described in more detail below with reference to the schematic diagrams. The advantages and features of this application will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this application.

[0054] In the embodiments of this application, it should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of this application, "several" means one or more, and "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0055] Please refer to Figure 1 , Figure 1 This schematic diagram illustrates the structure of a quantum computer implemented using superconducting technology, provided as an exemplary embodiment of this application. It includes several quantum chips, a quantum control system, a server system, and an application server. Each quantum chip integrates multiple qubits, where each qubit is a two-level system with parameters such as transition frequency and transition energy. These parameters need to be manipulated by applying corresponding control signals (analog signals) through the quantum control system. The quantum control system is used to control and measure each quantum chip; that is, the signal channel of the quantum control system corresponds to the parameter control port and qubit state measurement port set on each quantum chip.

[0056] Specifically, on one hand, users generate quantum computing tasks based on their needs on the application server. These tasks can be quantum programs edited by the user using quantum software or quantum testing experiments that staff need to perform on the quantum chip during parameter tuning. The server system receives the quantum computing tasks sent by the application server and processes them into data packets that the quantum control system can recognize and process. The quantum control system receives the data packets and generates control signals, which are then output to the quantum chip to control parameters such as the transition frequency and transition energy of the qubits, causing the quantum state of the qubits to evolve over time, thus executing the quantum computing task. On the other hand, the quantum control system measures the quantum chip and obtains the preliminary execution results of the quantum computing task. These preliminary results are then sent back to the server system for final analysis and processing before being output to the user for viewing.

[0057] As those skilled in the art will understand, after a quantum chip is manufactured, it first needs parameter debugging, and it can only be put into online use after the parameter debugging results are normal. Therefore, the working state of a quantum chip can be summarized as parameter debugging state and online use state. Regardless of the working state of the quantum chip, the performance of the qubits on the quantum chip directly determines the accuracy of the quantum computing task, and the performance of the qubits depends on whether the various qubit parameters drift. If one or more qubit parameters drift, it will greatly affect the performance of the qubits, causing the qubit state to change from normal to abnormal. In practical applications, it is difficult for operators to detect such abnormal changes in the state of qubits in a timely and accurate manner, and as the scale of quantum chips and quantum computers becomes larger and larger, it will be even more difficult to detect such abnormal changes in the state of qubits in a timely manner. Therefore, constructing a quantum chip state monitoring device that can manage the state of qubits on quantum chips in real time has become an urgent problem to be solved in this field.

[0058] It should be noted that the aforementioned qubit parameters include, but are not limited to, the single-qubit quantum logic gate parameters and the qubit manipulation signal parameters. Specifically, the single-qubit quantum logic gate parameters include, but are not limited to, the voltage amplitude, frequency, width, and output power of the π pulse; the voltage amplitude, frequency, width, and output power of the π / 2 pulse; and the qubit manipulation signal parameters include, but are not limited to, the readout pulse frequency, readout pulse length, and readout pulse power. In practical applications, the specific qubit parameters mentioned above can be determined according to the type and characteristics of the qubit, and will not be detailed here.

[0059] Please refer to Figure 2 , Figure 2A quantum chip state monitoring device 100, provided as an exemplary embodiment of this application, includes:

[0060] The acquisition module 110 is used to periodically acquire information about the quantum chip, wherein the information about the quantum chip includes parameter information of all qubits set on the quantum chip.

[0061] The judgment module 120 is used to judge whether the state of each qubit involved in the information is available based on the information of the quantum chip and the inspection operation database, wherein the inspection operation database pre-stores multiple qubit parameters for characterizing the qubit.

[0062] Feedback module 130 is used to provide feedback on parameter information of qubits whose output state is unavailable. The parameter information includes the number of the qubit and the parameters of the qubit that has drifted with the corresponding number.

[0063] It should be noted that in a quantum computer, this device 100 can be used as a component of a server system to enable the server system to monitor the state of the quantum chip.

[0064] As can be seen, in this embodiment, the acquisition module 110 periodically acquires information about the quantum chip, including parameter information of each qubit on the quantum chip. The judgment module 120, based on the quantum chip information and multiple qubit parameters pre-stored in the inspection operation database to characterize the qubits, determines whether the state of each qubit in the quantum chip is available. This enables monitoring of whether the state of the qubits in the quantum chip is abnormal. The feedback module 130 outputs the parameter information of the qubits whose state is unavailable, thus providing timely and accurate information to the server system about which qubits on the quantum chip have experienced qubit parameter drift. This provides strong support for performing corresponding calibration operations on the qubits whose parameters have drifted, and also provides a strong guarantee for allocating effective and available qubit resources to the quantum computing tasks to be executed so that they can run smoothly on the quantum chip. It can also improve the execution efficiency of quantum computing tasks to a certain extent. In addition, this embodiment can be used to manage the state of the qubits on the quantum chip, providing strong support for updating and maintaining the working state of the quantum chip.

[0065] The quantum chip state monitoring device 100 according to an embodiment of this application will be described in detail below:

[0066] In an exemplary embodiment of this application, the acquisition module 110 may further include:

[0067] A chip information acquisition unit is used to periodically acquire information about the quantum chip from a quantum chip database. The quantum chip database stores the serial numbers of several quantum chips and the parameter information of all qubits on each serial numbered quantum chip. The quantum chip information includes the serial number of a specific quantum chip and the parameter information of all qubits on that serial numbered quantum chip. The parameter information of all qubits in the quantum chip information includes the serial number of each qubit and the qubit parameters of the qubit with the corresponding serial number. The qubit serial number can be the number of the qubit in the topological structure diagram of the quantum chip.

[0068] The timing unit is used to generate a timing trigger signal to trigger the chip information acquisition unit to perform operations according to a preset timing strategy. The timing strategy can be set according to actual application needs and is not limited here.

[0069] Please see Figure 3 In an exemplary embodiment of this application, the determination module 120 may further include:

[0070] The bit information judgment unit 121 is used to determine whether the parameter information of the quantum bit to be checked in the information of the quantum chip is empty.

[0071] Specifically, the bit information judgment unit 121 judges the parameter information of all qubits on a selected quantum chip. Therefore, the parameter information of each qubit on the quantum chip can be obtained by traversal. The aforementioned qubit to be checked is either a single qubit undergoing parameter information checking and judgment during the traversal process or multiple qubits with coupling relationships.

[0072] The first type determination unit 122 is used to check whether the parameter information of the qubit to be checked has drifted according to the set inspection strategy based on the inspection operation database when the parameter information of the qubit to be checked is not empty; if the parameter information of the qubit to be checked has drifted, the state of the qubit to be checked is determined to be unusable, and the qubit to be checked is obtained as a qubit to be calibrated.

[0073] The states of a qubit include available and unavailable. If a qubit is unavailable, it is either in a state to be calibrated or a state to be tested. A qubit in a state to be calibrated can be defined as a qubit to be calibrated, and a qubit in a state to be tested can be defined as a qubit to be tested, thus facilitating the differentiation between qubits in different unavailable states.

[0074] As a specific implementation of this application, the first type determination unit 122 may include:

[0075] The parameter drift checking subunit is used to select one or more qubit parameters from the checking operation database according to the set checking strategy to check the parameter information of the qubit to be calibrated, and determine whether the parameter information of the qubit to be calibrated has drifted based on the checking results.

[0076] The aforementioned checking strategy can be set according to actual application needs and is not specifically limited here. If multiple qubit parameters are selected according to the checking strategy, the correlation or dependency between these qubit parameters will be considered, and the parameter information of the qubit to be calibrated will be checked level by level according to the order of their correlation or dependency. If parameter drift is detected in the parameter information of the qubit to be calibrated in one level, the other qubit parameters in subsequent levels will not be checked.

[0077] As a specific implementation of this application, the parameter drift checking subunit may further include:

[0078] The first subunit is used to perform a quantum test experiment corresponding to the selected one or more qubit parameters on the qubit to be calibrated, and to obtain the current experimental data of the qubit to be calibrated at the corresponding qubit parameters. The quantum test experiment is an experiment to obtain the experimental data of the qubit at the corresponding qubit parameters.

[0079] The second subunit is used to compare the current experimental data of the qubit to be calibrated with the corresponding qubit parameter threshold, wherein the qubit parameter threshold is stored in the historical dataset of each qubit parameter.

[0080] In practical applications, the above-mentioned check and judgment can be specifically defined as follows: when the check result is a failure, it is determined that the parameter information of the qubit to be checked has drifted. A failure specifically means that the qubit to be calibrated deviates from the current experimental data of the corresponding qubit parameters after comparing them with the corresponding qubit parameter thresholds, and this deviation exceeds a preset error range.

[0081] The qubit parameter threshold can be a theoretically expected value obtained from a pre-defined physical model of the qubit parameters. For example, when the qubit parameter is the voltage amplitude of the π pulse in a single-bit quantum logic gate, a physical model can be established as follows: in a and b are the real and imaginary parts of the data point with the largest signal in the quantum bit spectrum, respectively; f0 is the frequency of the point with the largest signal in the quantum bit spectrum; and C is a preset coefficient. The theoretical expected value obtained from this physical model can be 0.6-0.8V.

[0082] The tolerance range for deviations can be set according to the actual application requirements, and no specific limitation is made here. For example, in some applications with low tolerance, a more lenient tolerance range for deviations can be set, while in some applications with high tolerance, a more stringent tolerance range for deviations should be set.

[0083] Please see Figure 4 In an exemplary embodiment of this application, the determination module 120 may further include:

[0084] The second type determination unit 123 is used to determine that the state of the quantum bit to be checked is unavailable when the parameter information of the quantum bit to be checked is empty, and to obtain the quantum bit to be checked as a quantum bit to be tested.

[0085] In practical applications, when a quantum chip is in parameter tuning mode, some qubits may have completed parameter tuning while others have not. Therefore, to prevent parameter information drift of the tuned qubits, it is necessary to monitor the state of the quantum chip in this parameter tuning state. Thus, when the bit information judgment unit 121 determines whether the parameter information of a qubit in this parameter tuning state is empty, there may be cases where the parameter information of the qubit being checked is empty, meaning the qubit being checked by the bit information judgment unit 121 is in a test-pending state. The parameter information of the qubit in the test-pending state is missing in the quantum chip database, requiring quantum testing experiments to obtain the first batch of relatively reliable qubit parameters. Therefore, the state of the qubit in the test-pending state is unusable.

[0086] In addition, the feedback module 130 can also be used to output the number of the available qubits to provide the server system with available qubit resources in real time.

[0087] Please see Figure 5 In an exemplary embodiment of this application, the device 100 may further include:

[0088] The monitoring status adjustment module 140 is used to determine the working status of the acquisition module 110, the judgment module 120, and the feedback module 130 based on the working status of the quantum chip. The working status of the quantum chip includes parameter debugging and online usage states, and the working states of the acquisition module 110, the judgment module 120, and the feedback module 130 include silent and active states. When the acquisition module 110, the judgment module 120, and the feedback module 130 are in a silent state, they will not monitor the quantum chip status.

[0089] Specifically, the monitoring state adjustment module 140 periodically detects the operating state of the quantum chip to be monitored and adaptively adjusts the operating states of the acquisition module 110, the judgment module 120, and the feedback module 130 based on the detected operating state results of different quantum chips. When the acquisition module 110, the judgment module 120, and the feedback module 130 are in a silent state, these three modules will not monitor the quantum chip, which is equivalent to putting these three modules into a dormant state. When needed, these three modules will be awakened to an active state to continue monitoring the quantum chip. As for the adjustment triggering conditions between the silent state and the active state of the modules, in addition to using the quantum chip operating state adjustment triggering condition proposed in the embodiments of this application, other conditions can also be set according to specific practical application needs, and no specific limitation is made here.

[0090] As one specific implementation of this application embodiment, the monitoring status adjustment module 140 includes:

[0091] The chip status acquisition unit is used to acquire the working status of the quantum chip, wherein the working status of the quantum chip includes parameter debugging status and online use status.

[0092] The monitoring state adjustment unit is used to adjust the working state of the acquisition module 110, the judgment module 120, and the feedback module 130 to a silent state when the state of the quantum bit is in parameter debugging state and the parameter information of all quantum bits in the information of the quantum chip obtained by the acquisition module 110 is empty; otherwise, it adjusts the working state of the acquisition module 110, the judgment module 120, and the feedback module 130 to an active state. When the working state of the quantum chip is in online use state, it adjusts the working state of the acquisition module 110, the judgment module 120, and the feedback module 130 to an active state.

[0093] Please see Figure 6 In an exemplary embodiment of this application, the device 100 may further include:

[0094] The processing module 150 is used to perform corresponding processing operations on the unavailable qubits according to the preset unavailable state of the qubits, the parameter information of the qubits in the unavailable state, and the preset processing strategy.

[0095] The processing module 150 performs corresponding decision processing on qubits in an unavailable state according to the preset unavailable state, and performs corresponding processing operations on qubits with abnormal states to restore the qubit state to normal. This effectively ensures that the quantum chip that needs to perform quantum computing tasks is in a normal state for a long time, which also greatly improves the utilization rate of qubit resources on the quantum chip to a certain extent.

[0096] As a specific implementation of this application, the preset unavailable quantum bit state includes a test state and a calibration state, the processing strategy includes a testing strategy and a calibration strategy, and the processing module 150 may further include:

[0097] The test processing unit is used to perform test operations on a qubit in the state to be tested, based on the parameter information of the qubit and using the test strategy.

[0098] The calibration processing unit is used to perform calibration operations on a qubit in the state of being to be calibrated using the calibration strategy based on the parameter information of the qubit.

[0099] By performing testing and calibration operations on the qubit to be tested and the qubit to be calibrated by the above-mentioned test processing unit and calibration processing unit respectively, the system resources can be maximized and the execution efficiency of the processing module 150 can be improved to a certain extent.

[0100] As a specific implementation of this application, both the testing strategy and the calibration strategy adopt the method of traversing a preset directed acyclic graph, wherein the directed acyclic graph represents multiple qubit parameters and the dependencies between the multiple qubit parameters.

[0101] It should be noted that, please refer to Figure 7In the directed acyclic graph (DAG) described above, each circle represents a node, signifying a qubit parameter. Specifically, this represents a quantum testing experiment and data analysis of the qubit. The arrows in the graph represent directed edges, indicating the dependencies between adjacent nodes. Each node has a state, describing whether one or more parameters require related operations. Therefore, the DAG can represent the dependencies between various qubit parameters, where backward nodes are influenced by forward nodes (i.e., dependent nodes) with which they are connected. Forward nodes refer to the starting point of the arrows in the graph, and backward nodes refer to the pointing point of the arrows. Of course, forward and backward nodes are relative definitions and not fixed for any given node. For example, node 2 is a backward node of node 1 and also a forward node of node 3. Therefore, node 2 is influenced by node 1, and node 2 also influences node 3. The same logic applies to other nodes, which will not be elaborated further here. Figure 7 Node 1 is the starting node of the entire directed acyclic graph, and node 13 is the ending node of the entire directed acyclic graph.

[0102] Furthermore, the directed acyclic graphs (DAGs) used for testing and calibration can be the same or different, depending on the specific application requirements; no specific limitations are imposed here. Moreover, the DAGs used for testing and calibration can be applied to all qubits within the same quantum chip.

[0103] As a specific implementation of this application embodiment, the processing module 160 may further include:

[0104] The parallel processing decision unit is used to determine whether there is a coupling relationship between the quantum bit to be tested received by the test processing unit and the quantum bit to be calibrated received by the calibration processing unit. If not, the test processing unit and the calibration processing unit are started to execute in parallel.

[0105] In practical applications, when the monitored quantum chip is in parameter testing mode, the qubits on the chip are divided into tested qubits and qubits to be tested. For the tested qubits, the device 100 needs to monitor their availability. Therefore, if an unavailable qubit is detected among the tested qubits, a calibration operation is required for that unavailable qubit.

[0106] To significantly improve the efficiency of the device 100, when it is determined that there is no coupling relationship between the qubit to be calibrated and the qubit to be tested, calibration and testing operations can be performed on these qubits in parallel. That is, the testing processing unit and the calibration processing unit are activated in parallel to perform processing operations on the qubit to be tested and the qubit to be calibrated. Specifically, when the calibration processing unit performs a calibration operation on the qubit to be calibrated, if the qubit to be tested does not affect the qubit being calibrated, the testing processing unit is simultaneously activated to perform a testing operation on the qubit to be tested. Those skilled in the art will understand that the existence of a coupling relationship between two or more qubits can be determined based on the topological relationship between the qubits of the quantum chip.

[0107] Please see Figure 8 In an exemplary embodiment of this application, the device 100 may further include:

[0108] The user information prompt module 160 is used to output user prompt information to the user terminal when the processing module 150 fails to perform the processing operation, so as to remind the user to intervene.

[0109] In practical applications, system interactivity is crucial. When the processing module 150 fails to handle unexpected situations, i.e., when the processing module 150 fails to perform its processing operation, user intervention is required. Therefore, after the system throws an exception, the user information prompting module 160 outputs user prompt information to the user terminal, providing a clear user information prompt to remind the user that intervention is needed.

[0110] Based on the same inventive concept, please refer to Figure 9 This application also proposes a quantum chip state monitoring method, which includes the following steps:

[0111] S110: Periodically acquire information about the quantum chip, wherein the information about the quantum chip includes parameter information of all qubits set on the quantum chip.

[0112] S120: Based on the information of the quantum chip and the inspection operation database, determine whether the state of each qubit involved in the information is available, wherein the inspection operation database pre-stores multiple qubit parameters for characterizing the qubit.

[0113] S130: Feedback outputs parameter information of qubits whose state is unavailable, wherein the parameter information includes the qubit number and the parameters of the qubits that have drifted with the corresponding number.

[0114] Based on the same inventive concept, this application also proposes a quantum computer, including a quantum chip state monitoring device as shown in any of the above embodiments, or a quantum chip state monitoring method as shown in the above embodiments to perform state monitoring on all quantum chips thereon.

[0115] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0116] The above are merely preferred embodiments of this application and do not constitute any limitation on this application. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in this application without departing from the scope of the technical solutions of this application shall still fall within the protection scope of this application.

Claims

1. A quantum chip state monitoring device, characterized by, The method comprises the following steps: acquiring the information of the quantum chip, wherein the information of the quantum chip comprises the parameter information of all the quantum bits arranged on the quantum chip; judging whether the state of each quantum bit involved in the information is available based on the information of the quantum chip and the inspection operation database, wherein the inspection operation database pre-stores a plurality of quantum bit parameters for characterizing quantum bits; outputting the parameter information of the quantum bit whose state is unavailable, wherein the parameter information comprises the number of the quantum bit and the quantum bit parameter of the quantum bit with the corresponding number that has drifted; The judgment module comprises: a bit information judgment unit for judging whether the parameter information of the quantum bit to be inspected in the information of the quantum chip is empty; a first type determination unit for checking whether the parameter information of the quantum bit to be inspected has drifted based on the inspection operation database according to a set inspection strategy when the parameter information of the quantum bit to be inspected is not empty; if the parameter information of the quantum bit to be inspected has drifted, determining that the state of the quantum bit to be inspected is unavailable, and obtaining that the quantum bit to be inspected is a quantum bit to be calibrated; a second type determination unit for determining that the state of the quantum bit to be inspected is unavailable when the parameter information of the quantum bit to be inspected is empty, and obtaining that the quantum bit to be inspected is a quantum bit to be tested.

2. The quantum chip state monitoring apparatus of claim 1, wherein, The first type determination unit comprises: a parameter drift checking subunit for selecting one or more quantum bit parameters from the inspection operation database according to a set inspection strategy to perform inspection on the parameter information of the quantum bit to be calibrated, and determining whether the parameter information of the quantum bit to be calibrated has drifted based on the inspection result.

3. The quantum chip state monitoring apparatus of claim 2, wherein, The parameter drift checking subunit comprises: a first subunit for performing a quantum test experiment corresponding to the quantum bit parameter on the quantum bit to be calibrated according to the selected one or more quantum bit parameters, obtaining current experimental data of the quantum bit to be calibrated under the corresponding quantum bit parameter, and the quantum test experiment is an experiment for obtaining experimental data of a quantum bit under a corresponding quantum bit parameter; a second subunit for comparing the current experimental data of the quantum bit to be calibrated under the corresponding quantum bit parameter with a corresponding quantum bit parameter threshold, wherein the quantum bit parameter threshold is stored in a historical data set of each quantum bit parameter.

4. The quantum chip state monitoring apparatus of any one of claims 1-3, wherein, The device further comprises: a monitoring state adjustment module for determining the working state of the acquisition module, the judgment module and the feedback module based on the working state of the quantum chip, wherein the working state of the quantum chip comprises a parameter debugging state and an online use state, and the working state of the acquisition module, the judgment module and the feedback module comprises a silent state and an active state.

5. The quantum chip state monitoring apparatus of claim 4, wherein, The monitoring state adjustment module comprises: a chip state acquisition unit for acquiring the working state of the quantum chip, wherein the working state of the quantum chip comprises a parameter debugging state and an online use state; The monitoring state adjusting unit is configured to adjust the working states of the obtaining module, the judging module and the feedback module to be in an active state when the quantum chip is in an online use state.

6. The quantum chip state monitoring apparatus of any one of claims 1-5, wherein, The device further comprises: The processing module is configured to perform corresponding processing operations on the quantum bits in the unavailable state according to a preset quantum bit unavailable state, parameter information of the quantum bits in the unavailable state and a preset processing strategy.

7. The quantum chip state monitoring apparatus of claim 6, wherein, The preset quantum bit unavailable state includes a to-be-tested state and a to-be-calibrated state, and the processing strategy includes a testing strategy and a calibration strategy. The testing processing unit is configured to perform testing operations on the quantum bits in the to-be-tested state according to the parameter information of the quantum bits in the to-be-tested state. The calibration processing unit is configured to perform calibration operations on the quantum bits in the to-be-calibrated state according to the parameter information of the quantum bits in the to-be-calibrated state.

8. The quantum chip state monitoring apparatus of claim 7, wherein, The testing strategy and the calibration strategy are both in the form of traversing a preset directed acyclic graph, wherein the directed acyclic graph represents a plurality of quantum bit parameters of a quantum bit and a dependency relationship between the plurality of quantum bit parameters.

9. The quantum chip state monitoring apparatus of claim 7, wherein, The processing module further comprises: The parallel processing decision unit is configured to determine whether the quantum bits to be tested received by the testing processing unit are coupled to the quantum bits to be calibrated received by the calibration processing unit, and if not, to start the testing processing unit and the calibration processing unit to perform in parallel.

10. The quantum chip state monitoring apparatus of claim 6, wherein, The device further comprises: The user information prompting module is configured to output user prompt information to a user terminal to remind the user to intervene in processing when the processing module fails to perform the processing operation.

11. A method of quantum chip state monitoring, the method comprising: The method comprises: periodically obtaining information of a quantum chip, wherein the information of the quantum chip includes parameter information of all quantum bits arranged on the quantum chip; determining whether each quantum bit involved in the information of the quantum chip is available based on the information of the quantum chip and information involved in a checking operation database, wherein the checking operation database pre-stores a plurality of quantum bit parameters of a quantum bit; outputting parameter information of the quantum bits in the unavailable state, wherein the parameter information includes a number of the quantum bits and quantum bit parameters of the quantum bits with the corresponding number that have drifted; the determining whether each quantum bit involved in the information of the quantum chip is available based on the information of the quantum chip and information involved in a checking operation database comprises: determining whether parameter information of a to-be-checked quantum bit in the information of the quantum chip is empty; When the parameter information of the quantum bit to be checked is not empty, whether the parameter information of the quantum bit to be checked has a drift is checked based on the check operation database according to a set check strategy; if the parameter information of the quantum bit to be checked has a drift, it is determined that the state of the quantum bit to be checked is unusable, and it is obtained that the quantum bit to be checked is a quantum bit to be calibrated; When the parameter information of the quantum bit to be checked is empty, it is determined that the state of the quantum bit to be checked is unusable, and it is obtained that the quantum bit to be checked is a quantum bit to be tested.

12. A quantum computer, comprising: A quantum chip state monitoring device as claimed in any one of claims 1 to 10, or a quantum chip capable of performing state monitoring by a quantum chip state monitoring method as claimed in claim 11.

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