A detection circuit of an intelligent detector, an intelligent detector and a solid-state power controller

Abstract

The present application relates to a detection circuit of an intelligent detector, an intelligent detector and a solid-state power controller, and relates to the technical field of power electronics. The detection circuit includes a current test circuit for testing the current of a sampling resistor, an operational amplifier gain circuit for amplifying the input voltage of the current side test circuit, and a voltage compensation circuit for voltage compensation of the current test circuit, and the operational amplifier gain circuit and the voltage compensation circuit are coupled to the current test circuit. The present application has the effect of realizing test blind zone compensation for absolute value circuits through minimal circuit changes, and solving the problem of failure to test or inaccurate testing of small signals in the circuit.

Description

Technical Field

[0001] The present application relates to the technical field of power electronics, and in particular to a detection circuit of an intelligent detector, an intelligent detector and a solid-state power controller. Background Art

[0002] Solid-state power controller (SSPC) is an intelligent switch device that uses bus communication, microprocessor control, power MOS or IGBT as output switch devices, and can realize remote bus control, short circuit, overcurrent, current limiting protection, and fault status feedback. SSPC is the core component of solid-state power distribution technology. It is an intelligent switch device that integrates multiple functions such as relays, circuit breakers, and intelligent detectors (voltage and current detection). It can realize the rapid connection and disconnection of loads, and also has overload protection and self-detection functions, integrating the functions of relays, circuit breakers, and mechanical switches of conventional power distribution.

[0003] The SSPC circuit contains a current test circuit, and general current tests are implemented using operational amplifiers. In a circuit powered by a single power supply, due to the output offset voltage of the operational amplifier, the output voltage of the operational amplifier is not linearly proportional to the input voltage within the test range, and cannot cover the entire test range.

[0004] The current test circuits in the related art mostly use multiple sampling resistors, and when each sampling resistor is passed through a test circuit and then superimposed, the blind voltage range is also superimposed. Therefore, when using the current test circuit to test small signals, there is a problem of not being able to test or testing inaccurately. Summary of the invention

[0005] The purpose of the present application is to provide a detection circuit of an intelligent detector, an intelligent detector and a solid-state power controller, so as to solve the problem of failure to detect or inaccurate testing when using a current test circuit to test a small signal.

[0006] In a first aspect, the present application provides a detection circuit of an intelligent detector, which adopts the following technical solution:

[0007] A detection circuit of an intelligent detector includes a current test circuit for testing the current of a sampling resistor, an operational amplifier gain circuit for amplifying the input gain of the current side test circuit, and a voltage compensation circuit for performing voltage compensation on the current test circuit, and the operational amplifier gain circuit and the voltage compensation circuit are both coupled to the current test circuit.

[0008] By adopting the above technical solution, by adding an operational amplifier gain circuit in the current test circuit, the input voltage of the current test circuit can be amplified, and by adding a voltage compensation circuit in the current test circuit, the voltage compensation of the current test circuit can be performed. Thus, the test blind area compensation of the absolute value circuit is achieved through minimal circuit changes, solving the problem of failure to test small signals or inaccurate testing in the circuit, and improving the application range of the circuit.

[0009] Optionally, the current testing circuit includes a DC current testing circuit and an AC current testing circuit, the operational amplifier gain circuit includes a DC operational amplifier gain circuit and an AC operational amplifier gain circuit, and the voltage compensation circuit includes a DC voltage compensation circuit and an AC voltage compensation circuit.

[0010] By adopting the above technical solution, by dividing the current test circuit into a DC current test circuit and an AC current test circuit, and adding a DC operational amplifier gain circuit, an AC operational amplifier gain circuit, a DC voltage compensation circuit and an AC voltage compensation circuit to the DC current test circuit and the AC current test circuit respectively, the application scope of the current test can be improved.

[0011] Optionally, the DC current test circuit includes a first sampling resistor Ra, a first resistor R1 and a first operational amplifier A1;

[0012] Two ends of the first sampling resistor Ra are respectively connected to the first resistor R1 and the fourth pin of the first operational amplifier A1;

[0013] One end of the first resistor R1 that is not connected to the first sampling resistor Ra is connected to the third pin of the first operational amplifier A1;

[0014] The fifth pin of the first operational amplifier A1 is connected to a power supply, the first pin of the first operational amplifier A1 is connected to a low level output terminal, and the fourth pin of the first operational amplifier A1 is grounded.

[0015] By adopting the above technical solution, the first resistor is independent of the gain circuit of the first operational amplifier, so that the impedance deviation of the input end of the first operational amplifier can be smaller, the voltage difference between the two input ends of the first operational amplifier can be smaller, and the voltage deviation of the output of the first operational amplifier can be smaller.

[0016] Optionally, the DC operational amplifier gain circuit includes a second resistor R2, a third resistor R3 and a first capacitor C1;

[0017] One end of the second resistor R2 is grounded, and the other end is connected to the second pin of the first operational amplifier A1;

[0018] Two ends of the third resistor R3 are respectively connected to the second pin and the first pin of the first operational amplifier A1;

[0019] The first capacitor C1 is connected in parallel with the third resistor R3.

[0020] By adopting the above technical solution, the second resistor and the third resistor are combined to form a gain amplifier circuit of the first operational amplifier to achieve amplification of the input signal, and the third resistor is connected between the second pin and the first pin of the first operational amplifier to form negative feedback to limit the gain of the first operational amplifier, so that the first operational amplifier is in a linear working area, and the first capacitor is a parallel capacitor of the third resistor, which is used to play a filtering role, so that the ripple of the output signal becomes smaller and the influence of the signal jitter at the input end of the first operational amplifier is reduced.

[0021] Optionally, the DC voltage compensation circuit includes a fourth resistor R4, and the fourth resistor R4 is connected in parallel with the first resistor R1.

[0022] By adopting the above technical solution, the fourth resistor plays a role of voltage division, which is used to provide a small voltage signal and further provide a DC bias.

[0023] Optionally, the AC current test circuit includes a second sampling resistor Rb, a first transistor V1, a second transistor V2, a fifth resistor R5, a sixth resistor R6, a second operational amplifier A2, a second capacitor C2, a third capacitor C3, a third operational amplifier A3, a seventh resistor R7 and a diode V3;

[0024] Two ends of the second sampling resistor Rb are respectively connected to the fifth resistor R5 and the fourth pin of the second operational amplifier A2;

[0025] The first transistor V1 and the second transistor V2 are respectively connected to two ends of the second sampling resistor Rb;

[0026] One end of the fifth resistor R5 that is not connected to the second sampling resistor Rb is connected to the third pin of the second operational amplifier A2 and the second pin of the third operational amplifier A3;

[0027] One end of the sixth resistor R6 is connected to the first pin of the second operational amplifier A2, and the other end is connected to the second capacitor C2;

[0028] One end of the second capacitor C2 that is not connected to the sixth resistor R6 is grounded;

[0029] One end of the third capacitor C3 is connected to the fifth pin of the second operational amplifier A2, and the other end is grounded;

[0030] The fourth pin of the second operational amplifier A2 is grounded;

[0031] One end of the seventh resistor R7 is connected to the third pin of the third operational amplifier A3, and the other end is connected to the fourth pin of the third operational amplifier A3;

[0032] An input end of the diode V3 is connected to a first pin of the third operational amplifier A3, and an output end of the diode V3 is connected to a second pin of the third operational amplifier A3.

[0033] By adopting the above technical solution, the first transistor and the second transistor are used to provide a current path for the second sampling resistor, and the fifth resistor is used to make the input impedance deviation of the second operational amplifier smaller, so that the voltage difference between the two input terminals of the second operational amplifier is smaller, and then the output terminal of the second operational amplifier outputs a smaller voltage deviation, and the sixth resistor is used to increase the output impedance of the second operational amplifier.

[0034] The second capacitor plays a filtering role to reduce the signal ripple at the output end. The third capacitor is used for filtering to reduce the power supply ripple. The seventh resistor is used to provide a small voltage signal and then provide an AC bias. The diode and the third operational amplifier form an inverting amplifier circuit, and when the input voltage of the third operational amplifier is positive, the third operational amplifier is in an open-loop comparison mode, thereby making the output level of the third operational amplifier a low level.

[0035] Optionally, the AC operational amplifier gain circuit includes an eighth resistor R8, a ninth resistor R9 and a fourth capacitor C4; one end of the eighth resistor R8 is respectively connected to the second sampling resistor Rb and the fifth resistor R5, and the other end is connected to the second pin of the second operational amplifier A2;

[0036] Two ends of the ninth resistor R9 are respectively connected to the second pin and the first pin of the second operational amplifier A2;

[0037] The fourth capacitor C4 is connected in parallel with the ninth resistor R9.

[0038] By adopting the above technical solution, the gain circuit of the second operational amplifier is formed by combining the eighth resistor and the ninth resistor, and by connecting the ninth resistor between the second pin and the first pin of the second operational amplifier, negative feedback can be formed to limit the gain of the second operational amplifier, so that the second operational amplifier is in a linear working area. The fourth capacitor is a parallel capacitor of the ninth resistor, which is used for filtering, so that the ripple of the output signal becomes smaller and the influence of the input signal jitter is reduced.

[0039] Optionally, the AC voltage compensation circuit includes a tenth resistor R10 and an eleventh resistor R11;

[0040] One end of the tenth resistor R10 is connected to the second pin of the third operational amplifier A3, and the other end is connected to the fifth pin of the third operational amplifier A3;

[0041] One end of the eleventh resistor R11 is connected to the third pin of the third operational amplifier A3 , and the other end of the eleventh resistor R11 is respectively connected to the fifth pin of the third operational amplifier A3 and the tenth resistor R10 .

[0042] By adopting the above technical solution, the tenth resistor and the eleventh resistor play a voltage dividing role, and are used to provide a small voltage signal and provide an AC bias.

[0043] In a second aspect, the present application provides an intelligent detector, which adopts the following technical solution:

[0044] An intelligent detector comprises the detection circuit of the intelligent detector of the first aspect.

[0045] In a third aspect, the present application provides a solid-state power controller, which adopts the following technical solution:

[0046] A solid-state power controller comprises the smart detector of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 is a functional equivalent diagram of SSPC in the embodiment of the present application;

[0048] Figure 2 It is a block diagram of the internal structure of SSPC in the embodiment of the present application;

[0049] Figure 3 is a structural schematic diagram of a DC current test circuit in an embodiment of the present application;

[0050] Figure 4 is a structural schematic diagram of an AC current test circuit in an embodiment of the present application;

[0051] In the figure, R1: first resistor; R2: second resistor; R3: third resistor; R4: fourth resistor; R5: fifth resistor; R6: sixth resistor; R7: seventh resistor; R8: eighth resistor; R9: ninth resistor; R10: tenth resistor; R11: eleventh resistor; Ra: first sampling resistor; Rb: second sampling resistor; C1: first capacitor; C2: second capacitor; C3: third capacitor; C4: fourth capacitor; A1: first operational amplifier; A2: second operational amplifier; A3: third operational amplifier; V1: first transistor; V2: second transistor; V3: diode. DETAILED DESCRIPTION

[0052] The following is combined with Figure 1 -Attached Figure 4, further details of this application are given.

[0053] As spacecraft develops towards multi-electrification and full-telephone, the number of electrical equipment is increasing, and the power of the whole machine is also increasing, which puts higher requirements on the performance and reliability of the power distribution system. The traditional electromechanical power distribution system uses electromechanical devices such as thermal protection switches, relays, contactors, and circuit breakers to control the load. Its advantages are mature technology and stable device operation. Its disadvantages are slow response to circuit overcurrent, short circuit and other faults, heavy wire weight, heavy personnel burden, and low automation and intelligence. At present, although the remote control distribution method based on the electromechanical power distribution system can realize the remote control and management of electrical loads, this management relies on manual operation of personnel, and the degree of automation is not high. It is impossible to realize intelligent distribution and management of loads, and the efficiency and reliability of the distribution system are also greatly affected. Against this background, solid-state power controllers came into being.

[0054] SSPC is the core device of solid-state power distribution technology. It is an intelligent switch device that integrates multiple functions such as relays, circuit breakers and intelligent detectors. Figure 1 , which is the functional equivalent diagram of SSPC.

[0055] The main functions of SSPC include:

[0056] 1. Protection function: In addition to the normal on and off functions, in order to protect the power grid and load, and also for its own protection, the SSPC must have necessary protection functions, including overload inverse time overcurrent protection, current surge protection and fast short circuit protection in case of short circuit fault.

[0057] 2. Communication function: SSPC is an intelligent solid-state switch element that can exchange status information with the host computer to receive control instructions from the electrical load management center (ELMC) and feedback its own working status to it.

[0058] 3. Detection function: Real-time detection of analog quantities such as load voltage and current and discrete quantities of its own working status.

[0059] In one embodiment of the present application, the SSPC mainly includes a microprocessor, an isolated power supply, an isolated interface, a logic circuit, a voltage and current detection circuit, a short circuit comparison circuit, a drive circuit, a power branch and a current limiting branch. Figure 2 .

[0060] Among them, the power branch uses MOSFET as the power switch tube to realize the opening and closing of the power branch. The current limiting branch also uses MOSFET in series with a high-power current limiting resistor to realize the opening and closing of the current limiting branch. The current detection is realized by connecting a sampling resistor in series, and the collected current signal is conditioned, including amplification and filtering. If the current is greater than the set maximum current, the output level of the short-circuit comparison circuit is reversed, and the logic matrix control drive circuit quickly shuts down the power tube to achieve short-circuit protection. If the current exceeds the set protection value, SSPC starts I2t inverse time delay protection. SSPC realizes inverse time overcurrent protection through software, and realizes information transmission with the external processor through the signal isolation interface. The product is controlled by a microprocessor inside, and external communication is realized through the CAN2.0B bus to realize control connection, disconnection, parameter setting, reading of analog quantities (voltage, current, temperature) and BIT discrete quantities (overvoltage, overcurrent, undervoltage, short circuit, etc.), and logic control is realized internally through the logic matrix unit.

[0061] An embodiment of the present application discloses a detection circuit of an intelligent detector, including a current testing circuit for testing the current of a sampling resistor, an operational amplifier gain circuit for amplifying the gain of an input voltage of the current testing circuit, and a voltage compensation circuit for performing voltage compensation on the current testing circuit, wherein the operational amplifier gain circuit and the voltage compensation circuit are both coupled to the current testing circuit.

[0062] Among them, since the detection circuit of the intelligent detector of this embodiment needs to test the DC current and the AC circuit separately, the current test circuit in this embodiment includes a DC current test circuit and an AC current test circuit, the operational amplifier gain circuit in this embodiment includes a DC operational amplifier gain circuit and an AC operational amplifier gain circuit, and the voltage compensation circuit in this embodiment includes a DC voltage compensation circuit and an AC voltage compensation circuit.

[0063] Among them, in one embodiment of the present application, refer to Figure 3 The DC current test circuit includes a first sampling resistor Ra, a first resistor R1 and a first operational amplifier A1; two ends of the first sampling resistor Ra are respectively connected to the first resistor R1 and the fourth pin of the first operational amplifier A1; one end of the first resistor R1 not connected to the first sampling resistor Ra is connected to the third pin of the first operational amplifier A1; the fifth pin of the first operational amplifier A1 is connected to a power supply, the first pin of the first operational amplifier A1 is connected to a low-level output end, and the fourth pin of the first operational amplifier A1 is grounded.

[0064] In one embodiment of the present application, the first resistor R1 is the input positive terminal resistor of the first operational amplifier A1, is a matching resistor, and has nothing to do with the gain circuit of the first operational amplifier A1. It can make the input impedance deviation of the first operational amplifier A1 smaller, make the voltage difference between the two input terminals of the first operational amplifier A1 smaller, and further make the first operational amplifier A1 output a smaller voltage deviation.

[0065] Among them, in one embodiment of the present application, continue to refer to Figure 3 The DC operational amplifier gain circuit includes a second resistor R2, a third resistor R3 and a first capacitor C1; one end of the second resistor R2 is grounded, and the other end is connected to the second pin of the first operational amplifier A1; the two ends of the third resistor R3 are respectively connected to the second pin and the first pin of the first operational amplifier A1; the first capacitor C1 is connected in parallel with the third resistor R3.

[0066] In one embodiment of the present application, the second resistor R2 is the input negative terminal resistor of the first operational amplifier A1, and the third resistor R3 is the feedback resistor. The second resistor R2 and the third resistor R3 are combined to form a gain amplifier circuit of the first operational amplifier A1 to achieve amplification of the input signal. The third resistor R3 is connected between the input negative terminal and the output terminal of the first operational amplifier A1 to form negative feedback to limit the gain of the first operational amplifier A1, so that the first operational amplifier A1 is in a linear working area.

[0067] In one embodiment of the present application, the first capacitor C1 is a parallel capacitor of the feedback resistor, which is used to filter the output signal to reduce the ripple and reduce the impact of input signal jitter.

[0068] Among them, in one embodiment of the present application, refer to Figure 3 The DC voltage compensation circuit includes a fourth resistor R4, and the fourth resistor R4 is connected in parallel with the first resistor R1.

[0069] In one embodiment of the present application, the fourth resistor R4 is a voltage-dividing resistor, which is used to provide a small voltage signal and further provide a DC bias.

[0070] The model of the first operational amplifier A1 in this embodiment is OPA2350.

[0071] Among them, refer to Figure 3 The sampling resistance signal in the DC current test circuit is one end of the first sampling resistance Ra inside the SSPC, and QGND is the other end of the first sampling resistance Ra. The voltage difference between the two ends of the first sampling resistance Ra is amplified by a two-fold amplifier circuit.

[0072] Among them, when the internal circuit of SSPC adopts a single power supply, the operational amplifiers involved in the test are generally selected as rail-to-rail types. The output low level of this type of operational amplifier is close to the negative supply voltage, and the high level is close to the positive supply voltage, but there is still a difference with the actual supply voltage; for example, the common operational amplifier is OPA2350, and its output parameter characteristics are shown in Table 1:

[0073] Table 1: OPA2350 output parameters

[0074]

[0075] For example, the resistance of the first sampling resistor Ra is 1mΩ, then the voltage difference across the first sampling resistor Ra is the current flowing through the resistor multiplied by 1mΩ, the voltage difference across the first sampling resistor Ra is amplified by two times, and the operational amplifier gain is 2. Referring to the technical parameters in Table 1, it can be seen that the low level output by the first operational amplifier A1 is 10mV. The low level output by the first operational amplifier A1 is divided by the gain of the circuit to obtain a voltage value of 5mV (that is, the current flowing through the first sampling resistor Ra is 5mA), and this voltage value can be approximated to the voltage of the second pin of the first operational amplifier A1.

[0076] When the voltage difference across the first sampling resistor Ra is less than 5mV (i.e., less than the low level output by the first operational amplifier A1 divided by the operational amplifier gain), the first operational amplifier A1 cannot be in a linear operating region, cannot form a "virtual short or virtual open" state, and the signal at the output end of the first operational amplifier A1 is in a locked state, i.e., maintained at 10mV, and has no linear relationship with the voltage difference at the input end.

[0077] When the voltage difference across the first sampling resistor Ra is greater than 5mV, the first operational amplifier A1 establishes negative feedback, so that the first operational amplifier A1 is in a linear working area, forming a "virtual short or virtual open" state, and the signal at the output end of the first operational amplifier A1 forms a linear relationship with the voltage difference at the input end.

[0078] In order to eliminate the blind zone of the DC current test circuit, an input voltage that makes the output greater than the blind zone voltage is superimposed on the input end of the first operational amplifier A1.

[0079] For example, when the output current of the SSPC is 0, the IM voltage value is obtained using the following function:

[0080] IM=3.3V / (5*10 3 Ω+10*10 4 Ω)*10*10 3 *2*10 3 ≈13mV;

[0081] And the processor inside the SSPC records the voltage value as U1 = IM.

[0082] When the output current is not 0, the superposition principle is used to analyze each input signal separately, and the remaining signals are 0.

[0083] When the SSPC output current is I, the IM voltage value is obtained using the following function:

[0084] IM=I*1mΩ / (5*10 6 mΩ+10*10 6 mΩ)*5*10 6 mΩ*2+U1;

[0085] The processor inside the SSPC reads the IM voltage and then reversely calculates the current value through the above function. When the output current value is 1A, IM is about 15mV.

[0086] In summary, no matter the output current is 0A or 1A, the output voltage of the DC current test circuit is higher than the output low level of the first operational amplifier A1, and the test current is linearly related to the output voltage of the test circuit.

[0087] Among them, in one embodiment of the present application, refer to Figure 4 The AC current test circuit includes a second sampling resistor Rb, a first transistor V1, a second transistor V2, a fifth resistor R5, a sixth resistor R6, a second operational amplifier A2, a second capacitor C2, a third capacitor C3, a third operational amplifier A3, a seventh resistor R7 and a diode V3; two ends of the second sampling resistor Rb are respectively connected to the fifth resistor R5 and the fourth pin of the second operational amplifier A2; the first transistor V1 and the second transistor V2 are respectively connected to two ends of the second sampling resistor Rb; one end of the fifth resistor R5 not connected to the second sampling resistor Rb is connected to the third pin of the second operational amplifier A2 and the third operational amplifier A 3; one end of the sixth resistor R6 is connected to the first pin of the second operational amplifier A2, and the other end is connected to the second capacitor C2; the end of the second capacitor C2 not connected to the sixth resistor R6 is grounded; one end of the third capacitor C3 is connected to the fifth pin of the second operational amplifier A2, and the other end is grounded; the fourth pin of the second operational amplifier A2 is grounded; one end of the seventh resistor R7 is connected to the third pin of the third operational amplifier A3, and the other end is connected to the fourth pin of the third operational amplifier A3; the input end of the diode V3 is connected to the first pin of the third operational amplifier A3, and the output end of the diode V3 is connected to the second pin of the third operational amplifier A3.

[0088] In one embodiment of the present application, the first transistor V1 and the second transistor V2 are used to provide a current path for the second sampling resistor Rb.

[0089] Among them, in one embodiment of the present application, the fifth resistor R5 is the input positive terminal resistor of the second operational amplifier A2, which is a matching resistor, so that the input impedance deviation of the second operational amplifier A2 is smaller, the voltage difference between the two input terminals of the second operational amplifier A2 is smaller, and the output terminal of the second operational amplifier A2 outputs a smaller voltage deviation.

[0090] In one embodiment of the present application, the sixth resistor R6 is an output current limiting resistor, which is used to increase the output impedance of the second operational amplifier A2.

[0091] In one embodiment of the present application, the second capacitor C2 is a filter capacitor at the output end of the second operational amplifier A2, used to reduce the signal ripple at the output end; the third capacitor C3 is a voltage stabilizing capacitor, used for filtering to reduce power supply ripple.

[0092] In one embodiment of the present application, the seventh resistor R7 is a voltage-dividing resistor, which is used to provide a small voltage signal and further provide an AC bias.

[0093] In one embodiment of the present application, the diode V3 and the third operational amplifier A3 form an inverting amplifier circuit, and when the input voltage of the third operational amplifier A3 is positive, N7A is in an open-loop comparison mode, thereby making the output level of the third operational amplifier A3 low.

[0094] Among them, in one embodiment of the present application, refer to Figure 4 The AC operational amplifier gain circuit includes an eighth resistor R8, a ninth resistor R9 and a fourth capacitor C4; one end of the eighth resistor R8 is respectively connected to the second sampling resistor Rb and the fifth resistor R5, and the other end is connected to the second pin of the second operational amplifier A2; the two ends of the ninth resistor R9 are respectively connected to the second pin and the first pin of the second operational amplifier A2; the fourth capacitor C4 is connected in parallel with the ninth resistor R9.

[0095] In one embodiment of the present application, the eighth resistor R8 is the input negative terminal resistor of the second operational amplifier A2, and the ninth resistor R9 is the feedback resistor. The eighth resistor R8 and the ninth resistor R9 are combined to form a gain circuit of the second operational amplifier A2; and by connecting the ninth resistor R9 to the input negative terminal and the output terminal of the second operational amplifier A2, negative feedback can be formed to limit the gain of the second operational amplifier A2, so that the second operational amplifier A2 is in a linear working area.

[0096] In one embodiment of the present application, the fourth capacitor C4 is a parallel capacitor of the feedback resistor, which is used for filtering to reduce the ripple of the output signal and reduce the influence of the input signal jitter.

[0097] Among them, in one embodiment of the present application, refer to Figure 4 The AC voltage compensation circuit includes a tenth resistor R10 and an eleventh resistor R11; one end of the tenth resistor R10 is connected to the second pin of the third operational amplifier A3, and the other end is connected to the fifth pin of the third operational amplifier A3; one end of the eleventh resistor R11 is connected to the third pin of the third operational amplifier A3, and the other end is respectively connected to the fifth pin of the third operational amplifier A3 and the tenth resistor R10.

[0098] In one embodiment of the present application, the tenth resistor R10 and the eleventh resistor R11 are voltage-dividing resistors for providing a small voltage signal and providing an AC bias.

[0099] The signal IVM is the sampling voltage of the second sampling resistor Rb, QGND is the internal reference ground line, and a negative feedback is formed between the negative input terminal and the output terminal of N7A through the diode V3 to form a reverse circuit.

[0100] When IVM is in the positive half cycle, that is, when it is positive, the output voltage at N7A of the third operational amplifier A3 should be negative. According to the principle of "virtual short and virtual open", the current direction is from the input end of the third operational amplifier A3 through the diode V3 to the output end of the third operational amplifier A3. Due to the unidirectional conductivity of the diode V3, it is in a cut-off state and cannot form feedback. It is finally in a switch comparison state, making the voltages on both sides of the input end of the third operational amplifier A3 unequal, making the voltage of the third pin of the second operational amplifier A2 and the voltage of the second pin of the third operational amplifier A3 equal to the input voltage IVM. At this time, the third operational amplifier A3 does not work, and only the second operational amplifier A2 is in a normal working state, which is a follower, and the IN voltage is equal to the IVM voltage.

[0101] When IVM is in the negative half cycle, that is, when it is negative, the output voltage of the third operational amplifier A3 should be negative. According to the principle of "virtual short and virtual open", the current direction is from the output of the third operational amplifier A3 through the diode V3 to the input terminal of the third operational amplifier A3. The diode V3 is in the on state, which can form feedback to make the voltages on both sides of the input terminal of the third operational amplifier A3 equal, that is, the voltage of the second pin of the third operational amplifier A3 is equal to the voltage of the third pin. At this time, the second operational amplifier A2 and the third operational amplifier A3 are both in normal working state; ideally, the voltage of the third pin of the third operational amplifier A3 is 0, and the feedback adjustment of the third operational amplifier A3 makes the voltage of the second pin also 0, and then the voltages of the second pin and the third pin of the second operational amplifier A2 are also 0. At this time, the second operational amplifier A2 constitutes an inverter, that is, the IN voltage is equal to the inverse of the IVM voltage.

[0102] Among them, the second operational amplifier A2 and the third operational amplifier A3 in this embodiment are of model AD8656, and the output has a rail-to-rail characteristic, that is, the output low level can be close to 0V, but there is still a gap with 0V in reality. According to its technical indicators, the output low level is 24mV, that is, the first pin voltage of the second operational amplifier A2 is at least 24mV, and it is impossible to output a voltage smaller than 24mV; when the input terminal voltage IVM value is less than 24mV, due to the characteristics of the operational amplifier itself, its output is consistently maintained at 24mV; when the input terminal voltage IVM is greater than 24mV, its output terminal begins to change according to the rule that the IN voltage is equal to the opposite number of the IVM voltage; if the second sampling resistor Rb is 1mΩ, then as long as the current is greater than 24mA (24mV divided by 1mΩ), it can be detected, resulting in the defect of large error in small current testing.

[0103] Among them, in order to eliminate the test blind spot of the AC current test circuit, an absolute value circuit is used in the AC current test circuit, and the tenth resistor R10 and the eleventh resistor R11 are added to the AC current test circuit. The input voltage is too high through the tenth resistor R10 and the eleventh resistor R11. The voltage VR of the 3.3V power supply after the tenth resistor R10, the eleventh resistor R11 and the seventh resistor R7 is 16.4mV. After adding these two resistors, when IVM is 0V, the voltage at the third pin of the second operational amplifier A2 is 16.4mV, and the output voltage IN after twice the same direction amplification is 32.8mV, which is higher than the low-level voltage 24mV output by the second operational amplifier A2, and then this voltage is set as the base (2VR).

[0104] When the IVM at the input end of the second operational amplifier A2 is a positive value in the positive half cycle, the voltage outputted by the output end of the third operational amplifier A3 is a negative voltage. Since the third operational amplifier A3 is powered by a single power supply and the diode V3 has unidirectional conductivity, the third operational amplifier A3 is in an open-loop mode and cannot form feedback. At this time, the second operational amplifier A2 is in normal operation in the circuit, and the circuit formed by the second operational amplifier A2 is an addition circuit.

[0105] When the voltage IVM at the input terminal of the second operational amplifier A2 is a negative value in the negative half cycle, the voltage outputted by the output terminal of the third operational amplifier A3 is a positive voltage, which can form feedback and is in a normal working state; when the third operational amplifier A3 is working normally, according to the principle of "virtual short and virtual open", the voltage of the second pin of the third operational amplifier A3 is consistent with the voltage of the third pin, thereby keeping the voltage of the third pin of the second operational amplifier A2 unchanged; when IVM acts alone, the second operational amplifier A2 forms an inverter, and the output voltage is -IVM. When IVM is 0, the third operational amplifier A3 is a common-phase amplifier circuit when the positive input terminal acts alone, and the gain is (R8+R9) / R8=2, and the output voltage is twice the input voltage difference.

[0106] When the input voltage IVM of the second operational amplifier A2 is in the positive half cycle, the output voltage IN of the second operational amplifier A2 is obtained using the following function:

[0107] U IN =(VR+V IVM )*2-V IVM =2VR+V IVM .

[0108] When the input voltage IVM of the second operational amplifier A2 is in the negative half cycle, the output voltage IN of the second operational amplifier A2 is obtained using the following function:

[0109] U IN =(VR-V IVM )*2+V IVM =2VR-V IVM .

[0110] In summary, no matter the input voltage IVM of the second operational amplifier A2 is in the positive half cycle or the negative half cycle, the output voltage IN of the second operational amplifier A2 can be expressed as U IN =|V IVM ∣+2VR.

[0111] The input voltage is raised by adding resistance compensation, so that when the voltage difference across the sampling resistor is 0, the operational amplifier can generate a voltage value VR through resistance voltage division to offset the low-level test blind area of ​​the operational amplifier output. This can ensure that when the input voltage IVM is 0V, the operational amplifier operates in the linear working area. As for the VR value, it can be recorded and subtracted by the processor to ensure the accuracy of the final reading.

[0112] The following is a simulation data table of the AC current test circuit in this embodiment, with specific reference to Table 2:

[0113] Table 2: Simulation data table

[0114]

[0115] According to Table 2, it can be concluded that the theoretical calculation of the circuit is consistent with the simulation data.

[0116] At the same time, the voltage VR can be adjusted according to the actual output low-level voltage VOL of the operational amplifier, and only 2*VR≥VOL is required. The adjusted voltage VR can be changed by adjusting the resistance values ​​of the tenth resistor R10 and the eleventh resistor R11.

[0117] The implementation principle of the embodiment of the present application is: by adding operational amplifier gain circuits to the DC current test circuit and the AC current test circuit respectively, the input voltage of the DC current test circuit and the AC current test circuit can be amplified, and by adding voltage compensation circuits to the DC current test circuit and the AC current test circuit, voltage compensation can be performed on the DC current test circuit and the AC current test circuit. Thus, the test blind area compensation of the absolute value circuit is achieved through minimal circuit changes, which solves the problem of failure to test or inaccurate testing of small signals in the circuit and improves the application scope of the circuit.

[0118] An embodiment of the present application discloses an intelligent detector, wherein the intelligent detector includes the detection circuit of the intelligent detector of the above embodiment.

[0119] An embodiment of the present application discloses a solid-state power controller, wherein the solid-state power controller includes the intelligent detector of the above embodiment.

[0120] The embodiments of this specific implementation are all preferred embodiments of the present application, and are not intended to limit the protection scope of the present application. The same components are represented by the same figure marks. Therefore, any equivalent changes made based on the structure, shape, and principle of the present application should be included in the protection scope of the present application.

Claims

1. A detection circuit of an intelligent detector, characterized in that: It includes a current testing circuit for testing the current of a sampling resistor, an operational amplifier gain circuit for amplifying the input voltage of the current testing circuit, and a voltage compensation circuit for performing voltage compensation on the current testing circuit, and the operational amplifier gain circuit and the voltage compensation circuit are both coupled to the current testing circuit; The current test circuit includes a DC current test circuit and an AC current test circuit, the operational amplifier gain circuit includes a DC operational amplifier gain circuit and an AC operational amplifier gain circuit, and the voltage compensation circuit includes a DC voltage compensation circuit and an AC voltage compensation circuit; The AC current test circuit includes a second sampling resistor Rb, a first transistor V1, a second transistor V2, a fifth resistor R5, a sixth resistor R6, a second operational amplifier A2, a second capacitor C2, a third capacitor C3, a third operational amplifier A3, a seventh resistor R7 and a diode V3, and the second operational amplifier A2 and the third operational amplifier A3 are AD8656; Two ends of the second sampling resistor Rb are respectively connected to the fifth resistor R5 and the fourth pin of the second operational amplifier A2; The first transistor V1 and the second transistor V2 are respectively connected to two ends of the second sampling resistor Rb; One end of the fifth resistor R5 that is not connected to the second sampling resistor Rb is connected to the third pin of the second operational amplifier A2 and the second pin of the third operational amplifier A3; One end of the sixth resistor R6 is connected to the first pin of the second operational amplifier A2, and the other end is connected to the second capacitor C2; One end of the second capacitor C2 that is not connected to the sixth resistor R6 is grounded; One end of the third capacitor C3 is connected to the fifth pin of the second operational amplifier A2, and the other end is grounded; The fourth pin of the second operational amplifier A2 is grounded; One end of the seventh resistor R7 is connected to the third pin of the third operational amplifier A3, and the other end is connected to the fourth pin of the third operational amplifier A3; An input end of the diode V3 is connected to a first pin of the third operational amplifier A3, and an output end of the diode V3 is connected to a second pin of the third operational amplifier A3.

2. The detection circuit of the intelligent detector according to claim 1, characterized in that: The DC current test circuit includes a first sampling resistor Ra, a first resistor R1 and a first operational amplifier A1, and the model of the first operational amplifier A1 is OPA2350; Two ends of the first sampling resistor Ra are respectively connected to the first resistor R1 and the fourth pin of the first operational amplifier A1; One end of the first resistor R1 that is not connected to the first sampling resistor Ra is connected to the third pin of the first operational amplifier A1; The fifth pin of the first operational amplifier A1 is connected to a power supply, the first pin of the first operational amplifier A1 is connected to a low level output terminal, and the fourth pin of the first operational amplifier A1 is grounded.

3. The detection circuit of the intelligent detector according to claim 2, characterized in that: The DC operational amplifier gain circuit includes a second resistor R2, a third resistor R3 and a first capacitor C1; One end of the second resistor R2 is grounded, and the other end is connected to the second pin of the first operational amplifier A1; Two ends of the third resistor R3 are respectively connected to the second pin and the first pin of the first operational amplifier A1; The first capacitor C1 is connected in parallel with the third resistor R3.

4. The detection circuit of the intelligent detector according to claim 3, characterized in that: The DC voltage compensation circuit includes a fourth resistor R4, and the fourth resistor R4 is connected in parallel with the first resistor R1.

5. The detection circuit of the intelligent detector according to claim 1, characterized in that: The AC operational amplifier gain circuit includes an eighth resistor R8, a ninth resistor R9 and a fourth capacitor C4; One end of the eighth resistor R8 is connected to the second sampling resistor Rb and the fifth resistor R5 respectively, and the other end is connected to the second pin of the second operational amplifier A2; Two ends of the ninth resistor R9 are respectively connected to the second pin and the first pin of the second operational amplifier A2; The fourth capacitor C4 is connected in parallel with the ninth resistor R9.

6. The detection circuit of the intelligent detector according to claim 5, characterized in that: The AC voltage compensation circuit includes a tenth resistor R10 and an eleventh resistor R11; One end of the tenth resistor R10 is connected to the second pin of the third operational amplifier A3, and the other end is connected to the fifth pin of the third operational amplifier A3; One end of the eleventh resistor R11 is connected to the third pin of the third operational amplifier A3 , and the other end of the eleventh resistor R11 is respectively connected to the fifth pin of the third operational amplifier A3 and the tenth resistor R10 .

7. An intelligent detector, characterized in that: A detection circuit comprising the smart detector according to any one of claims 1-6.

8. A solid-state power controller, characterized in that: Comprising the smart detector as claimed in claim 7.

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