Low parasitic amplitude modulation differential bridge t-phase shifter

Abstract

This invention belongs to the field of microwave communication, specifically disclosing a low-parasitic amplitude modulation differential bridge T-type phase shifter. The ground terminals of the differential positive branch phase shifter circuit and the differential negative branch phase shifter circuit are connected to form a differential virtual ground. A first input port is connected to the input terminal of the differential positive branch phase shifter circuit via a matching circuit, and a second input port is connected to the input terminal of the differential negative branch phase shifter circuit via a matching circuit. The output terminal of the differential positive branch phase shifter circuit is connected to the first output port, and the output terminal of the differential negative branch phase shifter circuit is connected to the second output port. A first insertion loss adjustment circuit is connected in parallel between the matching circuit and the phase shifter circuit, and a second insertion loss adjustment circuit is connected in parallel between the phase shifter circuit and the signal output port. This invention reduces the difference in insertion loss between the bridge T-type phase shifter in the reference state and the phase shifter state, thus reducing parasitic amplitude modulation. This invention is applicable to phase control in phased array radar antenna elements.

Description

Technical Field

[0001] This invention belongs to the field of microwave communication, specifically a low-parasitic amplitude modulation differential bridge T-type phase shifter. Background Technology

[0002] Phase shifters are indispensable components in modern wireless communication systems and are widely used in phased array radars to provide appropriate phase shifts. A phased array radar is a type of radar that changes the phase of the radar wave to alter the beam direction, thereby electronically scanning and monitoring target areas. A phased array antenna can accommodate hundreds or thousands of antenna elements, each containing a phase shifter circuit that controls the phase difference between each antenna in the array, thus adjusting the radar beam.

[0003] Commonly used phase shifter structures in phased array radar antenna elements include: high-pass / low-pass phase shifters, reflective phase shifters, and bridge-T phase shifters. Bridge-T phase shifters utilize switches for state switching. In the reference state, they can be equivalent to a bandpass network, and in the phase-shifting state, they are equivalent to a T-type low-pass network, generating a lag phase to achieve a specific phase shift. Bridge-T phase shifters are suitable for controlling small to medium phases. However, they have a significant drawback: the insertion loss in the reference state differs considerably from that in the phase-shifting state. Specifically, the insertion loss in the reference state is greater than that in the phase-shifting state. This results in additional, larger parasitic amplitude modulation (ACM) while achieving signal phase shifting, i.e., the difference in insertion loss between the reference and phase-shifting states. Parasitic amplitude modulation of phase shifters increases radar wave sidelobe energy. Excessive radar wave sidelobe energy has two main effects: (1) it causes false targets to appear during radar reception; (2) during radar transmission, it causes the main lobe energy to be insufficiently concentrated, resulting in the transmission of radar waves in ineffective directions; which seriously affects the combat performance of phased array radar. How to compensate for the difference in insertion loss between the bridge T-type phase shifter in the reference state and the phase-shifted state and reduce parasitic amplitude modulation has always been a research hotspot. Summary of the Invention

[0004] The purpose of this invention is to provide a low-parasitic amplitude modulation differential bridge T-type phase shifter to reduce the difference in insertion loss between the bridge T-type phase shifter in the reference state and the phase-shifted state, thereby reducing parasitic amplitude modulation.

[0005] To achieve the above objectives, the present invention employs the following technical methods:

[0006] A low-parasitic amplitude modulation differential bridge T-type phase shifter includes a signal input port, a matching circuit, a first insertion loss adjustment circuit, a phase shifting circuit, a second insertion loss adjustment circuit, and a signal output port. The signal input port includes a first input port and a second input port. The signal output port includes a first output port and a second output port. The phase shifting circuit includes a differential positive branch phase shifting circuit and a differential negative branch phase shifting circuit. The ground terminals of the differential positive branch phase shifting circuit and the differential negative branch phase shifting circuit are connected to form a differential virtual ground. The first input port is connected to the input terminal of the differential positive branch phase shifting circuit through the matching circuit, and the second input port is connected to the input terminal of the differential negative branch phase shifting circuit through the matching circuit. The output terminal of the differential positive branch phase shifting circuit is connected to the first output port, and the output terminal of the differential negative branch phase shifting circuit is connected to the second output port. The first insertion loss adjustment circuit is connected in parallel between the matching circuit and the phase shifting circuit, and the second insertion loss adjustment circuit is connected in parallel between the phase shifting circuit and the signal output port.

[0007] As a limitation: the differential positive branch phase shift circuit includes the MOSFET NM P1 MOSFET NM P2 Microstrip lines ML P1 Microstrip lines ML P2 Capacitor C P1 and inductor L P1 The differential negative branch phase-shifting circuit includes a MOSFET NM N1 MOSFET NM N2 Microstrip lines ML N1 Microstrip lines ML N2 Capacitor C N1 and inductor L N1 The differential positive branch phase shift circuit and the differential negative branch phase shift circuit share the same MOSFET NM. T ; MOS transistor NM P1 The gate of the MOSFET NM is used as the third control terminal. P1 The source terminals are respectively connected to the output terminals of the matching circuit, the output terminals of the first insertion loss adjustment circuit, and the microstrip line ML. P1 One end is connected to the MOSFET NM P1 The drain of each electrode is connected to the input terminal of the second insertion loss adjustment circuit and the microstrip line ML, respectively. P2 One end is connected to the first output port; MOSFET NM P2 The gate of the MOSFET NM is used as the fourth control terminal. P2 The drains are respectively connected to the microstrip line ML P1 The other end, microstrip line ML P2 The other end and capacitor C P1 One end is connected to the MOSFET NM P2 The source of the MOSFET is respectively connected to the NM T Drain and inductance LP1 One end is connected to the inductor L P1 The other end is connected to the inductor L N1 One end is connected to the inductor L N1 The other end is connected to the MOSFET NM T The source and MOSFET NM N2 The source connection of the MOSFET NM T The gate of the MOSFET NM is used as the fifth control terminal. N2 The gate of the MOSFET is used as the sixth control terminal; MOSFET NM N1 The source terminals are respectively connected to the output terminals of the matching circuit, the output terminals of the first insertion loss adjustment circuit, and the microstrip line ML. N1 One end is connected to the MOSFET NM N1 The gate is used as the seventh control terminal; microstrip line ML N1 The other end is connected to capacitor C. N1 One end, microstrip line ML N2 One end and the MOSFET NM N2 The drain connection, capacitor C N1 The other end is connected to capacitor C P1 The other end is connected to the microstrip line ML N2 The other end is connected to the MOSFET NM N1 The drain of the capacitor is connected to the input terminal of the second insertion loss adjustment circuit and the second output port; capacitor C N1 and capacitor C P1 The common terminal is connected through resistor R ref Grounding, inductance L P1 and inductor L N1 The common terminal is connected through resistor R ref Grounding.

[0008] As a limitation: the first insertion loss adjustment circuit includes a MOSFET NM C1 Adjusting resistor R P1 and adjusting resistor R N1 The output of the matching circuit and the input of the differential positive branch phase shift circuit are both connected to the adjustment resistor R. P1 Connect one end to the resistor R and adjust it. P1 The other end is connected to the MOSFET NM C1 The drain connection, the output of the matching circuit, and the input of the differential negative branch phase shift circuit are all connected to the adjusting resistor R. N1 Connect one end to the resistor R and adjust it. N1 The other end is connected to the MOSFET NM C1 The source connection of the MOSFET NM C1 The gate of the transistor serves as the first control terminal; the second insertion loss adjustment circuit includes a MOSFET NM. C2 Adjusting resistor R P2 and adjusting resistor RN2 The output terminal of the differential positive branch phase shift circuit and the adjustment resistor R P2 One end of each is connected to a capacitor C P3 Connect to the first output port and adjust resistor R. P2 The other end is connected to the MOSFET NM C2 The drain connection, the output terminal of the differential negative branch phase shift circuit, and the adjustment resistor R N2 One end of each is connected to a capacitor C N3 Connect to the second output port and adjust resistor R. N2 The other end is connected to the MOSFET NM C2 The source connection of the MOSFET NM C2 The gate is used as the second control terminal; adjust the resistor R. N1 The common terminal of the matching circuit and the differential negative branch phase shifting circuit is connected through resistor R. ref Grounding, adjust resistor R P1 The common terminal of the matching circuit and the differential positive branch phase shifting circuit is connected through resistor R. ref Grounding, adjust resistor R N2 Differential negative branch phase shifting circuit and capacitor C N3 The common terminal is connected through resistor R ref Grounding, adjust resistor R P2 Differential positive branch phase shifting circuit and capacitor C P3 The common terminal is connected through resistor R ref Grounding.

[0009] As a limitation: the matching circuit includes the microstrip line ML P3 Microstrip lines ML N3 Capacitor C P2 and capacitor C N2 The first input port is connected to the microstrip line ML. P3 One end is connected to the microstrip line ML P3 The other end is connected to capacitor C. P2 One end of the capacitor is connected to the input of the first insertion loss adjustment circuit and the input of the differential positive branch phase shift circuit. P2 The other end is connected to capacitor C N2 One end is connected to capacitor C N2 The other end is connected to the microstrip line ML. N3 One end of the microstrip line ML is connected to the input of the first insertion loss adjustment circuit and the input of the differential negative branch phase shifting circuit. N3 The other end is connected to the second input port.

[0010] The beneficial effects achieved by this invention, due to the adoption of the above-described solution, compared with the prior art, are as follows:

[0011] This invention provides a low-parasitic amplitude modulation differential bridge T-type phase shifter. The phase shifting circuit includes a differential positive branch phase shifting circuit and a differential negative branch phase shifting circuit. Both the differential positive branch phase shifting circuit and the differential negative branch phase shifting circuit are bridge T-type phase shifting circuit structures. The ground terminals of the differential positive branch phase shifting circuit and the differential negative branch phase shifting circuit are connected to form a differential virtual ground, avoiding the introduction of grounding holes in the layout and saving the layout area of ​​the bridge T-type phase shifter. By setting a first insertion loss adjustment circuit and a second insertion loss adjustment circuit, the difference in insertion loss between the phase shifter and the reference state and the phase shifting state is effectively reduced, thereby effectively reducing the parasitic amplitude modulation of the phase shifter, thereby reducing the sidelobe energy of the radar wave signal and improving the performance of the phased array radar.

[0012] This invention is applicable to phase control in phased array radar antenna elements. Attached Figure Description

[0013] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0014] Figure 1 This is a schematic block diagram of a low-parasitic amplitude modulation differential bridge T-type phase shifter according to an embodiment of the present invention;

[0015] Figure 2 This is a circuit diagram of a low-parasitic amplitude modulation differential bridge T-type phase shifter according to an embodiment of the present invention;

[0016] Figure 3 This is an equivalent circuit diagram of the reference state of a low-parasitic amplitude modulation differential bridge T-type phase shifter according to an embodiment of the present invention;

[0017] Figure 4 This is an equivalent circuit diagram of a low parasitic amplitude modulation differential bridge T-type phase shifter reference state first insertion loss adjustment circuit according to an embodiment of the present invention;

[0018] Figure 5 This is an equivalent circuit diagram of the phase-shifted state of a low-parasitic amplitude modulation differential bridge T-type phase shifter according to an embodiment of the present invention;

[0019] Figure 6 This is an equivalent circuit diagram of a low parasitic amplitude modulation differential bridge T-type phase shifter phase-shifting state first insertion loss adjustment circuit according to an embodiment of the present invention;

[0020] Figure 7 The simulation curves show a comparison of parasitic amplitude modulation between the 45° phase shifter of this embodiment and a conventional 45° phase shifter.

[0021] In the diagram: 1. First input port; 2. Second input port; 3. Matching circuit; 4. First insertion loss adjustment circuit; 5. Differential positive branch phase shifting circuit; 6. Differential negative branch phase shifting circuit; 7. Second insertion loss adjustment circuit; 8. First output port; 9. Second output port. Detailed Implementation

[0022] The present invention will be further described below with reference to the embodiments. However, those skilled in the art should understand that the present invention is not limited to the following embodiments. Any improvements and equivalent changes made based on the specific embodiments of the present invention are within the scope of protection of the claims of the present invention.

[0023] Example 1: A low-parasitic amplitude modulation differential bridge T-type phase shifter

[0024] A low-parasitic amplitude modulation differential bridge T-type phase shifter, the principle block diagram of which is as follows: Figure 1 As shown, the circuit includes a signal input port, a matching circuit 3, a first insertion loss adjustment circuit 4, a phase shifting circuit, a second insertion loss adjustment circuit 7, and a signal output port. The signal input port includes a first input port 1 and a second input port 2. The signal output port includes a first output port 8 and a second output port 9. The phase shifting circuit includes a differential positive branch phase shifting circuit 5 and a differential negative branch phase shifting circuit 6. The ground terminal of the differential positive branch phase shifting circuit 5 and the ground terminal of the differential negative branch phase shifting circuit 6 are connected to form a differential virtual ground. The first input port 1 is connected to the input terminal of the differential positive branch phase shifting circuit 5 through the matching circuit 3. The second input port 2 is connected to the input terminal of the differential negative branch phase shifting circuit 6 through the matching circuit 3. The output terminal of the differential positive branch phase shifting circuit 5 is connected to the first output port 8. The output terminal of the differential negative branch phase shifting circuit 6 is connected to the second output port 9. The first insertion loss adjustment circuit 4 is connected in parallel between the matching circuit 3 and the phase shifting circuit. The second insertion loss adjustment circuit 7 is connected in parallel between the phase shifting circuit and the signal output port.

[0025] The low parasitic amplitude modulation differential bridge T-type phase shifter of this embodiment has the following specific circuit schematic diagram: Figure 2 As shown, the matching circuit 3 includes a microstrip line ML. P3 Microstrip lines ML N3 Capacitor C P2 and capacitor C N2 The first insertion loss adjustment circuit 4 includes a MOSFET NM C1 Adjusting resistor R P1 and adjusting resistor R N1 The differential positive branch phase shift circuit 5 includes a MOSFET NM P1 MOSFET NM P2 Microstrip lines ML P1 Microstrip lines ML P2 Capacitor C P1 and inductor L P1 The differential negative branch phase shift circuit 6 includes a MOSFET NM N1 MOSFET NM N2 Microstrip lines ML N1 Microstrip lines MLN2 Capacitor C N1 and inductor L N1 The differential positive branch phase shift circuit 5 and the differential negative branch phase shift circuit 6 share the MOSFET NM. T The second insertion loss adjustment circuit 7 includes a MOSFET NM C2 Adjusting resistor R P2 and adjusting resistor R N2 ; First input port 1 and microstrip line ML P3 One end is connected to the microstrip line ML P3 The other end is connected to capacitor C. P2 One end, adjusting resistor R P1 One end, microstrip line ML P1 One end and the MOSFET NM P1 The source connection, capacitor C P2 The other end is connected to capacitor C N2 One end is connected to capacitor C N2 The other end is connected to the microstrip line ML. N3 One end, adjusting resistor R N1 One end, microstrip line ML N1 One end and the MOSFET NM N1 The source connection, microstrip line ML N3 The other end is connected to the second input port 2, and the resistor R is adjusted. P1 The other end is connected to the MOSFET NM C1 Drain connection, adjust resistor R N1 The other end is connected to the MOSFET NM C1 The source connection of the MOSFET NM C1 The gate of the MOSFET is used as the first control terminal; the NM MOSFET is used as the first control terminal. P1 The gate of the MOSFET NM is used as the third control terminal. P1 The drains are respectively connected to the microstrip line ML P2 One end, adjusting resistor R P2 one end and capacitor C P3 One end is connected to the microstrip line ML P1 The other end is connected to the microstrip line ML. P2 The other end, MOSFET NM P2 The drain and capacitor C P1 One end is connected to the MOSFET NM P2 The gate of the MOSFET NM is used as the fourth control terminal. P2 The source of the MOSFET is respectively connected to the NM T Drain and inductance L P1 One end is connected to the inductor L P1 The other end is connected to the inductor L N1 One end is connected to the inductor L N1The other end is connected to the MOSFET NM T The source and MOSFET NM N2 The source connection of the MOSFET NM T The gate of the MOSFET NM is used as the fifth control terminal. N2 The gate of the MOSFET NM is used as the sixth control terminal. N2 The drains are respectively connected to the microstrip line ML N1 The other end, microstrip line ML N2 one end and capacitor C N1 One end is connected to capacitor C N1 The other end is connected to capacitor C P1 The other end is connected to the microstrip line ML N2 The other end is connected to the MOSFET NM N1 Drain, adjusting resistor R N2 one end and capacitor C N3 One end is connected to the MOSFET NM N1 The gate is used as the seventh control terminal; adjust the resistor R. P2 The other end is connected to the MOSFET NM C2 Drain connection, adjust resistor R N2 The other end is connected to the MOSFET NM C2 The source connection of the MOSFET NM C2 The gate is used as the second control terminal, and the capacitor C P3 The other end is connected to the first output port 8, capacitor C N3 The other end is connected to the second output port 9. Adjust resistor R. P1 Microstrip lines ML P3 Capacitor C P2 Microstrip lines ML P1 and MOSFET NM P1 The common terminal of the source is connected to resistor R. ref Grounding, adjust resistor R N1 Microstrip lines ML N3 Capacitor C N2 Microstrip lines ML N1 and MOSFET NM N1 The common terminal of the source is connected to resistor R. ref Grounding, adjust resistor R P2 Microstrip lines ML P2 Capacitor C P3 and MOSFET NM P1 The common terminal of the drain is connected to resistor R. ref Grounding, adjust resistor R N2 Microstrip lines ML N2 Capacitor C N3 and MOSFET NM N1 The common terminal of the drain is connected to resistor R. refGrounding, capacitor C N1 and capacitor C P1 The common terminal is connected through resistor R ref Grounding, inductance L P1 and inductor L N1 The common terminal is connected through resistor R ref Grounding.

[0026] MOSFET NM C1 Gate of MOSFET NM C2 Gate and MOSFET NM T The gate receives the control signal vc, and the MOS transistor NM P1 Gate of MOSFET NM P2 Gate of MOSFET NM N2 Gate and MOSFET NM N1 The gate receives the control signal vcn. The control signals vc and vcn determine the operating state of the phase shifter in this embodiment. When the control signal vc is low, the control signal vcn is high, and the phase shifter in this embodiment operates in the reference state; when the control signal vc is high, the control signal vcn is low, and the phase shifter in this embodiment operates in the phase-shifting state.

[0027] When the phase shifter in this embodiment operates in the reference state, the equivalent circuit diagram in the reference state is as follows: Figure 3 As shown, the MOS transistor NM in the phase-shifting circuit P1 MOSFET NM P2 MOSFET NM N1 MOSFET NM N2 The conduction is represented by the on-resistance Ron1, on-resistance Ron2, on-resistance Ron3, and on-resistance Ron4, respectively, for the MOSFET NM. T When turned off, this is manifested by the turn-off capacitor Coff1, at which point the phase shifter exhibits bandpass network characteristics. The MOS transistor NM in the first insertion loss adjustment circuit 4... C1 Turn-off is manifested as the turn-off capacitor Coff2, and a differential virtual ground is generated at the center of the turn-off capacitor Coff2. Adjusting resistor R P1 Adjusting resistor R N1 Each of these is equivalent to a series path to ground, as shown by the turn-off capacitor Coff2. Figure 4 As shown, the series capacitor is 2Coff2, and the adjusting resistor R P1 The series impedance with the turn-off capacitor Coff2 is s represents the frequency, and the adjusting resistor R N1 Series impedance with turn-off capacitor Coff2 Because the capacitance of the turn-off capacitor Coff2 is very small, the series impedance is... and The amplitude of the first insertion loss adjustment circuit 4 is very large, so it has almost no effect on the amplitude of the reference state, that is, the first insertion loss adjustment circuit 4 has no effect on the insertion loss of the reference state; the second insertion loss adjustment circuit 7 is the same as the first insertion loss adjustment circuit 4, and will not be described again here.

[0028] When the phase shifter in this embodiment operates in phase-shifting mode, the equivalent circuit diagram in phase-shifting mode is as follows: Figure 5 As shown, the MOS transistor NM in the phase-shifting circuit P1 MOSFET NM P2 MOSFET NM N1 MOSFET NM N2 The shutdown is manifested by shutdown capacitors Coff3, Coff4, Coff5, and Coff6, respectively, and the MOSFET NM T When the circuit is turned on, the on-resistance is Ron5, and the phase shifter exhibits low-pass network characteristics. The MOSFET NM in the first insertion loss adjustment circuit 4... C1 When the circuit is turned on, the on-resistance is Ron6, and a differential virtual ground is generated at the center of the impedance. Adjusting the resistor R... P1 Adjusting resistor R N1 Each of these is equivalent to a series path to ground, with the on-resistance Ron6 as the equivalent of the following: Figure 6 As shown, the series resistor is 0.5Ron6, and the adjusting resistor R P1 The series impedance with the on-resistance Ron6 is R P1 +0.5Ron6, since the on-resistance Ron6 is very small, the series impedance is approximately R. P1 Adjust resistor R N1 The series impedance with the on-resistance Ron6 is R N1 +0.5Ron6, since the on-resistance Ron6 is very small, the series impedance is approximately R. N1 That is, in the phase-shifted state, the first insertion loss adjustment circuit 4 is equivalent to a parallel resistor branch to ground in the phase shifter network. This branch will increase the insertion loss in the phase-shifted state, and the adjustment resistor R... P1 and adjusting resistor R N1 The resistance value determines the degree of adjustment of the phase-shifted insertion loss. This is achieved by controlling the adjustment resistor R in the first insertion loss adjustment circuit 4. P1 and adjusting resistor R N1 The resistance value can adjust the magnitude of the insertion loss in the phase-shifting state, thereby improving the difference in insertion loss between the reference state and the phase-shifting state, and reducing the parasitic amplitude modulation of the phase shifter; the second insertion loss adjustment circuit 7 is similar to the first insertion loss adjustment circuit 4, and will not be described in detail here.

[0029] Figure 7The simulation curves comparing the parasitic amplitude modulation of the 45° phase shifter in this embodiment and the traditional 45° phase shifter are shown. The simulation frequency is 14-18GHz. The solid line represents the phase shift degree, the dotted line represents the parasitic amplitude modulation simulation curve of the traditional 45° phase shifter, and the dashed line represents the parasitic amplitude modulation simulation curve of the 45° phase shifter in this embodiment. It can be seen that within the operating bandwidth, the parasitic amplitude modulation of the phase shifter in this embodiment is reduced by about 0.2dB compared with the parasitic amplitude modulation of the traditional phase shifter, which effectively reduces the parasitic amplitude modulation of the phase shifter.

Claims

1. A low-parasitic amplitude modulation differential bridge T-type phase shifter, characterized in that, It includes a signal input port, a matching circuit, a first insertion loss adjustment circuit, a phase shifting circuit, a second insertion loss adjustment circuit, and a signal output port; the signal input port includes a first input port and a second input port; the signal output port includes a first output port and a second output port; the phase shifting circuit includes a differential positive branch phase shifting circuit and a differential negative branch phase shifting circuit, and the ground terminal of the differential positive branch phase shifting circuit and the ground terminal of the differential negative branch phase shifting circuit are connected to form a differential virtual ground; The first input port is connected to the input terminal of the differential positive branch phase shift circuit through a matching circuit, the second input port is connected to the input terminal of the differential negative branch phase shift circuit through a matching circuit, the output terminal of the differential positive branch phase shift circuit is connected to the first output port, the output terminal of the differential negative branch phase shift circuit is connected to the second output port, the first insertion loss adjustment circuit is connected in parallel between the matching circuit and the phase shift circuit, and the second insertion loss adjustment circuit is connected in parallel between the phase shift circuit and the signal output port. The first insertion loss adjustment circuit includes a MOSFET NM C1 Adjusting resistor R P1 and adjusting resistor R N1 The output of the matching circuit and the input of the differential positive branch phase shift circuit are both connected to the adjustment resistor R. P1 Connect one end to the resistor R and adjust it. P1 The other end is connected to the MOSFET NM C1 The drain connection, the output of the matching circuit, and the input of the differential negative branch phase shift circuit are all connected to the adjusting resistor R. N1 Connect one end to the resistor R and adjust it. N1 The other end is connected to the MOSFET NM C1 The source connection of the MOSFET NM C1 The gate of the transistor serves as the first control terminal; the second insertion loss adjustment circuit includes a MOSFET NM. C2 Adjusting resistor R P2 and adjusting resistor R N2 The output terminal of the differential positive branch phase shift circuit and the adjustment resistor R P2 One end of each is connected to a capacitor C P3 Connect to the first output port and adjust resistor R. P2 The other end is connected to the MOSFET NM C2 The drain connection, the output terminal of the differential negative branch phase shift circuit, and the adjustment resistor R N2 One end of each is connected to a capacitor C N3 Connect to the second output port and adjust resistor R. N2 The other end is connected to the MOSFET NM C2 The source connection of the MOSFET NM C2 The gate is used as the second control terminal; adjust the resistor R. N1 The common terminal of the matching circuit and the differential negative branch phase shifting circuit is connected through resistor R. ref Grounding, adjust resistor R P1 The common terminal of the matching circuit and the differential positive branch phase shifting circuit is connected through resistor R. ref Grounding, adjust resistor R N2 Differential negative branch phase shifting circuit and capacitor C N3 The common terminal is connected through resistor R ref Grounding, adjust resistor R P2 Differential positive branch phase shifting circuit and capacitor C P3 The common terminal is connected through resistor R ref Grounding.

2. The low-parasitic amplitude modulation differential bridge T-type phase shifter according to claim 1, characterized in that, The differential positive branch phase shift circuit includes MOSFET NM P1 MOSFET NM P2 Microstrip lines ML P1 Microstrip lines ML P2 Capacitor C P1 and inductor L P1 The differential negative branch phase-shifting circuit includes a MOSFET NM N1 MOSFET NM N2 Microstrip lines ML N1 Microstrip lines ML N2 Capacitor C N1 and inductor L N1 The differential positive branch phase shift circuit and the differential negative branch phase shift circuit share the same MOSFET NM. T ; MOS transistor NM P1 The gate of the MOSFET NM is used as the third control terminal. P1 The source terminals are respectively connected to the output terminals of the matching circuit, the output terminals of the first insertion loss adjustment circuit, and the microstrip line ML. P1 One end is connected to the MOSFET NM P1 The drain of each electrode is connected to the input terminal of the second insertion loss adjustment circuit and the microstrip line ML, respectively. P2 One end is connected to the first output port; MOSFET NM P2 The gate of the MOSFET NM is used as the fourth control terminal. P2 The drains are respectively connected to the microstrip line ML P1 The other end, microstrip line ML P2 The other end and capacitor C P1 One end is connected to the MOSFET NM P2 The source of the MOSFET is respectively connected to the NM T Drain and inductance L P1 One end is connected to the inductor L P1 The other end is connected to the inductor L N1 One end is connected to the inductor L N1 The other end is connected to the MOSFET NM T The source and MOSFET NM N2 The source connection of the MOSFET NM T The gate of the MOSFET NM is used as the fifth control terminal. N2 The gate of the MOSFET is used as the sixth control terminal; MOSFET NM N1 The source terminals are respectively connected to the output terminals of the matching circuit, the output terminals of the first insertion loss adjustment circuit, and the microstrip line ML. N1 One end is connected to the MOSFET NM N1 The gate is used as the seventh control terminal; microstrip line ML N1 The other end is connected to capacitor C. N1 One end, microstrip line ML N2 One end and the MOSFET NM N2 The drain connection, capacitor C N1 The other end is connected to capacitor C P1 The other end is connected to the microstrip line ML N2 The other end is connected to the MOSFET NM N1 The drain of the capacitor is connected to the input terminal of the second insertion loss adjustment circuit and the second output port; capacitor C N1 and capacitor C P1 The common terminal is connected through resistor R ref Grounding, inductance L P1 and inductor L N1 The common terminal is connected through resistor R ref Grounding.

3. The low-parasitic amplitude modulation differential bridge T-type phase shifter according to claim 1, characterized in that, The matching circuit includes microstrip line ML P3 Microstrip lines ML N3 Capacitor C P2 and capacitor C N2 The first input port is connected to the microstrip line ML. P3 One end is connected to the microstrip line ML P3 The other end is connected to capacitor C. P2 One end of the capacitor is connected to the input of the first insertion loss adjustment circuit and the input of the differential positive branch phase shift circuit. P2 The other end is connected to capacitor C N2 One end is connected to capacitor C N2 The other end is connected to the microstrip line ML. N3 One end of the microstrip line ML is connected to the input of the first insertion loss adjustment circuit and the input of the differential negative branch phase shifting circuit. N3 The other end is connected to the second input port.

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