Data transmission method and solid state disk system

Abstract

The application relates to the technical field of computer storage, and discloses a data transmission method and a solid state disk system, if the messages in an io message queue are read messages, an interface module acquires all the read messages in the io message queue, carries out format conversion on the read messages, stores the format-converted read messages into a buffer area, and sends a first message to an io acceleration module; in response to the first message, the io acceleration module reads the read messages in the buffer area, acquires corresponding to-be-read data corresponding to each read message from a storage module according to the read messages, stores each to-be-read data into the buffer area, respectively configures descriptors corresponding to each read message according to the storage positions of each to-be-read data in the buffer area, and sends the descriptors to a direct memory access module; the direct memory access module acquires the to-be-read data from the buffer area according to each descriptor, and transmits the to-be-read data to a host computer. The application simplifies the communication process among modules in the solid state disk system, and improves the operation efficiency of the solid state disk system.

Description

Technical Field

[0001] This invention relates to the field of computer storage technology, specifically to a data transmission method and a solid-state drive system. Background Technology

[0002] Solid-state drives (SSDs), as a new type of storage technology, use flash memory chips as the storage medium, offering faster data transfer speeds, lower latency, and higher reliability, making them a significant innovation in the storage field. To fully unleash the performance potential of SSDs, the NVMe protocol was developed. NVMe leverages the high bandwidth and low latency of the PCI Express (PCIe) interface to provide even higher data transfer speeds and faster access times. The NVMe protocol also supports parallel operations and multi-queue features, improving the throughput and concurrency performance of SSDs.

[0003] However, during NVMe SSD usage, the amount of communication data between the host and the NVMe SSD is large, and the communication is frequent. Since the NVMe SSD contains multiple functional modules, each communication between the host and the NVMe SSD requires repeated message passing between these modules before the task issued by the host can be executed. Therefore, although NVMe SSDs support multi-queue message communication, completing each message takes a considerable amount of time, and the task processing speed of the NVMe SSD is still limited by the performance of the NVMe SSD controller. Summary of the Invention

[0004] In view of this, the present invention provides a data transmission method and a solid-state drive system to solve the problem that existing solid-state drive systems take a long time to process read and write messages.

[0005] In a first aspect, the present invention provides a data transmission method applied to a solid-state drive (SSD) system. The SSD system adopts the Non-Volatile Memory Host Controller Interface (NMIC) specification. The SSD system includes an interface module, an I / O acceleration module, a buffer, a direct memory access (DMI) module, a storage module, and an I / O message queue storage module. The I / O message queue storage module stores an I / O message queue. Messages in the I / O message queue are written by the host. If a message in the I / O message queue is a read message, the interface module retrieves all read messages from the I / O message queue, performs format conversion on the read messages, stores the converted read messages in the buffer, and sends a first message to the I / O acceleration module. In response to the first message, the I / O acceleration module reads the read messages from the buffer, retrieves the data to be read corresponding to each read message from the storage module, stores each data to be read in the buffer, configures a descriptor corresponding to each read message according to the storage location of each data to be read in the buffer, and sends the descriptor to the DMI module. The DMI module retrieves the data to be read from the buffer according to each descriptor and transmits the data to be read to the host.

[0006] In this embodiment of the invention, the solid-state drive system includes an I / O acceleration module. The I / O acceleration module obtains the data to be read corresponding to each read message from the storage module according to the read message, and then sends the message to the direct memory access module. The direct memory access module then transmits the data to the host. As can be seen, in this embodiment of the invention, the flash memory conversion layer module is not required when performing read messages, saving the processing flow of the interface module sending messages to the flash memory conversion layer module. Reading messages can be completed by only the I / O acceleration module and the direct memory access module, and the flash memory conversion layer module can perform other tasks, thereby improving the operating efficiency of the solid-state drive system.

[0007] In one optional implementation, after the direct memory access module transmits the data to be read to the host, it sends a second message to the I / O acceleration module. The second message indicates that the read message corresponding to the descriptor has been successfully executed. If the I / O acceleration module receives the second messages corresponding to all the read messages in the buffer, it sends a third message to the interface module. The third message indicates that the read message processing in the buffer has been completed. In response to the third message, the interface module sends an I / O completion command to the host.

[0008] In this embodiment of the invention, an I / O acceleration module and a buffer are added. After determining that the read messages to be executed are stored in the I / O message queue, the interface module retrieves all read messages from the I / O message queue, performs format conversion on all read messages, and writes them into the buffer. The I / O acceleration module sends descriptors to the direct memory access module based on the messages in the buffer. Each time the direct memory access module completes a read message corresponding to a descriptor, it sends a second message to the I / O acceleration module. When the I / O acceleration module determines that all read messages in the buffer have been executed based on the second message, it sends a third message to the interface module, causing the interface module to send an I / O completion command to the host. In this embodiment of the invention, only the direct memory access module and the I / O acceleration module communicate after each read message is completed; the interface module and the host do not need to communicate, saving communication steps and improving the performance of the solid-state drive system.

[0009] In one optional implementation, the I / O acceleration module obtains the physical block address corresponding to the logical block address based on a pre-stored mapping table; and obtains the data to be read corresponding to the read message from the storage module based on the physical block address.

[0010] In an optional implementation, the solid-state drive system further includes a flash conversion layer module. The method provided in this embodiment further includes: if the message in the IO message queue is a write message, the interface module obtains all write messages in the IO message queue, preprocesses each write message to obtain a write message to be executed, and sends the write message to be executed to the IO acceleration module; the IO acceleration module obtains the data to be written corresponding to each write message to be executed, integrates or splits the data to be written according to the storage format of the buffer, and writes the data to be written into the buffer; a fourth message is sent to the flash conversion layer module, the fourth message containing the position of the data to be written in the buffer; the flash conversion layer module determines the data to be written corresponding to each write message to be executed. The physical block address is sent to the memory access module, along with the data transmission message corresponding to each write message to be executed. This data transmission message contains the position of each piece of data to be written in the buffer and the corresponding physical block address. The direct memory access module receives the data transmission message, retrieves the data to be written based on the buffer position in the data transmission message, and writes the data to be written to the storage module according to the physical block address. A fourth message is sent to the I / O acceleration module, indicating that the write message corresponding to the data transmission message has been successfully executed. If the I / O acceleration module receives the fourth message corresponding to all the write messages to be executed, it sends a fifth message to the interface module. In response to the fifth message, the interface module sends an I / O completion command to the host.

[0011] In this embodiment of the invention, after the I / O acceleration module obtains the data to be written corresponding to each write message to be executed, it integrates or splits the data to be written so that the integrated or split data meets the storage format of the buffer. Therefore, only one type of buffer needs to be set in the solid-state drive, avoiding the need to set multiple buffers, avoiding resource waste, and simplifying firmware buffer management and flash memory storage. In this embodiment of the invention, after the interface module determines that there are write messages to be executed in the I / O message queue, it retrieves all write messages in the I / O message queue, preprocesses all write messages, and sends them to the I / O acceleration module. Each time the direct memory access module completes a write message to be executed, it sends a fourth message to the I / O acceleration module. When the I / O acceleration module determines that all write messages to be executed have been completed based on the fourth message, it sends a fifth message to the interface module, so that the interface module sends an I / O completion command to the host. In this embodiment of the invention, after each write message to be executed is completed, only the direct memory access module and the I / O acceleration module communicate, without the need for the interface module and the host to participate in communication, saving communication processes and improving the performance of the solid-state drive system.

[0012] In one optional implementation, the step of the interface module preprocessing the write message to obtain the write message to be executed includes: if the data source address of the data to be written contained in a write message is a continuous address, the write message is formatted to form the write message to be executed.

[0013] In one optional implementation, if the data source address of the data to be written contained in a write message is a non-contiguous address, the write message is split into multiple messages, each containing a contiguous address segment, and the number of messages is the same as the number of segments in the data source address; the multiple messages are then format-converted to form multiple write messages to be executed.

[0014] In this embodiment of the invention, if the data source address of the data to be written in the write message is a non-contiguous address, the write message is first split to ensure that the data source address in each message is a contiguous address. When executing each message, the data to be written is obtained through the contiguous data source address, which avoids system errors and improves the stability of system operation.

[0015] In one optional implementation, each write message corresponds to a first identifier, and each write message to be executed corresponds to a second identifier. After preprocessing each write message to obtain the write message to be executed, the interface module records the correspondence between each first identifier and each second identifier according to the correspondence between each write message and the write message to be executed. After the direct memory access module writes the data to be written to the storage module, it writes the second identifier of the write message to be executed corresponding to the data transmission message into the buffer. In response to the fifth message, before sending the I / O completion command to the host, the interface module polls the buffer and determines whether all write messages have been completed according to the second identifier recorded in the buffer and the pre-recorded correspondence between the first identifier and the second identifier. If it is determined that all write messages have been completed, the interface module sends the I / O completion command to the host.

[0016] The data transmission method provided in this embodiment of the invention does not require the direct memory access module to send feedback to the host after completing each write message to be executed. Feedback is only sent to the host after all write messages in the IO message queue have been executed. This saves the interaction process between modules in the solid-state drive system and improves the performance of the solid-state drive system. On this basis, in order to ensure that each write message is executed, the interface module establishes an association between the first identifier of the write message and the second identifier of the write message to be executed. Each time the direct memory access module completes a write message to be executed, it writes the second identifier of the write message to the buffer. After receiving the fifth message from the IO acceleration module, the interface module verifies whether all write messages have been completed by using the second identifier in the buffer. The verification process improves the reliability of the solid-state drive system in processing write messages.

[0017] In one optional implementation, the write message to be executed contains a logical storage address, and the fourth message sent by the I / O acceleration module to the flash conversion layer module also contains a logical storage address. After the flash conversion layer module determines the physical block address corresponding to the data to be written in each write message to be executed, it stores the correspondence between the logical storage address and the physical block address of each write message to be executed in a mapping table.

[0018] In one optional implementation, the write message to be executed contains the format of the data to be written. The I / O acceleration module integrates or splits the data to be written according to the format of each data to be written, obtains multiple data, and writes each data into a buffer. The format of each data matches the storage format of the buffer.

[0019] In an optional implementation, the solid-state drive system further includes a doorbell register. The method provided in this embodiment of the invention further includes: after the host writes a message into the I / O message queue, it sends an access request to the doorbell register so that the interface module can retrieve the message from the I / O message queue. Attached Figure Description

[0020] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0021] Figure 1 This is a structural block diagram of a solid-state drive system according to an embodiment of the present invention;

[0022] Figure 2 This is a flowchart of the execution steps of each module in a solid-state drive system according to an embodiment of the present invention;

[0023] Figure 3 This is another flowchart of the execution steps of each module in a solid-state drive system according to an embodiment of the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] This embodiment provides a data transmission method applied to a solid-state drive system, which adopts the non-volatile memory host controller interface specification, such as... Figure 1 As shown, the system includes an interface module, an I / O acceleration module, a buffer, a direct memory access module, a storage module, and an I / O message queue storage module. The I / O message queue storage module stores the I / O message queue, and the messages in the I / O message queue are written by the host.

[0026] If the message in the I / O message queue is a read message, then as follows Figure 2 As shown, the functional modules in a solid-state drive system perform the following steps:

[0027] Step S201: The interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the converted read messages in the buffer, and sends the first message to the io acceleration module.

[0028] In one optional embodiment, when the host writes a message to the io message queue, the message contains an io type, and the interface module can determine whether the message is a read message or a write message by the io type of the message.

[0029] In one optional embodiment, each message in the io message queue contains information such as source address, destination address, data length, data type, and read data format.

[0030] In one optional embodiment, when the host writes data to the I / O message queue, it is usually in PRP or SGL format. Furthermore, the length of each message written by the host to the I / O message queue is not unique, which is not conducive to the processing of messages by the solid-state drive system. Therefore, in this embodiment of the invention, after the interface module obtains the read message, it converts the read message format and stores it in the buffer.

[0031] In one specific embodiment, taking a multi-core system composed of four Cortex R8 cores as an example, the Cortex R8_0 runs the interface module process to obtain all read messages in the I / O message queue.

[0032] Step S202: In response to the first message, the io acceleration module reads the read message in the buffer, retrieves the data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer, configures the descriptor corresponding to each read message according to the storage location of each data to be read in the buffer, and sends the descriptor to the direct memory access module.

[0033] In one alternative embodiment, the storage module is a persistent storage medium.

[0034] In one optional embodiment, the read message contains the logical block address of the data to be read. The I / O acceleration module obtains the physical block address corresponding to the logical block address according to the mapping table, and obtains the data to be read corresponding to the read message from the storage module according to the physical block address.

[0035] Step S203: The direct memory access module retrieves the data to be read from the buffer according to each descriptor and transmits the data to be read to the host.

[0036] In an optional embodiment, the descriptor also includes a destination address. After the direct memory access module obtains the data to be read based on the storage location of the data to be read in the buffer, it writes the data to be read into the destination, thereby completing the transmission of the data to be read to the host.

[0037] In related technologies, when a host needs to perform a read operation on a storage module in a solid-state drive (SSD) system, it sends a read message to the SSD system. The read message contains the Logical Block Address (LBA). After receiving the read message, the interface module sends it to the Flash Translation Layer (FTL) module. The FTL module queries the mapping information from the logical block address to the physical block address (PBA) and then sends a message to the storage module's controller. The storage module's controller reads the data based on the physical block address and sends the data to the Direct Memory Access (DMA) module. The DMA module then transmits the data to the host.

[0038] However, in this embodiment of the invention, an I / O acceleration module is added to the solid-state drive system. The I / O acceleration module can obtain the data to be read corresponding to each read message from the storage module, and then send the message to the direct memory access module. The direct memory access module then transmits the data to the host. It can be seen that in this embodiment of the invention, when performing a read message, the participation of the flash conversion layer module is not required, saving the processing flow of the interface module sending messages to the flash conversion layer module. The read message can be completed by only the I / O acceleration module and the direct memory access module, and the flash conversion layer module can perform other tasks, thereby improving the operating efficiency of the solid-state drive system.

[0039] In one optional embodiment, the read message written by the host to the io message queue contains a source address, which is the logical block address of the data to be read. When the io acceleration module retrieves the data to be read corresponding to each read message from the storage module according to the read message, it first retrieves the physical block address corresponding to the logical block address according to the pre-stored mapping table, and then retrieves the data to be read corresponding to the read message from the storage module according to the physical block address.

[0040] In one optional embodiment, a pre-stored mapping table stores the mapping relationship between each logical block address and each physical block address, where the physical block address refers to the address in the storage module.

[0041] In related technologies, the mapping relationship between logical block addresses and physical block addresses is determined by the flash translation layer module. Therefore, in related technologies, the interface module needs to first send the write message to the flash translation layer module, which then determines the physical block address corresponding to the logical block address in the read message. The physical block address is then sent to the controller of the storage module, which reads the data and sends it to the direct memory access module. However, considering that the core function of the flash conversion layer module is to establish a mapping relationship between logical block addresses and physical block addresses according to a certain algorithm, when reading data, the logical block address and physical block address of the data have already been established. It is not necessary to determine the corresponding physical block address for the logical block address through an algorithm. It is only necessary to look up the physical block address corresponding to the logical block address in the message according to the pre-established mapping relationship table. Therefore, it is naturally unnecessary to send the read message to the flash conversion layer module. In this embodiment of the invention, after obtaining the physical block address corresponding to the logical block address through the IO acceleration module, the data to be read is obtained through the physical block address. This avoids the use of the flash conversion layer module, so that the flash conversion layer module can be freed up to process other tasks. This saves the communication process between various functional modules in the solid-state drive system when processing read messages, and also saves the use of the flash conversion layer module, thereby improving the performance of the solid-state drive system.

[0042] In an optional embodiment, in the data transmission method provided by the present invention, after the direct memory access module transmits the data to be read to the host, it sends a second message to the io acceleration module. The second message is used to indicate that the read message corresponding to the descriptor was successfully executed.

[0043] If the I / O acceleration module receives the second message corresponding to all the read messages in the buffer, it sends a third message to the interface module. The third message is used to indicate that the read message processing in the buffer is complete.

[0044] In response to the third message, the interface module sends an I / O completion command to the host.

[0045] In this embodiment of the invention, the buffer contains multiple read messages. After the I / O acceleration module sends the descriptors corresponding to each read message in the buffer to the direct memory access module, the direct memory access module sends a second message to the I / O acceleration module after completing the message corresponding to each descriptor, indicating that the read message corresponding to that descriptor has been executed. When the I / O acceleration module receives the second messages corresponding to all the read messages in the buffer, it determines that all read messages in the buffer have been executed. At this time, the I / O acceleration module sends a third message to the interface module. After receiving the third message, the interface module sends an I / O completion command to the host.

[0046] In one optional embodiment, each read message corresponds to a unique identifier. The descriptor generated by the io acceleration module contains the identifier of the read message corresponding to the descriptor. After the direct memory access module completes the transmission of the data to be read according to the descriptor, the second message sent to the io acceleration module contains the identifier in the descriptor. Therefore, the io acceleration module can determine the successfully executed read messages and the failed read messages according to the identifiers of each read message and the identifier in the second message. If the second message corresponding to the read message is not received within a preset time, the read message is determined to have failed.

[0047] In related technologies, after the host writes a message to the I / O message queue, the solid-state drive system sends a success or failure message back to the host after each message is executed. However, in this embodiment of the invention, an I / O acceleration module and a buffer are added. After the interface module determines that there are read messages to be executed in the I / O message queue, it retrieves all read messages from the queue, converts their format, and writes them into the buffer. The I / O acceleration module sends descriptors to the direct memory access module based on the messages in the buffer. Each time the direct memory access module completes a read message corresponding to a descriptor, it sends a second message to the I / O acceleration module. When the I / O acceleration module determines that all read messages in the buffer have been executed based on the second message, it sends a third message to the interface module, causing the interface module to send an I / O completion command to the host. In this embodiment of the invention, only the direct memory access module and the I / O acceleration module communicate after each read message is completed; the interface module and the host do not need to communicate, saving communication steps and improving the performance of the solid-state drive system.

[0048] In an optional embodiment, the solid-state drive system further includes a flash memory conversion layer module, and the data line transmission method provided in this embodiment of the invention further includes the following steps:

[0049] If the message in the I / O message queue is a write message, such as Figure 3 As shown, the functional modules in the solid-state drive system will perform the following steps:

[0050] Step S301: The interface module obtains all write messages in the io message queue, preprocesses each write message to obtain the write message to be executed, and sends the write message to be executed to the io acceleration module.

[0051] In one optional embodiment, the write messages in the io message queue are written by the host. The format used by the host when writing the write messages into the io message queue may not be executable by the io acceleration module. Therefore, in this embodiment of the invention, the messages in the io message queue need to be preprocessed to obtain the write messages to be executed by the io acceleration module.

[0052] Step S302: The io acceleration module obtains the data to be written corresponding to each write message to be executed, integrates or splits the data to be written according to the storage format of the buffer, and writes the data to be written into the buffer; sends a fourth message to the flash conversion layer module, the fourth message containing the position of the data to be written in the buffer.

[0053] In one optional embodiment, the write message to be executed contains the data source address of the data to be written, and the io acceleration module obtains the data to be written based on the data source address.

[0054] In one optional embodiment, the logical space in the host for storing data to be written has a variety of different formats, including 512, 512+8, 4k, 4k+8, etc. Therefore, the format of the data to be written is also different. Since the minimum operation of the storage module controller on the storage module is one block size, storing data of the same format in the same block is beneficial to maximizing the use of space. Therefore, in related technologies, multiple buffers with different formats are set to store data of different formats.

[0055] In this embodiment of the invention, after the io acceleration module obtains the data to be written corresponding to each write message to be executed, it integrates or splits the data to be written so that the integrated or split data meets the storage format of the buffer. Therefore, only one type of buffer needs to be set in the solid-state drive, thereby avoiding the need to set multiple buffers, avoiding resource waste, and simplifying firmware buffer management and flash memory storage. Furthermore, because all write messages are sent to the io acceleration module when performing the above step S301 in this embodiment of the invention, after the io acceleration module obtains the data to be written corresponding to all write messages, it can flexibly integrate or split all the data to be written, and only one buffer is needed to support all types of format sizes.

[0056] In an optional embodiment, the format size of the buffer can be set according to actual needs. For example, the size of a single storage space in the buffer can be set to 4224 bits. 4224 bits can store eight 512-bit data units, or eight (512+8)-bit data units, or one 4k-bit data unit, or one (4k+8)-bit data unit. Therefore, setting the size of a single storage space in the buffer to 4224 bits can accommodate various formats of data to be written. When the firmware needs to store data with the persistent storage medium, it only needs to send a list of data in units of a single storage space to the memory controller for processing.

[0057] Step S303: The flash memory conversion layer module determines the physical block address corresponding to the data to be written in each write message to be executed, and sends the data transmission message corresponding to each write message to the memory access module. The data transmission message contains the position of each data to be written in the buffer and the physical block address corresponding to each data to be written.

[0058] In one optional embodiment, the write message to be executed contains a logical block address. When writing the data to be written into the storage module, the physical block address corresponding to the logical block address needs to be determined before the data can be written into the storage module. In this embodiment of the invention, in order to improve the service life of the storage module, each time the data to be written is written into the storage module, a certain algorithm is needed to determine the storage location of the data to be written, avoiding unreasonable use of the storage space in the storage module that leads to accelerated aging of the storage module. Therefore, it is necessary to add the use of a flash memory conversion layer module. The flash memory conversion layer module selects the physical block address that can store the data to be written through a certain algorithm and establishes the correspondence between the physical block address and the logical block address.

[0059] Step S304: The direct memory access module receives the data transmission message, obtains the data to be written according to the buffer position in the data transmission message, and writes the data to be written to the storage module according to the physical block address; it sends a fourth message to the I / O acceleration module, which is used to indicate that the write message to be executed corresponding to the data transmission message has been successfully executed.

[0060] Step S305: If the I / O acceleration module receives the fourth message corresponding to all the pending write messages, it sends the fifth message to the interface module.

[0061] Step S306: In response to the fifth message, the interface module sends an I / O completion command to the host.

[0062] In this embodiment of the invention, the direct memory access module sends a fourth message to the io acceleration module after completing each pending write message, indicating that the pending write message has been completed. When the io acceleration module receives the fourth messages corresponding to all pending write messages, it determines that all pending write messages have been completed. At this time, the io acceleration module sends a fifth message to the interface module. After receiving the fifth message, the interface module sends an io completion command to the host.

[0063] In related technologies, after the host writes a message to the I / O message queue, the solid-state drive system sends a success or failure message back to the host after each message is executed. However, in this embodiment of the invention, an I / O acceleration module is added. After the interface module determines that there are write messages to be executed in the I / O message queue, it retrieves all write messages from the queue, preprocesses them, and sends them to the I / O acceleration module. Each time the direct memory access module completes a write message to be executed, it sends a fourth message to the I / O acceleration module. When the I / O acceleration module determines that all write messages to be executed have been completed based on the fourth message, it sends a fifth message to the interface module, enabling the interface module to send an I / O completion command to the host. In this embodiment of the invention, only the direct memory access module and the I / O acceleration module communicate after each write message is completed; the interface module and the host do not need to communicate, saving communication steps and improving the performance of the solid-state drive system. Furthermore, in this embodiment of the invention, if the message in the IO message queue is a read message, it is executed by the IO acceleration module; if the message in the IO message queue is a write message, the IO acceleration module stores the message to be written into the buffer module, and then the flash conversion layer module performs other operations. The IO acceleration module decomposes the read and write process of the solid-state drive system, further improving data processing efficiency. Moreover, the modular implementation method facilitates unified management and function portability.

[0064] In an optional embodiment, when the interface module performs step S301 above,

[0065] If the data source addresses of the data to be written contained in a write message are consecutive addresses, the write message will be formatted and converted to form a write message to be executed.

[0066] If the data source address of the data to be written contained in a write message is a non-contiguous address, firstly, the write message is split into multiple messages, each containing a contiguous address segment, and the number of messages is the same as the number of segments in the data source address; then, the multiple messages are formatted to form multiple write messages to be executed.

[0067] For example, if the data source address of the data to be written contained in the write message contains two non-contiguous addresses, then the write message is split into two messages, each containing a contiguous address.

[0068] Considering that some solid-state drive systems can only read continuous data during data transfer, and data reading may fail if non-contiguous addresses exist, in this embodiment of the invention, if the data source address of the data to be written in the write message is a non-contiguous address, the write message is first split to ensure that the data source address in each message is a continuous address. When executing each message, the data to be written is obtained through continuous data source addresses, which avoids system errors and improves the stability of system operation.

[0069] In an optional embodiment, in the data transmission method provided by this invention, each write message corresponds to a first identifier, and each write message to be executed corresponds to a second identifier.

[0070] After preprocessing each write message to obtain the write messages to be executed, the interface module assigns a unique second identifier to each write message to be executed, and records the correspondence between each first identifier and each second identifier according to the correspondence between each write message and the write messages to be executed. In an optional embodiment, if a write message is split into multiple write messages to be executed during the preprocessing of the write messages, then the first identifier of the write message corresponds to multiple second identifiers of the write messages to be executed.

[0071] After the direct memory access module writes the data to be written to the storage module, it writes the second identifier of the write message to be executed corresponding to the data transmission message into the buffer.

[0072] In response to the fifth message, before sending the I / O completion command to the host, the interface module polls the buffer and determines whether the writing of messages is complete based on the second identifier recorded in the buffer and the pre-recorded correspondence between the first identifier and the second identifier. If it is determined that the writing of messages is complete, the I / O completion command is sent to the host.

[0073] In an optional embodiment, the interface module polls all second identifiers in the buffer. If all second identifiers corresponding to the first identifier are stored in the buffer, it is determined that all message writing is completed. If there is a second identifier corresponding to a first identifier that is not stored in the buffer, it is determined that there is an incomplete message writing. At this time, the incomplete message writing can be determined according to the correspondence between the first identifier and the second identifier.

[0074] The solid-state drive system provided in this embodiment of the invention does not require feedback after the direct memory access module completes each write message to be executed. Feedback is only sent to the host after all write messages in the IO message queue have been executed. This saves the interaction process between modules in the solid-state drive system and improves the performance of the solid-state drive system. On this basis, in order to ensure that each write message is executed, the interface module establishes an association between the first identifier of the write message and the second identifier of the write message to be executed. Each time the direct memory access module completes a write message to be executed, it writes the second identifier of the write message to be executed into the buffer. After receiving the fifth message from the IO acceleration module, the interface module verifies whether all write messages have been completed by checking the second identifier in the buffer. The verification process improves the reliability of the solid-state drive system in processing write messages.

[0075] In an optional embodiment, in the data transmission method provided by the present invention, the write message to be executed contains a logical storage address, and the fourth message sent by the io acceleration module to the flash conversion layer module also contains a logical storage address. After the flash conversion layer module determines the physical block address corresponding to the data to be written in each write message to be executed, it stores the correspondence between the logical storage address and the physical block address of each write message to be executed in a mapping table.

[0076] In an optional embodiment, the correspondence between the logical storage address and the physical block address of each write message to be executed is written into the mapping table. This means that the correspondence between the logical storage address and the physical block address of the data to be written is written into the mapping table. Therefore, when the host needs to perform a read operation on the data, the io acceleration module can read the mapping table to obtain the physical block address of the data, without having to determine the physical block address of the data through the flash conversion layer module.

[0077] In an optional embodiment, the solid-state drive system further includes a doorbell register. The data transmission method provided in this embodiment of the invention further includes: after the host writes a message into the I / O message queue, it sends an access request to the doorbell register so that the interface module can retrieve the message from the I / O message queue.

[0078] This invention also provides a solid-state drive system that adopts the non-volatile memory host controller interface specification, such as... Figure 1 As shown, the system includes an interface module, an I / O acceleration module, a buffer, a direct memory access module, a storage module, and an I / O message queue storage module. The I / O message queue storage module stores the I / O message queue, and the messages in the I / O message queue are written by the host. Each module performs the following steps:

[0079] If the message in the I / O message queue is a read message.

[0080] The interface module retrieves all read messages from the io message queue, performs format conversion on the read messages, stores the converted read messages in the buffer, and sends the first message to the io acceleration module.

[0081] In response to the first message, the I / O acceleration module reads the read message in the buffer, retrieves the data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer, configures the descriptor corresponding to each read message according to the storage location of each data to be read in the buffer, and sends the descriptor to the direct memory access module.

[0082] The direct memory access module retrieves the data to be read from the buffer based on each descriptor and transmits the data to the host.

[0083] In an optional embodiment, in the system provided by the present invention, after the direct memory access module transmits the data to be read to the host, it sends a second message to the io acceleration module. The second message is used to indicate that the read message corresponding to the descriptor has been successfully executed. If the io acceleration module receives the second messages corresponding to all the read messages in the buffer, it sends a third message to the interface module. The third message is used to indicate that the read message processing in the buffer has been completed. In response to the third message, the interface module sends an io completion command to the host.

[0084] In an optional embodiment, in the system provided by the present invention, the read message contains a source address, which is the logical block address of the data to be read. The io acceleration module obtains the physical block address corresponding to the logical block address according to a pre-stored mapping table; and obtains the data to be read corresponding to the read message from the storage module according to the physical block address.

[0085] In an optional embodiment, the system provided by this invention further includes a flash conversion layer module. If the message in the io message queue is a write message, the modules in this embodiment perform the following steps:

[0086] The interface module obtains all write messages in the io message queue, preprocesses each write message to obtain the write message to be executed, and sends the write message to be executed to the io acceleration module.

[0087] The I / O acceleration module obtains the data to be written corresponding to each write message to be executed, integrates or splits the data to be written according to the storage format of the buffer, and writes the data to be written into the buffer; it sends a fourth message to the flash conversion layer module, which contains the position of the data to be written in the buffer;

[0088] The flash conversion layer module determines the physical block address corresponding to the data to be written in each write message to be executed, and sends the data transmission message corresponding to each write message to the memory access module. The data transmission message contains the position of each data to be written in the buffer and the physical block address corresponding to each data to be written.

[0089] The direct memory access module receives the data transmission message, obtains the data to be written according to the buffer position in the data transmission message, and writes the data to be written to the storage module according to the physical block address; it sends a fourth message to the I / O acceleration module, which is used to indicate that the write message to be executed corresponding to the data transmission message has been successfully executed;

[0090] If the I / O acceleration module receives the fourth message corresponding to all the pending write messages, it sends the fifth message to the interface module.

[0091] In response to the fifth message, the interface module sends an I / O completion command to the host.

[0092] In an optional embodiment, in the system provided by this invention, the step of the interface module preprocessing the write message to obtain the write message to be executed includes:

[0093] If the data source addresses of the data to be written contained in a write message are consecutive addresses, the write message will be formatted and converted to form a write message to be executed.

[0094] In an optional embodiment, in the system provided by this invention, if the data source address of the data to be written contained in a write message is a non-contiguous address,

[0095] The message writing is split into multiple messages, each containing a contiguous address segment. The number of messages is the same as the number of segments in the data source address.

[0096] Multiple messages are converted into multiple write messages to be executed.

[0097] In an optional embodiment, in the system provided by this invention, each write message corresponds to a first identifier, and each write message to be executed corresponds to a second identifier.

[0098] After the interface module preprocesses each write message to obtain the write message to be executed, it records the correspondence between each first identifier and each second identifier according to the correspondence between each write message and the write message to be executed.

[0099] After the direct memory access module writes the data to be written to the storage module, it writes the second identifier of the write message to be executed corresponding to the data transmission message into the buffer.

[0100] In response to the fifth message, before sending the I / O completion command to the host, the interface module polls the buffer and determines whether the writing of messages is complete based on the second identifier recorded in the buffer and the pre-recorded correspondence between the first identifier and the second identifier. If it is determined that the writing of messages is complete, the I / O completion command is sent to the host.

[0101] In an optional embodiment, in the system provided by the present invention, the write message to be executed contains a logical storage address, and the fourth message sent by the io acceleration module to the flash conversion layer module also contains a logical storage address. After the flash conversion layer module determines the physical block address corresponding to the data to be written in each write message to be executed, it stores the correspondence between the logical storage address and the physical block address of each write message to be executed in a mapping table.

[0102] In an optional embodiment, in the system provided by the present invention, the write message to be executed contains the format of the data to be written. The io acceleration module integrates or splits the data to be written according to the format of each data to be written to obtain multiple data, and writes each data into a buffer. The format of each data matches the storage format of the buffer.

[0103] In an optional embodiment, the system provided in this embodiment of the invention also includes a doorbell register. After the host writes a message into the I / O message queue, it sends an access request to the doorbell register so that the interface module can retrieve the message from the I / O message queue.

[0104] For detailed information on solid-state drive systems, please refer to the detailed description of the data transmission method in the above embodiments, which will not be repeated here.

[0105] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A data transmission method applied to a solid-state drive system, characterized in that, The solid-state drive system adopts the non-volatile memory host controller interface specification. The solid-state drive system includes an interface module, an I / O acceleration module, a buffer, a direct memory access module, a storage module, and an I / O message queue storage module. The I / O message queue storage module stores an I / O message queue, and the messages in the I / O message queue are written by the host. The method includes: If the message in the I / O message queue is a read message. The interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the format-converted read messages in the buffer, and sends a first message to the io acceleration module. In response to the first message, the I / O acceleration module reads the read message in the buffer, obtains the data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer, configures a descriptor corresponding to each read message according to the storage location of each data to be read in the buffer, and sends the descriptor to the direct memory access module. The direct memory access module obtains the data to be read from the buffer according to each of the descriptors and transmits the data to be read to the host; After the direct memory access module transmits the data to be read to the host, it sends a second message to the I / O acceleration module. The second message is used to indicate that the read message corresponding to the descriptor was successfully executed. If the I / O acceleration module receives the second message corresponding to all the read messages in the buffer, it sends a third message to the interface module. The third message is used to indicate that the read message processing in the buffer is complete. In response to the third message, the interface module sends an I / O completion command to the host; The read message contains a source address, which is the logical block address of the data to be read. The I / O acceleration module obtains the physical block address corresponding to the logical block address according to the pre-stored mapping table; and obtains the data to be read corresponding to the read message from the storage module according to the physical block address.

2. The method according to claim 1, characterized in that, The solid-state drive system also includes a flash memory conversion layer module. If the message in the I / O message queue is a write message The interface module obtains all write messages in the io message queue, preprocesses each write message to obtain a write message to be executed, and sends the write message to be executed to the io acceleration module. The I / O acceleration module obtains the data to be written corresponding to each of the write messages to be executed, integrates or splits the data to be written according to the storage format of the buffer, and writes the data to be written into the buffer; and sends a fourth message to the flash conversion layer module, the fourth message containing the position of the data to be written in the buffer; The flash conversion layer module determines the physical block address corresponding to the data to be written in each write message to be executed, and sends a data transmission message corresponding to each write message to the memory access module. The data transmission message contains the position of each data to be written in the buffer and the physical block address corresponding to each data to be written. The direct memory access module receives the data transmission message, obtains the data to be written according to the buffer position in the data transmission message, and writes the data to be written to the storage module according to the physical block address; and sends a fourth message to the I / O acceleration module, the fourth message being used to indicate that the write message to be executed corresponding to the data transmission message has been successfully executed; If the I / O acceleration module receives the fourth message corresponding to all the pending write messages, it sends the fifth message to the interface module. In response to the fifth message, the interface module sends an I / O completion command to the host.

3. The method according to claim 2, characterized in that, The steps of the interface module to preprocess the write message to obtain the write message to be executed include: If the data source addresses of the data to be written contained in a write message are consecutive addresses, the write message is converted into a format to form the write message to be executed.

4. The method according to claim 3, characterized in that, If a write message contains data from a non-contiguous data source address, then... The write message is split into multiple messages, each containing a continuous address segment, and the number of messages is the same as the number of segments in the data source address. The multiple messages are formatted to form multiple write messages to be executed.

5. The method according to any one of claims 2-4, characterized in that, Each of the write messages corresponds to a first identifier, and each of the write messages to be executed corresponds to a second identifier. After the interface module preprocesses each of the write messages to obtain the write message to be executed, it records the correspondence between each first identifier and each second identifier according to the correspondence between each of the write messages and the write message to be executed. After the direct memory access module writes the data to be written into the storage module, it writes the second identifier of the write message to be executed corresponding to the data transmission message into the buffer. In response to the fifth message, before sending the I / O completion command to the host, the interface module polls the buffer and determines whether all write messages have been completed based on the second identifier recorded in the buffer and the pre-recorded correspondence between the first identifier and the second identifier. If it is determined that all write messages have been completed, the interface module sends the I / O completion command to the host.

6. The method according to claim 2, characterized in that, The write message to be executed contains a logical storage address, and the fourth message sent by the I / O acceleration module to the flash memory conversion layer module also contains the logical storage address. After determining the physical block address corresponding to the data to be written in each write message to be executed, the flash memory conversion layer module stores the correspondence between the logical storage address and the physical block address of each write message to be executed in the mapping table.

7. The method according to claim 2, characterized in that, The write message to be executed contains the format of the data to be written. The I / O acceleration module integrates or splits the data to be written according to the format of each data to be written, obtains multiple data, and writes each data into the buffer. The format of each data matches the storage format of the buffer.

8. The method according to claim 1, characterized in that, The solid-state drive system also includes a doorbell register, and the method further includes: After the host writes the message into the I / O message queue, it sends an access request to the doorbell register so that the interface module can retrieve the message from the I / O message queue.

9. A solid-state drive system, characterized in that, The system adopts the non-volatile memory host controller interface specification. The system includes an interface module, an I / O acceleration module, a buffer, a direct memory access module, a storage module, and an I / O message queue storage module. The I / O message queue storage module stores an I / O message queue, and the messages in the I / O message queue are written by the host. If the message in the I / O message queue is a read message. The interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the format-converted read messages in the buffer, and sends a first message to the io acceleration module. In response to the first message, the I / O acceleration module reads the read message in the buffer, obtains the data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer, configures a descriptor corresponding to each read message according to the storage location of each data to be read in the buffer, and sends the descriptor to the direct memory access module. The direct memory access module obtains the data to be read from the buffer according to each of the descriptors and transmits the data to be read to the host; After the direct memory access module transmits the data to be read to the host, it sends a second message to the I / O acceleration module. The second message indicates that the read message corresponding to the descriptor has been successfully executed. If the I / O acceleration module receives the second messages corresponding to all the read messages in the buffer, it sends a third message to the interface module. The third message indicates that the read message processing in the buffer has been completed. In response to the third message, the interface module sends an I / O completion command to the host; The read message contains a source address, which is the logical block address of the data to be read. The I / O acceleration module obtains the physical block address corresponding to the logical block address based on the pre-stored mapping table; and obtains the data to be read corresponding to the read message from the storage module based on the physical block address.

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