Solid-state imaging device, and imaging device equipped with a solid-state imaging device

Abstract

A solid-state imaging device is provided, comprising: a photoelectric conversion element that generates charge by photoelectric conversion based on input light; a floating diffusion region that converts the charge into a voltage corresponding to the amount of charge; a holding capacitor connected to the floating diffusion region and capable of accumulating the charge overflowing from the photoelectric conversion element; and a signal processing unit that processes a signal based on the voltage converted by the floating diffusion region, the signal processing unit having multiple signal processing units, the signal being read out using the holding capacitor.

Description

Technical Field

[0001] This invention relates to a solid-state imaging device and an imaging device equipped with a solid-state imaging device. Background Technology

[0002] Previously, solid-state imaging elements that achieve high dynamic range were known (see US2017 / 0099423).

[0003] This solid-state imaging element is a CMOS image sensor, such as one equipped with a so-called Lateral Overflow Integration Capacitor (LOFIC). Figure 14 as well as Figure 15 As shown, each pixel 501 of the solid-state imaging element 500 includes: a photodiode (photoelectric conversion element) 502; a floating diffusion region 503 that converts the charge generated by the photodiode 502 into a voltage corresponding to the amount of charge; and a lateral overflow storage capacitor 504 capable of accumulating the charge overflowing from the photodiode 502. Furthermore, Figure 14 as well as Figure 15 The reference numerals for each region in the potential diagram are: Figure 14 The equivalent circuit diagram corresponding to the configuration is indicated by adding a "P" after the reference numerals. Additionally, Figure 15 The reference numerals t1 to t9 in the attached figures correspond to Figure 16 The reference numerals for the driving time points t1 to t9 of each transistor are shown in the attached figure.

[0004] In each pixel 501 of the solid-state imaging element 500, when the amount of incident light on the photodiode 502 is large, the charge overflowing from the photodiode 502 accumulates in the lateral overflow storage capacitor 504 (refer to the image sensor 500). Figure 15 The area indicated by reference numeral 504P in the attached figure is used to read out the charge accumulated in the lateral overflow storage capacitor 504, thereby achieving a high dynamic range (i.e., the input dynamic range above the capacitance of the photodiode 502).

[0005] Specifically, in each pixel 501, when the amount of incident light on the photodiode 502 is large, that is, when the charge generated in the photodiode 502 exceeds its capacitance and overflows, the charge from the photodiode 502 is read out when the conversion gain of the floating diffusion region 503 is high (that is, when the switching transistor 505 disposed between the floating diffusion region 503 and the lateral overflow storage capacitor 504 is off). Figure 16(t4~t7), then, the conversion gain of the floating diffusion region 503 is reduced (i.e., in the state where the switching transistor 505 configured between the floating diffusion region 503 and the lateral overflow storage capacitor 504 is turned on), and the total charge of the photodiode 502 and the lateral overflow storage capacitor 504 is read out (refer to t4~t7). Figure 16 (t8~t11), thereby realizing the input dynamic range of the photodiode 502 above the capacitance.

[0006] However, in the aforementioned solid-state imaging element 500, dark current is generated in the photodiode 502 during the accumulation of charge generated by incident light, or thermal noise is generated in the lateral overflow storage capacitor 504 during the reset readout to understand the reset level (reset signal), but the SN ratio deteriorates because correlated double sampling cannot be performed.

[0007] In detail, in each pixel 501, when there is a large amount of light input, the charge that cannot be held by the floating diffusion region 503 from the charge overflowing from the photodiode 502 accumulates in the lateral overflow storage capacitor 504. After reading out the charge accumulated in the lateral overflow storage capacitor 504, the lateral overflow storage capacitor 504 is read out through the pixel reset signal.

[0008] Therefore, although the signal amount (light with high light intensity) exceeding the capacitance of photodiode 502 can be read through pixel 501, thermal noise from the reset level of the lateral overflow storage capacitor 504 before and after the amount of light overflowing from photodiode 502, as well as the dark current and shot noise superimposed on the charge (signal) overflowing from photodiode 502, will cause... Figure 17 The discontinuity (gap) G of the SN ratio is as large as shown.

[0009] This discontinuity in the SN ratio is particularly noticeable in subjects with gradually changing tones, such as the sky, skin, and clouds, and is a major cause of image quality degradation in solid-state imaging sensors 500.

[0010] Existing technical documents

[0011] Patent documents

[0012] Patent document 1: US2017 / 0099423. Summary of the Invention

[0013] The problem the invention aims to solve

[0014] Therefore, the object of the present invention is to provide a solid-state imaging device and an imaging device equipped with a solid-state imaging device, which can achieve a high dynamic range and suppress image quality degradation caused by the gap in the SN ratio.

[0015] Solution for solving the problem

[0016] The solid-state imaging device of the present invention comprises:

[0017] A photoelectric conversion element that generates electrical charge by converting input light into electrical charge;

[0018] A floating diffusion region that converts the aforementioned charge into a voltage corresponding to the amount of that charge;

[0019] A holding capacitor, connected to the aforementioned floating diffusion region, is capable of accumulating the charge overflowing from the aforementioned photoelectric conversion element; and

[0020] The signal processing unit processes signals based on the voltage converted in the aforementioned floating diffusion region.

[0021] The signal processing unit described above has multiple signal processing units, and the signal is read out using the aforementioned holding capacitor.

[0022] Alternatively, in the aforementioned solid-state imaging device,

[0023] The aforementioned processing units may include a related dual sampling unit and a correction unit that corrects the signal based on the voltage at the time of reset of the aforementioned holding capacitor.

[0024] In addition, the solid-state imaging device of the present invention includes:

[0025] A photoelectric conversion element that generates electrical charge by converting input light into electrical charge;

[0026] A floating diffusion region that converts the aforementioned charge into a voltage corresponding to the amount of that charge;

[0027] A holding capacitor, connected to the aforementioned floating diffusion region, is capable of accumulating the charge overflowing from the aforementioned photoelectric conversion element; and

[0028] The signal processing unit processes signals based on the voltage converted in the aforementioned floating diffusion region.

[0029] The aforementioned signal processing unit,

[0030] When the charge generated by the light input to the photoelectric conversion element does not overflow from the photoelectric conversion element in the first state, the signals with different conversion gains in the floating diffusion region are subjected to correlation double sampling respectively.

[0031] When the signal is in the second state where the charge generated by the light input to the photoelectric conversion element overflows from the photoelectric conversion element, the signal is corrected based on the voltage at the time of reset of the holding capacitor.

[0032] Alternatively, the aforementioned solid-state imaging device may include:

[0033] A first switching transistor is connected to the aforementioned photoelectric conversion element and the aforementioned floating diffusion region;

[0034] The second switching transistor connects the aforementioned floating diffusion region and the aforementioned holding capacitor;

[0035] The third switching transistor is connected to the aforementioned holding capacitor and the reset potential; and

[0036] The control unit controls each switching transistor.

[0037] The aforementioned floating diffusion region is sequentially connected to the aforementioned reset potential via the aforementioned second switching transistor and the aforementioned third switching transistor.

[0038] The aforementioned signal processing unit,

[0039] After the light is input to the photoelectric conversion element, the signal of the voltage of the floating diffusion region based on the state of the first to third switching transistors when the second switching transistor is turned on by the control unit is used as the first signal.

[0040] After receiving the first signal, the signal based on the voltage of the floating diffusion region when the second switching transistor is turned off by the control unit is used as the second signal.

[0041] After obtaining the second signal, the signal based on the voltage of the floating diffusion region when the first switching transistor is turned on and off by the control unit is used as the third signal.

[0042] After obtaining the third signal, the signal based on the voltage of the floating diffusion region when the first switching transistor is turned on and off, under the condition that the second switching transistor is turned on by the control unit, is used as the fourth signal.

[0043] After obtaining the fourth signal, the fifth signal is obtained by using the signal of the voltage of the floating diffusion region when the third switching transistor is turned on and off, based on the state where the second switching transistor is turned on by the control unit.

[0044] Output signals from the solid-state imaging device to the outside can be generated based on the first to fifth signals mentioned above.

[0045] Alternatively, in the aforementioned solid-state imaging device,

[0046] The aforementioned related double sampling is respectively included in the signal processing of obtaining the first differential signal based on the difference between the fourth signal and the first signal, and in the signal processing of obtaining the second differential signal based on the difference between the third signal and the second signal.

[0047] The voltage correction based on the aforementioned holding capacitor during reset is included in the signal processing that obtains the third differential signal based on the difference between the aforementioned fourth signal and the aforementioned fifth signal.

[0048] Alternatively, the aforementioned solid-state imaging device may include:

[0049] The storage unit stores a first threshold set at least based on the capacitance of the aforementioned photoelectric conversion element, and a second threshold set at least based on the capacitance of the aforementioned floating diffusion region.

[0050] The aforementioned signal processing unit,

[0051] The value of the third differential signal is compared with the first threshold. When the value of the third differential signal is greater than the first threshold, the third differential signal is output as the output signal.

[0052] As a result of comparing the value of the third differential signal with the first threshold, if the value of the third differential signal is below the first threshold, the value of the first differential signal is compared with the second threshold; if the value of the first differential signal is greater than the second threshold, the first differential signal is output as the output signal.

[0053] As a result of comparing the value of the first differential signal with the second threshold, when the value of the first differential signal is below the second threshold, the second differential signal is output as the output signal.

[0054] Alternatively, the aforementioned solid-state imaging device may include:

[0055] The second holding capacitor, which is different from the first holding capacitor, is capable of accumulating the charge overflowing from the photoelectric conversion element.

[0056] A first switching transistor is connected to the aforementioned photoelectric conversion element and the aforementioned floating diffusion region;

[0057] The second switching transistor connects the aforementioned floating diffusion region and the aforementioned holding capacitor;

[0058] The third switching transistor is connected to the second holding capacitor and the reset potential;

[0059] A fourth switching transistor, which connects the first holding capacitor and the second holding capacitor; and

[0060] The control unit controls each switching transistor.

[0061] The aforementioned floating diffusion region is sequentially connected to the second holding capacitor via the second switching transistor and the fourth switching transistor, and is sequentially connected to the reset potential via the second switching transistor, the fourth switching transistor, and the third switching transistor.

[0062] The first holding capacitor is connected to the reset potential via the fourth switching transistor and the third switching transistor.

[0063] The aforementioned signal processing unit,

[0064] After the light is input to the photoelectric conversion element, the signal of the voltage of the floating diffusion region based on the state of the first to fourth switching transistors when the second switching transistor is turned on by the control unit is used as the first signal.

[0065] After receiving the first signal, the signal based on the voltage of the floating diffusion region when the second switching transistor is turned off by the control unit is used as the second signal.

[0066] After obtaining the second signal, the signal based on the voltage of the floating diffusion region when the first switching transistor is turned on and off by the control unit is used as the third signal.

[0067] After obtaining the third signal, the signal based on the voltage of the floating diffusion region when the first switching transistor is turned on and off, under the condition that the second switching transistor is turned on by the control unit, is used as the fourth signal.

[0068] After obtaining the fourth signal, the signal of the voltage of the floating diffusion region when the first switching transistor is turned on and off, based on the state in which the second and fourth switching transistors are turned on by the control unit, is taken as the fifteenth signal.

[0069] After receiving the fifteenth signal, the signal of the voltage of the floating diffusion region when the third switching transistor is turned on and off, based on the state where the second and fourth switching transistors are turned on by the control unit, is taken as the sixteenth signal.

[0070] After receiving the sixteenth signal, the seventeenth signal is obtained by taking the signal of the voltage of the floating diffusion region when the fourth switching transistor is turned off while the second switching transistor is turned on by the control unit.

[0071] The output signal is generated from the solid-state imaging device to the outside based on the first to fourth signals and the fifteenth to seventeenth signals mentioned above.

[0072] Alternatively, in the aforementioned solid-state imaging device,

[0073] The aforementioned related double sampling is respectively included in the signal processing of obtaining the first differential signal based on the difference between the fourth signal and the first signal, and in the signal processing of obtaining the second differential signal based on the difference between the third signal and the second signal.

[0074] The voltage correction based on the reset of the holding capacitor is included in the signal processing of obtaining the third differential signal based on the difference between the fourth signal and the seventeenth signal, and the signal processing of obtaining the fourth differential signal based on the difference between the fifteenth signal and the sixteenth signal.

[0075] Alternatively, it could be the aforementioned solid-state imaging device.

[0076] It includes a storage unit that stores a first threshold set at least based on the capacitance of the aforementioned photoelectric conversion element, a second threshold set at least based on the capacitance of the aforementioned floating diffusion region, and a third threshold set at least based on the capacitance of the aforementioned floating diffusion region and the aforementioned first holding capacitance.

[0077] The aforementioned signal processing unit,

[0078] The value of the fourth differential signal is compared with the third threshold. If the value of the fourth differential signal is greater than the third threshold, the fourth differential signal is output as the output signal.

[0079] As a result of comparing the value of the fourth differential signal with the third threshold, if the value of the fourth differential signal is below the third threshold, the value of the third differential signal is compared with the first threshold; if the value of the third differential signal is greater than the first threshold, the third differential signal is output as the output signal.

[0080] As a result of comparing the value of the third differential signal with the first threshold, if the value of the third differential signal is below the first threshold, the value of the first differential signal is compared with the second threshold; if the value of the first differential signal is greater than the second threshold, the first differential signal is output as the output signal.

[0081] As a result of comparing the value of the first differential signal with the second threshold, when the value of the first differential signal is below the second threshold, the second differential signal is output as the output signal.

[0082] Alternatively, in the aforementioned solid-state imaging device,

[0083] The first holding capacitor is smaller than the second holding capacitor.

[0084] In addition, the shooting device involved in this application has any of the above-mentioned solid-state shooting devices. Attached Figure Description

[0085] Figure 1 This is a diagram showing the configuration of the solid-state imaging device according to the first embodiment.

[0086] Figure 2 This is the equivalent circuit diagram of the pixels possessed by the aforementioned solid-state imaging device.

[0087] Figure 3 This is a diagram showing the driving time point of the aforementioned pixel and the pixel signal corresponding to that driving time point.

[0088] Figure 4 This is a diagram showing the driving time point of the aforementioned pixel and the pixel signal corresponding to that driving time point.

[0089] Figure 5 This is a diagram showing the driving time point of the aforementioned pixel and the pixel signal corresponding to that driving time point.

[0090] Figure 6 This is a data flow diagram of the signal processing unit of the aforementioned solid-state imaging device.

[0091] Figure 7 This is a graph representing the input and output characteristics of the aforementioned pixels.

[0092] Figure 8 This is a graph showing the SN ratio of the aforementioned pixels.

[0093] Figure 9 This is a diagram showing the configuration of the solid-state imaging device according to the second embodiment.

[0094] Figure 10 This is the equivalent circuit diagram of the pixels possessed by the aforementioned solid-state imaging device.

[0095] Figure 11 This is a timing diagram of the aforementioned pixels.

[0096] Figure 12 This is a data flow diagram of the signal processing unit of the aforementioned solid-state imaging device.

[0097] Figure 13 This is a graph showing the SN ratio of the aforementioned pixels.

[0098] Figure 14 It is the equivalent circuit diagram and potential diagram of the pixels possessed by existing solid-state imaging devices.

[0099] Figure 15 This is a potential diagram showing the flow of signal charge in the aforementioned pixels.

[0100] Figure 16 This is a diagram showing the driving time points of the aforementioned pixels.

[0101] Figure 17 This is a graph showing the SN ratio of the aforementioned pixels. Detailed Implementation

[0102] The solid-state imaging device of this embodiment includes:

[0103] A photoelectric conversion element that generates electrical charge by converting input light into electrical charge;

[0104] A floating diffusion region that converts the aforementioned charge into a voltage corresponding to the amount of that charge;

[0105] A holding capacitor, connected to the aforementioned floating diffusion region, is capable of accumulating the charge overflowing from the aforementioned photoelectric conversion element; and

[0106] The signal processing unit processes signals based on the voltage converted in the aforementioned floating diffusion region.

[0107] The signal processing unit described above has multiple signal processing units, and the signal is read out using the aforementioned holding capacitor.

[0108] Based on this configuration, within a large range of input light intensity, the accumulated overflow charge in the capacitor is maintained, thereby achieving a high dynamic range. Simultaneously, by outputting a signal generated through signal processing based on the light intensity (the amount of charge generated by the photoelectric conversion element) of the input light to the photoelectric conversion element, gaps in discontinuous positions (light intensity) in the SN ratio graph are appropriately suppressed, thereby suppressing image quality degradation caused by these gaps. Details are as follows.

[0109] Even if the charge generated by the photoelectric conversion element due to the input of light exceeds the capacitance of the photoelectric conversion element and overflows, the holding capacitor will accumulate the overflowed charge, and the charge accumulated in the holding capacitor will be read out when the charge generated by the photoelectric conversion element is read out from the floating diffusion region, thereby achieving an input dynamic range (i.e., high dynamic range) above the capacitance of the photoelectric conversion element.

[0110] In addition, for the signal when reading the charge generated by the photoelectric conversion element using the holding capacitor, appropriate signal processing is performed by multiple processing units, thereby appropriately suppressing the gaps in the discontinuous positions (light intensity) in the SN ratio chart.

[0111] In this case, for example,

[0112] Alternatively, the aforementioned processing units may include a related dual sampling unit and a correction unit that corrects the signal based on the voltage at the time of reset of the aforementioned holding capacitor.

[0113] In this way, by performing correlated double sampling on the signal of the charge generated by the photoelectric conversion element read out using the holding capacitor, the signal is not affected by the dark current generated during the charge accumulation process in the photoelectric conversion element or the thermal noise generated by the holding capacitor, or such effects are sufficiently suppressed. Furthermore, when the amount of input light is large and charge overflows from the photoelectric conversion element, although the signal of the charge generated by the photoelectric conversion element read out can be corrected based on the voltage at the time of the holding capacitor's reset using the holding capacitor that has accumulated the overflowed charge, the corrected signal is affected by the dark current generated by the photoelectric conversion element or the thermal noise generated by the holding capacitor. However, for the aforementioned overflowed light amount, since the readout signal (charge count) is large, the influence of dark current or thermal noise in the signal is relatively small, thereby suppressing the gaps at discontinuous positions (the aforementioned overflow initiation positions) in the SN ratio graph (e.g., referring to...). Figure 8 (Gap G1, G2 shown).

[0114] Furthermore, the solid-state imaging device of this embodiment includes:

[0115] A photoelectric conversion element that generates electrical charge by converting input light into electrical charge;

[0116] A floating diffusion region that converts the aforementioned charge into a voltage corresponding to the amount of that charge;

[0117] A holding capacitor, connected to the aforementioned floating diffusion region, is capable of accumulating the charge overflowing from the aforementioned photoelectric conversion element; and

[0118] The signal processing unit processes signals based on the voltage converted in the aforementioned floating diffusion region.

[0119] The aforementioned signal processing unit,

[0120] When the charge generated by the light input to the photoelectric conversion element does not overflow from the photoelectric conversion element in the first state, the signals with different conversion gains in the floating diffusion region are subjected to correlation double sampling respectively.

[0121] When the signal is in the second state where the charge generated by the light input to the photoelectric conversion element overflows from the photoelectric conversion element, the signal is corrected based on the voltage at the time of reset of the holding capacitor.

[0122] According to this configuration, by maintaining the overflowing charge accumulated in the capacitor within a range of large input light intensity (i.e., the second state where the charge generated by inputting the aforementioned light to the photoelectric conversion element overflows from the photoelectric conversion element), a high dynamic range is achieved. Simultaneously, by outputting a signal generated through signal processing based on the light intensity (the amount of charge generated by the photoelectric conversion element) of the input light to the photoelectric conversion element, gaps in discontinuous positions (light intensity) in the SN ratio graph are appropriately suppressed, thereby suppressing image quality degradation caused by these gaps. Details are as follows.

[0123] Even if the charge generated by the photoelectric conversion element due to the input of light exceeds the capacitance of the photoelectric conversion element and overflows, the holding capacitor will accumulate the overflowed charge, and the charge accumulated in the holding capacitor will be read out when the charge (signal) generated by the photoelectric conversion element is read out from the floating diffusion region, thereby achieving an input dynamic range (i.e., high dynamic range) above the capacitance of the photoelectric conversion element.

[0124] Furthermore, in the first state, correlated double sampling can be performed on readouts of the charge generated by the photoelectric conversion element from the floating diffusion region at different conversion gains (e.g., readouts at high and low conversion gains). Therefore, these readout signals are not affected by the dark current generated during the charge accumulation process in the photoelectric conversion element or by the thermal noise generated by the holding capacitor, or such effects are sufficiently suppressed. Thus, the gaps at discontinuous positions (positions where conversion gain switches) in the SN ratio graph are suppressed (e.g., refer to...). Figure 8 The gap G1).

[0125] On the other hand, although the readout signal in the state where charge overflows from the photoelectric conversion element (second state) can be corrected based on the voltage at the time of capacitor reset, the readout signal is affected by dark current generated by the photoelectric conversion element or thermal noise generated by the holding capacitor because correlated double sampling cannot be performed. However, for the amount of light overflowed, since the readout signal (charge count) is large, the influence of dark current or thermal noise in the signal is relatively small. As a result, the gaps at discontinuous positions (the positions where overflow begins) in the SN ratio graph are suppressed (for example, refer to...). Figure 8 (Gap G2).

[0126] As described above, based on the above configuration, since the gaps at discontinuous positions in the SN ratio chart are suppressed (reduced), the image quality degradation caused by these gaps is effectively suppressed.

[0127] Alternatively, the aforementioned solid-state imaging device may include:

[0128] A first switching transistor is connected to the aforementioned photoelectric conversion element and the aforementioned floating diffusion region;

[0129] The second switching transistor connects the aforementioned floating diffusion region and the aforementioned holding capacitor;

[0130] The third switching transistor is connected to the aforementioned holding capacitor and the reset potential; and

[0131] The control unit controls each switching transistor.

[0132] The aforementioned floating diffusion region is sequentially connected to the aforementioned reset potential via the aforementioned second switching transistor and the aforementioned third switching transistor.

[0133] The aforementioned signal processing unit,

[0134] After the light is input to the photoelectric conversion element, the signal of the voltage of the floating diffusion region based on the state of the first to third switching transistors when the second switching transistor is turned on by the control unit is used as the first signal.

[0135] After receiving the first signal, the signal based on the voltage of the floating diffusion region when the second switching transistor is turned off by the control unit is used as the second signal.

[0136] After obtaining the second signal, the signal based on the voltage of the floating diffusion region when the first switching transistor is turned on and off by the control unit is used as the third signal.

[0137] After obtaining the third signal, the signal of the voltage of the floating diffusion region when the first switching transistor is turned on and off, based on the state where the second switching transistor is turned on by the control unit, is taken as the fourth signal.

[0138] After obtaining the fourth signal, the fifth signal is obtained by taking the voltage of the floating diffusion region when the third switching transistor is turned on and off, based on the state where the second switching transistor is turned on by the control unit.

[0139] Output signals from the solid-state imaging device to the outside can be generated based on the first to fifth signals mentioned above.

[0140] In this way, by obtaining five signals (first to fifth signals) from a single charge accumulation (input light) in the photoelectric conversion element, any one of the signal processing methods—correlated double sampling signal processing and signal processing based on the voltage at the time of reset of the holding capacitor—can be handled according to the amount of light input (the amount of charge generated by the photoelectric conversion element).

[0141] In this case, for example, in the aforementioned solid-state imaging device,

[0142] The aforementioned related double sampling is respectively included in the signal processing of obtaining the first differential signal based on the difference between the fourth signal and the first signal, and in the signal processing of obtaining the second differential signal based on the difference between the third signal and the second signal.

[0143] The voltage correction based on the aforementioned holding capacitor during reset is included in the signal processing that obtains the third differential signal based on the difference between the aforementioned fourth signal and the aforementioned fifth signal.

[0144] Alternatively, the aforementioned solid-state imaging device may include:

[0145] The storage unit stores a first threshold set at least based on the capacitance of the aforementioned photoelectric conversion element, and a second threshold set at least based on the capacitance of the aforementioned floating diffusion region.

[0146] The aforementioned signal processing unit,

[0147] The value of the third differential signal is compared with the first threshold. When the value of the third differential signal is greater than the first threshold, the third differential signal is output as the output signal.

[0148] As a result of comparing the value of the third differential signal with the first threshold, if the value of the third differential signal is below the first threshold, the value of the first differential signal is compared with the second threshold; if the value of the first differential signal is greater than the second threshold, the first differential signal is output as the output signal.

[0149] As a result of comparing the value of the first differential signal with the second threshold, when the value of the first differential signal is below the second threshold, the second differential signal is output as the output signal.

[0150] In this way, the signal processing unit uses two thresholds to select the signal to be output, thereby performing signal processing based on the amount of light input to the photoelectric conversion element (the amount of charge generated by the photoelectric conversion element) more reliably, such as switching between signal processing through correlated double sampling and signal processing based on the voltage at the time of reset of the holding capacitor, or selecting the signal generated by these processes.

[0151] Alternatively, the aforementioned solid-state imaging device may include:

[0152] The second holding capacitor, which is different from the first holding capacitor, is capable of accumulating the charge overflowing from the photoelectric conversion element.

[0153] A first switching transistor is connected to the aforementioned photoelectric conversion element and the aforementioned floating diffusion region;

[0154] The second switching transistor connects the aforementioned floating diffusion region and the aforementioned holding capacitor;

[0155] The third switching transistor is connected to the second holding capacitor and the reset potential;

[0156] A fourth switching transistor, which connects the first holding capacitor and the second holding capacitor; and

[0157] The control unit controls each switching transistor.

[0158] The aforementioned floating diffusion region is sequentially connected to the second holding capacitor via the second switching transistor and the fourth switching transistor, and is sequentially connected to the reset potential via the second switching transistor, the fourth switching transistor, and the third switching transistor.

[0159] The first holding capacitor is connected to the reset potential via the fourth switching transistor and the third switching transistor.

[0160] The aforementioned signal processing unit,

[0161] After the light is input to the photoelectric conversion element, the signal of the voltage of the floating diffusion region based on the state of the first to fourth switching transistors when the second switching transistor is turned on by the control unit is used as the first signal.

[0162] After receiving the first signal, the signal based on the voltage of the floating diffusion region when the second switching transistor is turned off by the control unit is used as the second signal.

[0163] After receiving the second signal, the voltage signal based on the floating diffusion region when the first switching transistor is turned on and off by the control unit is used as the third signal.

[0164] After obtaining the third signal, the signal based on the voltage of the floating diffusion region when the first switching transistor is turned on and off, under the condition that the second switching transistor is turned on by the control unit, is used as the fourth signal.

[0165] After obtaining the fourth signal, the signal of the voltage of the floating diffusion region when the first switching transistor is turned on and off, based on the state in which the second and fourth switching transistors are turned on by the control unit, is taken as the fifteenth signal.

[0166] After receiving the fifteenth signal, the signal of the voltage of the floating diffusion region when the third switching transistor is turned on and off, based on the state where the second and fourth switching transistors are turned on by the control unit, is taken as the sixteenth signal.

[0167] After receiving the sixteenth signal, the seventeenth signal is obtained by taking the signal of the voltage of the floating diffusion region when the fourth switching transistor is turned off while the second switching transistor is turned on by the control unit.

[0168] The output signal is generated from the solid-state imaging device to the outside based on the first to fourth signals and the fifteenth to seventeenth signals mentioned above.

[0169] In this way, by obtaining seven signals (first to fourth signals and fifteenth to seventeenth signals) through a single charge accumulation (input light) of the photoelectric conversion element, any one of the signal processing methods—correlated double sampling signal processing and signal processing based on the voltage at the time of reset of the holding capacitor—can be addressed according to the amount of light input (the amount of charge generated by the photoelectric conversion element).

[0170] Furthermore, the device incorporates two holding capacitors (a first holding capacitor and a second holding capacitor) capable of accumulating charge overflowing from the photoelectric conversion element. By adjusting the number of holding capacitors used according to the amount of charge generated by the photoelectric conversion element, image quality degradation caused by holding capacitors such as thermal noise can be suppressed. In other words, since a larger holding capacitor results in greater thermal noise, etc., using the first holding capacitor to accumulate charge generated by the photoelectric conversion element without using the second holding capacitor suppresses image quality degradation caused by holding capacitors such as thermal noise compared to using a single holding capacitor to ensure the same capacitance (the total capacitance of the first and second holding capacitors).

[0171] In this case, for example, in the aforementioned solid-state imaging device,

[0172] The aforementioned related double sampling is respectively included in the signal processing of obtaining the first differential signal based on the difference between the fourth signal and the first signal, and in the signal processing of obtaining the second differential signal based on the difference between the third signal and the second signal.

[0173] The voltage correction based on the reset of the holding capacitor is included in the signal processing of obtaining the third differential signal based on the difference between the fourth signal and the seventeenth signal, and the signal processing of obtaining the fourth differential signal based on the difference between the fifteenth signal and the sixteenth signal.

[0174] Alternatively, the aforementioned solid-state imaging device may include a storage unit.

[0175] The aforementioned storage unit stores a first threshold set at least based on the capacitance of the aforementioned photoelectric conversion element, a second threshold set at least based on the capacitance of the aforementioned floating diffusion region, and a third threshold set at least based on the capacitance of the aforementioned floating diffusion region and the aforementioned first holding capacitance.

[0176] The aforementioned signal processing unit,

[0177] The value of the fourth differential signal is compared with the third threshold. If the value of the fourth differential signal is greater than the third threshold, the fourth differential signal is output as the output signal.

[0178] As a result of comparing the value of the fourth differential signal with the third threshold, if the value of the fourth differential signal is below the third threshold, the value of the third differential signal is compared with the first threshold; if the value of the third differential signal is greater than the first threshold, the third differential signal is output as the output signal.

[0179] As a result of comparing the value of the third differential signal with the first threshold, if the value of the third differential signal is below the first threshold, the value of the first differential signal is compared with the second threshold; if the value of the first differential signal is greater than the second threshold, the first differential signal is output as the output signal.

[0180] As a result of comparing the value of the first differential signal with the second threshold, when the value of the first differential signal is below the second threshold, the second differential signal is output as the output signal.

[0181] In this way, the signal processing unit uses three thresholds to select the signal to be output, thereby performing signal processing more reliably based on the amount of light input to the photoelectric conversion element (the amount of charge generated by the photoelectric conversion element), that is, switching between signal processing through correlated double sampling and signal processing based on the voltage at the time of reset of the holding capacitor, or selecting the signal generated by these processes.

[0182] Furthermore, in the aforementioned solid-state imaging device,

[0183] The first holding capacitor is preferably smaller than the second holding capacitor.

[0184] As the amount of charge accumulated in the holding capacitor increases, the relative magnitude of noise (noise caused by the holding capacitor, such as thermal noise) corresponding to the amount of charge read from the holding capacitor is suppressed; that is, the impact of the noise on image quality is suppressed. Therefore, by reducing the first holding capacitor used when the amount of charge from the photoelectric conversion element is small to suppress the noise generated by the first holding capacitor when only the first holding capacitor is used, and by increasing the second holding capacitor used when the amount of charge from the photoelectric conversion element is large and the impact of the noise on image quality is relatively small, a high dynamic range can be achieved, and the degradation of image quality caused by the holding capacitor can be appropriately suppressed.

[0185] In addition, the shooting device involved in this application has any of the above-mentioned solid-state shooting devices.

[0186] Hereinafter, the first embodiment of the present invention will be described with reference to the accompanying drawings.

[0187] [Example of the composition of a camera device]

[0188] The imaging device in this embodiment is, for example, a smartphone or a digital camera. Furthermore, the solid-state imaging device in this embodiment is an embedded imaging device and includes a solid-state imaging element (SOLID STATEIMAGE SENSOR) including a CMOS image sensor. In addition, the solid-state imaging device 1 includes at least a solid-state imaging element; the solid-state imaging device 1 in this embodiment includes a CMOS image sensor (solid-state imaging element), a signal processing unit 7, and a memory 8.

[0189] Specifically, such as Figure 1 As shown, the solid-state imaging device 1, which incorporates this imaging device, includes a pixel array unit 2, a vertical driving unit 3, multiple column signal processing units 4, a horizontal driving unit 5, a control unit 6, and a signal processing unit 7. Furthermore, the solid-state imaging device 1 includes a memory 8 capable of storing signals processed by the signal processing unit 7. In the solid-state imaging device 1 of this embodiment, at least the pixel array unit 2, the vertical driving unit 3, the multiple column signal processing units 4, the horizontal driving unit 5, and the control unit 6 constitute a CMOS image sensor.

[0190] At least, the pixel array unit 2, vertical driving unit 3, column signal processing unit 4, horizontal driving unit 5, control unit 6, and signal processing unit 7 are disposed on the same semiconductor substrate or on multiple electrically connected semiconductor substrates. Furthermore, the signal processing unit 7 and memory 8 can be disposed on the semiconductor substrate on which the pixel array unit 2, vertical driving unit 3, column signal processing unit 4, horizontal driving unit 5, and control unit 6 are disposed, or they can be disposed on different substrates. That is, the placement of the signal processing unit 7 and memory 8 is not limited.

[0191] The pixel array unit 2 has a plurality of pixels 10 arranged in a two-dimensional matrix. Each of these plurality of pixels 10 is an effective unit pixel, which has a photoelectric conversion element 11. The photoelectric conversion element 11 can perform photoelectric conversion on the input light (incident light), accumulate a signal charge (charge) corresponding to the amount of input light internally, and output the accumulated signal charge. The detailed configuration of each pixel 10 will be described later.

[0192] In addition to the effective unit pixels, the plurality of pixels 10 may also include pseudo unit pixels with a structure that does not have a photoelectric conversion element, or light-shielding unit pixels that block the input of light from the outside by shading the light-receiving surface. The light-shielding unit pixels have the same structure as the effective unit pixels, except that they have a structure that blocks the light-receiving surface.

[0193] Furthermore, the pixel array section 2, relative to the matrix-like pixel arrangement, has a plurality of row signal lines 21 arranged in each row and extending in the row direction, and a plurality of column signal lines 22 arranged in each column and extending in the column direction. Each of the plurality of row signal lines 21 is connected to the vertical drive section 3, and each of the plurality of column signal lines 22 is connected to the corresponding column signal processing section 4.

[0194] The vertical driving unit 3, for example, is composed of a shift register. It selects a predetermined row signal line 21, thereby supplying pulses (signals) for driving the pixels 10 to the selected row signal line 21, driving the pixels 10 row by row. Specifically, the vertical driving unit 3 sequentially selects each pixel 10 of the scanning pixel array unit 2 in the vertical direction row by row, and supplies pixel signals based on the signal charge generated in the photoelectric conversion element 11 of each pixel 10 according to the amount of input light to the column signal processing unit 4 via the column signal line 22.

[0195] Each of the multiple column signal processing units 4 is configured in each column of the pixel 10, and performs signal processing such as noise reduction on the pixel signal output from the pixel 10 of a row for each pixel column. In this embodiment, each column signal processing unit 4 performs signal processing such as correlated double sampling (CDS) and A / D (Analog / Digital) conversion to remove fixed-pattern noise inherent in the pixel.

[0196] The horizontal drive unit 5 is, for example, composed of a shift register. By sequentially outputting horizontal scanning pulses, it sequentially selects each of the multiple column signal processing units 4 and sequentially outputs the pixel signal processed by each column signal processing unit 4 to the signal processing unit 7.

[0197] The control unit 6 controls the operation of each part of the solid-state imaging device 1. Specifically, the control unit 6 receives input clock signals and data for indicating operating modes, and outputs data such as internal information of the solid-state imaging device 1. In detail, the control unit 6 generates clock signals or control signals based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock signal, which serve as the reference for the operation of the vertical drive unit 3, the column signal processing unit 4, and the horizontal drive unit 5, and outputs the generated clock signals or control signals to the vertical drive unit 3, the column signal processing unit 4, and the horizontal drive unit 5, etc.

[0198] The signal processing unit 7 performs various signal processing operations, such as arithmetic processing, on the pixel signals output from each column of the signal processing unit 4. Specifically, the signal processing unit 7 includes an arithmetic unit 71 that performs arithmetic on the pixel signals, a judgment unit 72 that judges the result of the arithmetic operation, and a selector 73 that outputs a signal based on the judgment result of the judgment unit (see reference). Figure 6 The signal processing unit 7 in this embodiment is a DSP (Digital Signal Processor). The specific processing operations of the signal processing unit 7 will be described later.

[0199] Furthermore, the specific placement of the signal processing unit 7 is not limited. Although the signal processing unit 7 is located at a different position from the CMOS image sensor in the solid-state imaging device 1 of this embodiment, the entire configuration of the signal processing unit 7 may be mounted on the CMOS image sensor, or a portion of the signal processing unit 7 may be mounted on the CMOS image sensor.

[0200] The memory 8 is a row memory, frame memory, FIFO, etc., capable of storing pixel signals output from each column signal processing unit 4. The specific structure of the memory 8 will be described later.

[0201] [Pixel Composition]

[0202] Next, refer to Figure 2 The specific structure of the pixels 10 arranged in a matrix in the pixel array section 2 is explained.

[0203] Pixel 10 includes: a photoelectric conversion element 11 that generates signal charge through photoelectric conversion based on input light; a floating diffusion region 12 that converts the signal charge generated by the photoelectric conversion element 11 into a voltage signal (voltage) corresponding to the amount of the signal charge; and a holding capacitor 13 connected to the floating diffusion region 12 and capable of accumulating the signal charge overflowing from the photoelectric conversion element 11. The photoelectric conversion element 11 in this embodiment is, for example, a photodiode.

[0204] Additionally, pixel 10 includes: a transmission transistor (first switching transistor) 14, which is connected to photoelectric conversion element 11 and floating diffusion region 12; a holding switching transistor (second switching transistor) 15, which is connected to floating diffusion region 12 and holding capacitor 13; a reset transistor (third switching transistor) 16, which is connected to holding capacitor 13 and reset power supply (reset potential) VDD1; an amplification transistor 17, which amplifies the voltage signal of floating diffusion region 12; and a selection transistor 18, which is connected to amplification transistor 17 and column signal line 22.

[0205] For the multiple pixels 10 arranged in a matrix, multiple row signal lines 21 are routed in each pixel row. Furthermore, various driving signals φTX, φS, φRES, and φSEL are supplied from the vertical driving unit 3 to each pixel 10 via the row signal lines 21. The aforementioned driving signals φTX, φS, φRES, and φSEL are the aforementioned pulses.

[0206] The floating diffusion region 12 converts the signal charge generated by the photoelectric conversion element 11 into a voltage signal and outputs it. In this embodiment, the floating diffusion region 12 is also connected to the reset power supply VDD1 in sequence via the holding switch transistor 15 and the reset transistor 16.

[0207] The holding capacitor 13 is a capacitor, as described above, connected to the floating diffusion region 12 via the holding switch transistor 15, and also connected to the reset power supply VDD1 via the reset transistor 16.

[0208] A drive signal φTX is applied to the gate electrode of the transmission transistor 14. This drive signal φTX is output from the vertical drive unit 3 based on a signal (command) from the control unit 6. When the drive signal φTX becomes Hi (i.e., when the transmission transistor 14 is turned on), the transmission gate of the transmission transistor 14 becomes on, and the signal charge accumulated in the photoelectric conversion element 11 is transferred to the floating diffusion region 12 via the transmission transistor 14. Furthermore, when the drive signal φTX becomes Low, the transmission transistor 14 is turned off.

[0209] A drive signal φS is applied to the gate electrode of the holding switch transistor 15. This drive signal φS is output from the vertical drive unit 3 based on a signal from the control unit 6. When the drive signal φS changes to Hi (i.e., the holding switch transistor 15 is turned on), the holding gate of the holding switch transistor 15 becomes on, and signal charge can move from the floating diffusion region 12 to the holding capacitor 13. Furthermore, when the drive signal φS changes to Low, the holding switch transistor 15 is turned off. In addition, even when the holding switch transistor 15 is turned off, the holding gate (barrier) of the holding switch transistor 15 is adjusted to accumulate in the holding capacitor 13 when signal charge overflows from the photoelectric conversion element 11.

[0210] A drive signal φRES is applied to the gate electrode of the reset transistor 16. This drive signal φRES is output from the vertical drive unit 3 based on a signal from the control unit 6. When the drive signal φRES becomes Hi (i.e., the reset transistor 16 is turned on), the reset gate of the reset transistor 16 becomes on, and the potential of the floating diffusion region 12 and the holding capacitor 13, or the potential of the holding capacitor 13, is reset to the level of the reset power supply (reset potential) VDD1 (reset level) according to the drive signal φS applied to the gate electrode of the holding switch transistor 15. Furthermore, when the drive signal φRES becomes Low, the reset transistor 16 is turned off.

[0211] In the amplifying transistor 17, the gate electrode is connected to the floating diffusion region 12, and the drain electrode is connected to the power supply VDD2. This amplifying transistor 17 serves as the input section of a readout circuit (so-called a source follower circuit SF) that reads the voltage of the floating diffusion region 12 as a pixel signal. That is, by connecting the source electrode of the amplifying transistor 17 to the column signal line 22 via the select transistor 18, a constant current source and a source follower circuit SF are connected to one end of the column signal line 22.

[0212] The select transistor 18 is connected to the source electrode of the amplifying transistor 17 and the column signal line 22. A drive signal φSEL is applied to the gate electrode of the select transistor 18. This drive signal φSEL is output from the vertical drive unit 3 based on a signal from the control unit 6. When the drive signal φSEL becomes Hi (i.e., the select transistor 18 is turned on), the select gate of the select transistor 18 becomes on, and the pixel 10 becomes selected. Thus, the pixel signal output from the amplifying transistor 17 is output to the column signal line 22 via the select transistor 18. Furthermore, when the drive signal φSEL becomes Low, the select transistor 18 is turned off.

[0213] [Example of pixel driving in a solid-state imaging device]

[0214] See also Figures 3-5 The driving timing of pixel 10, as described above, will be explained. Furthermore, Figures 3-5 The driving signal (pulse of the control signal) of pixel 10 and the corresponding output voltage (pixel signal) appearing on column signal line 22 are shown in the above. Figures 3-5 In the diagram, the drive signals φSEL, φRES, φS, and φTX are all the same, and Vout in each diagram represents the output voltage.

[0215] First, at time t01, with the selection transistor 18 off, the transmission transistor 14, the holding switch transistor 15, and the reset transistor 16 are turned on, and the floating diffusion region 12 and the holding capacitor 13 are changed to the reset level.

[0216] Thus, with the floating diffusion region 12 connected to the reset power supply VDD1, the transmission transistor 14 is turned off, thereby the photoelectric conversion element 11 becomes floating, and the signal charge generated by the light input begins to accumulate in the photoelectric conversion element 11.

[0217] Almost simultaneously with the turn-off of the transmission transistor 14 (specifically, with a slight delay), the holding switch transistor 15 and the reset transistor 16 are turned off, thereby causing the floating diffusion region 12 and the holding capacitor 13 to also become floating. At this time, when signal charge overflows from the photoelectric conversion element 11, the floating diffusion region 12 and the holding capacitor 13 can retain (accumulate) the overflowed signal charge.

[0218] Thus, with the transmission transistor 14, the holding switch transistor 15, and the reset transistor 16 off, the pixel signal of pixel 10 is read out starting from time t02 after a predetermined accumulation period ΔT after the transmission transistor 14 is turned off.

[0219] Specifically, when the switching transistors 14-16 and 18 of pixel 10 are in the off state, the control unit 6 (more specifically, the vertical drive unit 3 that receives the instructions of the control unit 6) changes the drive signal φSEL to Hi, thereby turning on the selection transistor 18, and the pixel 10 is connected to the column signal line 22.

[0220] Subsequently, the control unit 6 changes the drive signal φS to Hi, turning on the holding switch transistor 15, thereby electrically connecting the floating diffusion region 12 to the holding capacitor 13. As a result, the thermal noise (specifically, thermal noise charge) in the floating diffusion region 12 and the holding capacitor 13, as well as the dark current (specifically, dark current charge generated during the accumulation of signal charge in the photoelectric conversion element 11), are mixed. At this time, the voltage of the floating diffusion region 12 (the holding capacitor reference potential) is read out from the source follower circuit SF after a finite time from the moment t03 when it appears, and after A / D conversion, it is stored in the memory 8 as the first signal (pixel signal).

[0221] In the solid-state imaging device 1 of this embodiment, in the column signal processing unit 4, the first signal is stored in the memory 8 after A / D conversion (i.e., after conversion to a digital signal), but this configuration is not limited to this. Subsequent processing can also be performed while the pixel signal (voltage of the floating diffusion region 12) read from the source follower circuit SF remains an analog signal. Furthermore, the same applies to the pixel signals (second to fifth signals) read from the source follower circuit SF at subsequent time points.

[0222] Next, at time t04, the control unit 6 changes the drive signal φS to Low, turning off the holding switch transistor 15 and electrically disconnecting the floating diffusion region 12 from the holding capacitor 13. In this state, the potential of the floating diffusion region 12 (the floating diffusion region reference potential) is read from the source follower circuit SF and, after A / D conversion, is stored in the memory 8 as a second signal (pixel signal). This second signal also includes the dark current component stored in the holding switch transistor 15.

[0223] Next, at time t05, the control unit 6 changes the drive signal φTX to Hi, turns on the transmission transistor 14, and after the photoelectric conversion element 11 transmits the signal charge accumulated during the accumulation period ΔT to the floating diffusion region 12, it changes the drive signal φTX to Low, turns off the transmission transistor 14.

[0224] The signal is read from the source follower circuit SF at time t06 and, after A / D conversion, is stored in memory 8 as the third signal (pixel signal).

[0225] Next, at time t07, the control unit 6 changes the drive signal φS to Hi and turns on the holding switch transistor 15, thereby turning on the floating diffusion region 12 and the holding capacitor 13. Then, it changes the drive signal φTX to Hi and Low again, turning on and off the transmission transistor 14. At this time, the voltage of the floating diffusion region 12 is read from the source follower circuit SF and stored in the memory 8 as the fourth signal (pixel signal) after A / D conversion.

[0226] Finally, at time t08, the control unit 6 changes the drive signal φRES to Hi, turning on the reset transistor 16. This connects the floating diffusion region 12 and the holding capacitor 13 to the reset power supply (reset potential) VDD1, initializing (resetting) all signal charges in the floating diffusion region 12 and the holding capacitor 13. The voltage (reset level) of the initialized floating diffusion region 12 and the holding capacitor 13 is read from the source follower circuit SF and stored in the memory 8 as the fifth signal (pixel signal) after A / D conversion.

[0227] In the driving of pixel 10 described above, the signal charge generated by the light input to pixel 10 (photoelectric conversion element 11) during the accumulation period ΔT does not exceed the capacitance that photoelectric conversion element 11 can retain, and the signal charge accumulated (retained) by photoelectric conversion element 11 is only processed in the floating diffusion region 12 (in the case of the first premise: refer to Figure 3 At time t05, signal charge below the processing limit of the floating diffusion region 12 is transferred to the floating diffusion region 12, and the pixel signal (voltage of the floating diffusion region 12) read from the source follower circuit SF changes accordingly (refer to Vout). At this time, the pixel signal (voltage of the floating diffusion region 12: refer to...) Figure 3 The Vout value in the A / D converter does not exceed the range of the A / D conversion (input dynamic range). That is, the signal is properly held in the floating diffusion region 12 without overflowing.

[0228] Additionally, at time t07, since no new signal charge is transferred from the photoelectric conversion element 11 to the floating diffusion region 12 when the transmission transistor 14 is turned on and off again, the fourth signal (pixel signal) read from the source follower circuit SF becomes a signal corresponding to the voltage of the floating diffusion region 12 in a state where the signal charge transferred from the photoelectric conversion element 11 is divided by the capacitance ratio of the floating diffusion region 12 and the holding capacitor 13.

[0229] Under the first premise mentioned above, as well as Figure 6 As shown, the signal processing unit 7 subtracts the second signal from the third signal, thereby recovering the final signal (signal Z) after photoelectric conversion by pixel 10. Details are as follows.

[0230] The second signal includes the dark current generated in the floating diffusion region 12 and the holding capacitor 13 during the accumulation of signal charge in the photoelectric conversion element 11 (i.e., during the accumulation period ΔT), as well as all the thermal noise generated after reset at time t01. However, by transferring signal charge from the photoelectric conversion element 11 to the floating diffusion region 12 to generate a third signal, which is then added to the second signal, correlated double sampling can be performed. Thus, by subtracting the second signal from the third signal in the signal processing unit 7 (see reference...) Figure 6 The first signal processing, based on the performance determined by the circuit's CMRR (common-mode rejection ratio), almost completely eliminates dark current and thermal noise in practical applications. As a result, the final signal (signal Z) after photoelectric conversion by pixel 10 is recovered.

[0231] Furthermore, under the first premise, the other signals stored in memory 8 (the first signal, the fourth signal, and the fifth signal) do not require the recovery of the final signal (signal Z).

[0232] Furthermore, the signal charge generated by the light input to pixel 10 (photoelectric conversion element 11) during the accumulation period ΔT does not exceed the capacitance that photoelectric conversion element 11 can hold, and therefore will not overflow from photoelectric conversion element 11. However, if the amount exceeds the amount that floating diffusion region 12 can handle and is the amount that floating diffusion region 12 can handle while electrically connected to holding capacitor 13 (in the case of the second premise: refer to...) Figure 4 Since the signal charge accumulated in the photoelectric conversion element 11 exceeds the amount that the floating diffusion region 12 can handle, the third signal obtained at time t06 is the signal of the saturated state of the floating diffusion region 12.

[0233] However, while the switching transistor 15 remains on and the capacitor 13 remains electrically connected to the floating diffusion region 12 from time t06 to time t07, the transfer of signal charge from the photoelectric conversion element 11 to the floating diffusion region 12 is performed again, thereby obtaining a signal of all signal charges generated by the photoelectric conversion element 11 during the accumulation period ΔT as a fourth signal.

[0234] Under the aforementioned second premise, the signal processing unit 7 subtracts the first signal from the fourth signal, thereby recovering the final signal (signal Y) converted by the photoelectric conversion of the pixel 10. Details are as follows.

[0235] The first signal includes all the dark current generated in the floating diffusion region 12 and the holding capacitor 13 during the accumulation of signal charge in the photoelectric conversion element 11, as well as the thermal noise generated after reset at time t01. However, by transferring all signal charge from the photoelectric conversion element 11 to the floating diffusion region 12 in the state of being electrically connected to the holding capacitor 13, a fourth signal is generated and added to the first signal, enabling correlated double sampling. Thus, by subtracting the first signal (see reference) from the fourth signal in the signal processing unit 7... Figure 6 The second signal processing, based on the performance determined by the CMRR of the circuit, almost completely removes dark current and thermal noise in practical applications. As a result, the final signal (signal Y) after photoelectric conversion by pixel 10 is recovered.

[0236] Furthermore, under the second premise, the other signals stored in memory 8 (the second signal, the third signal, and the fifth signal) do not require the recovery of the final signal (signal Y).

[0237] Furthermore, the signal charge generated by the light input to pixel 10 (photoelectric conversion element 11) during the accumulation period ΔT does not exceed the capacitance that photoelectric conversion element 11 can hold, and therefore will not overflow from photoelectric conversion element 11 to holding capacitor 13. However, this is a manageable amount when the floating diffusion region 12 is electrically connected to the holding capacitor 13 (in the case of the third premise: refer to...). Figure 5 At time t03, since the signal charge overflowing from the photoelectric conversion element 11 has accumulated in the floating diffusion region 12 and the holding capacitor 13, the output (pixel signal) corresponding to the same dark current and thermal noise as the first premise or the second premise, as well as the overflowed signal charge, is stored in the memory 8 as the first signal and the second signal.

[0238] Additionally, at time t05, the transmission transistor 14 is turned on, and the signal charge accumulated in the photoelectric conversion element 11 is transferred from the photoelectric conversion element 11 to the floating diffusion region 12. However, since the photoelectric conversion element 11 is in a full state, the third signal is the signal of the saturated state of the photoelectric conversion element 11.

[0239] Additionally, at time t07, with all signal charges (signal charges accumulated in photoelectric conversion element 11 and signal charges overflowing from photoelectric conversion element 11) held (accumulated) by floating diffusion region 12 and holding capacitor 13 in the form of added dark current and thermal noise, the voltage of floating diffusion region 12 is read out from source follower circuit SF, and the read-out pixel signal is recorded as the fourth signal in memory 8.

[0240] In addition, the fifth signal obtained at time t08 is a reset level (the reset signal of pixel 10) that is independent of the signal charge accumulated in the photoelectric conversion element 11.

[0241] Under the aforementioned third premise, the signal processing unit 7 subtracts the fifth signal from the fourth signal, etc. (see reference). Figure 6 The third signal processing recovers the final signal (signal X) converted by the photoelectric conversion of pixel 10. Details are as follows.

[0242] Unlike the first and second premises, in the third premise, the first signal contains signal charge overflowing from the photoelectric conversion element 11, and therefore cannot be used as a reference reset level. Therefore, after reading the signal containing all signal charge generated by the photoelectric conversion element 11 during the accumulation period ΔT from the source follower circuit SF, at time t08, pixel 10 is re-initialized, and the pixel signal read after re-initialization is recorded in memory 8 as the reset level (fifth signal).

[0243] The reset level (fifth signal) differs from the reset level read from the first signal to the fourth signal because the floating diffusion region 12 and the holding capacitor 13 are in a floating state after they become low impedance at time t08. Therefore, in the fifth signal, the effects of thermal noise determined by capacitance value and temperature, Boltzmann constant, and the effects of dark current and shot noise during the accumulation period ΔT cannot be ignored.

[0244] However, by setting the capacitance of the photoelectric conversion element 11 to be sufficiently large (more than twice the capacitance of the floating diffusion region 12 in this embodiment) and the combined capacitance (processing signal amount) of the floating diffusion region 12 and the holding capacitor 13 to be sufficiently large (more than 1.5 times the capacitance of the photoelectric conversion element 11 in this embodiment), the aforementioned thermal noise, dark current ΔT during accumulation, and shot noise become sufficiently smaller than the shot noise contained in the signal related to the signal charge accumulated in the photoelectric conversion element 11. Therefore, the impact on the image quality of the final image in a smartphone, camera, etc., equipped with a solid-state imaging device 1 can be sufficiently suppressed. As a result, the signal processing unit 7 subtracts the fifth signal, etc. (see reference 1) from the fourth signal. Figure 6The third signal processing recovers the final signal (signal X) after photoelectric conversion by pixel 10.

[0245] As described above, in order to recover the final signal after photoelectric conversion in pixel 10, in the solid-state imaging device 1 of this embodiment, the signal processing unit 7 performs signal processing (operation) according to the above-mentioned premises (first to third premises). Details are as follows.

[0246] After reading the pixel signals (first to fifth signals) from a certain pixel 10, the pixel signals are stored in the memory 8. The conversion results of each pixel 10 are processed one by one, in parallel, and in pipeline in the signal processing unit 7.

[0247] Here, as Figure 6 As shown, the memory 8 of this embodiment includes: a first signal storage unit 801 that stores a first signal; a second signal storage unit 802 that stores a second signal; a third signal storage unit 803 that stores a third signal; a fourth signal storage unit 804 that stores a fourth signal; a fifth signal storage unit 805 that stores a fifth signal; an offset storage unit 820 that stores an offset (arbitrary) value taking into account dark current; a first gain storage unit 831 that stores a first gain coefficient, which adjusts the signal output in the solid-state imaging device 1 relative to the light input to change monotonically and continuously; and a second gain storage unit 832 that stores a second gain coefficient for adjusting the charge-voltage conversion gain.

[0248] In addition, the memory 8 also has a first threshold storage section 841 for storing a first threshold and a second threshold storage section 842 for storing a second threshold.

[0249] The first threshold is a value set at least based on the capacitance of the photoelectric conversion element 11. Specifically, the first threshold is a value set considering detection bias or individual bias of the photoelectric conversion element 11 within the maximum signal quantity determined by the capacitance of the photoelectric conversion element 11. For example, in this embodiment, the first threshold is less than... Figure 7 The value of the light quantity when the signal quantity of the middle signal Y is saturated (the boundary position between the second and third intervals) and the value of the signal quantity corresponding to the intersection point with the vertical line (dashed line) set near the light quantity at the above saturation point. Here, Figure 7 It is a graph that shows the input-output characteristics when the horizontal axis is set to the amount of light input to the pixel and the vertical axis is set to the signal quantities (pixel signal quantities) of signals X, Y, and Z.

[0250] Furthermore, the second threshold is a value set at least based on the capacitance of the floating diffusion region 12. Specifically, the second threshold is a value set considering detection deviation or individual deviation of the photoelectric conversion element 11 within the maximum signal quantity determined by the capacitance of the floating diffusion region 12. For example, in this embodiment, the second threshold is the value of the light quantity when the signal quantity is less than the signal Z at saturation (the boundary position between the first and second intervals) and the value of the signal quantity corresponding to the intersection of a vertical line (dashed line) set near the light quantity at the aforementioned saturation point.

[0251] Return to Figure 6 Specifically, in the signal processing unit 7, for each pixel signal (first to fifth signals) of pixel 10, the arithmetic unit 71 calculates a signal (second differential signal) Z (first signal processing) based on the difference between the third signal stored in the third signal storage unit 803 of the memory 8 and the second signal stored in the second signal storage unit 802. The difference between the fourth signal stored in the fourth signal storage unit 804 of the memory 8 and the first signal stored in the first signal storage unit 801 is multiplied by the second gain coefficient stored in the second gain storage unit 832 to calculate a signal (first differential signal) Y (second signal processing). After adding the difference between the fourth signal stored in the fourth signal storage unit 804 of the memory 8 and the fifth signal stored in the fifth signal storage unit 805 and the offset value stored in the offset storage unit 820, the difference is multiplied by the first gain coefficient stored in the first gain storage unit 831 to calculate a signal (third differential signal) X (third signal processing). The signals X, Y, and Z calculated by the aforementioned arithmetic unit 71 are input into the selector 73 before the final output, awaiting output instructions.

[0252] Thus, when the calculation unit 71 calculates signals X, Y, and Z, the judgment unit 72 first compares signal X with the first threshold stored in the first threshold storage unit 841. If signal X is greater than the first threshold, it instructs the signal X to be output to the selector 73.

[0253] In the comparison between the signal X and the first threshold, when the signal X is below the first threshold, the determination unit 72 then compares the signal Y with the second threshold stored in the second threshold storage unit 842. When the signal Y is greater than the second threshold, it instructs the signal Y to be output to the selector 73.

[0254] In the comparison between the signal Y and the second threshold, when the signal Y is below the second threshold, the determination unit 72 instructs the signal Z to be output to the selector 73.

[0255] When the decision unit 72 inputs any of the above-mentioned instructions (output instruction commands) into the selector 73, the selector 73 outputs any one of the input instruction signals X, Y, and Z (processing result).

[0256] Here, the decision sequence of the decision unit 72 described above will be explained.

[0257] like Figure 7 As shown, due to saturation when the fourth signal is read out, the signal strength of signal Y decreases in the fourth interval as the input light intensity increases. Furthermore, the signal strength of signal Z saturates in the second interval and decreases with increasing light intensity after the third interval.

[0258] Therefore, in the determination unit 72, when signal Y or signal Z is used as the first condition of the conditional branch of the determination, the pixel signal quantity that satisfies the condition (i.e., the amount of light input that becomes the same signal quantity) exists in two discontinuous intervals (refer to) when the interval with less input light quantity and the interval with more input light quantity. Figure 7 The two intersection points a1 and a2 of the double-dotted line representing semaphore A and the line representing signal Y, and the two intersection points b1 and b2 of the line representing semaphore B and the line representing signal Z, make it unclear which interval's condition (which of the two intersection points) has been selected, thus leading to a judgment error (false judgment). Therefore, the judgment unit 72 of this embodiment uses the signal X in the interval where there is no decrease in semaphore as the initial judgment criterion, and then uses the signal Y to prevent the aforementioned judgment error.

[0259] Furthermore, the above-mentioned order of judgment is not mandatory. For example, if no erroneous judgment (the above-mentioned pseudo-judgment) occurs due to the known amount of light input to pixel 10, the signal Y can be used as the first condition of the conditional branch of the judgment.

[0260] The solid-state imaging device 1 described above includes: a photoelectric conversion element 11 that generates signal charge through photoelectric conversion based on input light; a floating diffusion region 12 that converts the signal charge into a voltage corresponding to the amount of the signal charge; a holding capacitor 13 connected to the floating diffusion region 12 and capable of accumulating the signal charge overflowing from the photoelectric conversion element 11; and a signal processing unit 7 that processes the signal based on the voltage converted by the floating diffusion region 12. Furthermore, the signal processing unit 7 has multiple processing units for pixel signals read out using the holding capacitor 13.

[0261] The solid-state imaging device 1 has a large range of light quantity (input light quantity) input to the photoelectric conversion element 11 (e.g., Figure 7 Within the third interval, by maintaining the accumulation of signal charge overflowing from the photoelectric conversion element 11 in capacitor 13, a high dynamic range is achieved. Simultaneously, by outputting a signal generated from signal processing based on the amount of light input to the photoelectric conversion element 11 (the amount of charge generated by the photoelectric conversion element), gaps in the discontinuous positions (light amount) in the SN ratio graph are appropriately suppressed. Figure 8The vertical spacing (G1, G2) of the discontinuous parts in the chart suppresses the image quality degradation caused by the gaps G1, G2 in the final image of the camera or the like equipped with the solid-state imaging device 1. Details are as follows.

[0262] Even if the signal charge generated by the photoelectric conversion element 11 due to the input of light exceeds the capacitance of the photoelectric conversion element 11 and overflows, the holding capacitor 13 will accumulate the overflowed signal charge, and the signal charge accumulated in the holding capacitor 13 will be read out when the signal charge generated by the photoelectric conversion element 11 is read out from the floating diffusion region 12, thereby realizing an input dynamic range (i.e., high dynamic range) above the capacitance of the photoelectric conversion element 11.

[0263] Furthermore, for the pixel signal when reading the signal charge generated by the photoelectric conversion element 11 using the holding capacitor 13, the signal processing unit 7 performs appropriate signal processing through multiple processing units, thereby appropriately suppressing the gaps G1 and G2 at discontinuous positions (light intensity) in the SN ratio chart (see reference). Figure 8 ).

[0264] Furthermore, in the solid-state imaging device 1 of this embodiment, the aforementioned processing units of the signal processing unit 7 include correlated double sampling and correction of the signal based on the voltage when the holding capacitor 13 is reset.

[0265] Thus, the signal whose signal charge generated by the photoelectric conversion element 11 is read out using the holding capacitor 13 is subjected to correlated double sampling (for example, the processing of subtracting the second signal from the third signal by the arithmetic unit 71 (see reference)). Figure 6 The first signal processing) or the processing of subtracting the first signal from the fourth signal (see the first signal processing). Figure 6 The second signal processing, etc., thereby the signal is not affected by the dark current generated during the accumulation of signal charge in the photoelectric conversion element 11 (i.e., during the accumulation period ΔT) or the thermal noise generated by the holding capacitor 13, or such effect is sufficiently suppressed.

[0266] Furthermore, when the amount of input light is large and signal charge overflows from the photoelectric conversion element 11, although the voltage correction based on the reset of the holding capacitor 13 can be performed on the signal charge generated by the photoelectric conversion element 11 using the holding capacitor 13 which has accumulated the overflowed signal charge (for example, by subtracting the fifth signal from the fourth signal through the arithmetic unit 71 (see reference)). Figure 6 (Third signal processing), etc., but the corrected signal is affected by dark current generated by photoelectric conversion element 11 or thermal noise generated by holding capacitor 13.

[0267] However, for the aforementioned amount of spilled light, since the read signal (the number of charges of the signal charge) is large, the influence of dark current or thermal noise in this signal is relatively small. Therefore, the gap G2 at the discontinuity position (the aforementioned starting position of spillage) in the SN ratio graph is suppressed (refer to...). Figure 8 ).

[0268] In detail, in this embodiment, the signal processing unit 7, during the accumulation period ΔT, when light is input to the photoelectric conversion element 11 and the generated signal charge does not overflow from the photoelectric conversion element 11 (i.e., the amount of input light is...), ... Figure 7 The range to the left of the light quantity corresponding to the first threshold. Figure 8 (The range to the left of the gap G2), for pixel signals with different conversion gains in the floating diffusion region 12, correlation double sampling is performed respectively. In the second state where the signal charge generated by the light input to the photoelectric conversion element 11 during the accumulation period ΔT overflows from the photoelectric conversion element 11 (i.e., the amount of input light is...), Figure 7 The range from the light intensity corresponding to the first threshold to the boundary between the third and fourth intervals, in Figure 8 In the middle, the range from the right end of the plot of the gap G2 to the SN ratio is used to correct the above pixel signal based on the voltage when the holding capacitor is reset.

[0269] Thus, correlated double sampling can be performed on the readout of the signal charge generated by the photoelectric conversion element 11 from the floating diffusion region 12 with different conversion gains (e.g., high conversion gain, i.e., readout when the floating diffusion region 12 is electrically disconnected from the holding capacitor 13, and low conversion gain, i.e., readout when the floating diffusion region 12 is electrically connected to the holding capacitor 13). Therefore, the readout pixel signal is not affected by the dark current generated during the accumulation of signal charge in the photoelectric conversion element 11 or by the thermal noise generated by the holding capacitor, or such effect is sufficiently suppressed. As a result, the gap G1 at the discontinuity position (the position of conversion gain switching) in the SN ratio graph is suppressed (refer to...). Figure 8 ).

[0270] On the other hand, although it is possible to reset based on the holding capacitor 13 ( Figures 3-5 The voltage correction of the readout signal (pixel signal) in the state (second state) when the reset transistor 16 in time t08 is turned on and off is performed. However, since correlated double sampling cannot be performed, the readout signal is affected by the dark current generated by the photoelectric conversion element 11 or the thermal noise generated by the holding capacitor 13. However, for the amount of light overflowed, since the readout pixel signal (charge number) is large, the influence of dark current or thermal noise in the pixel signal is relatively small. Therefore, the gap G2 at the discontinuity position (the position where overflow begins) in the SN ratio graph is suppressed (refer to...). Figure 8 ).

[0271] As described above, in the solid-state imaging device 1 according to this embodiment, the gaps G1 and G2 at discontinuous positions in the SN ratio chart are suppressed (in other words, reduced), thus effectively suppressing the image quality degradation caused by these gaps G1 and G2 in the final image of the camera or the like equipped with the solid-state imaging device 1.

[0272] More specifically, the solid-state imaging device 1 of this embodiment includes: a transmission transistor (first switching transistor) 14, which is connected to the photoelectric conversion element 11 and the floating diffusion region 12; a holding switching transistor (second switching transistor) 15, which is connected to the floating diffusion region 12 and the holding capacitor 13; a reset transistor (third switching transistor) 16, which is connected to the holding capacitor 13 and the reset power supply (reset potential) VDD1; and a control unit 6, which controls each of the switching transistors 14, 15, and 16. Furthermore, the floating diffusion region 12 is also connected to the reset power supply VDD1 sequentially via the holding switching transistor 15 and the reset transistor 16.

[0273] Furthermore, after the light is input to the photoelectric conversion element 11 during the accumulation period ΔT, the signal processing unit 7 of the solid-state imaging device 1 takes the voltage signal based on the floating diffusion region 12 when the holding switch transistor 15 is turned on by the control unit 6 from the state where the transmission transistor 14, the holding switch transistor 15, and the reset transistor 16 are off as the first signal. After obtaining the first signal, it takes the voltage signal based on the floating diffusion region 12 when the holding switch transistor 15 is turned off by the control unit 6 as the second signal. After obtaining the second signal, it takes the voltage signal based on the floating diffusion region 12 when the transmission transistor 14 is turned on and off by the control unit 6 as the second signal. The voltage signal of the floating diffusion region 12 is used as the third signal. After obtaining the third signal, the voltage signal of the transmission transistor 14 when it is turned on and off while the control unit 6 is holding the switch transistor 15 on is used as the fourth signal. After obtaining the fourth signal, the voltage signal of the reset transistor 16 when it is turned on and off while the control unit 6 is holding the switch transistor 15 on is used as the fifth signal. Based on the first to fifth signals, output signals (signal X, signal Y, signal Z) are generated from the solid-state imaging device 1 and output to the outside.

[0274] In this way, by obtaining five signals (first to fifth signals) through a single charge accumulation (input primary light) in the photoelectric conversion element 11, the signal processing via correlated double sampling and the reset based on the amount of input light (the amount of charge generated by the photoelectric conversion element 11) can be responded to according to the amount of light input (the amount of charge generated by the photoelectric conversion element 11). Figures 3-5 The signal processing that corrects the voltage of the reset transistor 16 at time t08 (when it is turned on and off) is any one of the signal processing methods.

[0275] Furthermore, in the solid-state imaging device 1 of this embodiment, the related double sampling is included in the calculation of the differential signal Y obtained based on the fourth signal and the first signal (third signal processing), and the calculation of the differential signal Z obtained based on the third signal and the second signal (first signal processing). In addition, the correction based on the voltage at the time of reset of the holding capacitor 13 is included in the calculation of the differential signal X obtained based on the fourth signal and the fifth signal (second signal processing).

[0276] Furthermore, the solid-state imaging device 1 of this embodiment includes a memory (storage unit) 8, which stores a first threshold set based on the capacitance of the photoelectric conversion element 11 and a second threshold set based on the capacitance of the floating diffusion region 12. The signal processing unit 7 compares the value of signal X with the first threshold. When the value of signal X is greater than the first threshold, it outputs signal X as an output signal. As a result of comparing the value of signal X with the first threshold, when the value of signal X is less than or equal to the first threshold, it compares the value of signal Y with the second threshold. When the value of signal Y is greater than the second threshold, it outputs signal Y as an output signal. As a result of comparing the value of signal Y with the second threshold, when the value of signal Y is less than or equal to the second threshold, it outputs signal Z as an output signal.

[0277] In this way, the signal processing unit 7 uses two thresholds to select (determine) the signals X, Y, and Z to be output, thereby performing signal processing based on the amount of light input to the photoelectric conversion element 11 (the amount of signal charge generated by the photoelectric conversion element 11) more reliably, that is, switching between signal processing based on correlation double sampling and signal processing based on the voltage at the time of reset of the holding capacitor 13, or selecting the signals generated by these processes.

[0278] In existing solid-state imaging devices using dual conversion gain, it is impossible to obtain an input dynamic range exceeding that of the photoelectric conversion element's capacitance. In solid-state imaging devices with lateral overflow storage capacitors, the signal-to-noise ratio deteriorates due to dark current generated during the accumulation period ΔT and thermal noise generated during reset readout to obtain the reset level of the lateral overflow storage capacitor. However, as described above, the solid-state imaging device 1 of this embodiment does not use the holding capacitor 13 as dual conversion gain, but instead uses it as a lateral overflow storage capacitor. By performing predetermined signal processing in the signal processing unit 7 at a new pixel driving time point (i.e., the new driving time point of each transistor 14 to 16 in pixel 10), a larger input dynamic range (high dynamic range) than that of the photoelectric conversion element 11's capacitance can be achieved. At the same time, the effects of dark current accumulated in the lateral overflow storage capacitor (holding capacitor 13) in the obtained pixel signal and the effects of reset noise can be mitigated.

[0279] Alternatively, this effect can be improved by making the capacitance (saturation charge) of the photoelectric conversion element 11 greater than the capacitance of the floating diffusion region 12.

[0280] Next, refer to Figures 9-13 The second embodiment of the present invention will be described below. The same reference numerals are used for the same configuration as those in the first embodiment described above, and detailed descriptions of those configurations are omitted. Only the different configurations will be described in detail.

[0281] [Example of the composition of a camera device]

[0282] The shooting device in this embodiment is similar to that in the first embodiment, such as a smartphone or digital camera. The solid-state shooting device 1 is embedded in the shooting device and includes a CMOS image sensor (solid-state shooting element).

[0283] The solid-state imaging device 1A, which is embedded in the imaging device, has the same configuration as the solid-state imaging device 1 of the first embodiment. That is, as... Figure 9 As shown, the solid-state imaging device 1A includes a pixel array unit 2, a vertical drive unit 3, a multi-column signal processing unit 4, a horizontal drive unit 5, a control unit 6, a signal processing unit 7, and a memory 8A.

[0284] In the solid-state imaging device 1A of this embodiment, similarly, the pixel array unit 2 has a plurality of pixels 10A arranged in a two-dimensional matrix, and the signal processing unit 7 has an arithmetic unit 71A, a judgment unit 72A, and a selector 73 (see reference). Figure 12 ).

[0285] [Pixel Composition]

[0286] Next, refer to Figure 10 The specific structure of the pixels 10A arranged in a matrix in the pixel array section 2 is explained.

[0287] Pixel 10A includes photoelectric conversion element 11, floating diffusion region 12, first holding capacitor 13 with the same configuration (capacitor) as the holding capacitor in the first embodiment, and second holding capacitor 13A which is different from the first holding capacitor 13.

[0288] Additionally, pixel 10A includes: a transmission transistor (first switching transistor) 14, which is connected to photoelectric conversion element 11 and floating diffusion region 12; a first holding switching transistor (second switching transistor) 15, which is connected to floating diffusion region 12 and holding capacitor 13; a reset transistor (third switching transistor) 16, which is connected to second holding capacitor 13A and reset power supply (reset potential) VDD1; a second holding switching transistor (fourth switching transistor) 15A, which is connected to first holding capacitor 13 and second holding capacitor 13A; an amplification transistor 17, which amplifies the voltage signal of floating diffusion region 12; and a selection transistor 18, which is connected to amplification transistor 17 and column signal line 22.

[0289] Similar to the first embodiment, the floating diffusion region 12 converts the signal charge generated by the photoelectric conversion element 11 into a voltage signal and outputs it. In this embodiment, the floating diffusion region 12 is connected to the second holding capacitor 13A in sequence via the first holding switch transistor 15 and the second holding switch transistor 15A. In addition, the floating diffusion region 12 is connected to the reset power supply VDD1 in sequence via the first holding switch transistor 15, the second holding switch transistor 15A, and the reset transistor 16.

[0290] The first holding capacitor 13 and the second holding capacitor 13A are capacitors, and similar to the holding capacitor 13 in the first embodiment, they are capable of accumulating signal charge overflowing from the photoelectric conversion element 11. Specifically, when signal charge overflows from the photoelectric conversion element 11, the signal charge first accumulates in the first holding capacitor 13. After the first holding capacitor 13 also overflows, the overflowed signal charge accumulates in the second holding capacitor 13A.

[0291] In addition, the first holding capacitor 13 is connected to the reset power supply VDD1 in sequence via the second holding switch transistor 15A and the reset transistor 16. The first holding capacitor 13 is smaller than the second holding capacitor 13A. Specifically, the capacitance of the signal charge that the first holding capacitor 13 can accumulate (hold) is smaller than the capacitance of the signal charge that the second holding capacitor 13A can accumulate (hold).

[0292] A drive signal φS is applied to the gate electrode of the first holding switch transistor 15. This drive signal φS is output from the vertical drive unit 3 based on a signal from the control unit 6. When the drive signal φS changes to Hi (i.e., the first holding switch transistor 15 is turned on), the first holding gate of the first holding switch transistor 15 becomes on, and the signal charge from the floating diffusion region 12 can move to the first holding capacitor 13. Furthermore, when the drive signal φS changes to Low, the first holding switch transistor 15 is turned off. In addition, even when the first holding switch transistor 15 is turned off, the holding gate (barrier) of the first holding switch transistor 15 is adjusted so that the signal charge accumulates in the first holding capacitor 13 when it overflows from the photoelectric conversion element 11. The first holding switch transistor 15 in this embodiment has the same configuration as the holding switch transistor in the first embodiment.

[0293] A drive signal φS1 is applied to the gate electrode of the second holding switch transistor 15A. This drive signal φS1 is output from the vertical drive unit 3 based on a signal from the control unit 6. When the drive signal φS1 changes to Hi (i.e., the second holding switch transistor 15A is turned on), the second holding gate of the second holding switch transistor 15A becomes on. If the first holding switch transistor 15A is on, the signal charge from the floating diffusion region 12 can move to the second holding capacitor 13A. Furthermore, when the drive signal φS1 changes to Low, the second holding switch transistor 15A is turned off. In addition, even when the second holding switch transistor 15A is turned off, the second holding gate (barrier) of the second holding switch transistor 15A is adjusted to accumulate in the second holding capacitor 13A when the signal charge overflows from the photoelectric conversion element 11 and also from the first holding capacitor 13.

[0294] In the reset transistor 16 of this embodiment, when the drive signal φRES becomes Hi and the reset transistor 16 is turned on, the potentials of the floating diffusion region 12, the first holding capacitor 13 and the second holding capacitor 13A, the potentials of the first holding capacitor 13 and the second holding capacitor 13A, or the potential of the second holding capacitor 13A, are reset to the level of the reset power supply (reset potential) VDD1 (reset level) according to the drive signal φS applied to the gate electrode of the first holding switch transistor 15 and the drive signal φS1 applied to the gate electrode of the second holding switch transistor 15A.

[0295] [Example of pixel driving in a solid-state imaging device]

[0296] See also Figure 11 Explain the driving time points of the pixel 10A constructed above.

[0297] First, at time t01, with the selection transistor 18 off, the transmission transistor 14, the first holding switch transistor 15, the second holding switch transistor 15A, and the reset transistor 16 are turned on, and the floating diffusion region 12, the first holding capacitor 13, and the second holding capacitor 13A are changed to the reset level.

[0298] Thus, with the floating diffusion region 12 connected to the reset power supply VDD1, the transmission transistor 14 is turned off, thereby the photoelectric conversion element 11 becomes floating, and the signal charge generated by the light input begins to accumulate in the photoelectric conversion element 11.

[0299] Almost simultaneously with the turn-off of transmission transistor 14 (specifically, with a slight delay), the first holding switch transistor 15, the second holding switch transistor 15A, and the reset transistor 16 are turned off, thereby causing the floating diffusion region 12, the first holding capacitor 13, and the second holding capacitor 13A to also become floating. Therefore, in the event of signal charge overflowing from the photoelectric conversion element 11, the floating diffusion region 12, the first holding capacitor 13, and the second holding capacitor 13A can retain (accumulate) the overflowed signal charge.

[0300] Thus, after the transmission transistor 14, the first holding switch transistor 15, the second holding switch transistor 15A, and the reset transistor 16 are turned off, the pixel signal of the pixel 10 is read out starting from time t02 after a predetermined accumulation period ΔT.

[0301] Specifically, when the transistors 14-16 and 18 of pixel 10A are turned off, the control unit 6 (specifically, the control unit 6 via the vertical drive unit 3) changes the drive signal φSEL to Hi, thereby turning on the selection transistor 18, and the pixel 10 is connected to the column signal line 22.

[0302] Subsequently, the control unit 6 changes the drive signal φS to Hi, turning on the first holding switch transistor 15, thereby electrically connecting the floating diffusion region 12 to the first holding capacitor 13. As a result, the thermal noise charge in the floating diffusion region 12 and the first holding capacitor 13, as well as the dark current charge generated during the accumulation of signal charge in the photoelectric conversion element 11, are mixed. At this time, the voltage of the floating diffusion region 12 (the reference potential of the holding capacitor) is read out from the source follower circuit SF after a finite time from the moment t03 when it appears in the source follower circuit SF, and after A / D conversion, it is stored in the memory 8A as the first signal (pixel signal).

[0303] The solid-state imaging device 1A of this embodiment is similar to the solid-state imaging device 1 of the first embodiment in that, in the column signal processing unit 4, in the state after A / D conversion (i.e., in the state after conversion to a digital signal), the first signal is stored in the memory 8A, but it is not limited to this configuration. Subsequent processing can also be performed while the pixel signal (voltage of the floating diffusion region 12) read from the source follower circuit SF is kept as an analog signal. Furthermore, the same applies to the pixel signals (second to fifth signals) read from the source follower circuit SF at subsequent time points.

[0304] Next, at time t04, the control unit 6 sets the drive signal φS to Low, turning off the first holding switch transistor 15 and electrically disconnecting the floating diffusion region 12 from the first holding capacitor 13. In this state, the potential of the floating diffusion region 12 (the floating diffusion region reference potential) is read from the source follower circuit SF and stored as a second signal (pixel signal) in the memory 8A after A / D conversion. This second signal also includes the dark current component stored in the first holding switch transistor 15.

[0305] Next, at time t05, the control unit 6 changes the drive signal φTX to Hi, turns on the transmission transistor 14, and transfers the signal charge accumulated by the photoelectric conversion element 11 during the accumulation period ΔT to the floating diffusion region 12. Then, the drive signal φTX is changed to Low, and the transmission transistor 14 is turned off.

[0306] The signal is read from the source follower circuit SF at time t06 and stored in memory 8A as the third signal (pixel signal) after A / D conversion.

[0307] Next, at time t17, the control unit 6 changes the drive signal φS to Hi, turning on the first holding switch transistor 15, thereby turning on the floating diffusion region 12 and the first holding capacitor 13. Then, it changes the drive signal φTX to Hi and Low again, turning on and off the transmission transistor 14. At this time, the voltage of the floating diffusion region 12 is read from the source follower circuit SF and stored in the memory 8A as the fourth signal (pixel signal) after A / D conversion.

[0308] Thus, at time t17, after the signal charge accumulated in the photoelectric conversion element 11 is transferred to the first holding capacitor 13, at time t18, the control unit 6 changes the drive signal φS1 to Hi, turning on the second holding switch transistor 15A, thereby turning on the floating diffusion region 12, the first holding capacitor 13, and the second holding capacitor 13A. Furthermore, from this state, the control unit 6 again changes the drive signal φTX to Hi and Low, thereby turning on and off the transmission transistor 14. The voltage of the floating diffusion region 12 at this time is read from the source follower circuit SF and stored in the memory 8A as the fifteenth signal (pixel signal) after A / D conversion. At this time, if the signal charge overflowing from the photoelectric conversion element 11 during the accumulation period ΔT accumulates in the second holding capacitor 13A (fourth premise), this signal charge is included in the fifteenth signal.

[0309] Next, at time t19, control unit 6 changes the drive signal φRES to Hi, turns on reset transistor 16, and connects floating diffusion region 12, first holding capacitor 13, and second holding capacitor 13A to reset power supply (reset potential) VDD1, thus initializing all signal charges in floating diffusion region 12, first holding capacitor 13, and second holding capacitor 13A. The voltage (reset level) of the initialized floating diffusion region 12, first holding capacitor 13, and second holding capacitor 13A is read from source follower circuit SF and stored in memory 8A as the sixteenth signal (pixel signal) after A / D conversion.

[0310] Finally, at time t1A, the control unit 6 changes the drive signal φS1 to Low and turns off the second holding switch transistor 15A. As a result, the voltage (reset level) of the floating diffusion region 12 and the first holding capacitor 13 in the state where the first holding capacitor 13 and the second holding capacitor 13A are separated is read from the source follower circuit SF and stored in the memory 8A as the seventeenth signal (pixel signal) after A / D conversion.

[0311] In the solid-state imaging device 1A of this embodiment, in order to recover the final signal after photoelectric conversion in pixel 10, the signal processing unit 7 performs signal processing according to the above-mentioned premises (first to fourth premises). Details are as follows.

[0312] After reading the pixel signals (first to fourth signals and fifteenth to seventeenth signals) from a certain pixel 10, the pixel signals are stored in the memory 8A. The conversion results of each pixel 10 are processed one by one, in parallel, and in pipeline in the signal processing unit 7.

[0313] Here, as Figure 12As shown, the memory 8A of this embodiment includes: a first signal storage unit 801 that stores a first signal; a second signal storage unit 802 that stores a second signal; a third signal storage unit 803 that stores a third signal; a fourth signal storage unit 804 that stores a fourth signal; a fifteenth signal storage unit 815 that stores a fifteenth signal; a sixteenth signal storage unit 816 that stores a sixteenth signal; a seventeenth signal storage unit 817 that stores a seventeenth signal; a first offset storage unit 821 that stores a first offset value (arbitrary) taking into account the dark current of the first holding capacitor 13; a second offset storage unit 822 that similarly stores a second offset value taking into account the dark current of the second holding capacitor 13A; a first gain storage unit 831 that stores a first gain coefficient for adjusting the charge-voltage conversion gain; a second gain storage unit 832 that stores a second gain coefficient for adjusting the charge-voltage conversion gain; and a third gain storage unit 833 that stores a third gain coefficient for adjusting the charge-voltage conversion gain. Additionally, the memory 8A has a third threshold storage unit 843 that stores a first threshold storage unit 841, a second threshold storage unit 842, and a third threshold. This third threshold is set based at least on the capacitance of the floating diffusion region 12, the first holding capacitor 13, and the second holding capacitor 13A. Specifically, the third threshold is, for example, the signal quantity at which the second holding capacitor 13A is saturated.

[0314] Specifically, in the signal processing unit 7, for each pixel signal (first to fourth signals, fifteenth to seventeenth signals) of pixel 10, the arithmetic unit 71A of the signal processing unit 7 calculates the signal (fourth differential signal) α (fourth signal processing) by adding the difference between the fifteenth signal stored in the fifteenth signal storage unit 815 of the memory 8A and the sixteenth signal stored in the sixteenth signal storage unit 816, and the second offset value stored in the second offset storage unit 822, and then multiplying it by the third gain coefficient stored in the third gain storage unit 833. (Second differential signal) Z (first signal processing) calculates signal (first differential signal) Y by multiplying the difference between the fourth signal stored in the fourth signal storage section 804 of memory 8A and the first signal stored in the first signal storage section 801 by the second gain coefficient stored in the second gain storage section 832. (Second signal processing) Then, the difference between the fourth signal stored in the fourth signal storage section 804 of memory 8A and the seventeenth signal stored in the seventeenth signal storage section 817 and the first offset value stored in the first offset storage section 821 are added together and multiplied by the first gain coefficient stored in the first gain storage section 831 (third signal processing) to calculate signal (third differential signal) X. The signals α, X, Y, and Z calculated by the arithmetic unit 71A are input to the selector 73 before final output, awaiting output instruction.

[0315] Thus, when the calculation unit 71A calculates signals α, X, Y, and Z, the judgment unit 72A first compares signal α with the third threshold stored in the third threshold storage unit 843. When signal α is greater than the third threshold, it instructs the signal α to be output to the selector 73.

[0316] In the comparison of the signal α with the third threshold, when the signal α is below the third threshold, the determination unit 72A then compares the signal X with the first threshold stored in the first threshold storage unit 841. When the signal X is greater than the first threshold, it instructs the signal X to be output to the selector 73.

[0317] In the comparison between signal X and the first threshold, when signal X is below the first threshold, the determination unit 72A then compares signal Y with the second threshold stored in the second threshold storage unit 842. When signal Y is greater than the second threshold, it instructs to output signal Y to the selector 73.

[0318] In the comparison between the signal Y and the second threshold, when the signal Y is below the second threshold, the determination unit 72A instructs the signal Z to be output to the selector 73.

[0319] When the above arbitrary instruction (output instruction command) is input to the selector 73 through the judgment unit 72A, the selector 73 outputs any one of the input instruction signals α, X, Y, and Z (processing result).

[0320] Furthermore, in the judgment of the judgment unit 72A described above, the judgment is performed in the same order as that of the judgment unit 72 in the first embodiment to prevent false determinations of signal Z and signal Y.

[0321] The solid-state imaging device 1A of this embodiment includes: a second holding capacitor 13A, which, unlike the first holding capacitor 13, is capable of accumulating signal charge overflowing from the photoelectric conversion element 11; a transmission transistor (first switching transistor) 14, which connects the photoelectric conversion element 11 and the aforementioned floating diffusion region 12; a first holding switching transistor (second switching transistor) 15, which connects the floating diffusion region 12 and the holding capacitor 13; a reset transistor (third switching transistor) 16, which connects the second holding capacitor 13A and the reset power supply (reset potential) VDD1; and a second holding switching transistor (fourth switching transistor) 15A, which connects the first holding capacitor 13 and the second holding capacitor 13A. Furthermore, the floating diffusion region 12 is sequentially connected to the second holding capacitor 13A via the first holding switching transistor 15 and the second holding switching transistor 15A. Moreover, the floating diffusion region 12 is sequentially connected to the reset power supply VDD1 via the first holding switching transistor 15, the second holding switching transistor 15A, and the reset transistor 16. Additionally, the first holding capacitor 13 is sequentially connected to the reset power supply VDD1 via the second holding switching transistor 15A and the reset transistor 16.

[0322] Furthermore, after the photoelectric conversion element 11 during the light input to the accumulation period ΔT, the signal processing unit 7 of the solid-state imaging device 1A takes a signal based on the voltage of the floating diffusion region 12 when the first holding switch transistor 15 is turned on, starting from the state where the transmission transistor 14, holding switch transistor 15, second holding switch transistor 15A, and reset transistor 16 are off, as a first signal. After obtaining the first signal, it takes a signal based on the voltage of the floating diffusion region 12 when the first holding switch transistor 15 is turned off as a second signal. After obtaining the second signal, it takes a signal based on the voltage of the floating diffusion region 12 when the transmission transistor 14 is turned on and off as a third signal. After obtaining the third signal, it takes a signal based on the voltage of the floating diffusion region 12 when the transmission transistor 14 is turned on and off as a fourth signal. After receiving the fourth signal, the signal based on the voltage of the floating diffusion region 12 when the transmission transistor 14 is turned on and off while the first holding switch transistor 15 and the second holding switch transistor 15A are turned on by the control unit 6 is used as the fifteenth signal. After receiving the fifteenth signal, the signal based on the voltage of the floating diffusion region 12 when the reset transistor 16 is turned on and off while the first holding switch transistor 15 and the second holding switch transistor 15A are turned on by the control unit 6 is used as the sixteenth signal. After receiving the sixteenth signal, the signal based on the voltage of the floating diffusion region 12 when the second holding switch transistor 15A is turned off while the first holding switch transistor 15 is turned on by the control unit 6 is used as the seventeenth signal. Based on the above first to fourth signals and fifteen to seventeenth signals, output signals (signal α, signal X, signal Y, signal Z) are generated from the solid-state imaging device 1A to the outside.

[0323] The solid-state imaging device 1A of this embodiment, configured as described above, accumulates signal charge overflowing from the photoelectric conversion element 11 within a large range of light quantity input to the photoelectric conversion element 11 through the first holding capacitor 13 or the second holding capacitor 13A, thereby achieving a high dynamic range. Simultaneously, by outputting a signal generated from signal processing based on the light quantity input to the photoelectric conversion element 11 (the amount of signal charge generated by the photoelectric conversion element 11), it appropriately suppresses the gaps G1, G2, and G3 (refer to) in the discontinuous positions (light quantity) in the SN ratio chart. Figure 13 This suppresses the image quality degradation caused by the gaps G1, G2, and G3 in the final image of the camera or the like equipped with the solid-state imaging device 1A.

[0324] In addition, in addition to the first holding capacitor 13, pixel 10A also has a second holding capacitor 13A, that is, it has multiple holding capacitors. Therefore, compared with a pixel that only has one holding capacitor, it has a larger capacitance that can accumulate signal charge overflowing from photoelectric conversion element 11, and thus has a larger dynamic range.

[0325] Furthermore, when the light input to pixel 10A (photoelectric conversion element 11) is the amount of light that causes the signal charge overflowing from photoelectric conversion element 11 to begin accumulating in the second holding capacitor 13A, a discontinuity is generated in the SN ratio graph, and the gap G3 in the discontinuity position is a relatively large gap ( Figure 13 (Refer to), but since it is a gap at a position where the absolute value of the SN ratio is large, the visual impact caused by the gap G3 is weak in the final image of the camera or the like in which the solid-state imaging device 1A is configured.

[0326] Furthermore, as described above, by obtaining seven signals (first to fourth signals and fifteenth to seventeenth signals) in a single charge accumulation (input single light) of the photoelectric conversion element 11, any one of the signal processing methods—correlated double sampling signal processing and signal processing based on the voltage at reset of the holding capacitors (first holding capacitor 13 and second holding capacitor 13A)—can be addressed according to the amount of light input (the amount of signal charge generated by the photoelectric conversion element 11).

[0327] Furthermore, the system includes multiple holding capacitors (in this embodiment, the first holding capacitor 13 and the second holding capacitor 13A) capable of accumulating signal charge overflowing from the photoelectric conversion element 11. By adjusting the number of holding capacitors used according to the amount of signal charge generated by the photoelectric conversion element 11, image quality degradation caused by holding capacitors such as thermal noise can be suppressed. That is, since the larger the holding capacitor, the greater the thermal noise and other noise-generating factors, when using the first holding capacitor 13 to accumulate signal charge generated by the photoelectric conversion element 11 without using the second holding capacitor, image quality degradation caused by holding capacitors such as thermal noise can be suppressed compared to a configuration that ensures the same capacitance (the total capacitance of the first holding capacitor 13 and the second holding capacitor 13A) with a single holding capacitor.

[0328] Furthermore, in the solid-state imaging device 1A of this embodiment, the coherent double sampling is included in the operation (second signal processing) of obtaining a signal Y (first differential signal) based on the difference between the fourth signal and the first signal, and the operation (first signal processing) of obtaining a signal Z (second differential signal) based on the difference between the third signal and the second signal. Additionally, the correction based on the voltage at the time of reset of the holding capacitors (first holding capacitor 13, second holding capacitor 13A) is included in the operation (third signal processing) of obtaining a signal X (third differential signal) based on the difference between the fourth signal and the seventeenth signal, and the operation (fourth signal processing) of obtaining a signal α (fourth differential signal) based on the difference between the fifteenth signal and the sixteenth signal.

[0329] Furthermore, the solid-state imaging device 1A of this embodiment includes a memory (storage unit) 8A, which stores a first threshold set at least based on the capacitance of the photoelectric conversion element 11 and a second threshold set at least based on the capacitance of the floating diffusion region 12. The signal processing unit 7 compares the value of the signal (fourth differential signal) α with the third threshold. When the value of signal α is greater than the third threshold, it outputs the signal α as an output signal. As a result of comparing the value of signal α with the third threshold, when the value of signal α is less than or equal to the third threshold, it compares the value of the signal (third differential signal) X with the first threshold. When the value of signal X is greater than the first threshold, it outputs the signal X as an output signal. As a result of comparing the value of signal X with the first threshold, when the value of signal X is less than or equal to the first threshold, it compares the value of the signal (first differential signal) Y with the second threshold. When the value of signal Y is greater than the second threshold, it outputs the signal Y as an output signal. As a result of comparing the value of signal Y with the second threshold, when the value of signal Y is less than or equal to the second threshold, it outputs the signal (second differential signal) Z as an output signal.

[0330] In this way, the signal processing unit 7 uses three thresholds to select the signals α, X, Y, and Z to be output, thereby performing signal processing based on the amount of light input to the photoelectric conversion element 11 (the amount of charge generated by the photoelectric conversion element 11) more reliably. This includes switching between signal processing based on correlated double sampling and signal processing based on the voltage at the time of reset of the holding capacitors (first holding capacitor 13, second holding capacitor 13A) or selecting signals generated by these processes.

[0331] Furthermore, in the solid-state imaging device 1A of this embodiment, the first holding capacitor 13 is smaller than the second holding capacitor 13A.

[0332] As the amount of signal charge accumulated in the holding capacitor increases, the relative magnitude of noise (noise caused by the holding capacitor, such as thermal noise) corresponding to the amount of charge read from the holding capacitor is suppressed; that is, the impact of the noise on image quality is suppressed. Therefore, by reducing the first holding capacitor 13 used when the amount of signal charge from the photoelectric conversion element 11 is small, the noise generated by the first holding capacitor 13 when only the first holding capacitor 13 is used is suppressed, and by increasing the second holding capacitor 13A used when the amount of signal charge from the photoelectric conversion element 11 increases and the impact of the noise on image quality becomes relatively small, a high dynamic range can be achieved, and the degradation of image quality caused by the holding capacitor can be appropriately suppressed.

[0333] As described above, the solid-state imaging device 1A of this embodiment, like the solid-state imaging device 1 of the first embodiment, does not use the first holding capacitor 13 and the second holding capacitor 13A as dual conversion gain, but uses them as lateral overflow storage capacitors. By performing predetermined signal processing in the signal processing unit 7 at the new pixel driving time point (i.e., the new driving time point of each transistor 14 to 16 in pixel 10), a larger input dynamic range (high dynamic range) than the capacitance of the photoelectric conversion element 11 can be achieved. At the same time, the effects of dark current accumulated in the lateral overflow storage capacitors (first holding capacitor 13 and second holding capacitor 13A) in the obtained pixel signal and the effects of reset noise can be reduced.

[0334] In addition, similar to the solid-state imaging device 1 of the first embodiment, this effect can be improved by making the capacitance (saturation charge) of the photoelectric conversion element 11 greater than the capacitance of the floating diffusion region 12.

[0335] Furthermore, the solid-state imaging device of the present invention, and the imaging device equipped with the solid-state imaging device, are not limited to the embodiments described above. Undoubtedly, various modifications can be made without departing from the spirit of the present invention. For example, the configuration of another embodiment can be added to the configuration of a certain embodiment, or a part of the configuration of a certain embodiment can be replaced with the configuration of another embodiment. Moreover, a part of the configuration of a certain embodiment can be deleted.

[0336] The solid-state imaging devices 1 and 1A described in the first and second embodiments above include a CMOS image sensor comprising at least a pixel array section 2, a vertical driving section 3, multiple column signal processing sections 4, a horizontal driving section 5, and a control section 6, but are not limited to this configuration. The CMOS image sensor (solid-state imaging element) may include a signal processing section 7 or a memory 8. That is, the signals calculated by the arithmetic processing section (first to fifth signals or first to fourth and fifteenth to seventeenth signals) may be configured to be stored (held) in a system such as a smartphone or camera that incorporates a readout circuit of pixel signals, a DSP, and a solid-state imaging device.

[0337] Furthermore, the specific configuration of signal processing (signal multiplication and accumulation operations, threshold judgment, etc.) in signal processing unit 7 is not limited. For example, in signal processing unit 7, weighted addition can be performed between signals before and after a threshold to make the difference in noise based on readout differences less noticeable in slow intensity changes. Signal processing can also be performed using quadratic function gain or lookup table instead of simple linear function gain. That is, in signal processing unit 7, whatever threshold judgment and multiplication and accumulation operations are suitable to perform, signal processing unit 7 can be configured to use threshold judgment and multiplication and accumulation operations to generate a final signal from five signals (first to fifth signals) or seven signals (first to fourth signals, and fifteenth to seventeenth signals).

[0338] Furthermore, in the solid-state imaging devices 1 and 1A of the first and second embodiments described above, when signal charge overflows from the photoelectric conversion element due to light input, the reset level (voltage at reset: the fifth signal or the sixteenth signal in the examples of the first and second embodiments) of the holding capacitors 13 and 13A used for pixel signal correction is obtained immediately after the fourth signal or the fifteenth signal. That is, it is performed for each input of light to the photoelectric conversion element 11, but is not limited to this configuration. For example, it may be configured such that the aforementioned reset level of the holding capacitor is obtained in the initial stage, and the obtained reset level is used as a known value for each light input to the photoelectric conversion element 11.

[0339] To illustrate the invention, the invention has been appropriately and sufficiently described above with reference to the accompanying drawings. However, those skilled in the art should recognize that modifications and / or improvements to the above-described embodiments can be readily made. Therefore, any modifications or improvements made by those skilled in the art that do not depart from the scope of the claims are to be interpreted as being included within the scope of the claims.

[0340] Explanation of reference numerals in the attached figures:

[0341] 1, 1A…Solid-state imaging device, 2…Pixel array unit, 21…Row signal line, 22…Column signal line, 3…Vertical drive unit, 4…Column signal processing unit, 5…Horizontal drive unit, 6…Control unit, 7…Signal processing unit, 71, 71A…Arithmetic unit, 72, 72A…Decision unit, 73…Selector, 8, 8A…Memory (storage unit), 801…First signal storage unit, 802…Second signal storage unit, 803…Third signal storage unit, 804…Fourth signal storage unit, 80… 5…Fifth signal storage unit, 815…Fifteenth signal storage unit, 816…Sixteenth signal storage unit, 817…Seventeenth signal storage unit, 820…Offset storage unit, 821…First offset storage unit, 822…Second offset storage unit, 831…First gain storage unit, 832…Second gain storage unit, 833…Third gain storage unit, 841…First threshold storage unit, 842…Second threshold storage unit, 843…Third threshold storage unit, 10, 10A…pixels, 11… Photoelectric conversion element, 12… Floating diffusion region, 13… Holding capacitor, first holding capacitor, 13A… Second holding capacitor, 14… Transmission transistor (first switching transistor), 15… Holding switching transistor, first holding switching transistor (second switching transistor), 15A… Second holding switching transistor (fourth switching transistor), 16… Reset transistor (third switching transistor), 17… Amplifying transistor, 18… Selecting transistor, 500… Solid-state imaging device, 501… Pixel, 502… Photodiode, 503… Floating diffusion region, 504… Lateral overflow storage capacitor, 505… Switching transistor, G1, G2, G3… Gap, SF… Source follower circuit, VDD1… Reset power supply (reset potential), VDD2… Power supply, X… Signal (third differential signal), Y… Signal (first differential signal), Z… Signal (second differential signal), α… Signal (fourth differential signal), φRES, φS, φS1, φSEL, φTX… Drive signal

Claims

1. A solid-state imaging device, characterized by comprising: Possessing: a photoelectric conversion element that generates a charge through photoelectric conversion according to input light; a floating diffusion region that converts the charge into a voltage corresponding to the amount of the charge; a holding capacitor that is connected to the floating diffusion region and is capable of accumulating the charge that overflows from the photoelectric conversion element; and a signal processing section that processes a signal based on the voltage converted at the floating diffusion region, the signal processing section has a plurality of processing units of the signal read out using the holding capacitor; the plurality of processing units include a correlated double sampling unit and a correction unit that corrects a signal based on a voltage at the time of reset of the holding capacitor; the solid-state imaging device further includes a first configuration including: a first switch transistor that connects the photoelectric conversion element and the floating diffusion region; a second switch transistor that connects the floating diffusion region and the holding capacitor; a third switch transistor that connects the holding capacitor and a reset potential; and a control section that controls each switch transistor, the floating diffusion region is connected to the reset potential via the second switch transistor and the third switch transistor in this order, the signal processing section, after the light is input to the photoelectric conversion element, a signal based on the voltage of the floating diffusion region at the time when the second switch transistor is turned on by the control section from a state in which the first to third switch transistors are turned off is taken as a first signal, after the first signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the second switch transistor is turned off by the control section is taken as a second signal, after the second signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the first switch transistor is turned on and turned off by the control section is taken as a third signal, after the third signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the first switch transistor is turned on and turned off in a state in which the second switch transistor is turned on by the control section is taken as a fourth signal, after the fourth signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the third switch transistor is turned on and turned off in a state in which the second switch transistor is turned on by the control section is taken as a fifth signal, an output signal that is output from the solid-state imaging device to the outside is generated based on the first to fifth signals.

2. The solid-state imaging device according to claim 1, wherein the correlated double sampling is included in signal processing for obtaining a first difference signal based on a difference between the fourth signal and the first signal, and signal processing for obtaining a second difference signal based on a difference between the third signal and the second signal, respectively, the correction based on the voltage at the time of reset of the holding capacitor is included in signal processing for obtaining a third difference signal based on a difference between the fourth signal and the fifth signal.

3. The solid-state imaging device according to claim 2, wherein a storage section that stores a first threshold value set based on at least a capacitance of the photoelectric conversion element and a second threshold value set based on at least a capacitance of the floating diffusion region is possessed, the signal processing section, ​ comparing a value of the third differential signal with the first threshold value, and outputting the third differential signal as the output signal when the value of the third differential signal is greater than the first threshold value, comparing a value of the first differential signal with the second threshold value when the value of the third differential signal is the first threshold value or less as a result of comparing the value of the third differential signal with the first threshold value, and outputting the first differential signal as the output signal when the value of the first differential signal is greater than the second threshold value, outputting the second differential signal as the output signal when the value of the first differential signal is the second threshold value or less as a result of comparing the value of the first differential signal with the second threshold value.

4. The solid-state imaging device according to claim 1, wherein the first structure is replaced with: a second holding capacitor, which is different from a first holding capacitor as the holding capacitor, and is capable of accumulating the electric charge overflowing from the photoelectric conversion element; a first switching transistor connecting the photoelectric conversion element and the floating diffusion region; a second switching transistor connecting the floating diffusion region and the first holding capacitor; a third switching transistor connecting the second holding capacitor and a reset potential; a fourth switching transistor connecting the first holding capacitor and the second holding capacitor; and a control section controlling each switching transistor, the floating diffusion region is connected to the second holding capacitor in sequence via the second switching transistor and the fourth switching transistor, and is connected to the reset potential in sequence via the second switching transistor, the fourth switching transistor, and the third switching transistor, the first holding capacitor is connected to the reset potential in sequence via the fourth switching transistor and the third switching transistor, the signal processing section, after the light is input to the photoelectric conversion element, a signal based on a voltage of the floating diffusion region when the second switching transistor is turned on by the control section from a state in which the first to fourth switching transistors are turned off is obtained as a first signal, after the first signal is obtained, a signal based on a voltage of the floating diffusion region when the second switching transistor is turned off by the control section is obtained as a second signal, after the second signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off by the control section is obtained as a third signal, after the third signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off in a state in which the second switching transistor is turned on by the control section is obtained as a fourth signal, after the fourth signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off in a state in which the second switching transistor and the fourth switching transistor are turned on by the control section is obtained as a fifteenth signal, after the fifteenth signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off in a state in which the second switching transistor, the fourth switching transistor, and the third switching transistor are turned on by the control section is obtained as a sixteenth signal, After the fifteenth signal is obtained, a signal based on the voltage of the floating diffusion region when the third switch transistor is turned on and turned off in a state where the second switch transistor and the fourth switch transistor are turned on by the control section is obtained as a sixteenth signal, After the sixteenth signal is obtained, a signal based on the voltage of the floating diffusion region when the fourth switch transistor is turned off in a state where the second switch transistor is turned on by the control section is obtained as a seventeenth signal, The output signal output from the solid-state imaging device to the outside is generated based on the first to fourth signals and the fifteenth to seventeenth signals.

5. The solid-state imaging device according to claim 4, wherein The correlated double sampling is respectively included in signal processing for obtaining a first difference signal based on a difference between the fourth signal and the first signal, and signal processing for obtaining a second difference signal based on a difference between the third signal and the second signal, Correction based on the voltage when the first holding capacitor or the second holding capacitor is reset is respectively included in signal processing for obtaining a third difference signal based on a difference between the fourth signal and the seventeenth signal, and signal processing for obtaining a fourth difference signal based on a difference between the fifteenth signal and the sixteenth signal.

6. The solid-state imaging device according to claim 5, wherein a storage section that stores a first threshold value set based on at least the capacitance of the photoelectric conversion element, a second threshold value set based on at least the capacitance of the floating diffusion region, and a third threshold value set based on at least the capacitance of the floating diffusion region and the first holding capacitor, the signal processing section, compares the value of the fourth difference signal with the third threshold value, and when the value of the fourth difference signal is greater than the third threshold value, outputs the fourth difference signal as the output signal, as a result of comparing the value of the fourth difference signal with the third threshold value, when the value of the fourth difference signal is the third threshold value or less, compares the value of the third difference signal with the first threshold value, and when the value of the third difference signal is greater than the first threshold value, outputs the third difference signal as the output signal, as a result of comparing the value of the third difference signal with the first threshold value, when the value of the third difference signal is the first threshold value or less, compares the value of the first difference signal with the second threshold value, and when the value of the first difference signal is greater than the second threshold value, outputs the first difference signal as the output signal, as a result of comparing the value of the first difference signal with the second threshold value, when the value of the first difference signal is the second threshold value or less, outputs the second difference signal as the output signal.

7. The solid-state imaging device according to claim 4, wherein the first holding capacitor is smaller than the second holding capacitor.

8. A solid-state imaging device, characterized by comprising: a photoelectric conversion element that generates electric charges through photoelectric conversion according to input light; a floating diffusion region that converts the electric charges into a voltage corresponding to the amount of the electric charges; ​ a holding capacitor connected to the floating diffusion region and capable of accumulating the electric charge overflowing from the photoelectric conversion element; and a signal processing section that processes a signal based on the voltage converted at the floating diffusion region, the signal processing section, when in a first state in which the electric charge generated by input of light to the photoelectric conversion element does not overflow from the photoelectric conversion element, respectively performing correlated double sampling on the signals in which the conversion gain is different in the floating diffusion region, when in a second state in which the electric charge generated by input of light to the photoelectric conversion element overflows from the photoelectric conversion element, correcting the signals based on the voltage at the time of reset of the holding capacitor; the solid-state imaging device further includes a first configuration including: a first switching transistor connecting the photoelectric conversion element and the floating diffusion region; a second switching transistor connecting the floating diffusion region and the holding capacitor; a third switching transistor connecting the holding capacitor and a reset potential; and a control section that controls each switching transistor, the floating diffusion region is connected to the reset potential in turn via the second switching transistor and the third switching transistor, the signal processing section, after input of light to the photoelectric conversion element, a signal based on the voltage of the floating diffusion region at the time when the second switching transistor is turned on by the control section from a state in which the first to third switching transistors are turned off is taken as a first signal, after the first signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the second switching transistor is turned off by the control section is taken as a second signal, after the second signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the first switching transistor is turned on and turned off by the control section is taken as a third signal, after the third signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the first switching transistor is turned on and turned off in a state in which the second switching transistor is turned on by the control section is taken as a fourth signal, after the fourth signal is obtained, a signal based on the voltage of the floating diffusion region at the time when the third switching transistor is turned on and turned off in a state in which the second switching transistor is turned on by the control section is taken as a fifth signal, an output signal output from the solid-state imaging device to the outside is generated based on the first to fifth signals.

9. The solid-state imaging device according to claim 8, wherein the correlated double sampling is respectively included in signal processing for obtaining a first difference signal based on a difference between the fourth signal and the first signal, and signal processing for obtaining a second difference signal based on a difference between the third signal and the second signal, the correction based on the voltage at the time of reset of the holding capacitor is included in signal processing for obtaining a third difference signal based on a difference between the fourth signal and the fifth signal.

10. The solid-state imaging device according to claim 9, wherein a storage section that stores a first threshold value set based on at least the capacitance of the photoelectric conversion element and a second threshold value set based on at least the capacitance of the floating diffusion region is provided, the signal processing section, comparing a value of the third differential signal with the first threshold value, and outputting the third differential signal as the output signal when the value of the third differential signal is greater than the first threshold value, comparing a value of the first differential signal with the second threshold value when the value of the third differential signal is the first threshold value or less as a result of comparing the value of the third differential signal with the first threshold value, and outputting the first differential signal as the output signal when the value of the first differential signal is greater than the second threshold value, outputting the second differential signal as the output signal when the value of the first differential signal is the second threshold value or less as a result of comparing the value of the first differential signal with the second threshold value.

11. The solid-state imaging device according to claim 8, wherein the first structure is replaced with: a second holding capacitor, which is different from a first holding capacitor as the holding capacitor, and is capable of accumulating the electric charge overflowing from the photoelectric conversion element; a first switching transistor connecting the photoelectric conversion element and the floating diffusion region; a second switching transistor connecting the floating diffusion region and the first holding capacitor; a third switching transistor connecting the second holding capacitor and a reset potential; a fourth switching transistor connecting the first holding capacitor and the second holding capacitor; and a control section controlling each switching transistor, the floating diffusion region is connected to the second holding capacitor in sequence via the second switching transistor and the fourth switching transistor, and is connected to the reset potential in sequence via the second switching transistor, the fourth switching transistor, and the third switching transistor, the first holding capacitor is connected to the reset potential in sequence via the fourth switching transistor and the third switching transistor, the signal processing section, after the light is input to the photoelectric conversion element, a signal based on a voltage of the floating diffusion region when the second switching transistor is turned on by the control section from a state in which the first to fourth switching transistors are turned off is obtained as a first signal, after the first signal is obtained, a signal based on a voltage of the floating diffusion region when the second switching transistor is turned off by the control section is obtained as a second signal, after the second signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off by the control section is obtained as a third signal, after the third signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off in a state in which the second switching transistor is turned on by the control section is obtained as a fourth signal, after the fourth signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off in a state in which the second switching transistor and the fourth switching transistor are turned on by the control section is obtained as a fifteenth signal, after the fifteenth signal is obtained, a signal based on voltages of the floating diffusion region when the first switching transistor is turned on and turned off in a state in which the second switching transistor, the fourth switching transistor, and the third switching transistor are turned on by the control section is obtained as a sixteenth signal, After the fifteenth signal is obtained, a signal based on the voltage of the floating diffusion region when the third switch transistor is turned on and turned off in a state where the second switch transistor and the fourth switch transistor are turned on by the control section is obtained as a sixteenth signal, After the sixteenth signal is obtained, a signal based on the voltage of the floating diffusion region when the fourth switch transistor is turned off in a state where the second switch transistor is turned on by the control section is obtained as a seventeenth signal, The output signal output from the solid-state imaging device to the outside is generated based on the first to fourth signals and the fifteenth to seventeenth signals.

12. The solid-state imaging device according to claim 11, wherein The correlated double sampling is respectively included in signal processing for obtaining a first difference signal based on a difference between the fourth signal and the first signal, and signal processing for obtaining a second difference signal based on a difference between the third signal and the second signal, Correction based on the voltage when the first holding capacitor or the second holding capacitor is reset is respectively included in signal processing for obtaining a third difference signal based on a difference between the fourth signal and the seventeenth signal, and signal processing for obtaining a fourth difference signal based on a difference between the fifteenth signal and the sixteenth signal.

13. The solid-state imaging device according to claim 12, wherein a storage section that stores a first threshold value based on at least the capacitance of the photoelectric conversion element, a second threshold value based on at least the capacitance of the floating diffusion region, and a third threshold value based on at least the capacitance of the floating diffusion region and the first holding capacitor, the signal processing section, compares the value of the fourth difference signal with the third threshold value, and when the value of the fourth difference signal is greater than the third threshold value, outputs the fourth difference signal as the output signal, as a result of comparing the value of the fourth difference signal with the third threshold value, when the value of the fourth difference signal is the third threshold value or less, compares the value of the third difference signal with the first threshold value, and when the value of the third difference signal is greater than the first threshold value, outputs the third difference signal as the output signal, as a result of comparing the value of the third difference signal with the first threshold value, when the value of the third difference signal is the first threshold value or less, compares the value of the first difference signal with the second threshold value, and when the value of the first difference signal is greater than the second threshold value, outputs the first difference signal as the output signal, as a result of comparing the value of the first difference signal with the second threshold value, when the value of the first difference signal is the second threshold value or less, outputs the second difference signal as the output signal.

14. The solid-state imaging device according to claim 11, wherein the first holding capacitor is smaller than the second holding capacitor.

15. An imaging device, wherein the imaging device includes the solid-state imaging device according to any one of claims 1 to 14.

Images