Busbar calculation method for aircraft power system based on multi-fpga simulator

Abstract

The application discloses a kind of based on multi-FPGA simulator's aircraft power system busbar calculation method, including step one, according to aircraft power system topological structure, component, connection logic and FPGA calculation capacity is divided into M subsystem;Two, extract each subsystem basic parameter;Three, set system simulation step;Four, set single-phase node current parameter of alternating current busbar;Five, system initialization;Six, start simulation;Seven, promote the simulation calculation in next time step;Eight, determine busbar contactor state;Nine, calculate busbar each load branch current;Ten, calculate busbar unknown branch current;Eleven, store real-time simulation data.The application can be in the real-time simulation of aircraft power system busbar calculation management, while realizing the effectiveness of busbar power calculation, and calculation speed is fast, calculation precision is high, lays foundation for the real-time simulation of aircraft power system based on multi-FPGA, use effect is good, convenient for use.

Description

Technical Field

[0001] This invention belongs to the field of aircraft electrical system simulation technology, specifically relating to a method for calculating busbars in an aircraft electrical system based on a multi-FPGA simulator. Background Technology

[0002] With the development of electrification technology for more-electric aircraft, a large number of devices, such as energy storage devices, high-power pulse loads, electric actuators, and high-frequency power electronic devices, are being integrated into the system. This leads to an increase in the energy capacity of aircraft electrical systems, more complex structures, and drastic changes in their electromagnetic transient characteristics. The design, planning, safe operation optimization, fault protection mechanisms, and simulation analysis of aircraft electrical systems are significantly different from those of traditional aircraft electrical systems due to these characteristics. Traditional steady-state simulation analysis methods for aircraft electrical systems are no longer sufficient for the characteristic analysis of complex, large-scale electrical systems in more-electric aircraft. Therefore, accurate electromagnetic transient simulation is needed to study the operating mechanisms, transient characteristics, multi-physics coupling, and causes of faults in more-electric aircraft electrical systems.

[0003] Offline transient real-time simulation of aircraft electrical systems is no longer sufficient to meet current needs. In particular, the testing and experimentation of hardware and software systems such as generator controllers, protection devices, distributed power distribution terminals, intelligent control algorithms, and aircraft energy management optimization systems all require hardware-in-the-loop simulation, necessitating the use of real-time simulators. Commercially available real-time simulators (RT_LAB, RTDS, dSPACE, ADPSS, etc.) primarily use serial computing processors such as PCs or microcontrollers (whether von Neumann or Harvard architecture) as the underlying hardware, achieving real-time simulation capabilities for power systems through multi-processor collaboration. With the increasing demands for scale, accuracy, and complexity in aircraft electrical system transient simulations, the requirements for chip real-time computing power, hardware resources, and inter-processor simulation data communication bandwidth continue to grow. However, the aforementioned traditional serial processors and parallel interconnect technologies have several shortcomings in handling large-scale nanosecond-level electromagnetic transient simulations: 1) Inter-processor communication latency is unstable due to limitations imposed by processor computing tasks, interrupt scheduling, and operating systems; 2) Traditional processors can only perform microsecond-level real-time simulations. The limitations of inter-chip communication delay, physical structure, and signal processing speed of the serial processor restrict the step size of real-time simulation, thereby affecting the simulation scale of aircraft electrical systems and the simulation accuracy of high-frequency power electronic equipment.

[0004] Parallel processors, specifically field-programmable gate arrays (FPGAs), represent a new direction for selecting the underlying hardware processor in high-performance aircraft electrical system small-step real-time simulators. The advantages of FPGAs, such as highly parallel processing, deep pipelined operation, abundant storage resources, and user-defined I / O interfaces, provide rich computational resources for nanosecond-level real-time simulation of aircraft electrical systems. Furthermore, full-duplex, stable, and low-latency high-speed transceivers not only expand FPGA computing resources but also achieve lower data transmission latency between FPGAs. Based on this, multi-FPGA co-simulation real-time simulators meet the requirements for high-precision, large-scale aircraft electrical system real-time simulation.

[0005] Modern power systems are hybrid AC / DC systems. AC busbar nodes house power supplies, AC loads, DC network contactors, and other equipment. Calculations and analyses of busbar voltage, current, power factor, and power quality are required for AC busbars with complex loads. Similarly, DC busbars house DC power supplies, DC loads, batteries, DC network contactors, and other equipment. Calculations and analyses of busbar voltage, current, power factor, and power quality are also required for DC busbars with complex loads. When performing these simulations in a multi-FPGA real-time simulator, it involves the synchronous reception and acquisition of simulation data from multiple FPGAs, and the corresponding power calculations can only be performed based on the status of each contactor in the busbar network. Calculating busbar-related data can achieve complete multi-simulation data, and the accuracy of its power calculations and power quality analysis can provide data for system planning optimization and performance evaluation. However, existing technologies lack effective methods for calculating busbars in aircraft power systems based on multi-FPGA simulators. Summary of the Invention

[0006] The technical problem to be solved by this invention is to address the shortcomings of the prior art by providing a busbar calculation method for aircraft electrical systems based on a multi-FPGA simulator. The method is simple in steps, reasonable in design, and easy to implement. It can ensure the effective calculation of busbar power while maintaining the busbar calculation and management in real-time simulation of large-scale aircraft electrical systems. Moreover, it has fast calculation speed and high calculation accuracy, laying the foundation for real-time simulation of aircraft electrical systems based on multi-FPGA. It has good performance and is easy to promote and use.

[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a method for calculating the busbars of an aircraft electrical system based on a multi-FPGA simulator. The aircraft electrical system to be simulated in real time is simulated and calculated in a real-time simulator built with M FPGAs. The method includes the following steps:

[0008] Step 1: Divide the aircraft's electrical system into M subsystems based on its topology, component composition, connection logic, and FPGA computing capacity;

[0009] Step 2: Extract the basic parameters of each subsystem, and establish the electrical calculation matrix, nonlinear modeling storage matrix, and control algorithm matrix for each subsystem;

[0010] Step 3: Set the system simulation step size and download the relevant bit streams of each subsystem to the corresponding FPGA;

[0011] Busbars with the same voltage, their connections, and contactor controls are assigned to the same central node FPGA. Based on the connections, corresponding connection calculation relationships and data transmission interfaces are established in the central node FPGA. The central node FPGA is connected to M-1 FPGAs. The central node FPGA is configured to send simulation data F to the d-th FPGA. d The central node FPGA receives simulation data R from the d-th FPGA. d Where d = 1, 2, 3, ..., M-, the data transmission delay between FPGAs in the simulation interface is L communication sampling clock cycles, and the simulation calculation time N for each subsystem on the corresponding FPGA is N. d One clock cycle;

[0012] Step 4: Based on the busbar interconnection topology, set the current parameters of the N branches of the single-phase node of the AC busbar as i1, i2, i3, ..., i N-1 i N ;

[0013] Step 5: Initialize and synchronize the system, and set the simulation time t=0;

[0014] Step 6: Start the simulation;

[0015] Step 7: Proceed to the simulation calculation within the next time step Δt;

[0016] Step 8: Determine the status of the busbar contactor;

[0017] Step 9: Calculate the current in each load branch of the busbar according to the voltage loop equation;

[0018] Step 10: Calculate the unknown branch current of the busbar based on the node current equation;

[0019] Step 11: Store the busbar simulation data and the real-time simulation data corresponding to each power load into the DDR memory connected to the FPGA.

[0020] Step 12: Determine whether the current simulation time has reached t = t + Δt. If not, the simulator waits until t = t + Δt.

[0021] Step 13: Determine if the simulation time has reached the set simulation termination time T. If not, return to step 7; if it has, end the simulation and data communication.

[0022] The above-mentioned method for calculating the busbar of an aircraft power system based on a multi-FPGA simulator synchronously extracts the voltage and current simulation data of each branch of the busbar within each simulation step and performs busbar power calculation; then the power calculation results, real-time simulation data in the central node FPGA, and busbar calculation parameters are mixed and stored in the DDR external to the FPGA.

[0023] The above-mentioned method for calculating the busbar power of an aircraft electrical system based on a multi-FPGA simulator includes the following specific steps:

[0024] Step A1: Calculate the active power of the busbar-related single-phase AC power supply over one cycle;

[0025] P1=f∫u(t)i(t)dt

[0026] In the formula, f is the AC busbar frequency, u(t) is the instantaneous voltage of the AC busbar, and i(t) is the node power supply current;

[0027] The discrete calculation formula in real-time simulation is:

[0028]

[0029] In the formula, And round down;

[0030] Step A2: Calculate the effective voltage and effective current values ​​of the power supply at the single-phase AC busbar within one cycle;

[0031] The formula for calculating the effective value of the voltage is:

[0032]

[0033] The formula for calculating the effective value of the current is:

[0034]

[0035] Step A3: Calculate the apparent power of the power supply at the single-phase AC busbar over one cycle;

[0036] S1=U rms I rms ;

[0037] Step A4: Calculate the power factor of the power supply at the single-phase AC busbar over one cycle;

[0038]

[0039] Step A5: Calculate the active power P of the three single phases in parallel based on step A1. A P B and P C The three-phase active power P = P A +P B +P C ;

[0040] Step A6: Calculate the apparent power S of the three single phases in parallel based on steps A2 and A3. A S B and S C The apparent power of the three phases is obtained as S = S A +S B +S C .

[0041] Compared with the prior art, the present invention has the following advantages: the method of the present invention is simple in steps, reasonable in design, and easy to implement. It can ensure the effectiveness of busbar power calculation while ensuring busbar calculation and management in real-time simulation of large-scale aircraft electrical systems. It also has fast calculation speed and high calculation accuracy, laying the foundation for real-time simulation of aircraft electrical systems based on multiple FPGAs. It has good performance and is easy to promote and use.

[0042] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the method flow of the present invention;

[0044] Figure 2 This is a schematic diagram of the real-time simulator platform for the aircraft electrical system of the present invention;

[0045] Figure 3 This is a simulation example of the aircraft electrical system of the present invention and a schematic diagram of the segmentation of multiple FPGA real-time simulation subsystems;

[0046] Figure 4 This is a schematic diagram of the multi-FPGA bus calculation of the present invention;

[0047] Figure 5 This is a timing diagram of the contactor control for the aircraft electrical system of the present invention;

[0048] Figure 6 This is a waveform diagram of phase A voltage of generator 1 of the present invention;

[0049] Figure 7 This is a waveform diagram of the A-phase current of generator 1 of the present invention;

[0050] Figure 8 This is a waveform diagram of the effective values ​​of the phase A voltage and current of the generator 1 of the present invention;

[0051] Figure 9 This is a waveform diagram of the apparent power of generator 1 of the present invention;

[0052] Figure 10 The active power waveform diagram of generator 1 of the present invention is shown.

[0053] Figure 11 This is a waveform diagram of the load power of the transformer rectifier TRU1 of the present invention. Detailed Implementation

[0054] like Figure 1 As shown, the present invention provides a method for calculating the busbars of an aircraft electrical system based on a multi-FPGA simulator. The aircraft electrical system to be simulated in real time is simulated and calculated in a real-time simulator built with M FPGAs. The method includes the following steps:

[0055] Step 1: Divide the aircraft's electrical system into M subsystems based on its topology, component composition, connection logic, and FPGA computing capacity;

[0056] Step 2: Extract the basic parameters of each subsystem, and establish the electrical calculation matrix, nonlinear modeling storage matrix, and control algorithm matrix for each subsystem;

[0057] Step 3: Set the system simulation step size and download the relevant bit streams of each subsystem to the corresponding FPGA;

[0058] Busbars with the same voltage, their connections, and contactor controls are assigned to the same central node FPGA. Based on the connections, corresponding connection calculation relationships and data transmission interfaces are established in the central node FPGA. The central node FPGA is connected to M-1 FPGAs. The central node FPGA is configured to send simulation data F to the d-th FPGA. d The central node FPGA receives simulation data R from the d-th FPGA. d Where d = 1, 2, 3, ..., M-, the data transmission delay between FPGAs in the simulation interface is L communication sampling clock cycles, and the simulation calculation time N for each subsystem on the corresponding FPGA is N. d One clock cycle;

[0059] Step 4: Based on the busbar interconnection topology, set the current parameters of the N branches of the single-phase node of the AC busbar as i1, i2, i3, ..., i N-1 i N ;

[0060] Step 5: Initialize and synchronize the system, and set the simulation time t=0;

[0061] Step 6: Start the simulation;

[0062] Step 7: Proceed to the simulation calculation within the next time step Δt;

[0063] Step 8: Determine the status of the busbar contactor;

[0064] In practice, it is necessary to determine whether the contactors associated with the AC / DC busbars of the aircraft's electrical system are in a closed or open state.

[0065] Step 9: Calculate the current in each load branch of the busbar according to the voltage loop equation;

[0066] In practice, the current source generated by the generator is distributed to each load through the bus bar, and different loads will produce different power consumption.

[0067] Step 10: Calculate the unknown branch current of the busbar based on the node current equation;

[0068] In practice, the busbar calculates the output current of the generator or power supply based on the load current data transmitted and received synchronously by the central node FPGA.

[0069] Step 11: Store the busbar simulation data and the real-time simulation data corresponding to each power load into the DDR memory connected to the FPGA.

[0070] Step 12: Determine whether the current simulation time has reached t = t + Δt. If not, the simulator waits until t = t + Δt.

[0071] Step 13: Determine if the simulation time has reached the set simulation termination time T. If not, return to step 7; if it has, end the simulation and data communication.

[0072] In practical implementation, for large-scale aircraft electrical systems, the relevant characteristic parameters of busbars are calculated in real time using a multi-FPGA real-time simulator. This enables the management, interaction, and allocation of simulation tasks at the busbar level for multi-FPGA real-time simulation data, thereby achieving high-precision, small-step real-time calculation performance of the multi-FPGA real-time simulator. The aircraft electrical system to be simulated is divided into several subsystems based on its composition, connection relationships, and the computational resources of the detailed model, and then allocated to various FPGAs for simulation calculation. Busbars with the same voltage and their connection relationships, contactor control, etc., are assigned to the same central node FPGA for calculation. The exchange and transmission of simulation data between this central node FPGA and each system is achieved through inter-FPGA communication, thus realizing the busbar-related calculations in the detailed large-scale aircraft electrical system model.

[0073] In this embodiment, the voltage and current simulation data of each branch of the busbar are extracted synchronously within each simulation step to perform busbar power calculation; then the power calculation results, real-time simulation data in the central node FPGA, and busbar calculation parameters are mixed and stored in the DDR external to the FPGA.

[0074] In this embodiment, the specific process of calculating the busbar power includes:

[0075] Step A1: Calculate the active power of the busbar-related single-phase AC power supply over one cycle;

[0076] P1=f∫u(t)i(t)dt

[0077] In the formula, f is the AC busbar frequency, u(t) is the instantaneous voltage of the AC busbar, and i(t) is the node power supply current;

[0078] The discrete calculation formula in real-time simulation is:

[0079]

[0080] In the formula, And round down;

[0081] Step A2: Calculate the effective voltage and effective current values ​​of the power supply at the single-phase AC busbar within one cycle;

[0082] The formula for calculating the effective value of the voltage is:

[0083]

[0084] The formula for calculating the effective value of the current is:

[0085]

[0086] Step A3: Calculate the apparent power of the power supply at the single-phase AC busbar over one cycle;

[0087] S1=U rms I rms ;

[0088] Step A4: Calculate the power factor of the power supply at the single-phase AC busbar over one cycle;

[0089]

[0090] Step A5: Calculate the active power P of the three single phases in parallel based on step A1. A P B and P C The three-phase active power P = P A +P B +PC ;

[0091] Step A6: Calculate the apparent power S of the three single phases in parallel based on steps A2 and A3. A S B and S C The apparent power of the three phases is obtained as S = S A +S B +S C .

[0092] In practice, the calculation processes for active power, effective voltage, and effective current are completely parallel. At the same time, the calculations for three-phase active power and three-phase apparent power are also synchronous and parallel. The calculation results are updated in each AC system cycle. The power calculation process does not affect the simulation step size of the voltage and current calculations within the busbar, nor does it affect the communication delay between FPGAs. Furthermore, the instantaneous data of the busbar voltage and current stored in the mid-node FPGA does not affect the simulation step size, thus enabling smaller simulation step sizes for multiple FPGAs.

[0093] To verify the effectiveness of the method of this invention, specific experimental verification was conducted. A real-time emulator platform composed of five FPGAs was used, as shown below. Figure 2 As shown, the aircraft electrical system topology and its FPGA simulation partitioning are as follows: Figure 3 As shown, Figure 4 Generator 1 and Generator 2 are both 60kW three-stage generators, and TRU1 and TRU2 are both 5.7kW 28V transformer rectifiers.

[0094] For the busbar calculation steps, the aircraft electrical system topology is divided. Generator 1, Generator 2, TRU1, and TRU2 are respectively assigned to four identical boards (FPGA1, FPGA2, FPGA4, and FPGA3) designed based on Xilinx Zynq series chips. The remaining components, including AC busbar 1, AC busbar 2, 28V emergency busbar 1, 28V emergency busbar 2, generator controllers (GCB1 and GCB2), busbar contactor (BTB1), AC main busbar, 28V emergency main busbar, DC contactors (TRC1, DCT1, TRC2), and the interconnection relationships of each component in the topology, are assigned to node FPGAs (MPSOC) for simulation calculation.

[0095] FPGAs transmit simulation data via fiber optic cables. Each node FPGA is interconnected with FPGA1, FPGA2, FPGA3, and FPGA4. There is no direct communication connection between any two FPGAs; instead, data transfer and computation occur through the node FPGAs. The entire real-time simulator uses a 125MHz fiber optic reference clock, and each channel between FPGAs has a transmission rate of 10Gbps. Figure 3 In the real-time simulation of the aircraft electrical system shown, the internal simulation calculation delay of FPGA1 and FPGA2 is 180ns, the communication delay between FPGA1 and FPGA2 and the node FPGA is 212ns, the internal simulation calculation delay of FPGA3 and FPGA4 is 70ns, and the communication delay between FPGA3 and FPGA4 and the node FPGA is 224ns. The calculation delay of AC busbars and DC busbars within the node FPGA is 16ns. The node FPGA completes the effective value, active power calculation, reactive power calculation, and power factor calculation of the AC busbars. Figure 4 The calculation process is shown below, and the DC load power is also calculated simultaneously.

[0096] In the entire pure resistive load simulation test, TRU1 and TRU2 were subjected to a simultaneous dynamic load experiment: 0-15ms rated load 200A; at 15ms, the load was suddenly unloaded to 100A. From 0-20ms, generators 1 and 2 independently supplied power to TRU1 and TRU2 respectively. At 20ms, generator 2 failed, GCB2 opened, BTB1 closed, and generator 1 supplied power to both TRU1 and TRU2. During this period, the contactor control sequence of the aircraft electrical system was as follows: Figure 5 As shown, the high-level contactor is closed, and the low-level contactor is open; the simulated waveform of phase A voltage of generator 1 is as follows. Figure 6 As shown; the simulated waveform of phase A current of generator 1 is as follows. Figure 7 As shown; the calculated effective values ​​of phase A voltage and current of generator 1 are as follows: Figure 8 As shown; the apparent power of generator 1 is calculated as follows: Figure 9 As shown; the active power of generator 1 is calculated as follows: Figure 10 As shown; the load power calculation for transformer rectifier TRU1 is as follows. Figure 11 As shown, the simulation data demonstrates the effectiveness of the busbar contactor control, real-time calculation, and real-time communication of simulation data, indicating that the method of the present invention can be effectively applied to the task of real-time busbar power calculation.

[0097] The above description is merely a preferred embodiment of the present invention and does not constitute any limitation on the present invention. Any simple modifications, alterations, or equivalent structural changes made to the above embodiments based on the technical essence of the present invention shall still fall within the protection scope of the present invention.

Claims

1. A method for calculating busbars in an aircraft electrical system based on a multi-FPGA simulator, characterized in that, The aircraft electrical system to be simulated in real time is simulated and calculated in a real-time simulator built on M FPGAs. The method includes the following steps: Step 1: Divide the aircraft's electrical system into M subsystems based on its topology, component composition, connection logic, and FPGA computing capacity; Step 2: Extract the basic parameters of each subsystem, and establish the electrical calculation matrix, nonlinear modeling storage matrix, and control algorithm matrix for each subsystem; Step 3: Set the system simulation step size and download the relevant bit streams of each subsystem to the corresponding FPGA; Busbars with the same voltage, their connections, and contactor controls are assigned to the same central node FPGA. Based on the connections, corresponding connection calculation relationships and data transmission interfaces are established in the central node FPGA. The central node FPGA is connected to M-1 FPGAs. The central node FPGA is configured to send simulation data F to the d-th FPGA. d The central node FPGA receives simulation data R from the d-th FPGA. d Where d = 1, 2, 3, ..., M-, the data transmission delay between FPGAs in the simulation interface is L communication sampling clock cycles, and the simulation calculation time N for each subsystem on the corresponding FPGA is N. d One clock cycle; Step 4: Based on the busbar interconnection topology, set the current parameters of the N branches of the single-phase node of the AC busbar as i1, i2, i3, ..., i N-1 i N ; Step 5: Initialize and synchronize the system, and set the simulation time t=0; Step 6: Start the simulation; Step 7: Proceed to the simulation calculation within the next time step Δt; Step 8: Determine the status of the busbar contactor; Step 9: Calculate the current in each load branch of the busbar according to the voltage loop equation; Step 10: Calculate the unknown branch current of the busbar based on the node current equation; Step 11: Store the busbar simulation data and the real-time simulation data corresponding to each power load into the DDR memory connected to the FPGA. Simultaneously extract the voltage and current simulation data of each branch of the busbar within each simulation step, and perform busbar power calculation; then mix and store the power calculation results, real-time simulation data in the central node FPGA, and busbar calculation parameters into the DDR external to the FPGA; Step 12: Determine whether the current simulation time has reached t = t + Δt. If not, the simulator waits until t = t + Δt. Step 13: Determine if the simulation time has reached the set simulation termination time T. If not, return to step 7; if it has, end the simulation and data communication.

2. The method for calculating the busbar of an aircraft electrical system based on a multi-FPGA simulator according to claim 1, characterized in that, The specific process for calculating the busbar power includes: Step A1: Calculate the active power of the busbar-related single-phase AC power supply over one cycle; P1=f∫u(t)i(t)dt In the formula, f is the AC busbar frequency, u(t) is the instantaneous voltage of the AC busbar, and i(t) is the node power supply current; The discrete calculation formula in real-time simulation is: In the formula, And round down; Step A2: Calculate the effective voltage and effective current values ​​of the power supply at the single-phase AC busbar within one cycle; The formula for calculating the effective value of the voltage is: The formula for calculating the effective value of the current is: Step A3: Calculate the apparent power of the power supply at the single-phase AC busbar over one cycle; S1=U rms IN rms ; Step A4: Calculate the power factor of the power supply at the single-phase AC busbar over one cycle; Step A5: Calculate the active power P of the three single phases in parallel based on step A1. A P B and P C The three-phase active power P = P A +P B +P C ; Step A6: Calculate the apparent power S of the three single phases in parallel based on steps A2 and A3. A S B and S C The apparent power of the three phases is obtained as S = S A +S B +S C .

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