Optical computing device and method

Abstract

Embodiments of the present application disclose an optical computing device and method, relating to the field of information technology, to provide low computing latency optical computing. The device comprises an optical analog domain module, a first optoelectronic conversion module and an electrical analog domain module. The optical analog domain module is configured to receive a first electrical signal and an optical signal, modulate the received optical signal according to the first electrical signal to generate a first optical signal, and send the first optical signal to the first conversion module. The first optoelectronic conversion module is configured to convert the first optical signal into a first electrical analog signal, send the first electrical analog signal to the electrical analog domain module, convert the rearranged first electrical analog signal into a second optical signal, and send the second optical signal to the optical analog domain module. The electrical analog domain module is configured to rearrange the first electrical analog signal, and send the rearranged first electrical analog signal to the first optoelectronic conversion module. The first electrical signal indicates a target weight, and the first optical signal indicates an intermediate calculation result of to-be-calculated data and the target weight.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of information technology, and in particular to an optical computing device and method. BACKGROUND

[0002] Neural network models (such as convolutional layers and fully connected layers) usually require a large amount of data operations, and a large amount of process data also needs to be stored during the data operation process. In order to improve the operation speed of the neural network model, the data operation process of the neural network model can be implemented by means of an optical computing system to obtain the final operation result.

[0003] According to the implementation form, the optical computing system can be divided into two categories: spatial optical computing system and on-chip optical computing system. The on-chip optical computing system is based on silicon-based photonic integrated technology, mainly uses optical devices such as Mach-Zehnder interferometers (MZI) to build optical multiplier-adders to realize convolution operation.

[0004] The existing on-chip optical computing system has high computing delay when performing a large amount of data operation, resulting in poor user experience. SUMMARY

[0005] Embodiments of the present application provide an optical computing device and method to provide low-computing-delay optical computing. In order to achieve the above purpose, the technical solutions adopted by the embodiments of the present application are as follows:

[0006] In a first aspect, the embodiments of the present application provide an optical computing device, which comprises an optical analog domain module, a first optoelectronic conversion module and an electrical analog domain module. The optical analog domain module is configured to receive a first electrical signal and an optical signal, modulate the received optical signal according to the first electrical signal to generate a first optical signal, and send the first optical signal to the first conversion module. The first optoelectronic conversion module is configured to convert the first optical signal into a first electrical analog signal, send the first electrical analog signal to the electrical analog domain module, convert the rearranged first electrical analog signal into a second optical signal, and send the second optical signal to the optical analog domain module. The electrical analog domain module is configured to rearrange the first electrical analog signal, and send the rearranged first electrical analog signal to the first optoelectronic conversion module. The first electrical signal is used to indicate a target weight, the target weight is a weight of a neural network layer corresponding to to-be-computed data, and the first optical signal is used to indicate an intermediate calculation result of the to-be-computed data and the target weight.

[0007] The existing optical computing device needs to send process data (i.e., intermediate data) in the operation process to an electric chip, and then return the intermediate data to the optical computing device after the electric chip rearranges the intermediate data. In the optical signal rearrangement transmission process, the optical signal needs to be converted into an analog electric signal through optical-electric (O-E) conversion, and then converted into a digital electric signal through analog to digital (A-D) conversion. The digital electric signal is rearranged, and then the rearranged digital electric signal is converted into an analog electric signal through digital to analog (D-A) conversion. Then, the analog electric signal is converted into an optical signal through electric-optical (E-O) conversion.

[0008] The optical computing device provided in the embodiment of the present application converts the intermediate data into an analog electric signal first, and then directly rearranges the analog electric signal. Then, the rearranged analog electric signal is converted into an optical signal. It can be seen that the optical computing device provided in the embodiment of the present application does not need A-D conversion and D-A conversion in the process of rearranging the intermediate data, thereby reducing the calculation delay and energy loss, and thus realizing low-computation-delay optical computing.

[0009] In a possible implementation, the device can further include a digital domain module, a digital-analog conversion module, and a second photoelectric conversion module. The digital domain module is configured to send a first electric digital signal to the digital-analog conversion module, where the first electric digital signal is used to represent to-be-calculated data. The digital-analog conversion module is configured to convert the first electric digital signal into a second electric analog signal, and send the second electric analog signal to the second photoelectric conversion module. The second photoelectric conversion module is configured to convert the second electric analog signal into a third optical signal, and send the third optical signal to the optical analog domain module.

[0010] It can be seen that the digital domain module of the optical computing device provided in the embodiment of the present application does not need to rearrange the intermediate result of the to-be-calculated data after sending the to-be-calculated data. Instead, the electric analog domain module rearranges the intermediate result of the to-be-calculated data. The electric analog domain module does not need A-D conversion and D-A conversion in the process of rearranging the intermediate data, thereby reducing the calculation delay and energy loss, and thus realizing low-computation-delay optical computing.

[0011] In a possible implementation, the apparatus can further include an analog-to-digital conversion module, and the optical analog domain module is further configured to: modulate the received optical signal according to the first electrical signal to generate a fourth optical signal, the fourth optical signal being used to indicate a final calculation result of the to-be-calculated data and the target weight; and send the fourth optical signal to the first optoelectronic conversion module. The first optoelectronic conversion module is further configured to: convert the fourth optical signal into a third electrical analog signal, and send the third electrical analog signal to the electrical analog domain module. The electrical analog domain module is further configured to: rearrange the third electrical analog signal, and send the rearranged third electrical analog signal to the analog-to-digital conversion module. The analog-to-digital conversion module is configured to: convert the third electrical analog signal into a second electrical digital signal, and send the second electrical digital signal to the digital domain module.

[0012] It can be seen that, after obtaining the final calculation result of the to-be-calculated data, the optical analog domain module of the optical computing apparatus provided in the embodiment of the present application transmits the result to the electrical analog domain module, and then the electrical analog domain module rearranges the result and transmits the rearranged result to the digital domain module, which reduces the number of non-computing devices in the optical analog domain module compared with the ring structure, so that the optical computing apparatus can deploy more computing devices.

[0013] In a possible implementation, the optical analog domain module can include a plurality of optical computing cores.

[0014] Compared with the existing single-core optical computing apparatus, the optical computing apparatus provided in the embodiment of the present application adopts multiple optical computing cores, which can improve the computing power and parallel processing capability, thereby further reducing the computing latency.

[0015] In a possible implementation, the plurality of optical computing cores include a first optical computing core used for full connection calculation, and the first optical computing core includes a modulator, a delay waveguide, a beam splitter, and a beam combiner. The beam splitter is configured to convert an input optical signal into a plurality of optical signals. The delay waveguide is configured to adjust the time delay of the input optical signal. The modulator is configured to perform a multiplication operation according to the input optical signal and the first electrical signal. The beam combiner is configured to combine the plurality of input optical signals into one optical signal.

[0016] It can be seen that, the beam splitter can convert a serial optical signal into a parallel optical signal, and then the parallel optical signal is subjected to a multiplication operation with an electrical signal containing weight information by the modulator, and the parallel optical signal is combined into a serial optical signal by the beam combiner.

[0017] In a possible implementation, the plurality of optical computing cores includes a second optical computing core for performing addition calculation, the second optical computing core including a modulator, a beam splitter, and a beam combiner. The beam splitter is configured to convert an input optical signal into a plurality of optical signals. The modulator is configured to perform multiplication operation on the input optical signal and the first electrical signal. The beam combiner is configured to combine the plurality of input optical signals into one optical signal.

[0018] In a possible implementation, the plurality of optical computing cores includes a third optical computing core for performing convolution calculation, the third optical computing core including a plurality of sub-optical computing cores, the sub-optical computing cores including a modulator, a delay waveguide, a beam splitter, and a beam combiner. The beam splitter is configured to convert an input optical signal into a plurality of optical signals. The delay waveguide is configured to adjust time delay of the input optical signal. The modulator is configured to perform multiplication operation on the input optical signal and the first electrical signal. The beam combiner is configured to combine the plurality of input optical signals into one optical signal.

[0019] In a possible implementation, the plurality of optical computing cores includes a fourth optical computing core for performing nonlinear activation operation, the fourth optical computing core including an optical amplifier, the optical amplifier being configured to perform nonlinear amplification on an input optical signal.

[0020] In a possible implementation, the electrical analog domain module includes an N*M switch capacitor array, N and M being positive integers.

[0021] In a possible implementation, the digital domain module is further configured to send a control signal to the electrical analog domain module. The control signal is configured to instruct the electrical analog domain module to rearrange the first electrical analog signal and send the rearranged first electrical analog signal to the first optical-electrical conversion module, and to rearrange a third electrical analog signal and send the rearranged third electrical analog signal to the analog-digital conversion module.

[0022] In a second aspect, an optical computing method is provided. The method is performed by an optical computing device, and the optical computing device comprises an optical simulation domain module, a first optical-electric conversion module, and an electric simulation domain module. The method comprises: receiving, by the optical simulation domain module, a first electric signal and an optical signal; modulating, by the optical simulation domain module, the received optical signal according to the first electric signal to generate a first optical signal; sending, by the optical simulation domain module, the first optical signal to the first conversion module; converting, by the first optical-electric conversion module, the first optical signal into a first electric simulation signal; sending, by the first optical-electric conversion module, the first electric simulation signal to the electric simulation domain module; rearranging, by the electric simulation domain module, the first electric simulation signal; sending, by the electric simulation domain module, the rearranged first electric simulation signal to the first optical-electric conversion module; converting, by the first optical-electric conversion module, the rearranged first electric simulation signal into a second optical signal; and sending, by the first optical-electric conversion module, the second optical signal to the optical simulation domain module. The first electric signal is used to indicate a target weight, and the target weight is a weight of a neural network layer corresponding to to-be-computed data. The first optical signal is used to indicate an intermediate computation result of the to-be-computed data and the target weight.

[0023] In the prior art, when a neural network model is operated, process data (i.e., intermediate data) in the operation process needs to be sent to an electric chip, and the intermediate data is rearranged by the electric chip and then returned to the optical computing device. In the process of rearranging and transmitting the optical signal, the optical signal needs to be converted into an analog electric signal through O-E conversion, and then converted into a digital electric signal through analog-to-digital (A-D) conversion. The digital electric signal is rearranged, and then the rearranged digital electric signal is converted into an analog electric signal through digital-to-analog (D-A) conversion, and then the analog electric signal is converted into an optical signal through E-O conversion.

[0024] The optical computing method provided in the embodiments of the present application converts the intermediate data into an analog electric signal first, and then directly rearranges the analog electric signal, and then converts the rearranged analog electric signal into an optical signal. It can be seen that the optical computing method provided in the embodiments of the present application does not need A-D conversion and D-A conversion in the process of rearranging the intermediate data, thereby reducing the computation delay and energy loss, and thus realizing low-computation-delay optical computing.

[0025] In a possible implementation, the apparatus further includes a digital domain module, a digital-to-analog conversion module, and a second optoelectronic conversion module, and the method further includes: the digital domain module sending a first electrical digital signal to the digital-to-analog conversion module, where the first electrical digital signal is used to represent the to-be-calculated data. The digital-to-analog conversion module converts the first electrical digital signal into a second electrical analog signal. The digital-to-analog conversion module sends the second electrical analog signal to the second optoelectronic conversion module. The second optoelectronic conversion module converts the second electrical analog signal into a third optical signal. The second optoelectronic conversion module sends the third optical signal to the optical analog domain module.

[0026] In a possible implementation, the apparatus further includes an analog-to-digital conversion module, and the method further includes: the optical analog domain module modulating the received optical signal according to the first electrical signal to generate a fourth optical signal, where the fourth optical signal is used to indicate a final calculation result of the to-be-calculated data and the target weight. The optical analog domain module sends the fourth optical signal to the first optoelectronic conversion module. The first optoelectronic conversion module converts the fourth optical signal into a third electrical analog signal. The first optoelectronic conversion module sends the third electrical analog signal to the electrical analog domain module. The electrical analog domain module rearranges the third electrical analog signal. The electrical analog domain module sends the rearranged third electrical analog signal to the analog-to-digital conversion module. The analog-to-digital conversion module converts the third electrical analog signal into a second electrical digital signal. The analog-to-digital conversion module sends the second electrical digital signal to the digital domain module.

[0027] In a possible implementation, the method can further include: the digital domain module is further configured to send a control signal to the electrical analog domain module. The control signal is used to instruct the electrical analog domain module to rearrange the first electrical analog signal and send the rearranged first electrical analog signal to the first optoelectronic conversion module, and to rearrange the third electrical analog signal and send the rearranged third electrical analog signal to the analog-to-digital conversion module.

[0028] In a third aspect, an embodiment of the present application further provides an optical computing apparatus, which includes at least one processor, and when the at least one processor executes program code or instructions, the method in the second aspect or any possible implementation manner thereof is implemented.

[0029] Optionally, the apparatus can further include at least one memory configured to store the program code or instructions.

[0030] In a fourth aspect, the embodiments of the present application further provide a chip, comprising: an input interface, an output interface, and at least one processor. Optionally, the chip further comprises a memory. The at least one processor is configured to execute code in the memory, and when the at least one processor executes the code, the chip implements the method in the second aspect or any possible implementation manner thereof.

[0031] Optionally, the chip can be an integrated circuit.

[0032] In a fifth aspect, the embodiments of the present application further provide a computer readable storage medium for storing a computer program, the computer program comprising code for implementing the method in the second aspect or any possible implementation manner thereof.

[0033] In a sixth aspect, the embodiments of the present application further provide a computer program product comprising instructions which, when executed on a computer, cause the computer to carry out the method in the second aspect or any possible implementation manner thereof.

[0034] The optical computing device, the computer storage medium, the computer program product and the chip provided by the embodiments have the beneficial effects of the optical computing method provided above, and thus the beneficial effects of the optical computing device, the computer storage medium, the computer program product and the chip can refer to the beneficial effects of the optical computing method provided above, which will not be described here again. BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative effort based on these drawings.

[0036] Figure 1 A structural schematic diagram of an optical computing device provided by the embodiments of the present application;

[0037] Figure 2 A structural schematic diagram of another optical computing device provided by the embodiments of the present application;

[0038] Figure 3 A structural schematic diagram of still another optical computing device provided by the embodiments of the present application;

[0039] Figure 4 A structural schematic diagram of a digital domain module provided by the embodiments of the present application;

[0040] Figure 5 A structural schematic diagram of an optical analog domain module provided by the embodiments of the present application;

[0041] Figure 6A structural schematic diagram of a first computing core provided for an embodiment of the present application is shown in FIG. 1.

[0042] Figure 7 A structural schematic diagram of a second computing core provided for an embodiment of the present application is shown in FIG. 2.

[0043] Figure 8 A structural schematic diagram of a third computing core provided for an embodiment of the present application is shown in FIG. 3.

[0044] Figure 9 A structural schematic diagram of a fourth computing core provided for an embodiment of the present application is shown in FIG. 4.

[0045] Figure 10 A structural schematic diagram of an electrical simulation domain module provided for an embodiment of the present application is shown in FIG. 5.

[0046] Figure 11 A flow schematic diagram of an optical computing method provided for an embodiment of the present application is shown in FIG. 6.

[0047] Figure 12 A structural schematic diagram of an electronic device provided for an embodiment of the present application is shown in FIG. 7.

[0048] Figure 13 A structural schematic diagram of a chip provided for an embodiment of the present application is shown in FIG. 8. DETAILED DESCRIPTION

[0049] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0050] The term “and / or” in the present document is only used to describe the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can represent the three cases of A alone, A and B together, and B alone.

[0051] The terms “first” and “second” and the like in the specification and drawings of the embodiments of the present application are used to distinguish different objects, or to distinguish different treatments of the same object, and are not used to describe the specific order of the objects.

[0052] Furthermore, the terms "comprise", "comprising", "include", "including", "have", "has", "contain", "containing", "characterized by", "include", "including", "comprise", "comprising", "have", "has", "contain" or variants thereof in the description of the embodiments of the present application are intended to cover a non-exclusive inclusion. For example, a process, method, system, product or device that includes a list of steps or units is not limited to the listed steps or units, but can optionally include other steps or units not listed or other steps or units inherent to such processes, methods, products or devices.

[0053] It should be noted that in the description of the embodiments of the present application, the words "exemplary" or "for example" are used to mean serving as an example, instance, or illustration. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be construed as being more preferred or advantageous than other embodiments or designs. Rather, the use of the words "exemplary" or "for example" is intended to present concepts in a concrete manner.

[0054] In the description of the embodiments of the present application, "a plurality of" means two or more, unless otherwise specified.

[0055] Optical computing systems can be divided into two categories according to their implementation forms: spatial optical computing systems and on-chip optical computing systems. On-chip optical computing systems are based on silicon-based photonic integrated technology, mainly using optical devices such as Mach-Zehnder modulators (MZI) to build optical multiplier-adders to realize convolution operations.

[0056] The existing on-chip optical computing system has the problem of high computing delay when performing a large amount of data operation. Therefore, the embodiments of the present application provide an optical computing device to provide low-computing-delay optical computing. Figure 1 A structural schematic diagram of the optical computing device provided by the embodiments of the present application is shown in FIG. 1, which includes an optical analog domain module 101, a first optical-electric conversion module 102 and an electric analog domain module 103. Figure 1 As shown in FIG. 1, the optical computing device 100 includes an optical analog domain module 101, a first optical-electric conversion module 102 and an electric analog domain module 103.

[0057] The optical analog domain module 101 is configured to receive a first electric signal and an optical signal, modulate the received optical signal according to the first electric signal to generate a first optical signal, and send the first optical signal to the first conversion module.

[0058] The first electric signal is used to indicate a target weight, the target weight is a weight of a neural network layer corresponding to to-be-computed data, and the first optical signal is used to indicate an intermediate calculation result of the to-be-computed data and the target weight.

[0059] The first photoelectric conversion module 102 is configured to convert the first optical signal into a first electric analog signal, transmit the first electric analog signal to the electric analog domain module, and convert the rearranged first electric analog signal into a second optical signal, and transmit the second optical signal to the optical analog domain module.

[0060] It should be noted that the optical analog domain module can modulate the received optical signal according to the first electric signal to generate the first optical signal after receiving the second optical signal.

[0061] The electric analog domain module 103 is configured to rearrange the first electric analog signal, and transmit the rearranged first electric analog signal to the first photoelectric conversion module.

[0062] It should be noted that in the prior art, when the optical computing device performs operation on the neural network model, the process data (i.e., intermediate data) in the operation process needs to be transmitted to the electric chip, and the intermediate data is rearranged by the electric chip and then returned to the optical computing device. In the process of rearranging and transmitting the optical signal, the optical signal needs to be converted into an analog electric signal through optical-electric (O-E) conversion, and then converted into a digital electric signal through analog to digital (A-D) conversion. The digital electric signal is rearranged, and then the rearranged digital electric signal is converted into an analog electric signal through digital to analog (D-A) conversion, and then the analog electric signal is converted into an optical signal through electric-optical (E-O) conversion.

[0063] The optical computing device provided in the embodiment of the present application converts the intermediate data into an analog electric signal first, and then directly rearranges the analog electric signal, and then converts the rearranged analog electric signal into an optical signal. It can be seen that the optical computing device provided in the embodiment of the present application does not need A-D conversion and D-A conversion in the process of rearranging the intermediate data, thereby reducing the calculation delay and energy loss, and thus realizing low calculation delay optical computing.

[0064] In a possible implementation, the first photoelectric conversion module 102 can include an O-E interface and an E-O interface.

[0065] The O-E interface is configured to convert the input optical signal into an analog electric signal.

[0066] The E-O interface is configured to convert the input analog electric signal into an optical signal.

[0067] In a possible implementation, the first photoelectric conversion module 102 can also perform serial-parallel conversion on the input signal.

[0068] In a possible implementation, the first optoelectronic conversion module 102 can be integrated with the optical analog domain module 101.

[0069] In another possible implementation, the first optoelectronic conversion module 102 can be integrated with the electrical analog domain module 103.

[0070] Figure 2 Another structure schematic diagram of the optical computing device provided by the embodiment of the present application is shown in FIG. 2. Figure 2 As shown in FIG. 2, the optical computing device 100 can further include a digital domain module 104, a digital-to-analog conversion module 105, and a second optoelectronic conversion module 106.

[0071] The digital domain module 104 is configured to send a first electrical digital signal to the digital-to-analog conversion module, where the first electrical digital signal is used to represent the data to be calculated.

[0072] The digital-to-analog conversion module 105 is configured to convert the first electrical digital signal into a second electrical analog signal, and send the second electrical analog signal to the second optoelectronic conversion module.

[0073] The second optoelectronic conversion module 106 is configured to convert the second electrical analog signal into a third optical signal, and send the third optical signal to the optical analog domain module.

[0074] It can be seen that, after the digital domain module of the optical computing device provided by the embodiment of the present application sends the data to be calculated, the digital domain module does not need to rearrange the intermediate results of the data to be calculated, but the electrical analog domain module rearranges the intermediate results of the data to be calculated, and the electrical analog domain module does not need to perform A-D conversion and D-A conversion in the process of rearranging the intermediate data, thereby reducing the computing time delay and energy loss, and thus realizing low-computing-time optical computing.

[0075] In a possible implementation, the second optoelectronic conversion module 106 can include an O-E interface and an E-O interface.

[0076] The O-E interface is configured to convert an input optical signal into an analog electrical signal.

[0077] The E-O interface is configured to convert an input analog electrical signal into an optical signal.

[0078] In a possible implementation, the second optoelectronic conversion module 106 can further perform serial-to-parallel conversion on the input signal.

[0079] In a possible implementation, the second optoelectronic conversion module 106 can be integrated with the optical analog domain module 101.

[0080] In a possible implementation, the first photoelectric conversion module 102 and the second photoelectric conversion module 106 can be the same photoelectric conversion module.

[0081] In a possible implementation, the digital-to-analog conversion module 105 can include a D-A converter.

[0082] The D-A converter is configured to convert an input analog electrical signal into a digital electrical signal.

[0083] Figure 3 Another structural schematic diagram of the optical computing device provided by the embodiment of the present application is shown in FIG. 6. Figure 3 As shown in FIG. 6, the optical computing device 100 can further include an analog-to-digital conversion module 107.

[0084] The optical analog domain module 101 is further configured to modulate the received optical signal according to the first electrical signal to generate a fourth optical signal, where the fourth optical signal is used to indicate a final calculation result of the to-be-calculated data and the target weight, and the fourth optical signal is sent to the first photoelectric conversion module 102.

[0085] The first photoelectric conversion module 102 is further configured to convert the fourth optical signal into a third electrical analog signal, and send the third electrical analog signal to the electrical analog domain module 103.

[0086] The electrical analog domain module 103 is further configured to rearrange the third electrical analog signal, and send the rearranged third electrical analog signal to the analog-to-digital conversion module 107.

[0087] The analog-to-digital conversion module 107 is configured to convert the third electrical analog signal into a second electrical digital signal, and send the second electrical digital signal to the digital domain module 104.

[0088] As can be seen, the optical analog domain module of the optical computing device provided by the embodiment of the present application, after obtaining the final calculation result of the to-be-calculated data, transmits the result to the electrical analog domain module, and then the electrical analog domain module rearranges the result and transmits the rearranged result to the digital domain module, which reduces the number of non-computing devices of the optical analog domain module compared with the ring structure, so that more computing devices can be deployed in the optical computing device.

[0089] In a possible implementation, the analog-to-digital conversion module 107 can include an A-D converter.

[0090] The A-D converter is configured to convert an input digital electrical signal into an analog electrical signal.

[0091] Figure 4 Another structural schematic diagram of the digital domain module provided by the embodiment of the present application is shown in FIG. 7. Figure 4As shown, the digital domain module includes a memory 1041 and a cache 1042.

[0092] The memory 1041 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. The non-volatile memory can be a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM) used as an external cache. By way of example, but not limitation, many forms of RAM can be used, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct rambus RAM (DRRAM).

[0093] In one possible implementation, the optical simulation domain module 101 includes a plurality of optical computing cores.

[0094] For example, the optical simulation domain module can include one or more of a first optical computing core, a second optical computing core, a third optical computing core, and a fourth computing core. The functions of the first optical computing core, the second optical computing core, the third optical computing core, and the fourth computing core are different from each other, and the optical computing cores with different functions run in parallel without data interaction at the same clock frequency.

[0095] Compared with existing single-core optical computing devices, the optical computing device provided by the embodiments of the present application adopts multiple optical computing cores, which can improve the computing power and parallel processing capability, thereby further reducing the computing time delay of optical computing.

[0096] Figure 5 A structural diagram of the optical simulation domain module provided by the embodiments of the present application is shown in FIG. 1. As shown in FIG. 1, the optical simulation domain module includes a plurality of optical computing cores. Figure 5As shown, the optical analog domain module includes a first computing core 1011, a second computing core 1012, a third computing core 1013, and a fourth computing core 1014.

[0097] The first computing core is used to perform full connection calculation, and can also be referred to as a fully connected (FC) core. Figure 6 A structural schematic diagram of the first computing core provided by an embodiment of the present application is shown in FIG. 2. Figure 6 As shown, the first computing core 1011 includes a modulator, a delay waveguide, a beam splitter, and a beam combiner.

[0098] The beam splitter is used to convert an input optical signal into multiple optical signals.

[0099] The delay waveguide is used to adjust the time delay of the input optical signal.

[0100] The modulator is used to perform a multiplication operation according to the input optical signal and the first electrical signal.

[0101] The beam combiner is used to combine the input multiple optical signals into one optical signal.

[0102] As can be seen, the optical signal containing feature information is first input to a modulator (high-speed modulator), and then converted into N optical signals by a beam splitter. Meanwhile, the delay waveguide assigns different time delays to the N beams of light split by the beam splitter, so as to convert the serial signal into a parallel signal. Thereafter, the parallel signal is again input to a modulator (high-speed modulator) to perform a multiplication operation with an electrical signal containing weight information. Subsequently, all signals are combined into one serial optical data signal by a beam combiner.

[0103] The second computing core is used to perform addition calculation, and can also be referred to as an add core. Figure 7 A structural schematic diagram of the second computing core provided by an embodiment of the present application is shown in FIG. 3. Figure 7 As shown, the second computing core 1012 includes a modulator, a beam splitter, and a beam combiner.

[0104] It can be understood that, since the beam splitter does not have any delay, the final output result is the sum of the signals input after each modulator.

[0105] The third computing core is used to perform convolution calculation, and can also be referred to as a convolution core. Figure 8 A structural schematic diagram of the third computing core provided by an embodiment of the present application is shown in FIG. 4. Figure 8 As shown, the third computing core 1013 includes a plurality of sub-optical computing cores. Each sub-optical computing core includes a modulator, a delay waveguide, a beam splitter, and a beam combiner.

[0106] The third computing core can process the feature map, and different rows of the complete feature map can be input into different sub-optical computing cores of the third computing core. The light signals of the different rows of the feature map are subjected to corresponding convolution operations through the modulator with preconfigured weights. When the convolution kernel is N*N, N sub-optical computing cores are set, and each sub-optical computing core has N branches. A complete feature information is selected in the digital domain, and the signal is input into the high-speed modulator to act on the light signal, so that different rows of a complete feature map are input into the corresponding small kernel. The signal is subjected to corresponding convolution operations through the low-speed modulator with preconfigured weights.

[0107] The modulator can be a high-speed modulator or a low-speed modulator.

[0108] The fourth computing core is used for performing a nonlinear activation operation, and can also be referred to as a non-linear core (NL). Figure 9 A structure diagram of the fourth computing core provided by an embodiment of the present application is shown in FIG. 10. Figure 9 The fourth computing core 1014 includes an optical amplifier.

[0109] The optical amplifier (semiconductor optical amplifier, SOA) is used for performing nonlinear amplification on the input light signal.

[0110] In a possible implementation, the optical amplifier can be a semiconductor optical amplifier.

[0111] It can be understood that the optical amplifier (semiconductor optical amplifier) can utilize the nonlinear region of the amplification gain to achieve nonlinear amplification, thereby realizing the function of nonlinearity.

[0112] The amplification coefficient of the light signal is adjusted by controlling the current applied to the SOA to realize the attenuation or amplification of the light signal and adjust the amplitude of the light signal. When the current applied to the SOA is lower than a threshold value, the attenuation of the light signal can be realized, and the amplitude of the light signal is reduced. When the current applied to the SOA is higher than the threshold value, the amplification of the light signal can be realized, and the amplitude of the light signal is increased.

[0113] Figure 10 A structure diagram of an electrical analog domain module provided by an embodiment of the present application is shown in FIG. 11. Figure 10 As shown in FIG. 11, the electrical analog domain module includes an N*M switch capacitor array, and N and M are positive integers.

[0114] In a possible implementation, the electrical analog domain module further includes a row read-write controller and a column read-write controller. The row controller is used for controlling the read-write of the switch capacitor in the row direction of the switch capacitor array. The column controller is used for controlling the read-write of the switch capacitor in the column direction of the switch capacitor array.

[0115] It should be noted that the N*M switch capacitor array is a two-dimensional matrix structure composed of N*M capacitors, and independent read-write controllers are arranged in the row direction and the column direction. Each direction can be regarded as a one-dimensional switch capacitor array (SCA) structure. The one-dimensional SCA is equivalent to an analog signal memory of a first in, first out (FIFO) structure.

[0116] Figure 11 A flowchart of an optical computing method provided by an embodiment of the present application is shown in FIG. 1. The method is executed by an optical computing device, which includes an optical analog domain module, a first optoelectronic conversion module, and an electrical analog domain module. As shown in FIG. 1, the method includes the following steps. Figure 11

[0117] S1101, the optical analog domain module receives a first electrical signal and an optical signal.

[0118] The first electrical signal is used to indicate a target weight, and the target weight is a weight of a neural network layer corresponding to to-be-computed data.

[0119] S1102, the optical analog domain module modulates the received optical signal according to the first electrical signal to generate a first optical signal.

[0120] The first optical signal is used to indicate an intermediate calculation result of the to-be-computed data and the target weight.

[0121] S1103, the optical analog domain module sends the first optical signal to the first conversion module.

[0122] S1104, the first optoelectronic conversion module converts the first optical signal into a first electrical analog signal.

[0123] S1105, the first optoelectronic conversion module sends the first electrical analog signal to the electrical analog domain module.

[0124] S1106, the electrical analog domain module rearranges the first electrical analog signal.

[0125] S1107, the electrical analog domain module sends the rearranged first electrical analog signal to the first optoelectronic conversion module.

[0126] S1108, the first optoelectronic conversion module converts the rearranged first electrical analog signal into a second optical signal.

[0127] S1109, the first optoelectronic conversion module sends the second optical signal to the optical analog domain module.

[0128] ​The existing optical computing method needs to send process data (i.e., intermediate data) in the operation process to an electric chip, and then return the intermediate data to the optical computing device after the electric chip rearranges the intermediate data. In the optical signal rearrangement transmission process, the optical signal needs to be converted into an analog electrical signal through O-E conversion, and then converted into a digital electrical signal through analog-to-digital conversion (A-D conversion), and then the digital electrical signal is rearranged, and then the rearranged digital electrical signal is converted into an analog electrical signal through digital-to-analog conversion (D-A conversion), and then the analog electrical signal is converted into an optical signal through E-O conversion.

[0129] The optical computing method provided in the embodiments of the present application first converts the intermediate data into an analog electrical signal, and then directly rearranges the analog electrical signal, and then converts the rearranged analog electrical signal into an optical signal in the intermediate data rearrangement process. It can be seen that the optical computing method provided in the embodiments of the present application does not need A-D conversion and D-A conversion in the intermediate data rearrangement process, thereby reducing the calculation delay and energy loss, and thus realizing low-computation-delay optical computing.

[0130] In a possible implementation, the apparatus further includes a digital domain module, a digital-to-analog conversion module, and a second optoelectronic conversion module, and the method further includes:

[0131] The digital domain module sends a first electrical digital signal to the digital-to-analog conversion module, and the first electrical digital signal is used to represent the to-be-computed data.

[0132] The digital-to-analog conversion module converts the first electrical digital signal into a second electrical analog signal.

[0133] The digital-to-analog conversion module sends the second electrical analog signal to the second optoelectronic conversion module.

[0134] The second optoelectronic conversion module converts the second electrical analog signal into a third optical signal.

[0135] The second optoelectronic conversion module sends the third optical signal to the optical analog domain module.

[0136] In a possible implementation, the apparatus further includes an analog-to-digital conversion module, and the method further includes:

[0137] The optical analog domain module modulates the received optical signal according to the first electrical signal to generate a fourth optical signal, and the fourth optical signal is used to indicate a final calculation result of the to-be-computed data and the target weight.

[0138] The optical analog domain module sends the fourth optical signal to the first optoelectronic conversion module.

[0139] The first optoelectronic conversion module converts the fourth optical signal into a third electrical analog signal.

[0140] The first photoelectric conversion module sends the third electrical analog signal to the electrical analog domain module.

[0141] The electrical analog domain module rearranges the third electrical analog signal.

[0142] The electrical analog domain module sends the rearranged third electrical analog signal to the analog-digital conversion module.

[0143] The analog-digital conversion module converts the third electrical analog signal into a second electrical digital signal.

[0144] The analog-digital conversion module sends the second electrical digital signal to the digital domain module.

[0145] In a possible implementation, the method can further include:

[0146] The digital domain module is further configured to send a control signal to the electrical analog domain module.

[0147] The control signal is used to instruct the electrical analog domain module to rearrange the first electrical analog signal and send the rearranged first electrical analog signal to the first photoelectric conversion module, and to rearrange the third electrical analog signal and send the rearranged third electrical analog signal to the analog-digital conversion module.

[0148] Figure 12 A structural schematic diagram of an electronic device is provided in the embodiments of the present application. The electronic device 1200 can be an optical computing device or a chip or a functional module in the optical computing device. As shown in the figure, the electronic device 1200 includes a processor 1201, a transceiver 1202, and a communication line 1203. Figure 12

[0149] The processor 1201 is configured to execute any step in the method provided in the embodiments of the present application, and when executing the step, the transceiver 1202 and the communication line 1203 can be selectively called to complete the corresponding operation.

[0150] Further, the electronic device 1200 can further include a memory 1204. The processor 1201, the memory 1204, and the transceiver 1202 can be connected through the communication line 1203.

[0151] ​The processor 1201 is a central processing unit (CPU), a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 1201 can also be other devices with processing capabilities, such as a circuit, a device, or a software module, without limitation.

[0152] The transceiver 1202 is configured to communicate with other devices or other communication networks, which can be an Ethernet, a radio access network (RAN), a wireless local area network (WLAN), or the like. The transceiver 1202 can be a module, a circuit, a transceiver, or any device capable of realizing communication.

[0153] The transceiver 1202 is mainly used for data transmission and reception, and can include a transmitter and a receiver to respectively send and receive signals. Operations other than signal transmission and reception, such as information processing and calculation, are realized by the processor.

[0154] The communication line 1203 is configured to transmit information between components included in the electronic device 1200.

[0155] In one design, the processor can be regarded as a logic circuit, and the transceiver can be regarded as an interface circuit.

[0156] The memory 1204 is configured to store instructions. The instructions can be a computer program.

[0157] The memory 1204 can be volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of illustration, and not limitation, nonvolatile memory can be read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which acts as external cache. By way of illustration and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct rambus RAM (DRRAM). The memory 1204 can also be a compact disc read-only memory (CD-ROM), or other optical storage, optical disk storage including a compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, and the like. The memory 1204 can also be a magnetic storage including a diskette, floppy disk, magnetic strip, magnetic hard disk, and the like. Note that the memory described herein is intended to include, without being limited to, these and any other suitable types of memory.

[0158] It is noted that the memory 1204 can be present independent of the processor 1201 or can be integrated with the processor 1201. The memory 1204 can be used to store instructions or program codes or some data, etc. The memory 1204 can be located within the electronic device 1200 or can be located outside the electronic device 1200, without limitation. The processor 1201 is configured to execute the instructions stored in the memory 1204 to implement the methods provided by the embodiments described above.

[0159] In one example, the processor 1201 can include one or more processors, such as Figure 12 CPU0 and CPU1 in FIG. 1.

[0160] As an optional implementation, the electronic device 1200 includes multiple processors, for example, in addition to the processor 1201 in Figure 12 , the processor 407 can be further included.

[0161] As an optional implementation, the electronic device 1200 further includes an output device 405 and an input device 406. Exemplarily, the input device 406 is a keyboard, a mouse, a microphone, a joystick, or the like, and the output device 405 is a display screen, a speaker, or the like.

[0162] It should be noted that the electronic device 1200 can be a chip system or a device with a structure similar to that in Figure 12 . The chip system can be composed of a chip or can include a chip and other discrete devices. The actions, terms, and the like involved among the embodiments of the present application can be mutually referenced and are not limited. The message name or parameter name in the message exchanged between the devices in the embodiments of the present application is only an example, and other names can also be used in the specific implementation, which is not limited. In addition, Figure 12 , the constituent structure shown in does not constitute a limitation on the electronic device 1200. In addition to the components shown in Figure 12 , the electronic device 1200 can include more or fewer components than those shown in Figure 12 , or combine certain components, or different component arrangements.

[0163] The processor and the transceiver described in the present application can be implemented on an integrated circuit (IC), an analog IC, a radio frequency integrated circuit, a mixed signal IC, an application specific integrated circuit (ASIC), a printed circuit board (PCB), an electronic device, or the like. The processor and the transceiver can also be manufactured by various IC process technologies, such as complementary metal oxide semiconductor (CMOS), n metal-oxide-semiconductor (NMOS), positive channel metal oxide semiconductor (PMOS), bipolar junction transistor (BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), or the like.

[0164] Figure 13A structural diagram of a chip 1300 is shown. The chip 1300 includes one or more processors 1301 and an interface circuit 1302. Optionally, the chip 1300 can further include a bus 1303.

[0165] The processor 1301 can be an integrated circuit chip having a processing capability of signals. In implementation, each step of the optical computing method can be completed by integrated logic circuits of hardware in the processor 1301 or instructions in the form of software.

[0166] Optionally, the processor 1301 can be a general processor, a digital signal processing (DSP) device, an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component. Each method and step disclosed in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or any conventional processor.

[0167] The interface circuit 1302 can be used for sending or receiving data, instructions or information. The processor 1301 can process the data, instructions or other information received by the interface circuit 1302, and can send the processed information out through the interface circuit 1302.

[0168] Optionally, the chip further includes a memory, which can include a read-only memory and a random access memory, and provides operation instructions and data for the processor. Part of the memory can further include a non-volatile random access memory (NVRAM).

[0169] Optionally, the memory stores executable software modules or data structures, and the processor can execute corresponding operations by calling operation instructions stored in the memory (which can be stored in an operating system).

[0170] Optionally, the chip can be used in the signal transmission device related to the embodiments of the present application. Optionally, the interface circuit 1302 can be used to output the execution result of the processor 1301. The optical computing method provided by one or more embodiments of the present application can refer to the foregoing embodiments, which will not be described here.

[0171] It should be noted that the functions of the processor 1301 and the interface circuit 1302 each correspond to the functions of the processor 1301 and the interface circuit 1302 respectively, which can be implemented by hardware design, or by software design, or by a combination of software and hardware, and no limitation is made herein.

[0172] The embodiment of the present application further provides an optical computing device, which comprises at least one processor, and when the at least one processor executes program codes or instructions, the optical computing method in the above embodiment is realized.

[0173] Optionally, the device can further comprise at least one memory for storing the program codes or instructions.

[0174] The embodiment of the present application further provides a computer storage medium, which stores computer instructions, and when the computer instructions run on an optical computing device, the optical computing device executes the above related method steps to realize the optical computing method in the above embodiment.

[0175] The embodiment of the present application further provides a computer program product, and when the computer program product runs on a computer, the computer executes the above related steps to realize the optical computing method in the above embodiment.

[0176] The embodiment of the present application further provides an optical computing device, which can be a chip, an integrated circuit, an assembly or a module. Specifically, the device can comprise a processor and a memory for storing instructions connected to each other, or the device comprises at least one processor for obtaining instructions from an external memory. When the device runs, the processor can execute the instructions to make the chip execute the optical computing method in the above method embodiments.

[0177] It should be understood that in various embodiments of the present application, the size of the serial number of the above processes does not mean the order of execution, and the execution order of the processes should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0178] Those skilled in the art can realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0179] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiment, and will not be repeated here.

[0180] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above units is only a logical function division, and another division mode can be used in actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.

[0181] The units described above as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e. can be located in one place, or can be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0182] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit.

[0183] If the above functions are realized in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application or the part of the present application that essentially contributes to the prior art or the part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described above in each embodiment of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various program code storage media.

[0184] The above merely provides the specific implementation of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of the changes or replacements within the technical range disclosed by the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An optical computing device, characterized in that, include: Optical analog domain module, first photoelectric conversion module, and electrical analog domain module; The optical simulation domain module is used to receive a first electrical signal and an optical signal, and modulate the received optical signal according to the first electrical signal to generate a first optical signal, and send the first optical signal to the first conversion module. The first electrical signal is used to indicate the target weight, the target weight is the weight of the neural network layer corresponding to the data to be calculated, and the first optical signal is used to indicate the intermediate calculation result of the data to be calculated and the target weight. The first photoelectric conversion module is used to convert the first optical signal into a first electrical analog signal, send the first electrical analog signal to the electrical analog domain module, and convert the rearranged first electrical analog signal into a second optical signal, and send the second optical signal to the optical analog domain module. The electrical analog domain module is used to rearrange the first electrical analog signal and send the rearranged first electrical analog signal to the first photoelectric conversion module.

2. The apparatus according to claim 1, characterized in that, The device further includes: a digital domain module, a digital-to-analog conversion module, and a second photoelectric conversion module; The digital domain module is used to send a first electrical digital signal to the digital-to-analog conversion module, wherein the first electrical digital signal is used to characterize the data to be calculated; The digital-to-analog converter module is used to convert the first electrical digital signal into a second electrical analog signal, and to send the second electrical analog signal to the second photoelectric conversion module; The second photoelectric conversion module is used to convert the second electrical analog signal into a third optical signal and to send the third optical signal to the optical analog domain module.

3. The apparatus according to claim 2, characterized in that, The device further includes: an analog-to-digital conversion module, wherein the optical analog domain module is further used for: The received optical signal is modulated based on the first electrical signal to generate a fourth optical signal, which is used to indicate the final calculation result of the data to be calculated and the target weight; Send the fourth optical signal to the first photoelectric conversion module; The first photoelectric conversion module is further configured to convert the fourth optical signal into a third electrical analog signal, and to send the third electrical analog signal to the electrical analog domain module; The electrical analog domain module is also used to rearrange the third electrical analog signal and send the rearranged third electrical analog signal to the analog-to-digital conversion module; The analog-to-digital conversion module is used to convert the third electrical analog signal into a second electrical digital signal, and to send the second electrical digital signal to the digital domain module.

4. The apparatus according to any one of claims 1 to 3, characterized in that, The optical simulation domain module includes multiple optical computing cores.

5. The apparatus according to claim 4, characterized in that, The plurality of optical computing cores include a first optical computing core for performing fully connected computations, the first optical computing core including a modulator, a delay waveguide, a beam splitter, and a beam combiner; The beam splitter is used to convert the input optical signal into multiple optical signals; The time-delay waveguide is used to adjust the time delay of the input optical signal; The modulator is used to perform a multiplication operation based on the input optical signal and the first electrical signal; The beam combiner is used to combine multiple input optical signals into a single optical signal.

6. The apparatus according to claim 4, characterized in that, The plurality of optical computing cores includes a second optical computing core for performing addition calculations, the second optical computing core including a modulator, a beam splitter and a beam combiner; The beam splitter is used to convert the input optical signal into multiple optical signals; The modulator is used to perform a multiplication operation based on the input optical signal and the first electrical signal; The beam combiner is used to combine multiple input optical signals into a single optical signal.

7. The apparatus according to claim 4, characterized in that, The plurality of optical computing cores include a third optical computing core for performing convolution calculations, the third optical computing core includes a plurality of sub-optical computing cores, and the sub-optical computing cores include a modulator, a time-delay waveguide, a beam splitter and a beam combiner; The beam splitter is used to convert the input optical signal into multiple optical signals; The time-delay waveguide is used to adjust the time delay of the input optical signal; The modulator is used to perform a multiplication operation based on the input optical signal and the first electrical signal; The beam combiner is used to combine multiple input optical signals into a single optical signal.

8. The apparatus according to claim 4, characterized in that, The plurality of optical computing cores includes a fourth optical computing core for performing nonlinear activation operations, the fourth optical computing core including an optical amplifier. The optical amplifier is used to nonlinearly amplify the input optical signal.

9. The apparatus according to any one of claims 1 to 3, 5 to 8, characterized in that, The electrical simulation domain module includes an N*M switched capacitor array, where N and M are positive integers.

10. A method for optical computing, characterized in that, The method is executed by an optical computing device, which includes an optical analog domain module, a first photoelectric conversion module, and an electrical analog domain module. The method includes: The optical simulation domain module receives a first electrical signal and an optical signal. The first electrical signal is used to indicate the target weight, which is the weight of the neural network layer corresponding to the data to be calculated. The optical simulation domain module modulates the received optical signal according to the first electrical signal to generate a first optical signal, which is used to indicate the intermediate calculation result of the data to be calculated and the target weight. The optical simulation domain module sends the first optical signal to the first photoelectric conversion module; The first photoelectric conversion module converts the first optical signal into a first electrical analog signal; The first photoelectric conversion module sends the first electrical analog signal to the electrical analog domain module; The electrical analog domain module rearranges the first electrical analog signal; The electrical analog domain module sends the rearranged first electrical analog signal to the first photoelectric conversion module; The first photoelectric conversion module converts the rearranged first electrical analog signal into a second optical signal; The first photoelectric conversion module sends the second optical signal to the optical simulation domain module.

11. The method according to claim 10, characterized in that, The device further includes a digital domain module, a digital-to-analog conversion module, and a second photoelectric conversion module; the method further includes: The digital domain module sends a first electrical digital signal to the digital-to-analog conversion module, the first electrical digital signal being used to characterize the data to be calculated; The digital-to-analog converter module converts the first electrical digital signal into a second electrical analog signal; The digital-to-analog conversion module sends the second electrical analog signal to the second photoelectric conversion module; The second photoelectric conversion module converts the second electrical analog signal into a third optical signal; The second photoelectric conversion module sends the third optical signal to the optical simulation domain module.

12. The method according to claim 11, characterized in that, The device further includes an analog-to-digital conversion module, and the method further includes: The optical simulation domain module modulates the received optical signal according to the first electrical signal to generate a fourth optical signal, which is used to indicate the final calculation result of the data to be calculated and the target weight. The optical simulation domain module sends the fourth optical signal to the first photoelectric conversion module; The first photoelectric conversion module converts the fourth optical signal into a third analog electrical signal; The first photoelectric conversion module sends the third electrical analog signal to the electrical analog domain module; The electrical analog domain module rearranges the third electrical analog signal; The electrical analog domain module sends the rearranged third electrical analog signal to the analog-to-digital conversion module; The analog-to-digital conversion module converts the third analog electrical signal into a second digital electrical signal; The analog-to-digital conversion module sends the second electronic digital signal to the digital domain module.

13. An optical computing device, comprising at least one processor and a memory, characterized in that, The at least one processor executes a program or instructions stored in a memory to cause the optical computing device to implement the method of any one of claims 10 to 12.

14. A computer-readable storage medium for storing a computer program, characterized in that, When the computer program is run on a computer or processor, it causes the computer or processor to perform the method of any one of claims 10 to 12.

15. A computer program product, the computer program product comprising instructions, characterized in that, When the instructions are executed on a computer or processor, they cause the computer or processor to perform the method of any one of claims 10 to 12.

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