An image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment
By introducing a nonlinear pooling and deep separable convolution image classification method on the MCU, the lightweight neural network structure is optimized, and the problem of insufficient model size and memory on the MCU is solved, and efficient image classification and data privacy protection are achieved.
Patent Information
- Application Number
- CN202311208995.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-19
- Publication Date
- 2025-09-02
- Estimated Expiration
- 2043-09-19
AI Technical Summary
Existing machine learning models face problems such as model size, insufficient peak memory and existing compression methods fail to effectively solve memory bottlenecks when deployed on microcontrollers (MCUs), resulting in resource waste and data privacy risks.
The image classification method based on nonlinear pooling and deep separable convolution is adopted. By improving the lightweight neural network structure, the MCU-BLOCK-A and MCU-BLOCK-B modules are introduced, combining efficient channel attention mechanism and nonlinear pooling to optimize the parameter efficiency and memory usage of the model.
It realizes efficient operation of image classification on the MCU, reduces model size and peak memory, improves computing efficiency, protects data privacy and reduces energy consumption, and is suitable for fields such as smart homes and precision agriculture.
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Figure CN117197576B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of machine learning, and in particular to an image classification method suitable for MCU deployment based on nonlinear pooling and depthwise separable convolution. Background Art
[0002] Recent advances in machine learning (ML) have opened up new opportunities for its application to resource-constrained Internet of Things (IoT) nodes. Machine learning algorithms are now widely used in industries such as smart homes, precision agriculture, and consumer electronics. While running machine learning models (such as image classification) on microcontrollers (MCUs) can avoid uploading data to the cloud, accelerate real-time processing and response, significantly protect data privacy, and significantly reduce energy consumption, deploying intelligent algorithms on MCUs still faces numerous challenges.
[0003] 1) Model size: The MCU's flash memory (FLASH) is used to store model parameters, and its space range is mostly 0 to 2MB. However, the size of a general lightweight neural network model is over 10MB. For example, the size of MobileNetv2 is 13.6MB, which is too low in parameter efficiency.
[0004] 2) Peak memory size: MCU static random access memory (SRAM) is used to store temporary intermediate data during neural network execution, including input and output activation matrices. Its storage size is generally 0 to 512KB. However, MobileNetv2 and EfficientNet-B0 have a peak memory size of 2.29MB, which is unsuitable for most existing MCUs.
[0005] 3) Existing methods that use pruning, quantization, and other techniques to compress models only focus on reducing model parameters and computational complexity, but do not address memory bottlenecks. Furthermore, methods using neural network architecture search (NAS) require significant hardware resources, and hand-designed networks like MobileNetv2-0.35 and EtinyNet fail to balance the trade-offs between peak memory usage, computational complexity, and accuracy. Summary of the Invention
[0006] (1) Technical problems solved
[0007] In response to the shortcomings of the existing technology, the present invention provides an image classification method suitable for MCU deployment based on nonlinear pooling and depthwise separable convolution.
[0008] (2) Technical solution
[0009] To achieve the above objectives, the present invention is implemented through the following technical solutions: an image classification method suitable for MCU deployment based on nonlinear pooling and depthwise separable convolution, specifically comprising the following steps:
[0010] Step 1. Obtain MCU-BLOCK-A
[0011] MCU-BLOCK-A improves the depthwise separable convolution of the lightweight neural network MobileNets. It uses a depthwise convolution (DWConv) and a pointwise convolution (PWConv) with a batch normalization layer and efficient channel attention (ECA) between them. Finally, a layer of depthwise convolution is added, and the input is residually connected to the output of the last depthwise convolution layer.
[0012] Step 2. Obtain MCU-BLOCK-B
[0013] Based on the MCU-BLOCK-A obtained in step 1, remove the residual connection between the input and the output of the last layer of depthwise convolution on the basis of MCU-BLOCK-A, add a residual connection between the input and the output of the first point-by-point convolution, and perform a residual connection between the connected output and the output of the last layer of depthwise convolution;
[0014] Step 3. Acquisition of nonlinear pooling layer
[0015] Based on the nonlinear pooling module, nonlinear pooling is introduced after the first convolutional layer to quickly downsample the image size, bypassing the large activation layer in the middle to complete the image aggregation calculation attenuation;
[0016] Step 4. Model construction
[0017] The model is constructed by combining convolution, nonlinear pooling, MCU-BLOCK-A, and MCU-BLOCK-B modules, balancing peak memory, model size, computational effort, and accuracy. Specifically, the following factors are considered:
[0018] 1) In the first stage, local features are extracted using convolution with a stride of 2;
[0019] 2) In the second stage, nonlinear pooling is used to extract feature information along both rows and columns of the image. The image size is then rapidly reduced to ensure that the peak memory usage of the CNN model does not exceed the static random access memory of the MCU.
[0020] 3) In the third stage, features are extracted through several MCU-BLOCK-A modules;
[0021] 4) In the fourth stage, the constructed MCU-BLOCK-B module is used;
[0022] 5) In the fifth stage, global pooling is used for dimensionality reduction, and finally the classification results are obtained through the fully connected layer; Step 5. Model training and deployment
[0023] The model is trained and tested using the ImageNet dataset and the visual wake-up word dataset, and the model trained on the VWW dataset is deployed on a single-chip microcomputer to test its performance.
[0024] Preferably, the ReLU activation function is used in MCU-BLOCK-A in step 1, MCU-BLOCK-B in step 2, between the point-by-point convolution and the depth convolution, and after the last depth convolution.
[0025] Preferably, the efficient channel attention mechanism in step 1 specifically includes:
[0026] First, perform global pooling on the input original feature map, and then use a learnable 1D convolution operation to calculate the weight of each channel. The formula is as follows:
[0027] w i =σ(C1D k (y))
[0028] Among them, C1D k It is a fast 1D convolution, k represents how many adjacent channels participate in the attention prediction process of the channel, σ is the Sigmoid activation function, and then it is multiplied element by element with the original feature map.
[0029] Preferably, the specific operation of the nonlinear pooling module in step 3 includes extracting a receptive field image of a specified format (r×c×k) from the input image, where r is the receptive field row size, c is the receptive field column size, and k is the number of receptive field channels. Then, a fast gate recurrent neural network (FastGRNN1) is used to extract features on the row level to obtain r feature blocks of length h1, where h1 is the FastGRNN1 hidden layer size. Then, a bidirectional FastGRNN2 operation is performed on the r feature blocks of length h1 to obtain two feature blocks of length h2. Similar to extracting features on the row level, c feature blocks of length h1 are first obtained on the column level, and then a bidirectional FastGRNN2 operation is performed to obtain two feature blocks of length h2. Finally, the four feature blocks of length h2 are spliced to obtain a feature vector after performing a nonlinear pooling operation on a single receptive field.
[0030] Preferably, the steps of deploying a CNN neural network based on an MCU specifically include the following steps:
[0031] Based on step 4, the model is built, the image classification dataset is loaded, and training is performed. The model weight file with the highest accuracy is saved, and the model weight file is converted into the open neural network exchange format, and then 8-bit asymmetric quantization is performed. The quantization formula is:
[0032] valfp32 =scale*val quantized
[0033]
[0034] The STMCube.AI toolkit is used to analyze the model and generate the corresponding C language basic code. Then, upper-level applications are developed to run the image classification algorithm on the MCU.
[0035] Preferably, a device for deploying image classification based on MCU includes an MCU microprocessor and a camera, wherein:
[0036] The STM32F746G-DISCO is used as the MCU. The flash memory in the MCU is used to store the neural network model weights, basic code framework, and OS. The SRAM in the MCU is used to store intermediate activation values and other buffer files during the operation of the CNN network. Arducam is used as the camera to acquire images.
[0037] (3) Beneficial effects
[0038] This paper provides an image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment. It has the following beneficial effects:
[0039] 1. The present invention provides an image classification method suitable for MCU deployment based on nonlinear pooling and depthwise separable convolution. This invention introduces MCU-BLOCK-A and MCU-BLOCK-B, which improve parameter efficiency by increasing the number of DWConvs and increase network width by adding multiple residual connections. Limited by the MCU's memory and computing power, the traditional attention mechanism SE has many parameters and a large amount of computation, making it unsuitable for deployment on MCUs. By adding ECA, compared with traditional attention, no additional parameters are required, allowing the model to focus more on important feature channels, reducing the number of parameters and computational cost of the fully connected layer of the ordinary attention mechanism, thereby improving computational efficiency. This invention achieves better classification performance using less than 1M parameters.
[0040] 2. The present invention provides an image classification method suitable for MCU deployment based on nonlinear pooling and depthwise separable convolution. This method has a smaller peak memory. In the first stage, it uses a convolution with an output channel of 8 and a stride of 2, and then uses nonlinear pooling to downsample the image to 1 / 4 of its original size. Therefore, compared with other models, this method has a smaller peak memory, further reduces the amount of computation, is applicable to most MCUs, and achieves good classification performance. Running the machine learning model on the MCU can avoid uploading data to the cloud, greatly protect data privacy, accelerate real-time processing and response, and significantly reduce energy consumption. The present invention can be widely used in industries such as smart homes, precision agriculture, and consumer electronics. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] Figure 1 This is a diagram of the depthwise separable convolutional architecture of the present invention;
[0042] Figure 2 This is a structural diagram of the improved module MCU-BLOCK-A of the present invention;
[0043] Figure 3 This is a structural diagram of the improved module MCU-BLOCK-B of the present invention;
[0044] Figure 4 is a graph showing changes in the intermediate activation values of the network of the present invention;
[0045] Figure 5 This is a comparison chart of the accuracy and peak memory in the visual wake-up word experiment of the present invention and other models;
[0046] Figure 6 This is a comparison chart of the accuracy and parameter amounts of the visual wake-up word experiment of the present invention with other models;
[0047] Figure 7 This is a flow chart for model training deployment of the present invention;
[0048] Figure 8 A diagram of the hardware device structure for the model deployment of the present invention;
[0049] Figure 9 It is a schematic diagram of the process of the present invention. DETAILED DESCRIPTION
[0050] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0051] Example:
[0052] like Figure 1-9 As shown, an embodiment of the present invention provides an image classification method suitable for MCU deployment based on nonlinear pooling and depthwise separable convolution, which specifically includes the following steps:
[0053] Step 1. Obtain MCU-BLOCK-A
[0054] MCU-BLOCK-A is an improvement to the depthwise separable convolution of the lightweight MobileNets neural network. First, a DWConv and a PWConv layer are added with a batch normalization layer and ECA between them. This achieves cross-channel interaction and improves model classification accuracy with minimal increase in parameters and computational effort. Finally, another DWConv layer is added, and a residual connection is established between the input and the output of the final DWConv layer to mitigate vanishing gradients and improve information flow.
[0055] like Figure 1 As shown, this is the structure of MobileNets' depth-wise separable convolution. Figure 2 For our improved MCU-BLOCK-A, we first use a DWConv to extract information channel by channel, and then use ECA to learn the importance of each channel. Here we first use global pooling and then apply a learnable 1D convolution operation to calculate the weight of each channel. The formula is as follows:
[0056] w i =σ(C1D k (y))
[0057] Where C1D is a fast 1D convolution, k represents how many adjacent channels participate in the attention prediction process of the channel. The size of k is dynamically determined by the number of channels, and σ is the Sigmoid activation function. The formula is as follows:
[0058]
[0059] C is the number of channels, |t| odd represents the odd number closest to t, γ is 2, and b is 1. This is then element-wise multiplied with the original feature map, and PWConv is used to interact and combine features between channels to obtain a richer feature representation. DWConv is used again in the final layer because, compared to standard convolution, DWConv has fewer parameters, lower computational overhead, and is more suitable for resource-constrained scenarios. Therefore, we increased the proportion of DWConv in the model. Furthermore, introducing residual connections between the input and output of the final layer facilitates the construction of deeper networks, improving the model's representational capabilities and performance.
[0060] Step 2. Obtain MCU-BLOCK-B
[0061] like Figure 3 As shown. Based on the MCU-BLOCK-A obtained in step 1, the residual connection between the input and the output of the last layer of depth convolution is removed on the basis of MCU-BLOCK-A, the residual connection between the input and the output of the first point-by-point convolution is added, and the residual connection between the connected output and the output of the last layer of depth convolution is performed. Figure 4 As shown in the figure, due to the large image size in the early stages of a CNN network, using too many residual connections would cause the model's peak memory usage to exceed the MCU's SRAM. However, in the later stages of the model, the image size is smaller, allowing the use of more residual connections to increase the model's equivalent width without exceeding the MCU's SRAM size limit. Therefore, this method introduces multiple residual connections to increase the equivalent width while maintaining accuracy while maintaining a small network width and parameters.
[0062] In MCU-BLOCK-A and MCU-BLOCK-B, the ReLU activation function is used between the first PWConv and DWConv, and after the last DWConv. This is because the ReLU activation function is easy to quantize and effectively increases the nonlinear capabilities of the network with a low number of parameters and computational complexity. However, the ReLU activation function is not used after the first DWConv because ReLU hinders the flow of information in low-dimensional data, thereby weakening the model's capacity and expressiveness.
[0063] Step 3. Obtaining the nonlinear pooling layer
[0064] After the first convolutional layer, nonlinear pooling is introduced to rapidly downsample the image size, bypassing the large intermediate activation layer to perform image aggregation and computational attenuation. This allows the model to perform more refined aggregation across a large receptive field, extracting more image information than standard pooling while reducing memory usage and computational complexity without sacrificing accuracy.
[0065] like Figure 4As shown in the figure, a receptive field image of the specified format (r×c×k) is extracted from the input image, where r is the row size of the receptive field, c is the column size of the receptive field, and k is the number of channels in the receptive field. A fast gated recurrent neural network (FastGRNN1) is then used to extract features on the row level, obtaining r feature blocks of length h1, where h1 is the size of the FastGRNN1 hidden layer. A bidirectional FastGRNN2 operation is then performed on these r feature blocks of length h1, resulting in two feature blocks of length h2. Similar to feature extraction on the row level, c feature blocks of length h1 are first obtained on the column level, followed by a bidirectional FastGRNN2 operation to obtain two feature blocks of length h2. Finally, the four feature blocks of length h2 are concatenated to obtain a feature vector after nonlinear pooling on a single receptive field. In this example, after h1=h2=8, c=r=6, and k=8, nonlinear pooling is performed on different receptive fields of the image. This more refined aggregation extracts more image information than ordinary pooling while reducing the memory usage and computational complexity during operation. The FastGRNN formula is as follows:
[0066] z t =σ(Wp t +Uh t-1 +b z )
[0067]
[0068]
[0069] p t represents the t-th input feature vector, h t-1 Represents the output of the previous step, W,U,b z ,b h are all parameters, z t The update gate indicates how much information from the previous state can be updated to the current state. is the candidate hidden layer state, and by fusing the current input and the previous hidden state, a possible updated state is generated, h t is the hidden state of the current time step. Compared with GRU and LSTM, FastGRNN has less computation, faster training time, and can effectively capture the edges and directions of the graph, making it more suitable for resource-constrained devices.
[0070]
[0071]
[0072] Table 1
[0073] Step 4. Model construction
[0074] The model is constructed by combining conventional convolution, nonlinear pooling, MCU-BLOCK-A and MCU-BLOCK-B modules, global pooling, and fully connected layers. The network structure is shown in Table 1. Where Input is the input image size and number of channels, Operator is the specific operation, c is the number of output channels, n is the number of repetitions, s is the number of strides, and ECA indicates whether the ECA module is used in the operation.
[0075] The trade-offs between peak memory, model size, computational effort, and accuracy include:
[0076] 1) In the first stage, local features are extracted using convolution with a stride of 2;
[0077] 2) In the second stage, nonlinear pooling is used to extract feature information along both rows and columns of the image. The image size is then rapidly reduced to ensure that the peak memory usage of the CNN model does not exceed the static random access memory of the MCU.
[0078] 3) In the third stage, features are extracted through several MCU-BLOCK-A modules;
[0079] 4) In the fourth stage, the constructed MCU-BLOCK-B module is used;
[0080] 5) In the fifth stage, global pooling is used to reduce the dimension, and finally the classification result is obtained through the fully connected layer.
[0081] Step 5. Model training and deployment
[0082] The model was trained and tested using the ImageNet and Visual Wake Words (VWW) datasets. The VWW-trained model was deployed on an STM32F746 microcontroller to test its performance. The ImageNet dataset is the most influential benchmark, with 1,281,167 images in the training set and 50,000 images in the validation set. Images were preprocessed to resize all training sets to 224×224. Subsequently, the images were randomly horizontally flipped and normalized using the mean and standard deviation. The model was trained using stochastic gradient descent (SGD) with a momentum optimizer, using a weight decay of 4×10⁻⁵ and a momentum of 0.9. A cosine learning rate decay strategy was used, with an initial learning rate of 0.1 and a final learning rate decay of 0.00001 over 400 epochs. The batch size was set to 1024. Training was performed using the PyTorch framework and four NVIDIA GeForce A100 GPUs. The experimental results are shown in Table 2. Compared with other lightweight models, the model of the present invention has fewer parameters and peak memory, so it can be deployed on MCUs with less memory resources while having higher accuracy.
[0083]
[0084]
[0085] Table 2
[0086] The EtinyNet-1.0* in Table 2 is the result of retraining with the first layer output channel reduced to 8, while maintaining the same Peak RAM as this model.
[0087] Visual Wake Words (VWW) is a benchmark for evaluating the performance of small vision models on microcontrollers. The task involves determining the presence of a person in an image. The dataset can serve as a realistic representation of a common use case for microcontroller-based vision applications and provides a standardized benchmark for evaluating the accuracy and effectiveness of small vision models. The training dataset contains 115,000 images, while the validation dataset contains 8,000 images.
[0088] Specifically, this example uses the same data augmentation strategy as the experiment on ImageNet data, with an initial learning rate of 0.05, a cosine learning rate decay strategy, and uses SGD and momentum optimizers to train the model with a weight decay of 3e-4. 300 rounds of training with a batch size of 256. This example tests the effectiveness and efficiency of the model on images with resolutions of 80×80, 144×144, and 244×244 pixels. This example sets the model's multiplier to 0.75, that is, the number of all output channels of the model is multiplied by 0.75, the first layer's output channels become 6, the nonlinear pooling output channels become 24, and so on. In this way, the benchmark conditions of the VisualWake Words visual wake-up task are met, namely, peak memory (no more than 256KB), MMACs (no more than 60M), and the number of parameters (no more than 300K), ensuring that the model is suitable for deployment on MCU devices with limited resources. The experimental comparison results are shown in the figure. Figure 5 and Figure 6 As shown in Figure 2, better classification results are achieved with less peak memory and parameters (265k). The actual deployment process is as follows: Figure 7 As shown in the figure, first convert the model file with the highest classification accuracy obtained by training on a dataset with a resolution of 80×80 into ONNX format, and then use 8-bit static asymmetric quantization. The quantization formula is:
[0089] val fp32 =scale*val quantized
[0090]
[0091] where val fp32 is the original value of the model weight, val quantized is the quantized value, The largest value in the original model weights, The smallest value in the original model weight, It is the maximum value after quantization. Since it is 8-bit quantization, it is 255 here. It is the minimum value 0 after quantization.
[0092] The STMCube.AI toolkit is used to analyze the model and generate the corresponding C language basic code. The quantized model weights are initialized in the form of a static array. Figure 8As shown. The present invention uses an STM32F746G-DISCO as the main controller and an Arducam as the camera to acquire images. The STM32F746G-DISCO serves as the MCU. The MCU's flash memory is used to store neural network model weights, the basic code framework, and the operating system. The MCU's SRAM is used to store intermediate activation values and other buffer files during the CNN network's operation. The Arducam serves as the camera to acquire images. This enables real-time detection of the presence of people in a video.
[0093] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.
Claims
1. An image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment, characterized in that: The specific steps include: Step 1. Obtain MCU-BLOCK-A MCU-BLOCK-A is an improvement on the depthwise separable convolution of the lightweight neural network MobileNets. It uses a depthwise convolution and a pointwise convolution, adds a batch normalization layer and an efficient channel attention mechanism between them, and finally adds a layer of depthwise convolution. The input is residually connected to the output of the last depthwise convolution layer. Step 2. Obtain MCU-BLOCK-B Based on the MCU-BLOCK-A obtained in step 1, remove the residual connection between the input and the output of the last layer of depthwise convolution on the basis of MCU-BLOCK-A, add the residual connection between the input and the output of the point-by-point convolution, and perform a residual connection between the connected output and the output of the last layer of depthwise convolution; Step 3. Acquisition of nonlinear pooling layer Based on the nonlinear pooling module, it is applied to the initial convolution layer to quickly downsample the image size, bypassing the large activation layer in the middle to complete the image aggregation calculation attenuation; Step 4. Model construction The model is constructed by combining convolution, nonlinear pooling, MCU-BLOCK-A, and MCU-BLOCK-B modules, balancing peak memory, model size, computational effort, and accuracy. Specifically, the following factors are considered: 1) In the first stage, local features are extracted using convolution with a stride of 2; 2) In the second stage, nonlinear pooling is used to extract feature information along both rows and columns of the image, and then the image size is rapidly reduced to ensure that the peak memory usage of the CNN model does not exceed the static random access memory capacity of the MCU; 3) In the third stage, features are extracted through several MCU-BLOCK-A modules; 4) In the fourth stage, the constructed MCU-BLOCK-B module can increase its equivalent width by introducing multiple residual connections under the conditions of smaller network width and parameters to ensure accuracy; 5) In the fifth stage, global pooling is used to reduce the dimension, and finally the classification result is obtained through the fully connected layer; Step 5. Model training and deployment The model is trained and tested using the ImageNet dataset and the visual wake-up word dataset, and the model trained on the VWW dataset is deployed on a single-chip microcomputer to test its performance.
2. The image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment according to claim 1, characterized in that: No nonlinear activation function is used in MCU-BLOCK-A in step 1, MCU-BLOCK-B in step 2, or after the first depthwise convolution. The ReLU activation function is used between the pointwise convolution and the depthwise convolution, and after the last depthwise convolution.
3. The image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment according to claim 1, characterized in that: The efficient channel attention mechanism in step 1 specifically includes: First, perform global pooling on the input original feature map, and then use a learnable 1D convolution operation to calculate the weight of each channel. The formula is as follows: In i =σ(C1D k (y)) Among them, C1D k It is a fast 1D convolution, k represents how many adjacent channels participate in the attention prediction process of the channel, σ is the Sigmoid activation function, and then it is multiplied element by element with the original feature map.
4. The image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment according to claim 1, characterized in that: The specific operation of the nonlinear pooling module in step 3 includes extracting a receptive field image of a specified format (r×c×k) from the input image, where r is the receptive field row size, c is the receptive field column size, and k is the number of receptive field channels; then using a fast gate recurrent neural network (FastGRNN1) to extract features on the row level to obtain r feature blocks of length h1, where h1 is the FastGRNN1 hidden layer size, and then performing a bidirectional FastGRNN2 on the r feature blocks of length h1 to obtain two feature blocks of length h2; similar to extracting features on the row level, first obtain c feature blocks of length h1 on the column level, and then perform a bidirectional FastGRNN2 operation to obtain two feature blocks of length h2; finally, the four feature blocks of length h2 are spliced to obtain a feature vector after performing a nonlinear pooling operation on a single receptive field.
5. The image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment according to claim 1, characterized in that: The steps for deploying a CNN neural network based on an MCU include the following: Based on step 4, the model is built, the image classification dataset is loaded, and training is performed. The model weight file with the highest accuracy is saved, and the model weight file is converted into the open neural network exchange format, and then 8-bit asymmetric quantization is performed. The quantization formula is: val fp32 =scale*val quantized The STMCube.AI toolkit is used to analyze the model and generate the corresponding C language basic code. Then, upper-level applications are developed to run the image classification algorithm on the MCU.
6. The image classification method based on nonlinear pooling and depthwise separable convolution suitable for MCU deployment according to claim 1, characterized in that: The invention includes a device for deploying image classification based on an MCU, the device including an MCU microprocessor and a camera, wherein: The STM32F746G-DISCO is used as the MCU. The flash memory in the MCU is used to store the neural network model weights, basic code framework, and OS. The SRAM in the MCU is used to store intermediate activation values and other buffer files during the operation of the CNN network. Arducam is used as the camera to acquire images.
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