Display panel, driving method thereof, and display device

Abstract

Embodiments of the present invention disclose a display panel, a driving method thereof, and a display device. The display panel includes: a pixel circuit and a light-emitting element; the pixel circuit includes a data writing module, a driving module, and a compensation module; the data writing module is used to selectively provide a data signal to the driving module; the driving module is used to provide a driving current to the light-emitting element, and the driving module includes a driving transistor; the compensation module is used to compensate for the threshold voltage of the driving transistor; the operation process of the pixel circuit includes a bias phase. During the bias phase, the data writing module and the driving module are turned on, and the compensation module is turned off, and the data signal is written to the drain of the driving transistor to adjust the bias state of the driving transistor. In an embodiment of the present invention, a bias phase is added to adjust the voltage of the gate, source, or drain of the driving transistor to reduce the threshold voltage drift of the driving transistor caused by the non-bias phase.

Claims

1. A display panel, characterized in that: include: Pixel circuits and light-emitting elements; The pixel circuit includes a data writing module, a driving module, a compensation module and a reset module; The driving module includes a driving transistor; The data writing module is connected to the source of the driving transistor; The compensation module is connected between the gate of the driving transistor and the drain of the driving transistor; The reset module is connected to the drain of the driving transistor; wherein, The reset module is multiplexed as a bias module; The working process of the pixel circuit includes a reset phase and a bias phase; In the reset phase, the reset module is turned on, the compensation module is turned on, and a reset signal is provided to the gate of the driving transistor; In the bias phase, the reset module is turned on and the compensation module is turned off to provide a bias signal for the drain of the driving transistor; The working process of the display panel includes data writing into the frame and maintaining the frame; wherein, The total time length of the bias phases in the hold frame is greater than the total time length of the bias phases in the data write frame.

2. The display panel according to claim 1, wherein: The potential of the bias signal is higher than the potential of the reset signal.

3. The display panel according to claim 1, wherein: The time length of the bias phase in the hold frame is greater than the time length of any bias phase in the data write frame.

4. The display panel according to claim 1, wherein: During one frame of the display panel, the operation process of the pixel circuit includes a pre-stage and a light-emitting stage. During at least one frame of the display panel, the pre-stage includes the bias stage. The pre-phase of at least one of the data writing frames includes the bias phase, the duration of the pre-phase is T11, the total duration of the bias phase in the pre-phase is T22, and T22≤2 / 3×T11.

5. The display panel according to claim 1, wherein: During one frame of the display panel, the operation process of the pixel circuit includes a pre-stage and a light-emitting stage. During at least one frame of the display panel, the pre-stage includes the bias stage. The pre-phase of at least one of the holding frames includes the bias phase, the duration of the pre-phase is T11, the sum of the bias phases in the pre-phase is T22, T11=T22, or T22≥2 / 3×T11.

6. The display panel according to claim 1, wherein: The pixel circuit further includes: an initialization module, configured to selectively provide an initialization signal to the light-emitting element; a light emitting control module, configured to selectively allow the light emitting element to enter a light emitting stage; The light emitting control module includes a first light emitting control module and a second light emitting control module, wherein the first light emitting control module is connected between the first power signal terminal and the source of the driving transistor, and the second light emitting control module is connected between the drain of the driving transistor and the light emitting element; wherein, During the bias phase, at least the second light control module remains turned off; and / or, During at least a portion of the bias phase, the initialization module remains enabled.

7. The display panel according to claim 1, wherein: The driving transistor is a P-type transistor, or the driving transistor is an N-type transistor.

8. A display panel, characterized in that: include: Pixel circuits and light-emitting elements; The pixel circuit includes a data writing module, a driving module, a compensation module and a reset module; The driving module includes a driving transistor; The data writing module is connected to the source of the driving transistor; The compensation module is connected between the gate of the driving transistor and the drain of the driving transistor; The reset module is connected to the drain of the driving transistor; wherein, The reset module is multiplexed as a bias module; The working process of the pixel circuit includes a reset phase and a bias phase; In the reset phase, the reset module is turned on, the compensation module is turned on, and a reset signal is provided to the gate of the driving transistor; In the bias phase, the reset module is turned on and the compensation module is turned off to provide a bias signal for the drain of the driving transistor; The working process of the display panel includes data writing into the frame and maintaining the frame; wherein, The duration of at least one bias phase in the hold frame is greater than the duration of at least one bias phase in the data write frame.

9. The display panel according to claim 8, wherein: The potential of the bias signal is higher than the potential of the reset signal.

10. The display panel according to claim 8, wherein The time length of the bias phase in the hold frame is greater than the time length of any bias phase in the data write frame.

11. The display panel according to claim 8, wherein During one frame of the display panel, the operation process of the pixel circuit includes a pre-stage and a light-emitting stage. During at least one frame of the display panel, the pre-stage includes the bias stage. The pre-phase of at least one of the data writing frames includes the bias phase, the duration of the pre-phase is T11, the total duration of the bias phase in the pre-phase is T22, and T22≤2 / 3×T11.

12. The display panel according to claim 8, wherein During one frame of the display panel, the operation process of the pixel circuit includes a pre-stage and a light-emitting stage. During at least one frame of the display panel, the pre-stage includes the bias stage. The pre-phase of at least one of the holding frames includes the bias phase, the duration of the pre-phase is T11, the sum of the bias phases in the pre-phase is T22, T11=T22, or T22≥2 / 3×T11.

13. The display panel according to claim 8, wherein The pixel circuit further includes: an initialization module, configured to selectively provide an initialization signal to the light-emitting element; a light emitting control module, configured to selectively allow the light emitting element to enter a light emitting stage; The light emitting control module includes a first light emitting control module and a second light emitting control module, wherein the first light emitting control module is connected between the first power signal terminal and the source of the driving transistor, and the second light emitting control module is connected between the drain of the driving transistor and the light emitting element; wherein, During the bias phase, at least the second light control module remains turned off; and / or, During at least a portion of the bias phase, the initialization module remains enabled.

14. The display panel according to claim 8, wherein The driving transistor is a P-type transistor, or the driving transistor is an N-type transistor.

15. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 14.

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