Electronic device

By introducing a light-shielding layer and spacers into electronic devices and optimizing their position and size relationship, the problem of reduced aperture ratio during the manufacturing process of high-resolution electronic devices is solved, thereby improving display quality and aperture ratio.

CN117234008BActive Publication Date: 2026-07-03INNOLUX CORP

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
INNOLUX CORP
Filing Date
2022-06-06
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

High-resolution electronic devices are susceptible to a decrease in aperture ratio due to process factors during manufacturing.

Method used

In electronic devices, a light-shielding layer and a spacer are introduced. The light-shielding layer overlaps with the channel region of the semiconductor layer, and the light-shielding layer and the spacer overlap with each other. By optimizing the position and size relationship between the light-shielding layer and the spacer, light reflection and color mixing phenomena are improved, and the aperture ratio is increased.

Benefits of technology

It effectively improves the display quality of electronic devices, reduces display problems caused by light reflection and color mixing, and increases the aperture ratio.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117234008B_ABST
    Figure CN117234008B_ABST
Patent Text Reader

Abstract

An electronic device is provided. The electronic device includes a substrate, a semiconductor layer, a light-blocking layer, and a gap sub. The semiconductor layer is disposed on the substrate and has a channel region. The light-blocking layer is disposed between the substrate and the channel region. The gap sub is disposed on the semiconductor layer. The light-blocking layer overlaps the gap sub and the channel region. The electronic device of embodiments of the present disclosure can have an improved aperture ratio.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This disclosure relates to an electronic device. Background Technology

[0002] With the technological advancements in modern electronic products and the increasing demands of consumers, electronic devices on the market are typically required to have high resolution; however, high-resolution electronic devices are susceptible to factors such as manufacturing processes, which can reduce their aperture ratio. Summary of the Invention

[0003] This disclosure provides an electronic device, including an electronic device that can have an increased aperture ratio.

[0004] According to embodiments disclosed herein, an electronic device includes a substrate, a semiconductor layer, a light-shielding layer, and a spacer. The semiconductor layer is disposed on the substrate and has a channel region. The light-shielding layer is disposed between the substrate and the channel region. The spacer is disposed on the semiconductor layer. The light-shielding layer overlaps with the spacer and the channel region.

[0005] According to embodiments disclosed herein, an electronic device includes a substrate, a semiconductor element, a light-shielding layer, and a spacer. The semiconductor element is disposed on the substrate. The spacer is disposed on the semiconductor layer. The light-shielding layer is disposed between the semiconductor element and the spacer. The light-shielding layer overlaps the spacer.

[0006] To make the above-mentioned features and advantages disclosed herein more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0007] The accompanying drawings are included to further illustrate the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0008] Figure 1 This is a top view schematic diagram of the electronic device according to the first embodiment of this disclosure;

[0009] Figure 2 Based on Figure 1 A schematic diagram of the cross section along line A-A';

[0010] Figure 3 This is a top view schematic diagram of the electronic device according to the second embodiment of this disclosure;

[0011] Figure 4 This is a top view schematic diagram of the electronic device according to the third embodiment of this disclosure;

[0012] Figure 5 Based on Figure 4 A schematic diagram of the cross section along line B-B';

[0013] Figure 6This is a partial cross-sectional schematic diagram of the electronic device according to the fourth embodiment of this disclosure;

[0014] Figure 7 This is a partial cross-sectional schematic diagram of the electronic device according to the fifth embodiment of this disclosure. Detailed Implementation

[0015] This disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of brevity, many of the drawings in this disclosure depict only a portion of the electronic device, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of the components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0016] Throughout this disclosure and in the appended claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same element. This document is not intended to distinguish between elements that have the same function but different names. In the following description and claims, words such as “comprising,” “containing,” and “having” are open-ended terms and should therefore be interpreted as “containing but not limited to…”. Thus, when the terms “comprising,” “containing,” and / or “having” are used in the description of this disclosure, they specify the presence of the corresponding feature, area, step, operation, and / or component, but do not exclude the presence of one or more of the corresponding feature, area, step, operation, and / or component.

[0017] The directional terms used herein, such as "up," "down," "front," "back," "left," and "right," are for reference only when referring to the accompanying drawings. Therefore, the directional terms used are illustrative and not intended to limit this disclosure. In the accompanying drawings, each figure illustrates general features of the methods, structures, and / or materials used in specific embodiments. However, these figures should not be construed as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative dimensions, thicknesses, and locations of various films, regions, and / or structures may be reduced or enlarged.

[0018] When a component (e.g., a membrane or region) is referred to as "on another component," it can be directly on that component, or there may be other components between them. Conversely, when a component is referred to as "directly on another component," there are no components between them. Furthermore, when a component is referred to as "on another component," the two components have a vertical relationship in the planar view, and this component can be above or below the other component, depending on the orientation of the device.

[0019] The terms “equal to” or “same as”, “substantially” or “approximately” are generally interpreted as being within 20% of a given value or range, or as being within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.

[0020] The ordinal numbers used in the specification and claims, such as "first," "second," etc., to modify elements, do not in themselves imply or represent any prior ordinal number of that element (or those elements), nor do they represent the order of one element with another, or the order of manufacturing processes. The use of these ordinal numbers is solely to clearly distinguish one named element from another element with the same name. The claims and specification may not use the same terminology; therefore, a first element in the specification may be a second element in the claims.

[0021] It should be understood that the features in the following embodiments can be replaced, recombined, or mixed to complete other embodiments without departing from the spirit of this disclosure. Features between embodiments can be arbitrarily mixed and combined as long as they do not violate the spirit of the invention or conflict with it.

[0022] The electrical connections or couplings described in this disclosure can refer to direct or indirect connections. In the case of a direct connection, the endpoints of the components in two circuits are directly connected or connected to each other by a conductor segment. In the case of an indirect connection, there is a switch, diode, capacitor, inductor, other suitable component, or combination of the above components between the endpoints of the components in two circuits, but not limited to these.

[0023] In this disclosure, the thickness, length, width, and area can be measured using an optical microscope, and the thickness can be measured from a cross-sectional image using an electron microscope, but these methods are not limited to these. Furthermore, any two values ​​or directions used for comparison may have a certain degree of error. If the first value equals the second value, it implies an error of approximately 10% between the two values; if the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees; if the first direction is parallel to the second direction, the angle between the first and second directions may be between 0 and 10 degrees.

[0024] The electronic devices disclosed herein may include, but are not limited to, display devices, antenna devices, light-emitting devices, sensing devices, touch devices, or splicing devices. Electronic devices include, but are not limited to, rollable, bendable, or flexible electronic devices. Display devices may be non-self-emissive or self-emissive display devices. Electronic devices may include, for example, diodes, liquid crystals, light-emitting diodes (LEDs), quantum dots (QDs), fluorescence, phosphorescence, other suitable display media, or combinations thereof. Antenna devices may be liquid crystal type antenna devices or non-liquid crystal type antenna devices. Sensing devices may be sensing devices that sense capacitance, light, heat, or ultrasound, but are not limited to these. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), micro-LEDs (micro-LEDs, mini-LEDs), or quantum dot light-emitting diodes (QLEDs, QDLEDs), but are not limited to these. Splicing devices may be, for example, display splicing devices or antenna splicing devices, but are not limited to these. It should be noted that the electronic device can be any of the aforementioned arrangements and combinations, but is not limited thereto. Furthermore, the electronic device can be rectangular, circular, polygonal, have curved edges, or other suitable shapes. The electronic device may have a drive system, control system, light source system, etc., and other peripheral systems to support display devices, antenna devices, wearable devices (e.g., augmented reality or virtual reality), in-vehicle devices (e.g., car windshields), or splicing devices.

[0025] Figure 1 This is a top view schematic diagram of the electronic device according to the first embodiment of this disclosure. Figure 2 Based on Figure 1 A schematic diagram of the cross-section along line A-A'. It is worth noting that... Figure 1 Some components have been omitted from the diagram.

[0026] Please refer to the following at the same time Figure 1 and Figure 2 The electronic device 10a in this embodiment includes a substrate 100, a semiconductor layer 200, and a light-shielding layer 300a.

[0027] The substrate 100 may be, for example, a flexible or non-flexible substrate. The material of the substrate 100 may include, for example, glass, plastic, or a combination thereof. For example, the material of the substrate 100 may include quartz, sapphire, polymethyl methacrylate (PMMA), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), or other suitable materials or combinations thereof, and this disclosure is not limited thereto.

[0028] A semiconductor layer 200 is disposed on a substrate 100 and has a channel region CH. Specifically, in this embodiment, the electronic device 10a includes a semiconductor element TFT. The semiconductor element TFT may include, for example, a gate G, a source S, a drain D, and the aforementioned semiconductor layer 200, but this disclosure is not limited thereto. The gate G partially overlaps with the semiconductor layer 200 in the normal direction N of the substrate 100, wherein the area where the semiconductor layer 200 and the gate G overlap can be considered as the channel region CH. In some embodiments, a gate insulating layer GI is disposed between the gate G and the semiconductor layer 200. The source S and the drain D are, for example, separated from each other and each electrically connected to the semiconductor layer 200. In some embodiments, an insulating layer IL1 and the aforementioned gate insulating layer GI are disposed between the source S (or drain D) and the semiconductor layer 200, wherein the source S and the drain D are each electrically connected to the semiconductor layer 200 through holes H1 and H2 penetrating the insulating layer IL1 and the gate insulating layer GI, but this disclosure is not limited thereto. The gate insulating layer GI and the insulating layer IL1 may be made of inorganic materials (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), organic materials (e.g., polyimide resin, epoxy resin, or acrylic resin), or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the gate insulating layer GI and / or the insulating layer IL1 may be a single-layer structure or a multilayer structure. The semiconductor element TFT is, for example, a top-gate thin-film transistor. However, although this embodiment uses a top-gate thin-film transistor as an example, this disclosure is not limited thereto.

[0029] A light-shielding layer 300a is disposed on the substrate 100. In this embodiment, the light-shielding layer 300a may be disposed between the substrate 100 and the semiconductor layer 200. For example, the light-shielding layer 300a may be disposed between the substrate 100 and the channel region CH of the semiconductor layer 200, but this disclosure is not limited thereto. The light-shielding layer 300a overlaps at least partially with the channel region CH of the semiconductor layer 200 in the normal direction N of the substrate 100 (e.g., the direction perpendicular to the upper surface of the substrate 100), thereby improving the degradation of the channel region CH due to external ambient light irradiation. In this embodiment, the light-shielding layer 300a overlaps with the channel region CH of the semiconductor layer 200 in the normal direction N of the substrate 100. In some embodiments, the light-shielding layer 300a may include a material with relatively low reflectivity and transmittance. For example, the light-shielding layer 300a may include photoresist, ink, resin, pigment, metal and its oxide or other organic materials, or other suitable materials or combinations thereof. In some embodiments, the reflectivity of the light-shielding layer 300a may be greater than or equal to 0% and less than 70%. In some embodiments, the light-shielding layer 300a may include molybdenum, but this disclosure is not limited thereto.

[0030] In some embodiments, the electronic device 10a further includes a counter-side substrate 100'. The counter-side substrate 100' is disposed corresponding to the substrate 100, and the material comprising the counter-side substrate 100' may be the same as or similar to that of the substrate 100, which will not be elaborated further here. In other embodiments, the counter-side substrate 100' may be replaced by an encapsulation layer, which may provide protection, encapsulation, and / or planarization functions for the light-emitting / display unit, and the encapsulation layer may contain organic materials, inorganic materials, combinations thereof, or mixtures thereof, but is not limited thereto. In some embodiments, a light-shielding pattern BM and a color filter CF may be disposed on the counter-side substrate 100', but this disclosure is not limited thereto. The light-shielding pattern BM and the color filter CF may each be disposed on the surface of the counter-side substrate 100' facing the substrate 100, but this disclosure is not limited thereto. In other embodiments, the light-shielding pattern BM and the color filter CF may each be disposed on the surface of the substrate 100 facing the counter-side substrate 100', but this disclosure is not limited thereto. The material of the light-shielding pattern BM can be, for example, black resin or a low-reflectivity metal material, thereby shielding the internal components and wiring of the electronic device 10a that are not intended to be seen by the user, thus improving the display effect of the electronic device 10a. The color filter CF can include, for example, a red filter pattern, a green filter pattern, or a blue filter pattern, thereby enabling the electronic device 10a to have a color display screen, but this disclosure is not limited thereto. In addition, since the light-shielding layer 300a can include, for example, a material with relatively low reflectivity and transmittance, in other embodiments, the light-shielding layer 300a can replace at least part of the light-shielding pattern BM to improve the aperture ratio.

[0031] In some embodiments, the electronic device 10a further includes a display medium layer ML. The display medium layer ML is disposed, for example, between the substrate 100 and the opposite substrate 100'. In this embodiment, the material of the display medium layer ML includes, for example, liquid crystal, but this disclosure is not limited thereto. The display medium having the display medium layer ML can be arranged, for example, by driving the semiconductor element TFT and the pixel electrode PE, which will be described below.

[0032] In some embodiments, the electronic device 10a further includes a spacer (not shown in this embodiment). The spacer may be disposed on the semiconductor layer 200, for example. In this embodiment, the spacer is disposed between the substrate 100 and the opposite substrate 100' to support the substrate 100 and / or the opposite substrate 100'. The materials used in the spacer are not particularly limited, and may include, for example, organic materials and / or organic photosensitive materials, but this disclosure is not limited thereto. In some embodiments, the spacer may be trapezoidal.

[0033] In some embodiments, the electronic device 10a further includes an insulating layer BF, a gate line GL, a data line DL, an insulating layer IL2, a pixel electrode PE, an insulating layer IL3, and a common electrode CE. In some embodiments, other insulating layers (not shown) may also be provided between the substrate 100 and the light-shielding layer 300a, but this disclosure is not limited thereto.

[0034] An insulating layer BF is disposed, for example, on the substrate 100. In this embodiment, the insulating layer BF is disposed between the substrate 100 and the semiconductor layer 200 and covers the light-shielding layer 300a, but this disclosure is not limited thereto. The material of the insulating layer BF may include, for example, inorganic materials (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), but this disclosure is not limited thereto.

[0035] Please refer to Figure 1 and Figure 2Gate line GL and data line DL are disposed on substrate 100, for example. In this embodiment, gate line GL is disposed on gate insulating layer GI and extends along a first direction D1, and data line DL is disposed on insulating layer IL1 and extends along a second direction D2, wherein the first direction D1 is different from the second direction D2, or the first direction D1 is perpendicular to the second direction D2, and both the first direction D1 and the second direction D2 are also perpendicular to the normal direction N. The gate G in the semiconductor element TFT can be electrically connected to the corresponding gate line GL to receive the corresponding gate signal, for example, and the source S in the semiconductor element TFT can be electrically connected to the corresponding data line DL to receive the corresponding data signal. In some embodiments, the materials of gate line GL and data line DL may include, for example, molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), hafnium (Hf), nickel (Ni), chromium (Cr), cobalt (Co), zirconium (Zr), tungsten (W), aluminum (Al), copper (Cu), silver (Ag), other suitable metals, or alloys or combinations of the above materials, and this disclosure is not limited thereto. The gate line GL and the data line DL may, for example, comprise the same or different materials, and this disclosure is not limited thereto. In some embodiments, the gate line GL has a width W in the second direction D2 (e.g., a direction perpendicular to the first direction D1). G (For example, the maximum width in the second direction D2), and the data line DL has a width W in the first direction D1. D (For example, the maximum width in the first direction D1).

[0036] An insulating layer IL2 is disposed, for example, on an insulating layer IL1. In this embodiment, the insulating layer IL2 covers the source electrode S and partially covers the drain electrode D; that is, the insulating layer IL2 has a hole H3 exposing a portion of the drain electrode D, but this disclosure is not limited thereto. The material of the insulating layer IL2 may include, for example, inorganic materials (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), organic materials (e.g., polyimide resin, epoxy resin, or acrylic resin), or combinations thereof, but this disclosure is not limited thereto. In this embodiment, the material of the insulating layer IL2 may be, for example, an organic material, but this disclosure is not limited thereto.

[0037] In some embodiments, the insulating layer IL2 has a thickness t and a sidewall IL2_s at its aperture H3, and the sidewall IL2_s of the insulating layer IL2 forms an angle ω with a direction DS parallel to the surface of the substrate 100. Specifically, the direction DS mentioned herein is, for example, any extending direction on the surface of the substrate 100 facing or away from the opposite substrate 100', and therefore, the direction DS is, for example, perpendicular to the normal direction N of the substrate 100. In some embodiments, the aperture H3 of the insulating layer IL2 has a lower bottom surface H3_B. In some embodiments, the lower bottom surface H3_B of the aperture H3 has an edge H3_E, and the light-shielding layer 300a has an edge 300E1 near the edge H3_E. The edge 300E1 of the light-shielding layer 300a and the edge H3_E of the aperture H3 are at a distance Y in the direction DS.

[0038] In this embodiment, the light-shielding layer 300a overlaps with the hole H3 of the insulating layer IL2 in the normal direction N of the substrate 100, but this disclosure is not limited thereto. Specifically, in this embodiment, the thickness t of the insulating layer IL2, the angle ω between the sidewall IL2_s of the insulating layer IL2 and the direction DS, and the distance Y between the edge 300E1 of the light-shielding layer 300a and the edge H3_E of the hole H3 satisfy the following relationship: t*cot(ω)≤Y≤t*cot(ω)+10μm. In some embodiments, since the thickness of the insulating layer IL2 is relatively thicker than the thickness of the other insulating layers, the depth of the hole H3 in the insulating layer IL2 is therefore relatively deeper than the holes in the other film layers. In this case, the orientation of the liquid crystal in the area where the hole H3 of the insulating layer IL2 is formed is more severely affected by the terrain, and it may not present the orientation as intended. This results in the liquid crystal not being controlled as expected, causing liquid crystal disclination, which may lead to poor display quality of the electronic device 10a. Based on this, by ensuring that the thickness t of the insulating layer IL2, the angle ω between the sidewall IL2_s of the insulating layer IL2 and the direction DS, and the distance Y between the edge 300E1 of the light-shielding layer 300a and the edge H3_E of the hole H3 satisfy the above relationship 1, the light-shielding layer 300a of this embodiment can be used to shield areas with poor liquid crystal alignment caused by the formation of the hole H3 in the insulating layer IL2, thereby improving or enhancing the display quality of the electronic device 10a. Furthermore, in some embodiments, the electronic device 10a also includes a light-shielding layer 310, wherein the light-shielding layer 310 and the light-shielding layer 300a may, for example, belong to the same layer and are separate patterns. Figure 1 as well as Figure 2As shown, the light-shielding layer 310 also overlaps at least partially with the channel region CH of the semiconductor layer 200 in the normal direction N of the substrate 100 (e.g., the direction perpendicular to the upper surface of the substrate 100), thereby improving the degradation of the channel region CH due to external ambient light (e.g., light from a backlight source). It is worth noting that the difference between the light-shielding layer 310 and the light-shielding layer 300a is that the light-shielding layer 300a overlaps with the hole H3 of the insulating layer IL2 in the normal direction N of the substrate 100.

[0039] In addition, in some other embodiments, when the substrate 100 and the opposite substrate 100' are assembled and offset, the thickness t of the insulating layer IL2, the angle ω between the sidewall IL2_s of the insulating layer IL2 and the direction DS, and the distance Y between the edge 300E1 of the light-shielding layer 300a and the edge H3_E of the hole H3 can satisfy the above relationship 1. This can also reduce the color mixing phenomenon caused by the light-shielding pattern BM not being able to completely cover the area where the hole H3 of the insulating layer IL2 is formed. The reason is that in this embodiment, the light-shielding layer 300a can replace at least part of the light-shielding pattern BM to cover the area of ​​poor liquid crystal alignment caused by the formation of the hole H3 of the insulating layer IL2, thereby improving the display effect of the electronic device 10a.

[0040] The pixel electrode PE is disposed on the insulating layer IL2. In this embodiment, the pixel electrode PE is electrically connected to the drain electrode D through the hole H3 in the insulating layer IL2, but this disclosure is not limited thereto. The material of the pixel electrode PE may include, for example, a metal oxide conductive material (e.g., indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium germanium zinc oxide), but this disclosure is not limited thereto.

[0041] An insulating layer IL3 is disposed, for example, on an insulating layer IL2. In this embodiment, the insulating layer IL3 covers the pixel electrode PE disposed on the insulating layer IL2, but this disclosure is not limited thereto. The material of the insulating layer IL3 may include, for example, inorganic materials (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), organic materials (e.g., polyimide resin, epoxy resin, or acrylic resin), or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the insulating layer IL3 partially fills the pores H3 in the insulating layer IL2, but this disclosure is not limited thereto.

[0042] A common electrode CE is disposed, for example, on an insulating layer IL3. The material of the common electrode CE may include, for example, a metal oxide conductive material (e.g., indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium germanium zinc oxide), but this disclosure is not limited thereto. In some embodiments, the common electrode CE may also partially fill the pores H3 in the insulating layer IL2, but this disclosure is not limited thereto.

[0043] Figure 3 This is a top view schematic diagram of the electronic device according to the second embodiment of this disclosure. It should be noted that... Figure 3 The embodiments can be used Figure 1 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.

[0044] Figure 3 The electronic device 10b differs from the aforementioned electronic device 10a in that the light-shielding layer 300b is disposed corresponding to the light-shielding pattern BM located on the opposite substrate 100', and the light-shielding layer 300b may, for example, have a mesh structure. For instance, in the electronic device 10b of this embodiment, the light-shielding layer 300b has a width W in the second direction D2. LS1 Furthermore, the light-shielding layer 300b has a width W in the first direction D1. LS2 Furthermore, in the electronic device 10b of this embodiment, the gate line GL has a width W in the second direction D2. G And the width W of the light-shielding layer 300 in the second direction D2 LS1 Satisfying the following relation 2: W G ≤W LS1 ≤10*W G The data line DL has a width W in the first direction D1. D and the width W of the light-shielding layer 300 in the first direction D1 LS2 Satisfy the following relation 3: W D ≤W LS2 ≤10*W D However, this disclosure is not limited to this.

[0045] In other embodiments, since the light-shielding pattern BM included in the opposite substrate 100' is designed, for example, to at least block light reflected by the gate line GL and / or data line DL, therefore, in the width W of the gate line GL... G Width W of the light-shielding layer 300b LS1 Satisfying relation 2 and / or the width W of data line DL D Width W of the light-shielding layer 300b LS2When Equation 3 is satisfied, the light-shielding layer 300b can be disposed corresponding to the light-shielding pattern BM (for example, the light-shielding layer 300b can at least partially overlap with the light-shielding pattern BM along the normal direction N of the substrate 100), thereby allowing the light-shielding layer 300b and the light-shielding pattern BM to jointly shield the components and traces inside the electronic device 10b. Based on this, the light-shielding layer 300b of this embodiment can also have a pattern similar to the light-shielding pattern BM, but this disclosure is not limited thereto. The light-shielding layer 300b and the light-shielding pattern BM can, for example, correspond to the gate line GL or the data line DL, or simultaneously correspond to both the gate line GL and the data line DL. In this embodiment, the light-shielding layer 300b can have an area larger than the light-shielding pattern BM in the normal direction N of the substrate 100. In other embodiments, the light-shielding layer 300b comprises a material such as a metal material with a reflectivity greater than or equal to 0% and less than 70%, so that the display quality of the electronic device 10b can still be maintained even if a portion of the light-shielding layer 300b is not blocked by the light-shielding pattern BM.

[0046] Specifically, in the width W of the gate line GL G Width W of the light-shielding layer 300b LS1 Under the condition of satisfying relation 2, the light-shielding layer 300b can at least be used to shield light reflected by the gate line GL (e.g., ambient light). In the width W of the data line DL... D Width W of the light-shielding layer 300b LS2 When Equation 3 is satisfied, the light-shielding layer 300b can at least be used to block light reflected by the data line DL (e.g., ambient light). In other embodiments, since the light-shielding layer 300b, the gate line GL, and the data line DL can all be disposed on the same substrate (substrate 100) (e.g., all formed on substrate 100), when substrate 100 and the opposite substrate 100' are assembled and offset, the probability of poor color mixing due to the light-shielding pattern BM failing to block light reflected by the gate line GL and the data line DL can be reduced, thereby improving the display effect of the electronic device 10b. Alternatively, in embodiments where the light-shielding layer 300b and the light-shielding pattern BM are correspondingly arranged, the area of ​​the light-shielding pattern BM can be relatively reduced. Thus, since the process of forming the light-shielding layer 300b on the substrate 100 is more stable than the process of forming the light-shielding pattern BM on the opposite substrate 100', the electronic device 10b of this embodiment can reduce the area of ​​the light-shielding pattern BM by forming the light-shielding layer 300b, thereby reducing the decrease in aperture ratio caused by process variations.

[0047] Figure 4 This is a top view schematic diagram of the electronic device according to the third embodiment of this disclosure, and Figure 5 Based on Figure 4 A schematic diagram of the cross-section along line B-B'. It should be noted that... Figure 4 as well as Figure 5 Each of the embodiments can be used independently. Figure 1 as well as Figure 2 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.

[0048] Figure 4 The difference between the electronic device 10c and the aforementioned electronic device 10a is that the light-shielding layer 300c is positioned to correspond with the spacer 400. It is intended to be noted here that... Figure 1 Although the spacer is omitted from the illustration of the electronic device 10a, the light-shielding layer 300a of the electronic device 10a can also be provided corresponding to the spacer.

[0049] The spacer 400 is disposed, for example, on the semiconductor layer 200, and the light-shielding layer 300c may at least partially overlap with the spacer 400 and the channel region CH of the semiconductor layer 200 along the normal direction N of the substrate. In this embodiment, the spacer 400 is disposed between the substrate 100 and the opposite substrate 100' to support the substrate 100 and / or the opposite substrate 100'. The material of the spacer 400 is not particularly limited, and may include, for example, organic materials and / or organic photosensitive materials, but this disclosure is not limited thereto. In some embodiments, the area of ​​the upper bottom surface 400T of the spacer 400 is smaller than the area of ​​the lower bottom surface 400B of the spacer 400, that is, the spacer 400 may present a trapezoidal embodiment. In some embodiments, the spacer 400 includes a sidewall 400s1, and the sidewall 400s1 of the spacer 400 forms an angle θ with the direction DS parallel to the surface of the substrate 100.

[0050] In some embodiments, the spacer 400 has a thickness T in the normal direction N of the substrate 100. The thickness T of the spacer 400 is, for example, approximately the distance between the substrate 100 and the opposite substrate 100', but this disclosure is not limited thereto. In some embodiments, the upper bottom surface 400T of the spacer 400 has an edge 400E1, and the light-shielding layer 300c has an edge 300E2 adjacent to the edge 400E1 of the spacer 400. The edge 300E2 of the light-shielding layer 300c and the edge 400E1 of the spacer 400 are separated by a distance X in the direction DS.

[0051] In this embodiment, the light-shielding layer 300c overlaps with the spacer 400 in the normal direction N of the substrate 100. Specifically, in this embodiment, the thickness T of the spacer 400, the angle θ between the sidewall 400s1 of the spacer 400 and the direction DS, and the distance X between the edge 400E1 of the spacer 400 and the edge 300E2 of the light-shielding layer 300c satisfy the following relationship: T*cot(θ)≤X≤T*cot(θ)+15μm. Because the orientation of the liquid crystal in the area where the spacer 400 is located is affected by the terrain and cannot present the intended orientation, the liquid crystal molecules cannot be controlled as expected, resulting in discontinuous liquid crystal arrangement and causing poor display quality in the electronic device 10c. Based on this, by ensuring that the thickness T of the spacer 400, the angle θ between the sidewall 400s1 of the spacer 400 and the direction DS, and the distance X between the edge 400E1 of the spacer 400 and the edge 300E2 of the light-shielding layer 300c satisfy the above relationship 4, the light-shielding layer 300c of this embodiment can shield the area of ​​scratches that are in contact with the spacer 400 and / or the area of ​​poor liquid crystal alignment that overlaps with the spacer 400 in the normal direction N of the substrate 100 caused by the arrangement of the spacer 400, thereby maintaining good display quality.

[0052] In some embodiments, when the substrate 100 and the opposite substrate 100' are assembled and offset, by making the thickness T of the spacer 400, the angle θ between the sidewall 400s1 of the spacer 400 and the direction DS, and the distance X between the edge 400E1 of the spacer 400 and the edge 300E2 of the light-shielding layer 300c satisfy the above relationship 4, the probability of not having a good color mixing phenomenon due to the light-shielding pattern BM not being able to cover the area where the spacer 400 is provided can be reduced, thereby improving the display effect of the electronic device 10c.

[0053] Furthermore, in other embodiments, the light-shielding layer 300c in the electronic device 10c may also overlap with the hole H3 of the insulating layer IL2 in the normal direction N of the substrate 100, but this disclosure is not limited thereto. Specifically, the electronic device 10c may also satisfy the above relation 1, so that the light-shielding layer 300c of this embodiment can be more effectively used to shield areas with poor liquid crystal alignment caused by the formation of the hole H3 in the insulating layer IL2, thereby maintaining the display quality of the electronic device 10c. In other embodiments, the spacer 400 may at least partially overlap with the hole H3 and the light-shielding layer 300c in the normal direction N to improve the aperture ratio of the display device. In some embodiments, the spacer 400 may at least partially fill the hole H3, but this disclosure is not limited thereto.

[0054] Figure 6 This is a partial cross-sectional schematic diagram of the electronic device according to the fourth embodiment of this disclosure. It should be noted that... Figure 6 The embodiments can be used Figure 4 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.

[0055] Figure 6 The difference between the electronic device 10d and the aforementioned electronic device 10c is that the spacer 400 includes a main spacer 400M and a secondary spacer 400S, and the area of ​​the light-shielding layer 300d corresponding to the main spacer 400M can be larger than the area of ​​the light-shielding layer 300d corresponding to the secondary spacer 400S.

[0056] In this embodiment, the thickness of the primary spacer 400M (e.g., the thickness T of the spacer 400 in the electronic device 10c) is, for example, greater than the thickness of the secondary spacer 400S. Specifically, the lower surface of the primary spacer 400M abuts against an element disposed on the substrate 100, and the upper surface of the primary spacer 400M abuts against an element disposed on the opposite substrate 100'. Furthermore, the lower surface of the secondary spacer 400S abuts against an element disposed on the substrate 100, and the upper surface of the secondary spacer 400S has a distance from the element disposed on the opposite substrate 100', but this disclosure is not limited thereto. In other embodiments, the secondary spacer 400S may be formed on the opposite substrate 100', for example, the upper bottom surface of the spacer 400S (the surface closer to the substrate 100) may have a distance from the element disposed on the substrate 100, and the lower bottom surface of the secondary spacer 400S (e.g. the surface closer to the opposite substrate 100') may abut against the element disposed on the opposite substrate 100', but this disclosure is not limited thereto.

[0057] Because the thickness of the primary spacer 400M is greater than the thickness of the secondary spacer 400S, the liquid crystal is more prone to discontinuous arrangement in the region where the primary spacer 400M is located, compared to the region where the secondary spacer 400S is located. Therefore, in some embodiments, the area of ​​the light-shielding layer 300d corresponding to the primary spacer 400M is larger than the area of ​​the light-shielding layer 300d corresponding to the secondary spacer 400S. Specifically, as... Figure 6As shown, in this embodiment, the width (e.g., maximum width) 300W1 of the first portion 300d1 of the light-shielding layer 300d corresponding to the main spacer 400M in the second direction D2 (e.g., the direction perpendicular to the extension direction of the gate line GL) is greater than the width (e.g., maximum width) 300W2 of the second portion 300d2 of the light-shielding layer 300d corresponding to the secondary spacer 400S in the second direction D2. This results in the area of ​​the light-shielding layer 300d (first portion 300d1) corresponding to the main spacer 400M being greater than the area of ​​the light-shielding layer 300d (second portion 300d2) corresponding to the secondary spacer 400S. However, this disclosure is not limited to this. In other embodiments, the area of ​​the light-shielding layer 300d corresponding to the main spacer 400M may be equal to the area of ​​the light-shielding layer 300d corresponding to the secondary spacer 400S. However, this disclosure is not limited to this.

[0058] Figure 7 This is a partial cross-sectional schematic diagram of the electronic device according to the fifth embodiment of this disclosure. It should be noted that... Figure 7 The embodiments can be used Figure 5 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.

[0059] Figure 7 The difference between the electronic device 10e and the aforementioned electronic device 10c is that the light-shielding layer includes a first light-shielding layer 300e1 and a second light-shielding layer 300e2. The first light-shielding layer 300e1 is disposed between the substrate 100 and the channel region CH of the semiconductor layer 200, and the second light-shielding layer 300e2 is disposed between the semiconductor element TFT and the spacer 400. It should be noted that although the second light-shielding layer 300e2 is not shown in the electronic device of the aforementioned embodiment, the second light-shielding layer 300e2 can be used in combination with the aforementioned embodiments.

[0060] In this embodiment, the first light-shielding layer 300e1 is similar in its arrangement with the aforementioned light-shielding layers 300a, 300b, 300c, and 300d, relative to the substrate 100 and the semiconductor layer 200. The main difference is that the first light-shielding layer 300e1 is not required to overlap with the hole H3, the light-shielding pattern BM, and / or the spacer 400 in the normal direction N of the substrate 100. However, the first light-shielding layer 300e1 still overlaps, for example, at least partially, with the channel region CH of the semiconductor layer 200 in the normal direction N of the substrate 100, thereby reducing the probability of the channel region CH being degraded due to exposure to ambient light. In some embodiments, the first light-shielding layer 300e1 overlaps with the channel region CH of the semiconductor layer 200 in the normal direction N of the substrate 100.

[0061] In some embodiments, the second light-shielding layer 300e2 is disposed between the common electrode CE and the insulating layer IL3. The second light-shielding layer 300e2 may, for example, contact the common electrode CE and also partially fill the holes H3 in the insulating layer IL2, but this disclosure is not limited thereto. In this embodiment, the second light-shielding layer 300e2 may at least partially overlap with the spacer 400, thereby shielding (1) scratched areas that contact the spacer 400 and / or (2) poor liquid crystal alignment areas that substantially overlap with the spacer 400 in the normal direction N of the substrate 100, thereby maintaining the display quality of the electronic device 10e. In addition, in some embodiments, the second light-shielding layer 300e2 may also overlap with the holes H3 in the insulating layer IL2 in the normal direction N of the substrate 100, so that the second light-shielding layer 300e2 can be used to shield the poor liquid crystal alignment areas caused by the formation of the holes H3 in the insulating layer IL2. In other embodiments, the light-shielding layer may, for example, be a mesh structure, with Figure 6 The shape of the light-shielding layer 300d is similar, but this disclosure is not limited to it.

[0062] In some embodiments, the first light-shielding layer 300e1 and the second light-shielding layer 300e2 are made of the same or similar materials as the aforementioned light-shielding layer 300a, and will not be described again here.

[0063] Based on the above, the light-shielding layer included in the electronic device of this disclosure embodiment has a novel design, wherein the light-shielding layer may at least partially overlap with the spacer in the normal direction of the substrate, or the light-shielding layer may satisfy relation 4, thereby increasing the aperture ratio of the electronic device of this disclosure embodiment. In other embodiments, the process of forming the light-shielding layer on the substrate is more stable than the process of forming the light-shielding pattern on the opposite substrate. Therefore, the electronic device of this disclosure embodiment can reduce the setting area of ​​the light-shielding pattern by forming the light-shielding layer on the substrate, thereby reducing the decrease in aperture ratio caused by process variations. In other embodiments, when the spacer and the light-shielding layer are disposed on the same substrate, the electronic device of this disclosure embodiment can reduce the probability of a decrease in aperture ratio caused by the misalignment of the substrate and the opposite substrate by forming the light-shielding layer.

[0064] In other embodiments, the light-shielding layer of this disclosed embodiment may further shield the insulating layer with a deeper opening (where pixel electrodes and common electrodes are disposed) in the normal direction of the substrate, or the aforementioned light-shielding layer may satisfy relation 1, thereby increasing the aperture ratio of the electronic device of this disclosed embodiment.

[0065] In some other embodiments, the light-shielding layer of this disclosed embodiment may at least partially overlap with the light-shielding pattern in the normal direction of the substrate, or the aforementioned light-shielding layer may satisfy relation 2 and / or relation 3, thereby increasing the aperture ratio of the electronic device of this disclosed embodiment.

[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions disclosed herein, and are not intended to limit them. Although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments disclosed herein. Features between the embodiments can be arbitrarily mixed and matched as long as they do not violate the spirit of the invention or conflict with it.

Claims

1. An electronic device, characterized in that, include: substrate; A semiconductor layer is disposed on the substrate and has a channel region; A light-shielding layer is disposed between the substrate and the channel region; as well as Spacers are disposed on the semiconductor layer. The light-shielding layer overlaps with the spacer and the channel region. The substrate has a surface, a direction parallel to the surface of the substrate, a spacer having a first thickness, the spacer including a first sidewall and a top surface, the first sidewall forming a first angle with the direction, the top surface having a first edge, and the light-shielding layer having a second edge adjacent to the first edge, the first edge and the second edge being a first distance apart along the direction. The first thickness (T), the first included angle (θ), and the first distance (X) satisfy the following relationship: 。 2. The electronic device according to claim 1, characterized in that, The light-shielding layer comprises a metallic material, wherein the reflectivity of the light-shielding layer is greater than or equal to 0% and less than 70%.

3. The electronic device according to claim 1, characterized in that, The spacer includes a main spacer and a secondary spacer, wherein the light-shielding layer has a first portion corresponding to the main spacer and a second portion corresponding to the secondary spacer, wherein the electronic device further includes a gate line disposed on the substrate and extending along a first direction, and the width of the first portion of the light-shielding layer along a second direction perpendicular to the first direction is greater than the width of the second portion of the light-shielding layer along the second direction.

4. The electronic device according to claim 3, characterized in that, The gate line has a width (W) in the second direction. G The width W of the light-shielding layer in the second direction. LS1 The following relationship must be satisfied: 。 5. The electronic device according to claim 3, characterized in that, It also includes a data line, the data line having a width (W) in the first direction. D The width W of the light-shielding layer in the first direction. LS2 The following relationship must be satisfied: 。 6. The electronic device according to claim 1, characterized in that, It also includes a counter-side substrate, which is disposed corresponding to the substrate, and a light-shielding pattern is disposed on the counter-side substrate and is disposed corresponding to the light-shielding layer.

7. The electronic device according to claim 1, characterized in that, It also includes a drain, a pixel electrode, and an insulating layer. The drain is disposed on the substrate, the pixel electrode is disposed on the drain, the insulating layer has a hole and is disposed between the drain and the pixel electrode, the pixel electrode is electrically connected to the drain through the hole, and the hole overlaps with the light-shielding layer.

8. The electronic device according to claim 7, characterized in that, The insulating layer has a second thickness (t), the insulating layer includes a second sidewall, the second sidewall forms a second angle (ω) with the direction, the hole has a bottom surface, the bottom surface has a third edge, the light-shielding layer has a fourth edge close to the third edge, and the third edge and the fourth edge have a second distance (Y) along the direction. The second thickness (t), the second included angle (ω), and the second distance (Y) satisfy the following relationship: 。 9. An electronic device, characterized in that, include: substrate; Semiconductor elements are disposed on the substrate; Spacers are disposed on the semiconductor element; as well as A light-shielding layer is disposed between the semiconductor element and the spacer. The light-shielding layer overlaps with the spacer. The substrate has a surface, a direction parallel to the surface of the substrate, a spacer having a first thickness, the spacer including a first sidewall and a top surface, the first sidewall forming a first angle with the direction, the top surface having a first edge, and the light-shielding layer having a second edge adjacent to the first edge, the first edge and the second edge being a first distance apart along the direction. The first thickness (T), the first included angle (θ), and the first distance (X) satisfy the following relationship: 。