Texture recognition module, manufacturing method thereof and display device

Abstract

A texture recognition module (001), a manufacturing method thereof and a display device, comprising a texture recognition substrate (101), the texture recognition substrate (101) comprising a base substrate (1011), and a plurality of photosensitive devices (1012) arranged in an array on one side of the base substrate (1011); an aperture layer (102), located on the side of the texture recognition substrate (101) having the plurality of photosensitive devices (1012), the aperture layer (102) comprising one layer of light-transmitting holes (V) arranged in an array, the light-transmitting holes ( The orthographic projection of the light-transmitting hole (V) on the base substrate (1011) is located within the orthographic projection of the photosensitive device (1012) on the base substrate (1011), and the ratio of the depth (h) of the light-transmitting hole (V) to the maximum aperture (d1) of the light-transmitting hole (V) is greater than or equal to 1 / 6 and less than or equal to 2; and a plurality of microlenses (103) are located on a side of the aperture layer (102) away from the texture recognition substrate (101), and the orthographic projection of the microlenses (103) on the base substrate (1011) covers the orthographic projection of the light-transmitting hole (V) on the base substrate (1011).

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a texture recognition module, its manufacturing method, and a display device. Background Technology

[0002] With the rapid development of the information industry, biometric technology has been used more and more widely. In particular, since different users have different fingerprints, it is easy to verify user identity. Therefore, fingerprint recognition technology has been widely used in mobile terminals, smart homes and other fields to provide security for user information. Summary of the Invention

[0003] This disclosure provides a texture recognition module, its manufacturing method, and a display device, the specific solutions of which are as follows:

[0004] On one hand, embodiments of this disclosure provide a texture recognition module, including:

[0005] A texture recognition substrate, comprising a substrate and a plurality of photosensitive devices arranged in an array on one side of the substrate;

[0006] An aperture layer is located on one side of the texture recognition substrate having the plurality of photosensitive devices. The number of aperture layers is one. The aperture layer includes light-transmitting holes arranged in an array. The orthographic projection of the light-transmitting holes on the substrate is located within the orthographic projection of the photosensitive devices on the substrate. The ratio of the depth of the light-transmitting holes to the maximum aperture of the light-transmitting holes is greater than or equal to 1 / 6 and less than or equal to 2.

[0007] Multiple microlenses are located on the side of the aperture layer away from the texture recognition substrate, and the orthogonal projection of the microlenses on the substrate covers the orthogonal projection of the light-transmitting hole on the substrate.

[0008] In some embodiments, in the texture recognition module provided in this disclosure, the apertures of the light-transmitting holes are approximately the same in the direction from the texture recognition substrate to the aperture layer.

[0009] In some embodiments, in the texture recognition module provided in this disclosure, the aperture of the light-transmitting hole gradually increases in the direction from the texture recognition substrate to the aperture layer.

[0010] In some embodiments, in the texture recognition module provided in this disclosure, the maximum aperture d1 and the minimum aperture d2 of the light-transmitting hole satisfy the following relationship:

[0011] d1 = D*hH + d2;

[0012] Wherein, D is the aperture of the microlens, h is the depth of the light-transmitting hole, and H is the distance between the surface of the texture recognition substrate facing the aperture layer and the surface of the microlens facing the aperture layer.

[0013] In some embodiments, in the texture recognition module provided in the present disclosure, 1μm≤D≤50μm, 2μm≤h≤8μm, 4μm≤d1≤12μm, 1μm≤d2≤6μm, and 40μm≤H≤160μm.

[0014] In some embodiments, the texture recognition module provided in this disclosure further includes a transparent filling layer located between the aperture layer and the layer containing the plurality of microlenses;

[0015] The distance H between the surface of the texture recognition substrate facing the aperture layer and the surface of the microlens facing the aperture layer satisfies the following relationship:

[0016] H = [D] 2 / (8h x )+h x / 2] / (n x -1)-n*h x / n x ;

[0017] Among them, h x Let n be the sag of the microlens, and n be the refractive index of the material used for the microlens. x is the refractive index of the transparent filling layer.

[0018] In some embodiments, in the texture recognition module provided in the present disclosure, 2μm≤h x ≤16μm, 1.4μm≤n x ≤1.8μm, 1.5μm≤n≤2.2μm.

[0019] In some embodiments, in the texture recognition module provided in the present disclosure, the microlens and the light-transmitting holes are arranged in a one-to-one correspondence, and the orthogonal projection center of the microlens on the substrate is approximately coincident with the orthogonal projection center of the corresponding light-transmitting hole on the substrate.

[0020] In some embodiments, in the texture recognition module provided in this disclosure, the microlens includes a convex surface and a flat surface, wherein the convex surface is located on the side of the flat surface away from the light-transmitting hole.

[0021] In some embodiments, the texture recognition module provided in this disclosure further includes an infrared cutoff film located between the aperture layer and the texture recognition substrate.

[0022] In some embodiments, in the texture recognition module provided in the present disclosure, the substrate includes a texture recognition area and a border area located on at least one side of the texture recognition area;

[0023] The texture recognition substrate also includes a shielding electrode located on the side of the layer where the plurality of photosensitive devices are located away from the substrate. The shielding electrode is located in the display area and the border area, and within the border area, the shielding electrode includes a plurality of hollow structures.

[0024] In some embodiments, in the texture recognition module provided in the present disclosure, in the extending direction of the border area, the outermost hollow structure has a larger projected area on the substrate than the other hollow structures.

[0025] In some embodiments, in the texture recognition module provided in the present disclosure, the plurality of photosensitive devices are arranged in an array in the texture recognition area, and the plurality of hollow structures are arranged in the same row or column as each of the photosensitive devices.

[0026] In some embodiments, in the texture recognition module provided in the present disclosure, each of the hollow structures that are in the same row or column as the photosensitive device is configured independently or in a conductive manner.

[0027] In some embodiments, the texture recognition module provided in this disclosure further includes multiple grid lines and multiple data lines arranged in a cross pattern, wherein the multiple grid lines and / or the multiple data lines extend from the texture recognition area to the side of the shielding electrode away from the texture recognition area.

[0028] In some embodiments, in the texture recognition module provided in the present disclosure, the texture recognition substrate further includes a bias electrode located between the layer containing the plurality of photosensitive devices and the layer containing the shielding electrode, and the bias electrode is electrically connected to the shielding electrode.

[0029] In some embodiments, in the texture recognition module provided in the present disclosure, the orthogonal projection of the bias electrode on the substrate generally coincides with the orthogonal projection of the shielding electrode on the substrate.

[0030] In some embodiments, in the texture recognition module provided in the present disclosure, the texture recognition substrate further includes a resistance-reducing electrode located between the layer containing the bias electrode and the substrate, and the resistance-reducing electrode is electrically connected to the shielding electrode through the bias electrode.

[0031] In some embodiments, in the texture recognition module provided in the present disclosure, the resistance-reducing electrode is located in the frame area, and the orthogonal projection of the resistance-reducing electrode on the substrate in the frame area substantially coincides with the orthogonal projection of the shielding electrode on the substrate.

[0032] In some embodiments, in the texture recognition module provided in the present disclosure, the resistance-reducing electrode is located in the frame area, and the resistance-reducing electrode is disposed on the entire surface of the area where the shielding electrode is located in the frame area.

[0033] In some embodiments, in the texture recognition module provided in the present disclosure, the photosensitive device includes a first electrode, a photoelectric conversion layer and a second electrode stacked together, the first electrode being disposed adjacent to the substrate; the resistivity reducing electrode being disposed in the same layer as the first electrode.

[0034] In some embodiments, the texture recognition module provided in this disclosure further includes a plurality of transistors located between the photoelectric conversion layer and the substrate, wherein the first electrode is multiplexed with the first electrode of the transistor.

[0035] In some embodiments, the texture recognition module provided in this disclosure further includes a plurality of transistors located between the photoelectric conversion layer and the substrate, wherein the layer containing the first electrode is located on the side of the first electrode of the transistor away from the substrate, and the first electrode is electrically connected to the first electrode of the transistor.

[0036] In some embodiments, in the texture recognition module provided in the present disclosure, the texture recognition substrate further includes a plurality of bonding electrodes, the plurality of bonding electrodes being located on the side of the shielding electrode away from the texture recognition area, and the plurality of bonding electrodes being disposed in the same layer as the first electrode.

[0037] In some embodiments, in the texture recognition module provided in the present disclosure, the border area surrounds the texture recognition area, and the border area includes a first border area for binding a bias voltage chip.

[0038] The bonding electrode includes a first bonding electrode located within the first border area;

[0039] The texture recognition substrate further includes a first connection electrode disposed on the same layer as the bias electrode at the first bonding electrode, and the first bonding electrode is electrically connected to the bias electrode through the first connection electrode.

[0040] In some embodiments, in the texture recognition module provided in the present disclosure, the first border area is further used to bind a data driver chip;

[0041] The bonding electrode further includes a second bonding electrode located in the first border area;

[0042] The texture recognition substrate further includes a second connection electrode disposed on the same layer as the first electrode of the transistor at the second bonding electrode, and the second bonding electrode is electrically connected to the second electrode of the transistor through the second connection electrode.

[0043] In some embodiments, in the texture recognition module provided in the present disclosure, the border area further includes a second border area for bonding a gate driver chip, and the second border area is connected to the first border area;

[0044] The bonding electrode also includes a third bonding electrode located in the second border area;

[0045] The texture recognition substrate further includes a third connection electrode at the third bonding electrode, which has corresponding electrical connections in the first electrode layer of the transistor and the gate layer of the transistor. The third bonding electrode is electrically connected to the gate of the transistor through the third connection electrode.

[0046] On the other hand, this disclosure provides a method for manufacturing the above-mentioned texture recognition module, including:

[0047] Provide a base;

[0048] An aperture layer with multiple light-transmitting holes arranged in an array is formed on the substrate;

[0049] Multiple microlenses covering the multiple light-transmitting holes are formed on the aperture layer;

[0050] Remove the substrate;

[0051] A texture recognition substrate is provided, and the side where the aperture layer is located is fixed to the light-incident side of the texture recognition substrate.

[0052] In some embodiments, the above-described fabrication method provided in this disclosure includes forming an aperture layer and multiple microlenses, specifically comprising: forming the aperture layer and multiple microlenses using an imprinting or patterning process.

[0053] On the other hand, this disclosure provides a display device, including: a display module, a texture recognition module, and an adhesive layer; wherein, the texture recognition module is the texture recognition module provided in this disclosure, the texture recognition module is located on the opposite side of the display side of the display module, the adhesive layer is located between the display module and the texture recognition module, and the orthographic projection of the adhesive layer on the display module surrounds the display area of ​​the display module. Attached Figure Description

[0054] Figure 1 A schematic diagram of the structure of a texture recognition module provided in an embodiment of this disclosure;

[0055] Figure 2 A schematic diagram of a film structure located on the light-incident side of the texture recognition substrate in the texture recognition module provided in this embodiment of the disclosure;

[0056] Figure 3 for Figure 2 A schematic diagram of a microlens and a light-transmitting aperture;

[0057] Figure 4 for Figure 2 Another structural schematic diagram of a microlens and a light-transmitting aperture;

[0058] Figure 5 This is a schematic diagram of another film structure located on the light-incident side of the texture recognition substrate in the texture recognition module provided in the embodiments of this disclosure;

[0059] Figure 6 for Figure 5 A schematic diagram of a microlens and a light-transmitting aperture;

[0060] Figure 7 for Figure 5 Another structural schematic diagram of a microlens and a light-transmitting aperture;

[0061] Figure 8 for Figure 2 The light-receiving angle curve of the texture recognition module shown;

[0062] Figure 9 for Figure 5 The light-receiving angle curve of the texture recognition module shown;

[0063] Figure 10 This is a schematic diagram of the structure of the shielding electrode provided in an embodiment of the present disclosure;

[0064] Figure 11 for Figure 10 Enlarged schematic diagram of region M in the middle;

[0065] Figure 12 for Figure 10 Enlarged schematic diagram of region N in the middle;

[0066] Figure 13 This is a schematic diagram of a texture recognition substrate provided in an embodiment of the present disclosure;

[0067] Figure 14 A schematic diagram of the shielding structure provided in the embodiments of this disclosure;

[0068] Figure 15 This is another schematic diagram of the texture recognition substrate provided in the embodiments of this disclosure;

[0069] Figure 16 for Figure 13 An enlarged schematic diagram of region N in the middle;

[0070] Figure 17 for Figure 13 An enlarged schematic diagram of region M in the middle;

[0071] Figure 18 for Figure 13 Another enlarged schematic diagram of region M in the middle;

[0072] Figure 19 For along Figure 18 Cross-sectional view of line I-I' in the middle;

[0073] Figure 20 for Figure 13 Another enlarged schematic diagram of the N region;

[0074] Figure 21 For along Figure 20 Cross-sectional view of line II-II' in the middle;

[0075] Figure 22 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0076] Figure 23 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0077] Figure 24 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0078] Figure 25 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0079] Figure 26 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0080] Figure 27 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0081] Figure 28 Another structural schematic diagram of the texture recognition module provided in this embodiment of the present disclosure;

[0082] Figure 29 A schematic diagram of the structure of a pixel within the noise reduction region provided in an embodiment of this disclosure;

[0083] Figure 30 This is another structural diagram of a pixel within the noise reduction region provided in an embodiment of this disclosure;

[0084] Figure 31 A flowchart of a method for manufacturing a texture recognition module is provided for embodiments of this disclosure;

[0085] Figure 32 A schematic diagram of the fabrication process of the texture recognition module provided in this embodiment of the disclosure;

[0086] Figure 33 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0087] Figure 34 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0088] Figure 35 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0089] Figure 36 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0090] Figure 37 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0091] Figure 38 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0092] Figure 39 This is another structural schematic diagram of the texture recognition module provided in the embodiments of this disclosure during the manufacturing process;

[0093] Figure 40 This is a schematic diagram of the structure of a texture recognition module provided in an embodiment of the present disclosure;

[0094] Figure 41 This is a schematic diagram of a display device provided in an embodiment of the present disclosure. Detailed Implementation

[0095] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. It should be noted that the dimensions and shapes of the figures in the drawings do not reflect actual proportions and are only intended to illustrate the content of this disclosure. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout the drawings.

[0096] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure and the claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “inner,” “outer,” “upper,” and “lower” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes.

[0097] As the market share of full-screen displays gradually increases, the demand for fingerprint recognition is growing year by year, and the need for optical large-area under-display fingerprint recognition is gradually emerging. Related technologies achieve under-display fingerprint recognition by setting a pattern recognition module under the full-screen display. Specifically, existing pattern recognition modules use at least two aperture layers on the pattern recognition substrate to collimate the fingerprint-reflected light converged by microlenses, and then collect the collimated light through the pattern recognition substrate to achieve fingerprint recognition. However, adjacent aperture layers need to be separated by a relatively thick transparent filler layer; therefore, this solution cannot meet the development trend of thinner and lighter products.

[0098] To address the aforementioned technical problems in related technologies, this disclosure provides a texture recognition module, such as... Figure 1 and Figure 2 As shown, it includes:

[0099] The texture recognition substrate 101 includes a substrate 1011 and a plurality of photosensitive devices 1012 arranged in an array on one side of the substrate 1011. Optionally, the substrate 1011 can be a flexible substrate, such as a polyimide (PI) substrate; or, the substrate 1011 can also be a rigid substrate, such as a glass substrate. The photosensitive device 1012 may include a first electrode 121, a photoelectric conversion layer 122 and a second electrode 123 stacked together. The photoelectric conversion layer 122 can be a PIN structure, specifically including a P-type semiconductor layer, an I-type semiconductor layer (also called an intrinsic semiconductor layer) and an N-type semiconductor layer. The P-type semiconductor layer is located between the first electrode 121 and the I-type semiconductor layer, and the N-type semiconductor layer is located between the I-type semiconductor layer and the second electrode 123; or, the N-type semiconductor layer is located between the first electrode 121 and the I-type semiconductor layer, and the P-type semiconductor layer is located between the I-type semiconductor layer and the second electrode 123, which is not limited here.

[0100] An aperture layer 102 is located on one side of the texture recognition substrate 101 where multiple photosensitive devices 1012 are located (corresponding to the light-incident side of the texture recognition substrate 101). The aperture layer 102 consists of one layer and includes light-transmitting holes V arranged in an array. The orthographic projection of the light-transmitting holes V onto the substrate 1011 lies within the orthographic projection of the photosensitive devices 1012 onto the substrate 1011. Optionally, one photosensitive device 1012 can be correspondingly disposed with at least one light-transmitting hole V. The ratio of the depth h of the light-transmitting hole V to the maximum aperture d1 of the light-transmitting hole V (i.e., the aspect ratio) is greater than or equal to 1 / 6 and less than or equal to 2. Optionally, the material of the aperture layer 102 can be a light-shielding material such as black resin, molybdenum oxide, aluminum oxide, or chromium metal.

[0101] Multiple microlenses 103 are located on the side of the aperture layer 102 away from the texture recognition substrate 101. The orthogonal projection of the microlenses 103 on the substrate 1011 covers the orthogonal projection of the light-transmitting hole V on the substrate 1011. Optionally, the material of the microlenses 103 can be transparent resin.

[0102] In the texture recognition module provided in this embodiment, only a single aperture layer 102 is provided. Compared with the related technology that provides two or more aperture layers 102, this not only reduces the number of aperture layers 102, but also saves the transparent filling layer between the aperture layers 102. This effectively reduces the overall thickness of the texture recognition module, which is beneficial for achieving a thinner and lighter design. Furthermore, since the ratio of the depth h of the aperture layer 102 to the maximum aperture d1 of the light-transmitting hole V in this disclosure is greater than or equal to 1 / 6 and less than or equal to 2, the aperture layer 102 can achieve a good collimation effect on the fingerprint reflected light converged by the microlens 103. Therefore, while achieving a thinner and lighter design, good fingerprint recognition performance can also be maintained.

[0103] In some embodiments, in the texture recognition module provided in this disclosure, such as Figures 2 to 4 As shown, in the direction Z from the texture recognition substrate 101 to the aperture layer 102, the aperture diameter d of the light-transmitting holes V is approximately the same, for example, exactly the same, or within the error range caused by factors such as manufacturing and measurement. Or, as Figures 5 to 7 As shown, in the direction Z from the texture recognition substrate 101 to the aperture layer 102, the aperture of the light-transmitting hole V can gradually increase. That is, the light-transmitting hole V has a minimum aperture d2 close to the texture recognition substrate 101 and a maximum aperture d1 far from the texture recognition substrate 101. In this disclosure, the aperture d of the light-transmitting hole V with uniform aperture size can be equal to the maximum aperture d1. Optionally, to ensure the quality of fingerprint recognition, the maximum aperture d1 and the minimum aperture d2 of the light-transmitting hole V satisfy the following relationship:

[0104] d1 = D*h / H + d2;

[0105] Among them, such as Figure 1 , Figure 2 and Figure 5 As shown, D is the aperture of the microlens 103, h is the depth of the light-transmitting aperture V, and H is the distance between the surface of the texture recognition substrate 101 facing the aperture layer 102 and the surface of the microlens 103 facing the aperture layer 102. In some embodiments, 1μm≤D≤50μm, 2μm≤h≤8μm, 4μm≤d1≤12μm, 1μm≤d2≤6μm, and 40μm≤H≤160μm.

[0106] In some embodiments, in the texture recognition module provided in this disclosure, in order to improve the center transmittance of the light-transmitting aperture V and effectively prevent crosstalk caused by stray light, such as Figure 1 , Figure 2 and Figure 5 As shown, it may also include a transparent filling layer 104 located between the aperture layer 102 and the layer containing the plurality of microlenses 103; the distance H between the surface of the texture recognition substrate 101 facing the aperture layer 102 and the surface of the microlenses 103 facing the aperture layer 102 satisfies the following relationship:

[0107] H = [D] 2 / (8h x )+h x / 2] / (n x -1)-n*h x / n x ;

[0108] Among them, h x Let n be the sag of microlens 103, and n be the refractive index of the material used in microlens 103. x h is the refractive index of the transparent filler layer 104. Optionally, 2μm ≤ h x ≤16μm, 1.4μm≤n x ≤1.8μm, 1.5μm≤n≤2.2μm.

[0109] Figure 8 This shows that the above parameter relationship is satisfied and the light-transmitting aperture V is... Figure 2 The light-gathering angle curve for the shape shown. Figure 9 This shows that the above parameter relationship is satisfied and the light-transmitting aperture V is... Figure 5 The light-gathering angle curve for the shape shown. Figure 8 and Figure 9When the full width at half maximum (FWHM) of the light-receiving angle curve can reach 7° to 8°, the center transmittance (i.e., the peak value of the light-receiving angle curve) is approximately 60%. FWHM is a core indicator of fingerprint recognition performance. Typically, to meet fingerprint recognition requirements, FWHM is required to be within 8°. The area enclosed by the light-receiving angle curve and the horizontal axis represents the amount of fingerprint signal received by the photosensitive device 1012. A higher fingerprint signal indicates greater recognition accuracy. Therefore, it is generally desirable to have a higher center transmittance of the light-transmitting aperture V, given a fixed FWHM. Related technologies employ texture recognition modules with two or more aperture layers 102. Under the condition of an FWHM within 8°, the corresponding center transmittance is approximately 42%. In comparison, the center transmittance of this disclosure is increased by approximately 18% compared to related technologies, which is beneficial for improving fingerprint recognition accuracy.

[0110] In some embodiments, in the texture recognition module provided in this disclosure, such as Figures 2 to 7 As shown, microlenses 103 are arranged in a one-to-one correspondence with light-transmitting holes V. The orthographic projection center O1 of the microlens 103 on the substrate 1011 and the orthographic projection center O2 of the corresponding light-transmitting hole V on the substrate 1011 are approximately coincident, for example, exactly coincident, or within the deviation range caused by factors such as manufacturing and measurement. This allows the fingerprint reflected light, after being focused by the microlens 103, to be fully incident into the photosensitive device 1012 through the light-transmitting hole V, thereby increasing the signal quantity and the signal-to-noise ratio. Of course, in specific implementations, one microlens 103 may also be arranged corresponding to at least two light-transmitting holes V, which is not specifically limited here. In some embodiments, the microlens 103 may include a convex surface S1 and a flat surface S2, wherein the convex surface S1 is located on the side of the flat surface S2 away from the light-transmitting hole V, so that the microlens 103 can effectively focus the fingerprint reflected light to the corresponding light-transmitting hole V. Optionally, the orthographic projection shape of the microlens 103 onto the substrate 1011 can be... Figure 3 and Figure 6 The circle shown can also be Figure 4 and Figure 7 The hexagons shown are not limited here.

[0111] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 2 and Figure 5As shown, it may also include an infrared cut-off film (IR cut) 105 located between the aperture layer 102 and the texture recognition substrate 101. This IR cut-off film 105 can precisely control the center wavelength within the visible light range (380nm–600nm) below 600nm. That is, the IR cut-off film 105 only allows light in the 380nm–600nm range to pass through, while light above 600nm is absorbed. Since light above 600nm in ambient light can pass through the finger and illuminate the microlens 103, and then be collected by the photosensitive device 1012 through the light-transmitting hole V, it interferes with the fingerprint recognition effect. Therefore, by placing the infrared cut-off film 105 between the aperture layer 102 and the texture recognition substrate 101, interference from ambient light can be effectively avoided, improving the fingerprint recognition effect.

[0112] Optionally, such as Figure 1 , Figure 2 and Figure 5 As shown, the infrared cut-off film 105 and the texture recognition substrate 101 can be bonded and fixed by the first adhesive layer 106, and the infrared cut-off film 105 and the aperture layer 102 can be bonded and fixed by the second adhesive layer 107. In order to provide a flat manufacturing surface for the aperture layer 102, a second transparent filler layer 108 can also be provided between the aperture layer 102 and the second adhesive layer 107. In some embodiments, the materials of the first adhesive layer 106 and the second adhesive layer 107 can be optical adhesive tape (OCA), optical optical retrieval (OCR), etc.

[0113] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 1 , Figures 10 to 12 As shown, the substrate 1011 includes a texture recognition area AA and a border area BB located on at least one side of the texture recognition area AA. The texture recognition substrate 101 also includes a shielding electrode 1013 located on the side of the layer where the plurality of photosensitive devices 102 are located away from the substrate 101. The shielding electrode 1013 is located in the display area AA and the border area BB. In the border area BB, the shielding electrode 1013 includes a plurality of first hollow structures K1 to reduce the voltage drop (RC loading) of the shielding electrode 1013 and improve the uniformity of the potential on the shielding electrode 1013.

[0114] In some embodiments, in the texture recognition module provided in this disclosure, such as Figures 10 to 12As shown, in the X / Y extension direction of the border area BB, the projected area of ​​the outermost first hollow structure K1 on the substrate 1011 is larger than the projected area of ​​the other hollow structures K1 on the substrate 1011. That is, within the same border area BB, the first hollow structures K1 at both ends are larger, while the first hollow structure K1 in the middle is smaller. This makes the area of ​​the shielding electrode 1013 at both ends of the border area BB similar to or the same as the area of ​​the shielding electrode 1013 at the middle of the border area BB, further improving the uniformity of the potential on the shielding electrode 1013.

[0115] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 13 As shown, multiple photosensitive devices 1012 are arranged in an array in the texture recognition area AA. Multiple first hollow structures K1 are arranged in the same row or column as each photosensitive device 1012, so that the area of ​​the shielding electrode 1013 in each row and column is similar or the same, ensuring the uniformity of the potential on the shielding electrode 1013. Optionally, as... Figure 13 As shown, each of the first hollow structures K1 in the same row or column as the photosensitive device 1012 is independent of each other, or, as... Figure 15 As shown, each of the first hollow structures K1 in the same row or column as the photosensitive device 1012 is interconnected.

[0116] See also Figure 10 , Figures 13 to 15 The shielding electrode 1013 may have a shielding structure 1013' covering the photosensitive device 1012 within the texture recognition area AA, so as to shield external electromagnetic interference through the shielding electrode 1013. Optionally, to facilitate the loading of electrical signals onto each shielding structure 1013', each shielding structure 1013' can be integrally set. At the same time, a second hollow structure K2 can also be set around the shielding structure 1013'. The setting of the second hollow structure K2 can not only improve the potential uniformity on the shielding electrode 1013', but also effectively reduce the coupling capacitance between the shielding electrode 1013' and the signal lines such as the gate line GL and data line DL below, avoiding mutual interference between the shielding electrode 1013' and the signal lines such as the gate line GL and data line DL.

[0117] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 16 and Figure 17As shown, multiple gate lines GL and / or multiple data lines DL extend from the texture recognition area AA to the side of the shielding electrode 1013 away from the texture recognition area AA, in order to detect gate lines GL or data lines DL that have abnormal signals (short circuit or open circuit). Optionally, the gate lines GL and / or data lines DL extend at least one pixel away from the shielding electrode 1013, that is, the distance s between the end of the gate lines GL and / or data lines DL within the border area BB and the shielding electrode 1013 is greater than or equal to the pitch of one pixel.

[0118] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 18 and Figure 19 As shown, the texture recognition substrate 101 may also include a bias electrode 1014 located between the layer containing the plurality of photosensitive devices 1012 and the layer containing the shielding electrode 1013. The bias electrode 1014 is electrically connected to the shielding electrode 1013 so as to apply a bias voltage signal with a fixed potential to the shielding electrode 1013 through the bias electrode 1014.

[0119] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 18 and Figure 19 As shown, the orthographic projection of the bias electrode 1014 onto the substrate 1011 can approximately coincide with the orthographic projection of the shielding electrode 1013 onto the substrate 1011, that is, exactly coincident or within the error range caused by factors such as fabrication and measurement. This allows the same mask to be used to fabricate both the shielding electrode 1013 and the bias electrode 1014, saving mask costs. To improve light transmittance, both the shielding electrode 1013 and the bias electrode 1014 can be made of transparent conductive materials with good transmittance and low resistance, such as indium tin oxide (ITO) or indium zinc oxide (ITO).

[0120] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 13 , Figure 20 and Figure 21 As shown, the texture recognition substrate 101 also includes a resistance-reducing electrode 1015 located between the layer containing the bias electrode 1014 and the substrate 1011. The resistance-reducing electrode 1015 is electrically connected to the shielding electrode 1013 through the bias electrode 1014 to further reduce the voltage drop of the shielding electrode 1013 and improve the uniformity of the potential on the shielding electrode 1013.

[0121] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 13 , Figure 20 and Figure 21As shown, the resistance-reducing electrode 1015 is located in the frame area BB, and the orthographic projection of the resistance-reducing electrode 1015 on the substrate 1011 approximately coincides with the orthographic projection of the shielding electrode 1013 on the substrate 1011 (i.e., exactly coincides or within the error range caused by factors such as manufacturing and measurement). In other words, the orthographic projection of the resistance-reducing electrode 1015 on the substrate 1011 does not overlap with the orthographic projection of all the first hollow structures K1 on the substrate 1011. In some embodiments, to facilitate the manufacturing of the resistance-reducing electrode 1015, the resistance-reducing electrode 1015 can also be disposed on the entire surface of the area where the shielding electrode 1013 is located within the frame area BB.

[0122] In some embodiments, in the texture recognition module provided in the present disclosure, the drag-reducing electrode 1015 can be disposed in the same layer as the first electrode 121 of the photosensitive device 1012, so that the drag-reducing electrode 1015 and the first electrode 121 can be fabricated using the same film layer and based on a single patterning process, thereby saving patterning times and improving production efficiency.

[0123] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 1 As shown, it also includes a plurality of transistor TFTs located between the photoelectric conversion layer 122 and the substrate 1011. The first electrode 121 is multiplexed with the first electrode (e.g., source or drain) of the transistor TFT, that is, the first electrode and the first electrode 121 can be integrally formed. In some embodiments, such as Figure 22 As shown, the layer where the first electrode 121 is located can also be located on the side of the first electrode of the transistor TFT away from the substrate 1011, and the first electrode 121 is electrically connected to the first electrode of the transistor TFT.

[0124] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 1 and Figure 22 As shown, the texture recognition substrate 101 may also include a plurality of bonding electrodes 1016. The plurality of bonding electrodes 1016 are located on the side of the shielding electrode 1013 away from the texture recognition area AA. The plurality of bonding electrodes 1016 are disposed in the same layer as the first electrode 121, so that the bonding electrodes 1016 and the first electrode 121 are fabricated using the same film layer and based on a single patterning process, thereby saving patterning times and improving production efficiency.

[0125] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 1 , Figure 22 and Figure 23As shown, the border area BB surrounds the texture recognition area AA. The border area BB includes a first border area BB1 for bonding a bias voltage chip (not shown in the figure). The bonding electrode 1016 includes a first bonding electrode 161 located within the first border area BB1. The texture recognition substrate 101 also includes a first connection electrode 1017 disposed on the same layer as the bias electrode 1013 at the first bonding electrode 161. The first bonding electrode 161 is electrically connected to the bias electrode 1013 through the first connection electrode 1017, so that the bias voltage signal provided by the bias chip can be provided to the bias electrode 1013 sequentially through the first bonding electrode 161 and the first connection electrode 1017. In some embodiments, the first connection electrode 1017 can be integrally disposed with the bias electrode 1013.

[0126] In some embodiments, in the texture recognition module provided in this disclosure, such as Figures 23 to 25 As shown, the first frame area BB1 is also used for bonding a data driver chip (Source IC) IC1. The bonding electrode 1016 may also include a second bonding electrode 162 located in the first frame area BB1. The texture recognition substrate 101 may also include a second connection electrode 1018 disposed on the same layer as the first electrode of the transistor TFT at the second bonding electrode 162. The second bonding electrode 162 is electrically connected to the first electrode of the transistor TFT through the second connection electrode 1018. Optionally, the second connection electrode 1018 may be electrically connected to the first electrode of the transistor TFT through the data line DL.

[0127] In some embodiments, in the texture recognition module provided in this disclosure, such as Figure 23 , Figure 26 and Figure 27 As shown, the frame region BB may further include a second frame region BB2 for bonding the gate driver chip (Gate IC) IC2, and the second frame region BB2 is connected to the first frame region BB1; the bonding electrode 1016 further includes a third bonding electrode 163 located in the second frame region BB2; the texture recognition substrate 101 further includes a third connection electrode 1019 at the third bonding electrode 163, which has corresponding electrical connections in the first electrode layer of the transistor TFT and the gate layer of the transistor TFT. The third bonding electrode 163 is electrically connected to the gate of the transistor TFT through the third connection electrode 1019. Optionally, the third connection electrode 1019 can be electrically connected to the gate of the transistor TFT through the gate line GL.

[0128] In some embodiments, in the texture recognition module provided in this disclosure, such as Figures 28 to 30As shown, it may also include a noise reduction region ODNC located between the texture recognition region AA and the border region BB. The noise reduction region ODNC has multiple arrayed virtual devices 1020. The virtual device 1020 includes a third electrode 201 and a fourth electrode 202 placed opposite each other, and an insulating layer 1021 is provided between the third electrode 201 and the fourth electrode 202. The third electrode 201 may be disposed in the same layer as the first electrode 121, and the fourth electrode 202 may be disposed in the same layer as the bias electrode 1013. The insulating layer 1021 may include a first inorganic insulating layer 211, a protective layer 212, an organic insulating layer 213, and a second inorganic insulating layer 214.

[0129] Optionally, such as Figure 29 and Figure 30 As shown, the texture recognition substrate 101 provided in this embodiment may also include a gate insulating layer 1022, a third inorganic insulating layer 1023, etc. Other essential components of the texture recognition substrate 101 are all understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure.

[0130] Based on the same inventive concept, this disclosure provides a method for manufacturing the above-mentioned texture recognition module. Since the principle of this manufacturing method in solving the problem is similar to that of the above-mentioned texture recognition module, the implementation of the manufacturing method provided in this disclosure can refer to the implementation of the above-mentioned texture recognition module provided in this disclosure, and the repeated parts will not be described again.

[0131] Specifically, this disclosure provides a method for manufacturing the above-mentioned texture recognition module, such as... Figure 31 As shown, it includes the following steps:

[0132] S3101, Provide a substrate;

[0133] S3102, An aperture layer with multiple light-transmitting holes arranged in an array is formed on the substrate;

[0134] S3103, Forming multiple microlenses covering multiple light-transmitting holes on the aperture layer;

[0135] S3104, Peel off the substrate;

[0136] S3105. A texture recognition substrate is provided, and the side where the aperture layer is located is fixed to the light-incident side of the texture recognition substrate.

[0137] In some embodiments, the manufacturing method provided in this disclosure can be implemented in the following ways:

[0138] The first step is to provide a substrate 100, such as Figure 32 As shown.

[0139] The second step involves forming a second transparent filling layer 108 with a thickness of 10 μm to 40 μm and a refractive index of 1.4 to 1.8 on the substrate 100, such as... Figure 33 As shown.

[0140] The third step is to form a light-shielding material layer 102' for fabricating the aperture layer 102 on the second transparent filling layer 108, such as... Figure 34 As shown, the thickness of the light-shielding material layer 102' is between 2 μm and 8 μm.

[0141] The fourth step involves imprinting the light-shielding material layer 102' to form an aperture layer 102 with multiple light-transmitting holes arranged in an array, such as... Figure 35 As shown, in related technologies, the thickness of the aperture layer 102 is 0.5 μm to 1 μm, and the light-transmitting holes in the aperture layer 102 are usually formed by patterning etching. In this disclosure, the thickness of the aperture layer 102 is 2 μm to 8 μm. It can be seen that the aperture layer 102 of this disclosure is relatively thick; therefore, a lower-cost and simpler imprinting process can be used to form the light-transmitting holes in the aperture layer 102. Of course, in some embodiments, this disclosure can also use patterning etching to form the light-transmitting holes in the aperture layer 102.

[0142] Fifth step: A first transparent filling layer 104 with a thickness of 10μm to 40μm and a refractive index of 1.4 to 1.8 is formed on the aperture layer 102, such as... Figure 36 As shown.

[0143] The sixth step is to form a transparent material layer 103' for fabricating the microlens 103 on the first transparent filling layer 104, such as... Figure 37 As shown; the thickness of the transparent material layer 103' is 2μm to 16μm, and the refractive index of the transparent material layer 103' is 1.5 to 2.2.

[0144] Step 7: Imprint or pattern the transparent material layer 103' to form multiple microlenses 103 covering multiple light-transmitting holes, such as... Figure 38 As shown; the aperture of microlens 103 is 1μm to 30μm.

[0145] Step 8: Peel off the substrate 100 to obtain a stacked second transparent filler layer 108, an aperture layer 102, a first transparent filler layer 104, and multiple microlenses 103, as shown. Figure 39 As shown.

[0146] Step 9: Provide a texture recognition substrate 101 and an infrared cut-off film 105, and use a first adhesive layer 106 to fix the infrared cut-off film 105 to the light-incident side of the texture recognition substrate 101. Then, use a second adhesive layer 107 to fix and bond the second transparent filler layer 108 to the side of the infrared cut-off film 105 away from the texture recognition substrate 101. Figure 40As shown. The thickness of both the first adhesive layer 106 and the second adhesive layer 107 is less than or equal to 15 μm, and the thickness of the infrared cut-off film 105 is 10 μm to 40 μm. This completes the fabrication of the texture recognition module provided in this embodiment.

[0147] Based on the same inventive concept, embodiments of this disclosure provide a display device, such as... Figure 41 As shown, it includes: a texture recognition module 001, a display module 002, and an adhesive layer 003; wherein, the texture recognition module 001 is the texture recognition module 001 provided in the embodiments of this disclosure, and the texture recognition module 001 is located on the opposite side of the display side of the display module 002; the adhesive layer 003 is located between the display module 002 and the texture recognition module 001, and the orthographic projection of the adhesive layer 003 on the display module 002 surrounds the display area of ​​the display module 002, so that the space surrounded by the texture recognition module 001, the display module 002, and the adhesive layer 003 forms an air gap, which is beneficial to maintain the light path propagation direction of the light reflected from the finger unchanged.

[0148] During fingerprint recognition, when a finger touches the display module 001, the microlens 103, in conjunction with the aperture layer 102, can nearly collimate and filter out small-angle light rays reflected from the finger, directing them to the photoelectric conversion layer 122 of the underlying photosensitive device 1012. The photoelectric conversion layer 122 can detect the intensity of the light. Because the energy of the diffusely reflected light from valleys and ridges is different, the light intensity detected by the photosensitive device 1012 array is different, thereby acquiring fingerprint image information.

[0149] In some embodiments, the display device provided in this disclosure can be any product or component with display functionality, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, smartwatch, fitness wristband, or personal digital assistant. This display device includes, but is not limited to, components such as a radio frequency unit, network module, audio output & input unit, sensor, display unit, user input unit, interface unit, memory, processor, and power supply. Furthermore, those skilled in the art will understand that the above structure does not constitute a limitation on the display device provided in this disclosure. In other words, the display device provided in this disclosure may include more or fewer of the aforementioned components, or combine certain components, or have different component arrangements.

[0150] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Claims

1. A texture recognition module, wherein: include: A texture recognition substrate, the texture recognition substrate comprising a base substrate, and a plurality of photosensitive devices arranged in an array on one side of the base substrate; an aperture layer, located on a side of the pattern recognition substrate having the plurality of photosensitive devices, the aperture layer being one layer, the aperture layer comprising light-transmitting holes arranged in an array, the orthographic projections of the light-transmitting holes on the base substrate being located within the orthographic projections of the photosensitive devices on the base substrate, and the ratio of the depth of the light-transmitting holes to the maximum aperture of the light-transmitting holes being greater than or equal to 1 / 6 and less than or equal to 2; A plurality of micro lenses are located on a side of the aperture layer away from the texture recognition substrate, and the orthographic projection of the micro lenses on the base substrate covers the orthographic projection of the light-transmitting holes on the base substrate; The base substrate comprises a texture recognition area and a frame area located on at least one side of the texture recognition area; The texture recognition substrate also includes a shielding electrode located at a side of the layer where the multiple photosensitive devices are located away from the base substrate. The shielding electrode is located in the texture recognition area and the frame area, and in the frame area, the shielding electrode includes multiple hollow structures.

2. The texture recognition module according to claim 1, wherein: In the direction from the texture identification substrate to the aperture layer, the apertures of the light-transmitting holes are substantially the same.

3. The texture recognition module according to claim 1, wherein: In the direction from the texture recognition substrate to the aperture layer, the aperture of the light-transmitting hole gradually increases.

4. The texture recognition module according to claim 3, wherein: The maximum aperture d1 of the light-transmitting hole and the minimum aperture d2 of the light-transmitting hole satisfy the following relationship: d1=D*hH+d2; Wherein, D is the aperture of the microlens, h is the depth of the light-transmitting hole, and H is the distance between the surface of the texture recognition substrate facing the aperture layer and the surface of the microlens facing the aperture layer.

5. The texture recognition module according to claim 4, wherein: 1μm≤D≤50μm, 2μm≤h≤8μm, 4μm≤d1≤12μm, 1μm≤d2≤6μm, 40μm≤H≤160μm.

6. The texture recognition module according to any one of claims 1 to 5, wherein: Also included is a transparent filling layer located between the aperture layer and the layer where the plurality of micro-lenses are located; The distance H between the surface of the texture recognition substrate facing the aperture layer and the surface of the microlens facing the aperture layer satisfies the following relationship: H=[D 2 / (8h x )+h x / 2] / (n x -1)-n*h x / n x ; Among them, h x is the sag height of the microlens, n is the refractive index of the material used for the microlens, and n x is the refractive index of the transparent filling layer.

7. The texture recognition module according to claim 6, wherein: 2μm≤h x ≤16μm,1.4≤n x ≤1.8,1.5≤n≤2.2。 8. The texture recognition module according to any one of claims 1 to 5 and 7, wherein: The microlenses are arranged in one-to-one correspondence with the light-transmitting holes, and the orthographic projection centers of the microlenses on the base substrate substantially coincide with the orthographic projection centers of the corresponding light-transmitting holes on the base substrate.

9. The texture recognition module according to claim 8, wherein: The microlens includes a convex surface and a flat surface, and the convex surface is located on a side of the flat surface away from the light transmission hole.

10. The texture recognition module according to any one of claims 1 to 5, 7 and 9, wherein: Also includes: An infrared cut-off film is located between the aperture layer and the texture recognition substrate.

11. The texture recognition module according to any one of claims 1 to 5, 7 and 9, wherein: In the extension direction of the frame area, the orthographic projection area of ​​the outermost hollow structure on the base substrate is larger than the orthographic projection area of ​​the remaining hollow structures on the base substrate.

12. The texture recognition module according to any one of claims 1 to 5, 7 and 9, wherein: The plurality of photosensitive devices are arranged in an array in the texture recognition area, and the plurality of hollow structures are arranged in the same row or column as the photosensitive devices.

13. The texture recognition module according to claim 12, wherein: The hollow structures in the same row or column as the photosensitive device are arranged independently or in a conductive manner.

14. The texture recognition module according to any one of claims 1 to 5, 7, 9, and 13, wherein: It also includes a plurality of gate lines and a plurality of data lines that are cross-arranged, and the plurality of gate lines and / or the plurality of data lines extend from the texture recognition area to a side of the shielding electrode away from the texture recognition area.

15. The texture recognition module according to any one of claims 1 to 5, 7, 9, and 13, wherein: The texture recognition substrate further includes a bias electrode located between the layer where the plurality of photosensitive devices are located and the layer where the shielding electrode is located, and the bias electrode is electrically connected to the shielding electrode.

16. The texture recognition module according to claim 15, wherein: The orthographic projection of the bias electrode on the base substrate substantially coincides with the orthographic projection of the shielding electrode on the base substrate.

17. The texture recognition module according to claim 15, wherein: The texture recognition substrate further comprises a resistance reducing electrode located between the layer where the bias electrode is located and the base substrate, and the resistance reducing electrode is electrically connected to the shielding electrode through the bias electrode.

18. The texture recognition module according to claim 17, wherein: The resistance reducing electrode is located in the frame area, and in the frame area, the orthographic projection of the resistance reducing electrode on the base substrate substantially coincides with the orthographic projection of the shielding electrode on the base substrate.

19. The texture recognition module according to claim 17, wherein: The resistance reducing electrode is located in the border area, and in the border area the resistance reducing electrode is arranged on the entire surface of the area where the shielding electrode is located.

20. The texture recognition module according to any one of claims 17 to 19, wherein: The photosensitive device comprises a first electrode, a photoelectric conversion layer and a second electrode which are stacked, wherein the first electrode is arranged adjacent to the base substrate; and the resistance-reducing electrode is arranged in the same layer as the first electrode.

21. The texture recognition module according to claim 20, wherein: It also includes a plurality of transistors located between the photoelectric conversion layer and the substrate, and the first electrode is reused with the first pole of the transistor.

22. The texture recognition module according to claim 20, wherein: It also includes a plurality of transistors located between the photoelectric conversion layer and the substrate, the layer where the first electrode is located is located on a side of the first electrode of the transistor away from the substrate, and the first electrode is electrically connected to the first electrode of the transistor.

23. The texture recognition module according to claim 21 or 22, wherein: The texture recognition substrate further includes a plurality of binding electrodes, the plurality of binding electrodes are located at a side of the shielding electrode away from the texture recognition area, and the plurality of binding electrodes are arranged in the same layer as the first electrode.

24. The texture recognition module according to claim 23, wherein: The frame area surrounds the texture recognition area, and the frame area includes a first frame area for binding a bias voltage chip; The binding electrode comprises a first binding electrode located in the first border area; The pattern recognition substrate further includes a first connecting electrode disposed at the first binding electrode and in the same layer as the bias electrode, and the first binding electrode is electrically connected to the bias electrode through the first connecting electrode.

25. The texture recognition module according to claim 24, wherein: The first border area is also used to bind a data driver chip; The binding electrode further includes a second binding electrode located in the first border area; The pattern recognition substrate further includes a second connecting electrode disposed at the same layer as the first electrode of the transistor at the second binding electrode, and the second binding electrode is electrically connected to the second electrode of the transistor through the second connecting electrode.

26. The texture recognition module according to claim 24 or 25, wherein: The frame area further includes a second frame area for binding a gate driving chip, and the second frame area is connected to the first frame area; The binding electrode further includes a third binding electrode located in the second border area; The texture recognition substrate also includes a third connection electrode having corresponding electrical connections at the third binding electrode in the layer where the first electrode of the transistor is located and the layer where the gate of the transistor is located, and the third binding electrode is electrically connected to the gate of the transistor through the third connection electrode.

27. A method for manufacturing a texture recognition module according to any one of claims 1 to 26, wherein: include: providing a substrate; Forming an aperture layer having a plurality of light-transmitting holes arranged in an array on the substrate; forming a plurality of micro lenses covering the plurality of light-transmitting holes on the aperture layer; peeling off the substrate; A texture recognition substrate is provided, and the side where the aperture layer is located is fixed on the light incident side of the texture recognition substrate.

28. The method of claim 27, wherein: The aperture layer and the plurality of micro lenses are formed, specifically comprising: forming the aperture layer and the plurality of micro lenses by adopting an embossing or patterning process.

29. A display device, wherein: include: A display module, a texture recognition module and an adhesive layer; wherein the texture recognition module is the texture recognition module as described in any one of claims 1 to 26, the texture recognition module is located on the opposite side of the display side of the display module, the adhesive layer is located between the display module and the texture recognition module, and the orthographic projection of the adhesive layer on the display module surrounds the display area of ​​the display module.

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