A reference current source circuit with under-voltage protection function

Abstract

The application provides a reference current source circuit with an under-voltage protection function, comprising a reference current source starting circuit, a reference current source main circuit and an under-voltage protection circuit, the input end of the reference current source starting circuit is connected with the main control circuit of a chip, the output end of the reference current source starting circuit is connected with the input end of the reference current source main circuit, the output end of the reference current source main circuit is connected with the input end of the under-voltage protection circuit, the output end of the under-voltage protection circuit is connected with the main control circuit of the chip, three field effect tubes with the same size are arranged in the reference current source main circuit and the three field effect tubes form a current mirror, a resistor R1, a triode Q1 and a triode Q2 are further arranged in the reference current source main circuit, and the two ends of the resistor R1 are connected with the emitter of the triode Q1 and the emitter of the triode Q2 respectively.The application has the beneficial effects that the under-voltage protection module in the chip can be combined with the reference current source, the circuit structure is simple, and the static current is small.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, in particular to a reference current source circuit with under-voltage protection function. BACKGROUND

[0002] The reference current source refers to a high-precision, low-temperature coefficient current source used as a current reference for other circuits in analog integrated circuits. As a key circuit unit of analog integrated circuits, current sources are widely used in operational amplifiers, A / D converters and D / A converters. The design of the bias current source is based on a copy of an existing standard reference current source, which is then output to other modules of the system. Therefore, the accuracy of the current source directly affects the accuracy and stability of the entire system. The reference current source is an essential component of analog circuits. High-performance analog circuits must have high-quality, high-stability current and voltage bias circuits to support them. The performance of the reference current source will directly affect the power consumption, power supply rejection ratio, open-loop gain and temperature characteristics of the circuit.

[0003] A chip, also known as a microcircuit, microchip or integrated circuit (IC), is a silicon chip that contains integrated circuits. It is very small and is often part of a computer or other electronic device. In the production of chips, the reference current source is one of the essential modules in the chip. With the continuous development of various fields and the changing application environment of chips, the requirements for chip power consumption and chip area are becoming higher and higher. Most existing reference current sources use an operational amplifier and a transistor to form a source follower, and use a resistor to generate a reference current from a reference voltage. This implementation is relatively complex, and because the reference voltage has a small temperature coefficient, the current is greatly affected by the temperature coefficient of the resistor.

[0004] When the line voltage drops to the critical voltage, the action of protecting the electrical appliance is called under-voltage protection. Its main task is to prevent the device from burning due to overload. The under-voltage protection module, as a very important protection module in the chip, is used to prevent the circuit from burning due to overload when the voltage is too low. Traditional under-voltage protection circuits use conventional differential comparators and sampling resistors to ensure correct operation, but this way of circuit layout area is relatively large. SUMMARY

[0005] In order to solve the problems in the prior art, the application provides a reference current source circuit with an under-voltage protection function, which is characterized in that a reference current source starting circuit, a reference current source main circuit and an under-voltage protection circuit are arranged in the reference current source circuit with the under-voltage protection function, the reference current source starting circuit can control the reference current source main circuit to start to generate a reference current and output the reference current to a main control circuit of a chip through the under-voltage protection circuit, and the under-voltage protection circuit can actively disconnect the connection with the main control circuit of the chip when the output voltage of the reference current source main circuit is lower than an under-voltage threshold value, so that the under-voltage protection module in the chip is combined with the reference current source, the whole circuit has a simple structure, has a small static current, saves the power consumption and the layout area of the chip, and solves the problems that the reference current source of the chip is greatly affected by the resistance temperature coefficient and the layout area of the under-voltage protection module circuit of the chip is relatively large in the prior art.

[0006] The reference current source circuit with the under-voltage protection function provided by the application comprises a reference current source starting circuit, a reference current source main circuit and an under-voltage protection circuit, the input end of the reference current source starting circuit is connected with a main control circuit of a chip, the output end of the reference current source starting circuit is connected with the input end of the reference current source main circuit, the output end of the reference current source main circuit is connected with the input end of the under-voltage protection circuit, the output end of the under-voltage protection circuit is connected with the main control circuit of the chip, three field effect tubes of the same size are arranged in the reference current source main circuit and the three field effect tubes form a current mirror, a resistor R1, a triode Q1 and a triode Q2 are further arranged in the reference current source main circuit, the two ends of the resistor R1 are connected with the emitter of the triode Q1 and the emitter of the triode Q2 respectively, the reference current source starting circuit can control the reference current source main circuit to start to generate a reference current and output the reference current to the main control circuit of the chip through the under-voltage protection circuit, and the under-voltage protection circuit can actively disconnect the connection with the main control circuit of the chip when the output voltage of the reference current source main circuit is lower than an under-voltage threshold value.

[0007] The application is further improved, the reference current source main circuit is further provided with a field effect tube PM7 and a triode Q3, the three field effect tubes are a field effect tube PM1, a field effect tube PM2 and a field effect tube PM3, wherein the source of the field effect tube PM1, the source of the field effect tube PM2 and the source of the field effect tube PM3 are connected with a power supply, the drain of the field effect tube PM1 and the gate of the field effect tube PM1, the gate of the field effect tube PM2, the gate of the field effect tube PM3, the source of the field effect tube PM7 and the output end of the reference current source starting circuit are connected at a node A, the drain of the field effect tube PM2 and the collector of the triode Q1, the base of the triode Q1, the base of the triode Q2 and the output end of the reference current source starting circuit are connected at a node B, and the drain of the field effect tube PM3 and the collector of the triode Q2 and the base of the triode Q3 are connected at a node C.

[0008] The application is further improved, the gate of the field effect tube PM7 is connected with the input end of the under-voltage protection circuit, the drain of the field effect tube PM7 is connected with the collector of the triode Q3, the emitter of the triode Q1 is connected with the emitter of the triode Q3 and one end of the resistor R1, and the emitter of the triode Q2 and the other end of the resistor R1 are grounded.

[0009] The application is further improved, the reference current source starting circuit is provided with a field effect tube PM4, a field effect tube PM5 and a field effect tube PM6, wherein the source of the field effect tube PM4, the source of the field effect tube PM6, the source of the field effect tube PM1, the source of the field effect tube PM2, the source of the field effect tube PM3 and a power supply are connected, the gate of the field effect tube PM4 is connected with the drain of the field effect tube PM1, the gate of the field effect tube PM1, the gate of the field effect tube PM2, the gate of the field effect tube PM3 and the source of the field effect tube PM7 at a node A, the drain of the field effect tube PM4 is connected with the source of the field effect tube PM5, the gate of the field effect tube PM5 is connected with the drain of the field effect tube PM2, the collector of the triode Q1, the base of the triode Q1 and the base of the triode Q2 at a node B, and the gate of the field effect tube PM6 is grounded.

[0010] In a further improvement, the reference current source startup circuit of the present invention further includes field-effect transistors NM1, NM2, NM3, and NM4. The drain of the field-effect transistor PM5 is connected to the drain of the field-effect transistor NM3, the gate of the field-effect transistor NM3, and the gate of the field-effect transistor NM2. The drain of the field-effect transistor PM6 is connected to the drain of the field-effect transistor NM1, the drain of the field-effect transistor NM2, and the gate of the field-effect transistor NM4. The gate of the field-effect transistor NM1 is connected to the main control circuit of the chip. The sources of the field-effect transistors NM1, NM2, NM3, and NM4 are grounded.

[0011] The present invention is further improved in that the undervoltage protection circuit includes a field-effect transistor PM8 and a field-effect transistor PM9. The source of the field-effect transistor PM8 is connected to the source of the field-effect transistor PM9, the source of the field-effect transistor PM4, the source of the field-effect transistor PM6, the source of the field-effect transistor PM1, the source of the field-effect transistor PM2, the source of the field-effect transistor PM3, and the power supply. The gate of the field-effect transistor PM8 is connected to the gate of the field-effect transistor PM9, the gate of the field-effect transistor PM4, the drain of the field-effect transistor PM1, the gate of the field-effect transistor PM1, the gate of the field-effect transistor PM2, the gate of the field-effect transistor PM3, and the source of the field-effect transistor PM7 at node A. The drain of the field-effect transistor PM8 is connected to the gate of the field-effect transistor PM7. The drain of the field-effect transistor PM9 is connected to the main control circuit of the chip.

[0012] In a further improvement, the undervoltage protection circuit further includes field-effect transistors NM5, NM6, NM7, NM8, NM9, and NM10. The drain of field-effect transistor PM8 is connected to the drain of field-effect transistor NM5, the gate of field-effect transistor NM5, and the gate of field-effect transistor NM6. Similarly, the drain of field-effect transistor PM9 is connected to the drain of field-effect transistor NM6 and the gate of field-effect transistor NM9. The source of transistor NM5 is connected to the drain of transistor NM7, the gate of transistor NM7, the gate of transistor NM8, the drain of transistor NM9, and the gate of transistor NM10. The source of transistor NM9 is connected to the drain of transistor NM10. The source of transistor NM6 is connected to the drain of transistor NM8. The sources of transistors NM7, NM8, and NM10 are grounded.

[0013] Compared with the prior art, the beneficial effects of the present invention are: it provides a reference current source circuit with undervoltage protection function. By setting a reference current source startup circuit, a reference current source main circuit, and an undervoltage protection circuit that cooperate with each other in the reference current source circuit with undervoltage protection function, the reference current source startup circuit can control the reference current source main circuit to start generating a reference current and output it to the chip's main control circuit through the undervoltage protection circuit. Furthermore, the undervoltage protection circuit can actively disconnect from the chip's main control circuit when the output voltage of the reference current source main circuit is lower than the undervoltage threshold. This allows the undervoltage protection module in the chip to be combined with the reference current source, using a self-biased reference current source, through the temperature of resistor R1... The temperature coefficient is used to cancel out the temperature coefficient difference between transistors Q1 and Q2, resulting in a reference current with a smaller temperature coefficient. The reference current source startup circuit controls the main circuit of the reference current source to quickly move away from the degenerate bias point to generate the reference current. It also provides current comparison by mirroring the reference current and detects the voltage of the main circuit of the reference current source to achieve undervoltage protection. It abandons the circuit structure of traditional bandgap reference voltage module and differential comparator. The entire circuit structure is simple, has a small quiescent current, saves chip power consumption and layout area, and solves the problems of the reference current source of the chip being greatly affected by the temperature coefficient of resistance and the circuit layout area of ​​the undervoltage protection module of the chip in the prior art. Attached Figure Description

[0014] To more clearly illustrate the solutions in this invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0015] Fig. 1 This is a schematic block diagram of a reference current source circuit with undervoltage protection function according to the present invention;

[0016] Fig. 2 This is a circuit diagram of a reference current source circuit with undervoltage protection function according to the present invention. Detailed Implementation

[0017] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs; the terminology used herein and in the specification of the application is for the purpose of describing particular embodiments only and is not intended to limit the invention; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings are used to distinguish different objects and not to describe a particular order.

[0018] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0019] To enable those skilled in the art to better understand the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings.

[0020] like Figs. 1-2As shown, the present invention provides a reference current source circuit with undervoltage protection function, including a reference current source startup circuit, a reference current source main circuit, and an undervoltage protection circuit. The input terminal of the reference current source startup circuit is connected to the main control circuit of the chip, the output terminal of the reference current source startup circuit is connected to the input terminal of the reference current source main circuit, the output terminal of the reference current source main circuit is connected to the input terminal of the undervoltage protection circuit, and the output terminal of the undervoltage protection circuit is connected to the main control circuit of the chip. The reference current source main circuit is provided with three field-effect transistors of the same size, and the three field-effect transistors form a current mirror. The reference current source main circuit is also provided with a resistor R1, a transistor Q1, and a transistor Q2. The two ends of the resistor R1 are connected to the emitter of transistor Q1 and the emitter of transistor Q2, respectively. In this embodiment, the reference current source startup circuit can control the main circuit of the reference current source to start generating a reference current and output it to the main control circuit of the chip through the undervoltage protection circuit. The undervoltage protection circuit can actively disconnect from the main control circuit of the chip when the output voltage of the main circuit of the reference current source is lower than the undervoltage threshold. It can combine the undervoltage protection module in the chip with the reference current source, adopt a self-biased reference current source, and use the temperature coefficient of resistor R1 to cancel the temperature coefficient difference between transistors Q1 and Q2 to obtain a reference current with a smaller temperature coefficient. The reference current source startup circuit controls the main circuit of the reference current source to quickly move away from the degenerate bias point to generate a reference current, and provides current comparison by mirroring the reference current, detects the voltage of the main circuit of the reference current source, and realizes the undervoltage protection function. It abandons the traditional circuit structure of bandgap reference voltage module and differential comparator. The entire circuit structure is simple, has a small quiescent current, and saves chip power consumption and layout area.

[0021] like Fig. 2As shown, the main circuit of the reference current source also includes a field-effect transistor PM7 and a transistor Q3. The three field-effect transistors are PM1, PM2, and PM3. The sources of PM1, PM2, and PM3 are connected to the power supply. The drain of PM1, the gates of PM1, PM2, and PM3, the source of PM7, and the output of the reference current source startup circuit are connected to node A. The drain of PM2... The drain of transistor PM3 is connected to the collector of transistor Q1, the base of transistor Q1, the base of transistor Q2, and the output of the reference current source startup circuit at node B. The drain of MOSFET PM3 is connected to the collector of transistor Q2 and the base of transistor Q3 at node C. The gate of MOSFET PM7 is connected to the input of the undervoltage protection circuit, and the drain of MOSFET PM7 is connected to the collector of transistor Q3. The emitter of transistor Q1 is connected to the emitter of transistor Q3 and one end of resistor R1, while the emitter of transistor Q2 and the other end of resistor R1 are grounded. In this embodiment, MOSFETs PM1, PM2, and PM3 form a current mirror with the same dimensions. The voltage difference across resistor R1 is the difference in VBE between transistors Q1 and Q2.

[0022]

[0023] Its output current is:

[0024] The output current depends only on the difference between VBE of transistors Q1 and Q2 and resistor R1.

[0025] ΔV BE The temperature coefficient is:

[0026] To reduce the temperature coefficient of the output reference current, the temperature coefficient of resistor R1 is used to offset the temperature coefficient difference between the VBE of transistors Q1 and Q2. When the power supply voltage increases, the potential at node A increases, which causes the potential at node B to decrease through MOSFET PM2. Under the action of transistor Q2, the potential at node C increases. In the branch of transistor Q3 and MOSFET PM7, because transistor Q3 pulls down the potential at node A, a negative feedback is formed at nodes A, B, and C. Therefore, the power supply rejection of the reference current source circuit is relatively high, and it is less affected by changes in the power supply voltage.

[0027] like Fig. 2As shown, the reference current source startup circuit includes field-effect transistors PM4, PM5, and PM6. The source of field-effect transistor PM4 is connected to the sources of field-effect transistors PM6, PM1, PM2, and PM3, and the power supply. The gate of field-effect transistor PM4 is connected to the drain of field-effect transistor PM1, the gate of field-effect transistor PM1, the gate of field-effect transistor PM2, the gate of field-effect transistor PM3, and the source of field-effect transistor PM7 at node A. The drain of field-effect transistor PM4 is connected to the source of field-effect transistor PM5. The gate of field-effect transistor PM5 is connected to the drain of field-effect transistor PM2, the collector of transistor Q1, and the gate of transistor Q6. The base of transistor Q2 is connected to node B, and the gate of MOSFET PM6 is grounded. The reference current source startup circuit also includes MOSFETs NM1, NM2, NM3, and NM4. The drain of MOSFET PM5 is connected to the drain of MOSFET NM3, the gate of MOSFET NM3, and the gate of MOSFET NM2. The drain of MOSFET PM6 is connected to the drain of MOSFET NM1, the drain of MOSFET NM2, and the gate of MOSFET NM4. The gate of MOSFET NM1 is connected to the main control circuit of the chip. The sources of MOSFET NM1, NM2, NM3, and NM4 are grounded. In this embodiment, when the main control circuit of the chip outputs a control signal to the gate of the field-effect transistor NM1, the field-effect transistor PM6 is normally open, the gate potential of the field-effect transistor NM4 is raised, the field-effect transistor NM4 is turned on, the drain potential of the field-effect transistor PM1, i.e., the node A potential, is pulled down instantaneously, the main circuit of the reference current source is removed from the degenerate bias point and generates current, the field-effect transistor PM4 mirrors the reference current source current, and through the current mirrors of the field-effect transistors NM2 and NM3, the gate potential of the field-effect transistor NM4 is pulled down, the field-effect transistor NM4 is turned off, the reference current source startup circuit stops working, and the startup process ends.

[0028] like Fig. 2As shown, the undervoltage protection circuit includes field-effect transistors PM8 and PM9. The source of PM8 is connected to the sources of PM9, PM4, PM6, PM1, PM2, and PM3, and the power supply. The gate of PM8 is connected to the gates of PM9 and PM4, the drain of PM1, the gate of PM1, the gate of PM2, the gate of PM3, and the source of PM7 at node A. The drain of PM8 is connected to the gate of PM7, and the drain of PM9 is connected to the main control circuit of the chip. The undervoltage protection circuit also includes field-effect transistors NM5 and NM6. NM6, NM7, NM8, NM9, and NM10 are connected as follows: the drain of NM8 is connected to the drain of NM5, the gate of NM5, and the gate of NM6; the drain of NM9 is connected to the drain of NM6 and the gate of NM9; the source of NM5 is connected to the drain of NM7, the gate of NM7, the gate of NM8, the drain of NM9, and the gate of NM10; the source of NM9 is connected to the drain of NM10; the source of NM6 is connected to the drain of NM8; and the sources of NM7, NM8, and NM10 are grounded. In this embodiment, field-effect transistors PM8 and PM9 mirror the output current Iout of the reference current source. Different ratios are used in the current mirrors NM5, NM6, NM7, and NM8. NM6, NM8, and PM9 form a current comparator, comparing the drain output current of NM6 with the drain output current of PM9. When the power supply voltage is low, NM5, NM6, NM7, NM8, and NM10 are not fully turned on, resulting in a larger output current for PM9 and a high output level for the undervoltage protection circuit (UVLO_OUT). When NM5, NM6, NM7, NM8, and NM10 are fully turned on, assuming the power supply voltage is VDD, the power supply voltage VDD is:

[0029] V DD =V DS(PM8) +V GS(NM5) +V GS(NM7)

[0030] in:

[0031] The undervoltage threshold VTH of the undervoltage protection circuit can be obtained as follows:

[0032]

[0033] When the power supply voltage VDD exceeds the undervoltage threshold, the drain current of MOSFET NM6 is relatively large, the output of the undervoltage protection circuit is pulled low, and the output port UVLO_OUT outputs a low level. At this time, MOSFET NM9 is turned off, and MOSFET NM10 is removed from the ratio of MOSFETs NM7 and NM8, reducing the ratio. When the power supply voltage VDD drops from a high potential to a low potential, the output of the output port UVLO_OUT flips to a high level at a lower potential, the undervoltage protection circuit flips the threshold, and thus achieves hysteresis.

[0034] As can be seen from the above, the present invention provides a reference current source circuit with undervoltage protection. By setting up a reference current source startup circuit, a reference current source main circuit, and an undervoltage protection circuit that cooperate with each other in the reference current source circuit, the reference current source startup circuit can control the reference current source main circuit to start generating a reference current, which is then output to the chip's main control circuit through the undervoltage protection circuit. Furthermore, the undervoltage protection circuit can actively disconnect from the chip's main control circuit when the output voltage of the reference current source main circuit is lower than the undervoltage threshold. This allows the undervoltage protection module in the chip to be combined with the reference current source, employing a self-biased reference current source, and utilizing the temperature coefficient of resistor R1 to achieve... The temperature coefficient difference between transistors Q1 and Q2 is canceled out to obtain a reference current with a smaller temperature coefficient. The reference current source startup circuit controls the main circuit of the reference current source to quickly move away from the degenerate bias point to generate the reference current. It also provides current comparison by mirroring the reference current and detects the voltage of the main circuit of the reference current source to realize the undervoltage protection function. It abandons the circuit structure of traditional bandgap reference voltage module and differential comparator. The entire circuit structure is simple, has a small quiescent current, saves chip power consumption and layout area, and solves the problems of the reference current source of the chip being greatly affected by the temperature coefficient of resistance and the circuit layout area of ​​the undervoltage protection module of the chip in the prior art.

[0035] The specific embodiments described above are preferred embodiments of the present invention and are not intended to limit the specific scope of the present invention. The scope of the present invention includes, but is not limited to, these specific embodiments. All equivalent changes made in accordance with the present invention are within the protection scope of the present invention.

Claims

1. A reference current source circuit with undervoltage protection function, disposed within a chip, characterized in that: The system includes a reference current source startup circuit, a reference current source main circuit, and an undervoltage protection circuit. The input terminal of the reference current source startup circuit is connected to the main control circuit of the chip, and the output terminal of the reference current source startup circuit is connected to the input terminal of the reference current source main circuit. The output terminal of the reference current source main circuit is connected to the input terminal of the undervoltage protection circuit, and the output terminal of the undervoltage protection circuit is connected to the main control circuit of the chip. The reference current source main circuit contains three identical field-effect transistors (FETs) forming a current mirror. The reference current source main circuit also includes a resistor R1, a transistor Q1, and a transistor Q2. The two ends of the resistor R1 are respectively connected to... The emitters of transistor Q1 and Q2 are connected. The reference current source startup circuit can control the main circuit of the reference current source to start generating a reference current, which is then output to the main control circuit of the chip through the undervoltage protection circuit. The undervoltage protection circuit can actively disconnect from the main control circuit of the chip when the output voltage of the main circuit of the reference current source is lower than the undervoltage threshold. The main circuit of the reference current source also includes a field-effect transistor PM7 and a transistor Q3. The undervoltage protection circuit includes field-effect transistors PM8 and PM9. The undervoltage protection circuit also includes field-effect transistors NM5, NM6, and NM6. NM7, NM8, NM9, and NM10, wherein the drain of NM8 is also connected to the drain of NM5, the gate of NM5, and the gate of NM6; the drain of NM9 is also connected to the drain of NM6 and the gate of NM9; the source of NM5 is connected to the drain of NM7, the gate of NM7, the gate of NM8, the drain of NM9, and the gate of NM10; and the source of NM9 is connected to... The drain of the field-effect transistor NM10 is connected to the ground. The source of the field-effect transistor NM6 is connected to the drain of the field-effect transistor NM8. The sources of the field-effect transistors NM7, NM8, and NM10 are grounded. The drain of the field-effect transistor NM5 is connected to the gate of the field-effect transistor PM7. The gate of the field-effect transistor PM7 is connected to the input terminal of the undervoltage protection circuit. The drain of the field-effect transistor PM7 is connected to the collector of the transistor Q3. The emitter of the transistor Q1 is connected to the emitter of the transistor Q3 and one end of the resistor R1. The emitter of the transistor Q2 and the other end of the resistor R1 are grounded.

2. The reference current source circuit with undervoltage protection function according to claim 1, characterized in that: The three field-effect transistors are PM1, PM2, and PM3. The sources of PM1, PM2, and PM3 are connected to a power supply. The drain of PM1 is connected to the gate of PM1, the gate of PM2, the gate of PM3, the source of PM7, and the drain of NM4 at node A. The drain of PM2 is connected to the collector of transistor Q1, the base of transistor Q1, the base of transistor Q2, and the gate of PM5 at node B. The drain of PM3 is connected to the collector of transistor Q2 and the base of transistor Q3 at node C.

3. The reference current source circuit with undervoltage protection function according to claim 2, characterized in that: The reference current source startup circuit includes field-effect transistors PM4, PM5, and PM6. The source of field-effect transistor PM4 is connected to the source of field-effect transistor PM6, the source of field-effect transistor PM1, the source of field-effect transistor PM2, the source of field-effect transistor PM3, and the power supply. The gate of field-effect transistor PM4 is connected to the drain of field-effect transistor PM1, the gate of field-effect transistor PM1, the gate of field-effect transistor PM2, the gate of field-effect transistor PM3, and the source of field-effect transistor PM7 at node A. The drain of field-effect transistor PM4 is connected to the source of field-effect transistor PM5. The gate of field-effect transistor PM5 is connected to the drain of field-effect transistor PM2, the collector of transistor Q1, the base of transistor Q1, and the base of transistor Q2 at node B. The gate of field-effect transistor PM6 is grounded.

4. The reference current source circuit with undervoltage protection function according to claim 3, characterized in that: The reference current source startup circuit also includes field-effect transistors NM1, NM2, NM3, and NM4. The drain of field-effect transistor PM5 is connected to the drain of field-effect transistor NM3, the gate of field-effect transistor NM3, and the gate of field-effect transistor NM2. The drain of field-effect transistor PM6 is connected to the drain of field-effect transistor NM1, the drain of field-effect transistor NM2, and the gate of field-effect transistor NM4. The gate of field-effect transistor NM1 is connected to the main control circuit of the chip. The sources of field-effect transistors NM1, NM2, NM3, and NM4 are grounded.

5. The reference current source circuit with undervoltage protection function according to claim 4, characterized in that: The source of the field-effect transistor PM8 is connected to the sources of the field-effect transistors PM9, PM4, PM6, PM1, PM2, and PM3, and to the power supply. The gate of the field-effect transistor PM8 is connected to the gates of the field-effect transistors PM9 and PM4, the drain of the field-effect transistor PM1, the gate of the field-effect transistor PM1, the gate of the field-effect transistor PM2, the gate of the field-effect transistor PM3, and the source of the field-effect transistor PM7 at node A. The drain of the field-effect transistor PM8 is connected to the gate of the field-effect transistor PM7. The drain of the field-effect transistor PM9 is connected to the main control circuit of the chip.

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