Semiconductor device including decoupling capacitor and method of manufacture

Abstract

A semiconductor device includes a die having a first side and a second side opposite the first side; a decoupling capacitor within the second side of the die and including a first capacitor cell and a second capacitor cell disposed laterally apart; wherein the first capacitor cell includes a first upper electrode and a first lower electrode; the second capacitor cell includes a second upper electrode and a second lower electrode; wherein the first upper electrode is in electrical communication with the second lower electrode and the first lower electrode is in electrical communication with the second upper electrode; a first conductive via between the first capacitor cell and the first side filled with a first conductive material for electrically communicating the first upper electrode of the first capacitor cell with the first side of the semiconductor device; and a second conductive via between the second capacitor cell and the first side filled with a second conductive material for electrically communicating the second upper electrode of the second capacitor cell with the first side of the semiconductor device.

Description

Technical Field

[0001] This application relates to the field of semiconductors. More specifically, this application relates to a semiconductor device including an improved decoupling capacitor and a method for manufacturing it. Background Technology

[0002] Decoupling capacitors can be included in semiconductor devices. They help provide a more stable power supply voltage to circuit systems on integrated circuits. Decoupling capacitors bypass high-frequency noise on DC power lines to ground power lines, thus preventing noise from reaching powered circuit components. In scenarios where power needs to switch between various operating modes, sufficient decoupling capacitors can store enough local charge to reduce the magnitude of undesirable voltage drops during mode switching. Current decoupling capacitor designs occupy a large amount of usable surface area on the semiconductor device die and have long interconnection distances with components in the integrated circuit system, resulting in poor noise reduction performance. Summary of the Invention

[0003] This application provides a semiconductor device including a decoupling capacitor, which saves die front area and provides higher capacitance, shortens the interconnection distance with transistors, reduces parasitic parameters and improves decoupling effect.

[0004] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0005] In a first aspect, a semiconductor device is provided, comprising: a die including a first side and a second side opposite to the first side; the semiconductor device further comprising a decoupling capacitor within the second side of the die, including a first capacitor unit and a second capacitor unit laterally spaced apart. The first capacitor unit includes a first upper electrode and a first lower electrode. The second capacitor unit includes a second upper electrode and a second lower electrode. The first upper electrode and the second lower electrode are electrically connected, and the first lower electrode and the second upper electrode are electrically connected. The semiconductor device further includes a first conductive via located between the first capacitor unit and the first side, and filled with a first conductive material, the first conductive material electrically connecting the first upper electrode of the first capacitor unit to the first side of the semiconductor device. The semiconductor device also includes a second conductive via located between the second capacitor unit and the first side, filled with a second conductive material, the second conductive material electrically connecting the second upper electrode of the second capacitor unit to the first side of the semiconductor device. By using a decoupling capacitor with paired capacitor units, the vias used to connect electrodes to the front side of the die can be saved, saving area in the die and providing more space for other devices, thus contributing to device miniaturization and cost savings. Moreover, the decoupling capacitor is close enough to the component to reduce parasitic parameters and provide better decoupling.

[0006] In some embodiments, a first conductive hole in the semiconductor device is directly adjacent to a first upper electrode of a first capacitor unit, and a first conductive material in the first conductive hole is in contact with the first upper electrode of the first capacitor unit; and a second conductive hole in the semiconductor device is directly adjacent to a second upper electrode of a second capacitor unit, and a second conductive material in the second conductive hole is in contact with the second upper electrode of the second capacitor unit. By positioning the conductive hole directly above the capacitor unit, the area in the die can be further saved, the fabrication process can be simplified, and it is helpful for further miniaturization of the device and cost savings.

[0007] In some embodiments, the first capacitor cell in the semiconductor device includes a first dielectric material between a first upper electrode and a first lower electrode; the second capacitor cell in the semiconductor device includes a second dielectric material between a second upper electrode and a second lower electrode. The first upper electrode and the second lower electrode are electrically connected, and the electrical connection between the first lower electrode and the second upper electrode includes the first upper electrode and the second lower electrode extending towards each other to have a first longitudinal overlap. The first conductive plug penetrates the first dielectric material or the second dielectric material between the first upper electrode and the second lower electrode in the first longitudinal overlap, wherein both ends of the first conductive plug are in contact with the first upper electrode and the second lower electrode, respectively. Similarly, the first lower electrode and the second upper electrode extend towards each other to have a second longitudinal overlap, and the second conductive plug penetrates the first dielectric material or the second dielectric material between the first lower electrode and the second upper electrode in the second longitudinal overlap, wherein both ends of the second conductive plug are in contact with the first lower electrode and the second upper electrode, respectively. This structure of longitudinal extension and conductive plug allows the upper and lower electrodes of the two capacitor cells to be cross-connected, thereby enabling the upper and lower electrodes of the capacitor cells in the decoupling capacitor to be electrically connected to the first side of the die through the conductive hole above the capacitor cell.

[0008] In some embodiments, the first and second longitudinal overlaps in the semiconductor device are arranged with interlocking teeth. This interlocking connection method achieves better electrical connectivity.

[0009] In some embodiments, the first capacitor cell in the semiconductor device further includes an intermediate electrode, wherein a first dielectric material is disposed between the first upper electrode and the intermediate electrode, and a dielectric material a is disposed between the intermediate electrode and the first lower electrode, and the first upper electrode and the first lower electrode are electrically connected. Introducing the intermediate electrode can achieve the effect of two capacitors connected in parallel, thereby further increasing the capacitance of the capacitor cell.

[0010] In some embodiments, the first capacitor cell in the semiconductor device further includes a dielectric material b located between a first dielectric material and a first lower electrode, wherein the first dielectric material and dielectric material b are different materials. Layering the dielectric materials between the two electrodes and employing a capacitor cell with multiple dielectric material layers stacked together can enrich the structure of the capacitor cell, enhance its breakdown voltage, and thus provide better reliability.

[0011] In a second aspect, an integrated circuit system is provided, which includes the semiconductor device with decoupling capacitors described above.

[0012] Thirdly, an electronic device is provided that includes the aforementioned integrated circuit system, wherein the integrated circuit system includes the aforementioned semiconductor device with decoupling capacitors.

[0013] Fourthly, a method for forming a semiconductor device is provided, comprising: forming one or more components of an integrated circuit system in a substrate material of a die; forming a first conductive via and a second conductive via in the substrate material from a first side of the die; forming a first recess and a second recess in the substrate material from a second side of the die to expose a portion of the first conductive via and a portion of the second conductive via, respectively; forming an insulating liner material on the surface of the substrate material within the first recess and the second recess and between the first recess and the second recess; and forming a first capacitor cell in the first recess and a second capacitor cell in the second recess. Prior to forming the first recess and the second recess, the first conductive via is filled with a first conductive material, and the second conductive via is filled with a second conductive material. Prior to forming the first recess and the second recess, the substrate material is thinned. Further, forming a first capacitor unit in the first recess and a second capacitor unit in the second recess includes forming openings in the insulating liner material within the first and second recesses to expose portions of the first and second conductive holes, respectively; forming a first conductive material adjacent to the insulating liner material; patterning and removing a portion of the first conductive material between the first and second recesses; forming a first dielectric material adjacent to the first conductive material; forming a conductive plug opening in the first dielectric material to expose the first conductive material; forming a third conductive material adjacent to the first dielectric material and filling the conductive plug opening; and finally patterning and removing another portion of the third conductive material. By this method of manufacturing a semiconductor device, a semiconductor device with a decoupling capacitor having two capacitor units, as described in the embodiments of this application, can be obtained. Attached Figure Description

[0014] Figure 1 This is a schematic cross-sectional view of a semiconductor device according to an embodiment of this application;

[0015] Figure 2A-2CThis is a schematic cross-sectional view of a semiconductor device according to an embodiment of this application;

[0016] Figure 3 The illustration shows an embodiment according to this application. Figure 2C A top view of a decoupling capacitor in a semiconductor device;

[0017] Figure 4A According to the embodiments of this application Figure 3 A magnified view of the connection region C of the decoupling capacitor in the image;

[0018] Figure 4B According to the embodiments of this application Figure 4A The diagram shows a cross-sectional view of the connecting area C along line AA'.

[0019] Figure 4C According to the embodiments of this application Figure 4A The diagram shows a cross-sectional view of the connecting area C along line BB'.

[0020] Figure 4D This is a top view of another connection area C according to an embodiment of this application;

[0021] Figure 4E This is a top view of another connection area according to an embodiment of this application;

[0022] Figure 5A and Figure 5B This is a schematic cross-sectional view of another and yet another capacitor unit in a decoupling capacitor according to embodiments of this application;

[0023] Figure 6 Formation based on embodiments of this application Figure 1 A flowchart of a method for manufacturing semiconductor devices;

[0024] Figures 7A to 7E It is formed according to the description of the embodiments of this application. Figure 1 A schematic cross-sectional view of a semiconductor device, representing a method for developing semiconductor devices.

[0025] Figure 8 This is a schematic diagram of an example electronic device according to an embodiment of this application. Detailed Implementation

[0026] This application will subsequently provide different embodiments to implement the different features of this application. However, these are merely illustrative examples and not intended to limit the invention.

[0027] The accompanying drawings should not be considered as actual views of any particular system, semiconductor device structure, or semiconductor device, but are only used to describe embodiments of this application. In the drawings, the same reference numerals denote similar elements.

[0028] Those skilled in the art will understand that the embodiments of this application can be practiced in conjunction with conventional manufacturing techniques used in the semiconductor industry. Furthermore, only the essential processes and structures of the embodiments of this application will be described in detail below.

[0029] Figure 1 This is a schematic cross-sectional view of a semiconductor device 100 according to an embodiment of this application. The semiconductor device 100 may include transistors, electrodes, diodes, memory devices, etc. It will be understood that the semiconductor device 100 may also include other forms of circuit components.

[0030] Semiconductor device 100 may include a die 105, which includes a front side 101 and a back side 103 opposite to the front side 101. As will be described below, during the manufacture of semiconductor device 100, various components of an integrated circuit system may be fabricated on the front side 101 of the die 105, and other components and structures may also be fabricated on the back side 103.

[0031] Semiconductor device 100 includes a front-end process (FEOL) structure 110, which includes a substrate material 106. For example, the front-end process structure 110 may include one or more active circuit systems, such as capacitors, transistors, electrodes, diodes, memory cells, resistors, metal structures, conductive lines, and other structures. In some embodiments, some components of the active circuit system are formed within or adjacent to the semiconductor material, while other components of the active circuit system are formed within or adjacent to an insulating material. Figure 1 As shown, in some embodiments, the front-end process structure 110 may include a plurality of transistors 112.

[0032] The substrate material 106 may include, for example, a semiconducting material, which includes one or more of the following: a semiconductor substrate, a substrate semiconductor material on a support structure, or a semiconductor substrate on which one or more layers, structures, or regions are formed. The substrate material 106 may be a conventional silicon substrate or other bulk substrate comprising a layer of semiconducting material. The term "bulk substrate" herein may refer not only to and include silicon wafers but also to and include silicon-on-insulator ("SOI") substrates, such as silicon-on-sapphire ("SOS") and silicon-on-glass ("SOG") substrates, silicon epitaxial layers on a substrate semiconductor, and other semiconductor or optoelectronic materials such as silicon-germanium, germanium, gallium arsenide, gallium nitride, and indium phosphide. The substrate material 106 may be doped or undoped, or may include one or more doped regions and one or more undoped regions; this application does not limit this.

[0033] refer to Figure 1 The front-end process structure 110 may include transistors 112. Figure 1A transistor 112 recessed into a substrate material 106 is illustrated. The transistor 112 may be an embedded transistor and is isolated from the substrate material 106 by, for example, a gate dielectric material (not shown). In some embodiments, the front-end process structure 110 may include the transistor 112 above the substrate material 106. This application does not limit the type of transistor.

[0034] A decoupling capacitor is a capacitor that decouples one part of a circuit from another. For example, noise caused by other circuit elements can pass through (e.g., shunt through) a decoupling capacitor to reduce the impact of those other circuit elements on the circuit, such as reducing the noise they cause. Furthermore, because a decoupling capacitor can store charge, it can provide stored charge to voltage fluctuations during logic load switching of the logic device (e.g., a transistor) associated with it, thereby controlling voltage changes to ensure a constant power supply to the semiconductor device. As an example, a decoupling capacitor can also be configured to suppress voltage surges that could damage other parts of the circuit.

[0035] The first conductive hole 124 may be filled with a first conductive material 162, and the second conductive hole 125 may be filled with a second conductive material 163. The first conductive material 162 and the second conductive material 163 may be selected from metals, alloys, conductive doped semiconductor materials, materials containing conductive metals, or combinations thereof, or may include metals, alloys, conductive doped semiconductor materials, or combinations thereof. The aforementioned metals may be, for example, tungsten (W), titanium (Ti), copper (Cu), silver (Ag), gold (Au), aluminum (Al), etc.; the aforementioned alloys may be, for example, Co-based alloys, Fe-based alloys, Ni-based alloys, Fe and Ni-based alloy steels, low-carbon steel, stainless steel, etc.; the aforementioned conductive doped semiconductor materials may be, for example, conductive doped polycrystalline silicon, conductive doped germanium (Ge), conductive doped silicon-germanium (SiGe), etc.; the materials containing conductive metals may be, for example, conductive metal nitrides, conductive metal silicides, conductive metal carbides, conductive metal oxides, etc. In some embodiments, the first conductive hole material 162 and the second conductive hole material 163 may be the same material. In some embodiments, the first conductive material 162 and the second conductive material 163 may be metallic copper.

[0036] The front-end process structure 110 may further include conductive traces (not shown) configured to reroute signals from various conductive materials.

[0037] Continue to refer to Figure 1The front side 101 of die 105 may further include a back-end process (BEOL) structure 130 above and adjacent to the front-end process structure 110. This back-end process structure may include various metal wires and redistribution lines for transmitting one or more electrical paths from the front-end process structure 110 to the front side 101 of die 105. Therefore, the back-end process structure 130 may include a large number of dielectric and conductive materials, selectively positioning these dielectric and conductive materials and configuring them to form routing elements (e.g., lines, traces, pads, vias, etc.) above the front-end process structure 110. By way of example and not limitation, the back-end process structure 130 may include one or more metallization structures (also referred to as metal interconnect layers) M1, M2, M3, M4, etc., each containing one or more conductive structures (e.g., conductive plugs, conductive pads, conductive pillars, conductive contacts, etc.) 132 located within the dielectric material 134. In some embodiments of this application, at least some of the conductive structures 132 may be electrically connected to conductive vias. Conductive structure 132 can help signals or electricity move laterally (in) within the back-end process structure 130. Figure 1 In the view, the route is in the left-right direction and in the direction of entering and exiting the page; and / or through the rear process structure 130 longitudinally (in Figure 1 In the view, the route is in the vertical direction.

[0038] One or more conductive elements 136 may be present on the front side 101 of the semiconductor device 100. These conductive elements 136 may be copper pillars capped with solder. The conductive elements 136 may be electrically connected to at least some of the conductive structures 132. In some embodiments of this application, the conductive element 136 may include terminals of a decoupling capacitor 150 within the back side 103 of the die 105 for connecting the electrodes of the decoupling capacitor 150 to a power supply or ground.

[0039] Continue to refer to Figure 1 The semiconductor device 100 may include a decoupling capacitor 150 located on the back side 103 of the die 105. The decoupling capacitor may include a first capacitor unit 150a and a second capacitor unit 150b. The first capacitor unit 150a and the second capacitor unit 150b may be electrically isolated from the substrate material 106 via, for example, an insulating liner material 148. The insulating liner material 148, as a sidewall insulating layer, may include one or more dielectric materials, such as silicon dioxide, silicon nitride, phosphosilicate glass, borosilicate glass, etc.

[0040] The first capacitor unit 150a and the second capacitor unit 150b can be located below a conductive via (e.g., a substrate through-hole), which can be a first conductive via 124 and a second conductive via 125 respectively connected to the front side 101 of the semiconductor device 100. That is, the first capacitor unit 150a can be located below the first conductive via 124; and the second capacitor unit 150b can be located below the second conductive via 125. In this embodiment, the aperture of the conductive via can be smaller than the aperture of a conventional through-silicon via (TSV). Figure 1 As shown, since the conductive via is located above the capacitor cell of the decoupling capacitor, the conductive via only needs to penetrate a small portion of the substrate material 106, rather than penetrating the entire substrate material 106. This arrangement of the conductive via saves area on the die, shortens the interconnection distance with the transistor, reduces parasitic parameters, improves the decoupling effect, and reduces the possibility of die damage during semiconductor device fabrication, thereby improving yield. Figure 1 A decoupling capacitor 150 on the back side 103 is illustrated. The decoupling capacitor 150 includes a first capacitor unit 105a and a second capacitor unit 105b, but this application is not limited thereto. It will be understood that the back side 103 may include any number of decoupling capacitors 150.

[0041] like Figure 1 As shown, the first capacitor unit 105a may include, for example, a first upper electrode 152, a first dielectric material 154 adjacent to the first upper electrode 152, and a first lower electrode 156 adjacent to the first dielectric material 154. The first dielectric material 154 may be directly between the first upper electrode 152 and the first lower electrode 156.

[0042] The first upper electrode 152 and the first lower electrode 156 can each be made of a conductive material independently. For example, the conductive material can be selected from the materials described above regarding the first conductive material and the second conductive material, and will not be repeated here.

[0043] The first dielectric material 154 may be selected from one or more of the following: silicon dioxide, silicon nitride, zirconium oxide, hafnium oxide, aluminum oxide (Al2O3), yttrium oxide (Y2O3), scandium oxide (Sc2O3), lanthanum oxide (La2O3), tantalum oxide (Ta2O5), titanium oxide (TiO2), etc.

[0044] The first upper electrode 152 can be electrically connected to the front side 101 of the semiconductor device 100 via a first conductive material 162 in the first conductive via 124. In some embodiments, the first conductive material 162 in the first conductive via 124 directly contacts the first upper electrode 152. The first conductive via 124 may include conductive material 162. It will be understood that the conductive structure 132 included in the back-end process structure 130 can be electrically connected to the first conductive material 162, thereby enabling the first conductive material 162 in the first conductive via 124 to be electrically connected to the front side 101 of the semiconductor device 100. In some embodiments of this application, the conductive structure 132 electrically connected to the first conductive material 162 in the first conductive via 124 can be electrically connected to the front side 101 via other conductive structures 132 in other cross sections. For example, the conductive path between the first conductive via 124 and the front side 101 can be routed to other cross sections via one or more redistribution lines or redistribution structures. In some embodiments, the first conductive material 162 in the first conductive hole 124 is electrically connected to the front side 101 through one or more conductive structures 132.

[0045] The first upper electrode 152, the first dielectric material 154, and the first lower electrode 156 can extend on the back side 103 of the semiconductor device 100 via traces 166.

[0046] Similar to the first capacitor unit 105a, the second capacitor unit 105b may include, for example, a second upper electrode 172, a second dielectric material 174 adjacent to the second upper electrode 172, and a second lower electrode 176 adjacent to the second dielectric material 174. The second dielectric material 174 may be directly between the second upper electrode 172 and the second lower electrode 176.

[0047] The second upper electrode 172 and the second lower electrode 176 can each be independently made of a conductive material. For example, the second upper electrode 172 and the second lower electrode 176 can be independently made of the materials described above regarding the first conductive material and the second conductive material, and will not be repeated here. In some embodiments, the first upper electrode 152 and the second upper electrode 172 can be made of the same material. In some embodiments, the first lower electrode 156 and the second lower electrode 176 can be made of the same material. In some embodiments, the first upper electrode 152 and the first lower electrode 156 can be made of the same material. In some embodiments, the second upper electrode 172 and the second lower electrode 176 can be made of the same material. In some embodiments, the first upper electrode 152, the first lower electrode 156, the second upper electrode 172, and the second lower electrode 176 can be made of the same material.

[0048] The second dielectric material 174 may be selected from and include one or more of the materials described above with respect to the first dielectric material 154. In some embodiments, the first dielectric material 154 and the second dielectric material 174 may be the same material. In some embodiments, the first dielectric material 154 and the second dielectric material 174 may be different materials.

[0049] The second upper electrode 172 can be electrically connected to the front side 101 of the semiconductor device 100 via the second conductive material 163 in the second conductive via 125. In some embodiments, the second conductive material 163 in the second conductive via 125 directly contacts the second upper electrode 172. The second conductive via 125 may include the second conductive material 163. It will be understood that the conductive structure 132 included in the back-end process structure 130 can contact the second conductive material 163, thereby enabling the second conductive material 163 in the second conductive via 125 to be electrically connected to the front side 101 of the semiconductor device 100. For example, the conductive structure 132 electrically connected to the second conductive material 163 in the second conductive via 125 can be electrically connected to the front side 101 via other conductive structures 132 in other cross-sections. As an example, the conductive path between the second conductive via 125 and the front side 101 can be routed to other cross-sections via one or more redistribution lines or redistribution structures. In some embodiments, the second conductive material 163 in the second conductive via 125 is electrically connected to the front side 101 through one or more conductive structures 132.

[0050] The second upper electrode 172, the second dielectric material 174, and the second lower electrode 176 can extend on the back side 103 of the semiconductor device 100 via traces 166.

[0051] In some embodiments, the first conductive hole 124 may be electrically connected to a first terminal (e.g., conductive element 136) on the front side 101, and the second conductive hole 125 may be electrically connected to a second terminal (e.g., conductive element 136) on the front side 101. Figure 1(Not shown in the cross-section) Electrically connected. As previously described, the terminals on the front side 101 can be electrically connected to various components or power supplies of the semiconductor device 100. As a non-limiting example, the first terminal can be electrically connected to an electrical ground terminal, while the second terminal can be electrically connected to one or more components of the active circuitry system (e.g., one or more capacitors in the front-end process structure 110). In some embodiments of this application, the decoupling capacitor 150 can be configured to store charge during switching of logic loads in the active circuitry system (e.g., transistor device) of the semiconductor device 100 and can control voltage changes in the semiconductor device 100 to stabilize the power supply voltage of the semiconductor device 100 and its components. In some embodiments, the first terminal can be electrically connected to a power line voltage (e.g., VDD voltage), while the second terminal can be electrically connected to a ground line voltage (e.g., VSS voltage). Similarly, as Figure 1 As shown, the electrodes of components such as transistor 120 can also be electrically connected to the terminals on the front side 101 via conductive paths in the back-end process structure 130. In other words, the decoupling capacitor is actually connected in parallel with the nearby transistor, thereby achieving the decoupling effect of stabilizing the voltage.

[0052] Further as Figure 1 As shown, trace 166 is an extension of the capacitor cell on the back side 103 of die 105. Without causing confusion, the three-layer structure of trace 166 extending on the back side of substrate material 106 will be simply referred to below as the upper electrode, dielectric material, and lower electrode of the capacitor cell. That is, in this embodiment, no additional process is required to fabricate trace 166. Figure 1 In the connection area C, the first upper electrode 152 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b are electrically isolated, and the first lower electrode 156 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b are also electrically isolated. In some embodiments, the first upper electrode 152 and the second upper electrode 172 are disconnected, and the first lower electrode 156 and the second lower electrode 176 are disconnected, thereby achieving electrical isolation. When the first upper electrode 152 and the second upper electrode 172 are made of the same material in the same process step, conventional processes such as masking and etching can be used to disconnect the first upper electrode 152 and the second upper electrode 172, and similarly disconnect the first lower electrode 156 and the second lower electrode 176. In some embodiments, the disconnected portion between the first upper electrode 152 and the second upper electrode 172 is filled with a first dielectric material 154 or a second dielectric material 156 to achieve electrical isolation. On the other hand, the first lower electrode 156 and the second upper electrode 172 are electrically connected through a first conductive plug 1111. Figure 1As shown, the first conductive plug 1111 extends longitudinally through the dielectric material between the upper and lower electrodes, and its two ends respectively contact the first lower electrode 156 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b to achieve the purpose of electrically connecting the first lower electrode 156 and the second upper electrode 172.

[0053] In and with Figure 1 In another cross-section, different from the one shown, the first upper electrode 152 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b in region C are electrically connected via the second conductive plug 1112 (to be illustrated in the figure below). And with... Figure 1 Similarly, in this other cross-section, the first upper electrode 152 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b are electrically isolated, and the first lower electrode 156 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b are electrically isolated. The structure of the semiconductor device 100 in region C of different cross-sections will be described in detail below.

[0054] In this way, by utilizing the electrode connection method in region C, the upper and lower electrodes of the two capacitor units are electrically connected alternately in different cross-sections, effectively achieving parallel connection of the two capacitor units. Therefore, by simply connecting the first upper electrode 152 of the first capacitor unit 150a to the front side 101 of the semiconductor device 100, the second lower electrode 176 of the second capacitor unit 150b can also be electrically connected to the front side 101 of the semiconductor device 100. Similarly, by simply connecting the second upper electrode 172 of the second capacitor unit 150b to the front side 101 of the semiconductor device 100, the first lower electrode 156 of the first capacitor unit 150a can also be electrically connected to the front side 101 of the semiconductor device 100. This structure avoids using additional through-silicon vias or through-dies to connect the lower electrode of the capacitor unit to the front side of the semiconductor device, thereby saving die area and providing more space for other components, contributing to device miniaturization and cost savings. Reducing the number of through-silicon vias also reduces the risk of die damage during semiconductor device manufacturing, improving yield. Because the decoupling capacitor 150 is located on the back side 103, the die 105 can provide more space to fabricate the decoupling capacitor 150 compared to conventional semiconductor devices formed in the front-end process structure or on the front side of the semiconductor device. Furthermore, because the decoupling capacitor 150 is formed in the back side 103, it can be manufactured using a less costly and complex process compared to conventional decoupling capacitors formed on the front side. Moreover, because the decoupling capacitor 150 is formed in the back side 103 of the die 105, it does not directly affect the formation process of the active circuit system in the front-end process structure 110. Additionally, since the decoupling capacitor is located within the back side 103 of the die, the distance between the capacitor cell and the transistor can be approximately 10µm. This distance results in lower parasitic inductance and better decoupling effect.

[0055] Figure 2A-2C This is a schematic cross-sectional view of a semiconductor device 100 according to an embodiment of this application. It will be understood that the semiconductor device 100 may include one or more first capacitor cells 150a and one or more second capacitor cells 150b. For example, Figure 2A The semiconductor device 100 may include two first capacitor units 150a. Figure 2B The semiconductor device 100 may include two second capacitor units 150b. Figure 2CThe semiconductor device 100 may include two first capacitor cells 150a and two second capacitor cells 150b. It is understood that the semiconductor device 100 may include more first capacitor cells 150a and more second capacitor cells 150b. On the back side 103 of the semiconductor device 100, the first upper electrodes of the two or more first capacitor cells 150a may be electrically connected, and the first lower electrodes of the two or more first capacitor cells 150a may be electrically connected. The first dielectric material 154 of the two or more first capacitor cells 150a may also be the same material. The first upper electrode of one of the two or more first capacitor cells 150a may be electrically connected to the front side 101 of the semiconductor device 100 through the first conductive material 162 in the first conductive hole 124. Since the first upper electrodes of all the first capacitor cells 150a are electrically connected, the first upper electrodes of all the first capacitor cells 150a can be electrically connected to the front side 101 of the semiconductor device 100.

[0056] Similarly, on the back side 103 of the semiconductor device 100, the second upper electrodes 172 of two or more second capacitor units 150b can be electrically connected, and the second lower electrodes of two or more second capacitor units 150b can be electrically connected. The second dielectric material 174 of the two or more second capacitor units 150b can also be the same material. The second upper electrode 172 of one of the two or more second capacitor units 150b can be electrically connected to the front side 101 of the semiconductor device 100 through the second conductive material 163 in the second conductive hole 125. Since the second upper electrodes of all second capacitor units 150b are electrically connected, the second upper electrodes of all second capacitor units 150b can be electrically connected to the front side 101 of the semiconductor device 100. This application does not limit the number of first capacitor units and the number of second capacitor units.

[0057] Figure 3 The illustration shows a bottom view of a decoupling capacitor in a semiconductor device according to an embodiment of this application. As an example, Figure 3 The decoupling capacitor shown is Figure 2C The decoupling capacitor 150 in the semiconductor device 100 includes two first capacitor units 105a and two second capacitor units 105b, with identical capacitor units electrically connected to each other. Figure 3 As can be seen, the first lower electrodes 156 of the two first capacitor units 150a are connected, and the second lower electrodes 176 of the two second capacitor units 150b are connected. In other embodiments, the lower electrodes of the plurality of first capacitor units can be electrically connected in other ways, for example, through conductive traces, and their connection status is the same as... Figure 3The method shown is similar and will not be discussed here. The upper electrodes of multiple first capacitors can also be... Figure 3 Electrical connection in the manner shown or other ways is not discussed here. In some embodiments, the lower electrodes of two or more capacitor cells of the same type are made of the same material. In some embodiments, the lower electrodes of all capacitor cells are made of the same material.

[0058] See you again Figure 3 The right half shows the first lower electrode 156 of the first capacitor unit 150a connected together, and the left half shows the second lower electrode 176 of the second capacitor unit 150b connected together. The circle on the first lower electrode 152 indicates the location of the first conductive hole 124, and the circle on the second lower electrode 176 indicates the location of the second conductive hole 125. As can be seen from the figure, a first capacitor unit may have one or more first conductive holes above it, and a second capacitor unit may have one or more second conductive holes above it. This application does not limit the number of conductive holes above the same capacitor unit. Furthermore, in a decoupling capacitor having two or more first capacitor units or two or more second capacitor units, since the first upper electrodes of all first capacitor units are electrically connected and the second upper electrodes of all second capacitor units are electrically connected, it is sufficient that one of the two or more first capacitor units has a first conductive hole above it, allowing the first upper electrode of that first capacitor unit to contact the first conductive material in the first conductive hole. This enables the first upper electrode to be electrically connected to the front side of the semiconductor device, thereby enabling the first upper electrodes of all first capacitor units to be electrically connected to the front side of the semiconductor device. Similarly, it is sufficient that one of the two or more second capacitor units has a second conductive hole above it, allowing the second upper electrode of that second capacitor unit to contact the second conductive material in the second conductive hole. This enables the second upper electrode to be electrically connected to the front side of the semiconductor device, thereby enabling the second upper electrodes of all second capacitor units to be electrically connected to the front side of the semiconductor device. This method significantly reduces the number of conductive holes, avoids the use of through-holes penetrating the die, greatly saves space on the die, and facilitates further miniaturization of the semiconductor device. At the same time, reducing the number of conductive holes also reduces the possibility of die damage during the manufacturing process. However, it should be understood that each capacitor cell may have a conductive hole on its top, or some of two or more capacitor cells may have a conductive hole on their top, while others may not have a conductive hole on their top. In other words, the conductive hole is not limited to being on the top of only one capacitor cell, and this application does not impose any limitation on this.

[0059] Refer again Figure 3The area enclosed in the box represents connection region C. This connection region C electrically connects the first upper electrode 152 of the first capacitor unit 150a to the second lower electrode 176 of the second capacitor unit 150b, and also electrically connects the first lower electrode 156 of the first capacitor unit 150a to the second upper electrode 172 of the second capacitor unit 150b. This eliminates the need for additional conductive vias to electrically connect the other electrode in the capacitor, which is farther from the front side, to the front side of the semiconductor device, thus reducing parasitic parameters (parasitic resistance and parasitic inductance). Furthermore, it saves space on the die, facilitating further miniaturization of the semiconductor device.

[0060] Figure 4A yes Figure 3 A magnified view of the connection region C of the semiconductor device. Figure 4B yes Figure 4A The diagram shows a cross-sectional view of the connecting region C along line AA'. Figure 4C yes Figure 4A The diagram shows a cross-sectional view of the connecting area C along line BB'.

[0061] refer to Figure 4BIn the cross-sectional view along line AA', the first lower electrode 156 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b extend towards each other in the x-direction and overlap in the longitudinal direction (z-direction). The first upper electrode 152 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b are disconnected at appropriate positions to avoid the overlapping portion of the first lower electrode 156 and the second upper electrode 172. A conductive plug 1111 penetrating the dielectric material in the z-direction can electrically connect the overlapping first lower electrode 156 and the second upper electrode 172, thereby achieving electrical connection between the entire first lower electrode 156 and the second upper electrode 172. Simultaneously, at section AA', the first upper electrode 152 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b are disconnected at appropriate positions, making the first upper electrode 152 electrically isolated from the second upper electrode 172, and the second lower electrode 176 electrically isolated from the first lower electrode 156. In some embodiments, the first upper electrode 152 and the second upper electrode 172 are electrically isolated by a first dielectric material or a second dielectric material; the second lower electrode 176 and the first lower electrode 156 are electrically isolated by a first dielectric material or a second dielectric material. The first dielectric material and the second dielectric material can be the same material. Therefore, using this longitudinally overlapping structure with a conductive plug, electrical communication between the first lower electrode 156 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b can be achieved at the AA' section of the connection region C, while simultaneously achieving electrical isolation between the first upper electrode 152 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b, and between the first lower electrode 156 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b. The material of the conductive plug 1111 can be the same as the material of the first lower electrode 156. In some embodiments, the material of the first lower electrode 156 can be the same as the material of the second upper electrode 172.

[0062] refer to Figure 4C ,and Figure 4B The method shown is similar, in Figure 4AAt the BB' section of the connection area C shown, the first upper electrode 152 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b extend towards each other in the x-direction, overlapping longitudinally. The first lower electrode 156 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b are stopped at appropriate positions to avoid the overlapping portion of the first upper electrode 152 and the second lower electrode 176. A conductive plug 1112 penetrating the dielectric material in the z-direction electrically connects the overlapping first upper electrode 152 and the second lower electrode 176, thereby achieving electrical connection between the first upper electrode 152 and the second lower electrode 176. Simultaneously, at the BB' section, the first lower electrode 156 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b are disconnected at appropriate positions, resulting in electrical isolation between the first lower electrode 156 and the second lower electrode 176, and electrical isolation between the second upper electrode 172 and the first upper electrode 152. Similarly, in some embodiments, the first upper electrode 152 and the second upper electrode 172 are electrically isolated by a first dielectric material or a second dielectric material; the second lower electrode 176 and the first lower electrode 156 are electrically isolated by a first dielectric material or a second dielectric material. The first dielectric material and the second dielectric material can be the same material. Therefore, using this longitudinally overlapping structure with a conductive plug, electrical communication between the first upper electrode 152 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150b can be achieved at the BB' section of the connection region C, while simultaneously achieving electrical isolation between the first lower electrode 156 of the first capacitor unit 150a and the second lower electrode 176 of the second capacitor unit 150a, and between the first upper electrode 152 of the first capacitor unit 150a and the second upper electrode 172 of the second capacitor unit 150b. The material of the conductive plug 1112 can be the same as the material of the second lower electrode 176. In some embodiments, the material of the second lower electrode 176 can be the same as the material of the first upper electrode 152.

[0063] In this way, connection area C can simultaneously connect the first upper electrode 152 of the first capacitor unit 150a to the second lower electrode 176 of the second capacitor unit 150b, and simultaneously connect the first lower electrode 156 of the first capacitor unit 150a to the second upper electrode 172 of the second capacitor unit 150b. At the same time, the first upper electrode 152 of the first capacitor unit 150a is electrically isolated from the second upper electrode 172 of the second capacitor unit 150b, and the first lower electrode 156 of the first capacitor unit 150a is electrically isolated from the second lower electrode 176 of the second capacitor unit 150b.

[0064] Furthermore, such as Figure 4AAs shown, multiple pairs of the aforementioned longitudinally overlapping conductive plug structures can exist in the connection region C. They can be arranged at intervals in a tooth-like pattern. Furthermore, the shape of the longitudinal overlap of the electrodes in the connection region C is not limited; for example, it can be as follows: Figure 4A The shape shown is rectangular, but it can also be triangular, arc-shaped, or other shapes, as long as the upper and lower electrodes of different capacitor units can overlap vertically.

[0065] refer to Figure 4D The diagram shows a top view of another connection region C. Circles indicate the locations of conductive plugs. It is understood that this connection region C can have only a pair of longitudinally overlapping conductive plugs to electrically connect the first upper electrode of the first capacitor unit to the second lower electrode of the second capacitor unit, and to electrically connect the first lower electrode of the first capacitor unit to the second upper electrode of the second capacitor unit. It is also understood that the shape of the longitudinal overlap is not limited to... Figure 4D The rectangle shown can also be other shapes such as triangles or arcs. By simplifying the structure in the connecting region C, the fabrication process can be simplified and the requirements for process precision can be reduced.

[0066] Further, refer to Figure 4E The diagram shows a top view of another connection region C. This connection region C has, for example, a structure of a pair of longitudinally overlapping conductive plugs. Specifically, the longitudinal overlap of the first upper electrode 152 of the first capacitor unit 150a has two conductive plugs 1112 to electrically connect the first upper electrode 152 of the first capacitor unit 150a to the second lower electrode 176 of the second capacitor unit 150b; and the longitudinal overlap of the second upper electrode 172 of the second capacitor unit 150b has three conductive plugs 1111 to electrically connect the second upper electrode 172 of the second capacitor unit 150b to the first lower electrode 156 of the first capacitor unit 150a. Therefore, it can be understood that this structure of longitudinally overlapping conductive plugs can have one, two, or more conductive plugs to electrically connect the upper electrode of one capacitor unit to the lower electrode of another capacitor unit, thereby achieving better electrical connection. This application does not limit the number of conductive plugs in the longitudinal overlap. Here, "above" and "below" are both described with reference to the Z direction. It can be understood that it can also be referred to above. Figure 4A The described toothed connector C has two or more conductive plugs in its longitudinal extension to electrically connect the opposite electrodes of different capacitor cells. This application does not limit the number of such longitudinally overlapping conductive plugs.

[0067] Figure 5AThis is a schematic cross-sectional view of another first capacitor cell in a decoupling capacitor according to an embodiment of this application. For the sake of brevity, only the structure of this type of first capacitor cell 150a is shown here as an example, and the entire semiconductor device including the first capacitor cell 150a is not shown.

[0068] refer to Figure 5A The first capacitor unit 150a can be electrically isolated from the substrate material 106, for example, by an insulating liner material 148. Its first upper electrode 152 can be electrically connected to a conductive via 124, in which a conductive material 162 electrically couples the first upper electrode 152 to the front side of the semiconductor device.

[0069] The first capacitor unit 150a may include, for example, a first upper electrode 152, a first dielectric material 154 adjacent to the first upper electrode 152, and a first lower electrode 156. Further, the first capacitor unit 150a may also include an intermediate electrode 158 adjacent to the first dielectric material 154, and a dielectric material a154a between the intermediate electrode 158 and the first lower electrode 156. The first upper electrode 152 and the first lower electrode 156 can be electrically connected via a third conductive plug 1113. The intermediate electrode 158 is electrically isolated from the other two electrodes via the first dielectric material 154 and the dielectric material a. Thus, by sharing the intermediate electrode 158, two parallel capacitors are formed, thereby increasing the capacitance of the decoupling capacitor. The first dielectric material 154 and the dielectric material a154a can be the same type of dielectric material or different types of dielectric materials.

[0070] In this type of first capacitor unit 150a, taking HfO2 as an example where both the first dielectric material and dielectric material a are HfO2, given that the relative permittivity of HfO2 is 23, and assuming that the thicknesses of dielectric material a and dielectric material b are both 90 nm, then according to the formula for parallel-plate capacitors, C = ε0εrA / d, the capacitance of this single first capacitor unit a can be calculated to be approximately 200 nF / mm². 2 Where A is the area of ​​the parallel-plate capacitor, and d is the thickness of the parallel-plate capacitor. Currently, the area of ​​a system-on-chip (SOC) in a mobile terminal is generally about 120 mm². 2 Therefore, if the decoupling capacitors including the first capacitor unit 150a described in this application are used, the capacitance that can be accommodated on the back side of the chip can reach up to 24000nF. This allows the decoupling capacitors to be placed closer to the transistors (up to 10µm) without occupying the front side area of ​​the chip, avoiding the generation of large parasitic inductance and achieving better decoupling effect, while also obtaining higher capacitance.

[0071] Figure 5B This is a schematic cross-sectional view of yet another type of first capacitor cell in a decoupling capacitor according to an embodiment of this application. For the sake of brevity, only the structure of this type of first capacitor cell 150a is shown here as an example, and the entire semiconductor device including the first capacitor cell 150a is not shown.

[0072] refer to Figure 5B The first capacitor unit 150a can be electrically isolated from the substrate material 106, for example, by an insulating liner material 148. Its first upper electrode 152 can be electrically connected to a conductive via 124, in which a conductive material 162 electrically couples the first upper electrode 152 to the front side of the semiconductor device.

[0073] The first capacitor unit 105a may include, for example, a first upper electrode 152, a first dielectric material 154 adjacent to the first upper electrode 152, and a first lower electrode 156. Further, the first capacitor unit 150a may also include a dielectric material b 154b adjacent to the first dielectric material 154. The first dielectric material 154 and the dielectric material b 154b may be different dielectric materials. Thus, by providing two dielectric material layers of different materials, the capacitance of the decoupling capacitor can be increased. It is understood that the dielectric material between the upper and lower electrodes may include multiple layers composed of different materials, not just two layers. In this way, a capacitor unit with multiple dielectric material layers stacked together can have a higher breakdown voltage and therefore better reliability.

[0074] Figure 6 Formation based on embodiments of this application Figure 1 A flowchart of a method for developing semiconductor devices. Figures 7A to 7E To and Figure 6 Correspondingly formed according to the description of the embodiments of this application. Figure 1 A schematic cross-sectional view of the semiconductor device structure 200 in the method of semiconductor device 100. For simplicity, the first conductive material 162 and the second conductive material 163 in this embodiment are made of the same material. The upper electrode, dielectric material, and lower electrode of the two capacitor units are all made of the same material. Moreover, the material of the first upper electrode 152 can be the first conductive material.

[0075] The following is combined Figure 6 and Figures 7A-7E This will explain in detail the methods for forming semiconductor devices.

[0076] Step 601: Form one or more components of an integrated circuit system in the substrate material of the die.

[0077] refer to Figure 7AThe semiconductor device structure 200 includes a front-end process structure 110 comprising a substrate material 106. The front-end process structure 110 can be referenced above. Figure 1 The described front-end process structures are basically the same.

[0078] An active circuit system can be formed within and adjacent to a substrate material 106. This active circuit system can be formed using conventional techniques and processes. For example... Figure 7A As shown, one or more transistors 112 are formed in the substrate material 106 during the front-end process.

[0079] Step 602: Form a first conductive hole and a second conductive hole in the substrate material from the first side of the die.

[0080] Refer again Figure 7A A first conductive hole 124 and a second conductive hole 125 can be formed in the substrate material 106. The conductive holes do not need to penetrate the entire substrate material, but only need to reach a certain depth so that the upper electrode of the subsequently fabricated decoupling capacitor can contact the conductive hole. The depth of the conductive holes can be determined according to the depth of the capacitor cell of the decoupling capacitor in the actual application, and this application does not impose any limitations on it.

[0081] Furthermore, in some embodiments, the first conductive via 124 and the second conductive via 125 may be formed before the formation of the active circuit system (i.e., including transistor 112) in the front-end process structure 110. In other embodiments, the first conductive via 124 and the second conductive via 125 may be formed after the formation of the active circuit system but before the formation of the back-end process structure 130. This application does not limit the timing of the formation of the conductive vias. (See reference...) Figure 7B After the front-end process structure 110 is formed, the rear-end process structure 130 can be formed adjacent to the front-end process structure 110. This rear-end process structure 130 is similar to the one described above. Figure 1The described back-end process structure 130 is substantially the same. The first conductive via 124 and the second conductive via 125 can be filled with a first conductive material 163 before forming the back-end process structure 130. The back-end process structure 130 may, for example, include a plurality of metallization structures M1-M4 formed adjacent to (e.g., above) the front-end process structure 110. For example, the formation process of the first metallization structure M1 is as follows: a dielectric material 134 is formed above the front-end process structure 110, an opening is formed in the dielectric material 134, and then a conductive structure 132 is formed in the opening. A desired number of metallization structures M2, M3, and M4 can be formed layer by layer above and adjacent to the metallization structure M1, thus forming the back-end process structure 130 adjacent to the front-end process structure 110, through which electrical pathways can be routed to desired locations within the semiconductor device structure 200. These metallization structures M1, M2, M3, and M4 can be formed using conventional fabrication techniques. The number of metallization structures in the semiconductor device structure is not limited to the number shown in the figure; that is, a multilayer metallization structure can be fabricated as needed. After forming the desired number of metallization structures M1, M2, M3, and M4, conductive elements 136 or other conductive structures can be formed on the exposed surface of the semiconductor device structure 200 as conductive terminals, which can be used to connect to power supply voltage or ground voltage.

[0082] Step 603: Form a first recess and a second recess in the substrate material from the second side of the die to expose a portion of the first conductive hole and a portion of the second conductive hole, respectively.

[0083] refer to Figure 7C After forming the back-end process structure 130, the back side 103 of the substrate material 106 can be processed. In some embodiments, the substrate material 106 is thinned, which can be done by removing a portion of the substrate material 106, such as by chemical mechanical planarization (CMP). Generally, the thickness of the substrate material 106 is approximately 775 μm. The thickness of the substrate material 106 after thinning can be 30-300 μm. Methods for removing a portion of the substrate material 106 can include etching, planarization (e.g., chemical-mechanical planarization), or other known methods. After thinning the substrate material 106 to the desired thickness, recesses 204 and 205 can be formed in the substrate material 106 to communicate with the first conductive via 124 and the second conductive via 125, respectively, i.e., exposing a portion of the first conductive via 124 and a portion of the second conductive via 125. The following example illustrates how the recesses can be formed. A mask material (e.g., a photomask) can be formed on the surface of the substrate material 106, and openings corresponding to the positions of the recesses 204 and 205 can be formed in the formed mask material. The recesses 204 and 205 can then be formed through the mask material using, for example, an etching process.

[0084] Step 604: An insulating liner material is formed on the surface of the base material within the first and second recesses and between the first and second recesses.

[0085] After forming recesses 204 and 205, an insulating liner material 148 can be formed within recesses 204 and 205. The insulating liner material 148 is also formed on the base material 106 between recesses 204 and 205. This insulating liner material 148 can be formed using the conventional techniques described above. After forming the insulating liner material 148, a portion of the insulating liner material 148 corresponding to the positions of the first conductive hole 124 and the second conductive hole 125 can be removed to expose the first conductive material 162 in the first conductive hole 124 and the first conductive material in the second conductive hole 125, such as... Figure 7C As shown.

[0086] Step 605: Form a first capacitor unit in the first recess and form a second capacitor unit in the second recess.

[0087] refer to Figure 7D A first conductive material can be formed within the recesses 204 and 205, and this first conductive material can be patterned in the connection area c on the back side of the die to disconnect the first conductive material, thereby forming a first upper electrode 152 of the electrically isolated first capacitor unit and a second upper electrode 172 of the second capacitor unit. Due to the above-described step of exposing the conductive material in the conductive hole, the conductive material formed in the two recesses can respectively contact the conductive material previously filled in the conductive hole to achieve electrical connection. In some embodiments, the conductive material in the conductive hole and the conductive material deposited in the recess can be different materials. In addition, the first conductive material is also formed on the surface of the insulating liner material 148 between the recesses 204 and 205. As a non-limiting example, the first conductive material can be formed by one or more of the following techniques: spin coating, blanket coating, chemical vapor deposition (CVD), atomic layer deposition (ALD), plasma-enhanced ALD, physical vapor deposition (PVD), plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD). This application does not limit the manner in which the first conductive material is formed. After the first conductive material is formed, an upper electrode structure can be formed (e.g., by patterning and etching) in the connection region C, for example... Figure 3The disconnected upper electrode structure in the capacitor allows the first upper electrode 152 and the second upper electrode 172 of the two capacitor units to be electrically isolated from each other. Furthermore, both the first upper electrode 152 and the second upper electrode 172 prepared as described above may include a surface extending along the sidewall of the insulating liner material 148 of the recesses 204 and 205, which helps to increase the capacitance per unit area and enables them to form electrical communication with the electrodes in the connection area, respectively.

[0088] After depositing and patterning the first upper electrode 152 and the second upper electrode 172, a first dielectric material 154 can be formed below the first conductive material (i.e., the upper electrode of the capacitor cell) within the recesses 204 and 205. The first dielectric material 154 may include the first dielectric material 154 referenced above (see above). Figure 1 One or more of the materials described herein. As an example, the dielectric material 154 may be a high-k dielectric material. As mentioned above, for simplicity, the first capacitor unit 150a and the second capacitor unit 150b may use the same first dielectric material 154. It is understood that the first dielectric materials of the first capacitor unit 150a and the second capacitor unit 150b may be different. In some embodiments, the thickness of the first dielectric material may be 10-500 nm. The first dielectric material 154 may be formed by one or more of the methods described above for forming conductive materials, which will not be repeated here. Subsequently, in the connection region C, an opening for accommodating a conductive plug may be formed in the first dielectric material 154 using conventional methods. For example, in some embodiments, in the connection region C, a mask material may be formed on the surface of the first dielectric material 154, and the mask material may be patterned at a position corresponding to the location of the conductive plug, and the first dielectric material 154 may be etched to form an opening for accommodating the conductive plug. The portions of the first dielectric material 154 exposed by the patterned mask material may be removed in the following manner. For example, the first dielectric material 154 can be removed by exposing portions of the first dielectric material 154 to one or more of hydrofluoric acid or dry etchants, including, for example, sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), oxygen, trifluoromethane (also known as fluoroform; CHF3), hexafluoroethane (C2F6), perfluoropropane (C3F8), or perfluorocyclopentene (also known as octafluorocyclopentene; C5F8).

[0089] refer to Figure 7EAfter forming the first dielectric material 154 and the opening at the location of the conductive plug, a third conductive material can be formed below the first dielectric material 154 within and between the recesses 204 and 205, thereby forming the first lower electrode 156 and the second lower electrode 176, respectively. In some embodiments, the conductive plug can be formed simultaneously with the formation of the third conductive material, so the material of the conductive plug is the same as the third conductive material forming the lower electrode. The third conductive material here can be formed by one or more of the methods described above for forming the first conductive material, which will not be elaborated here. In other embodiments, the third conductive material here can also be formed by electrochemical deposition (ECD) or by electrochemical deposition plating. After forming the third conductive material, the lower electrode structure in the connection region C can then be formed (e.g., by patterning and etching), such that the lower electrodes of the two capacitor cells are disconnected from each other, thereby electrically isolating the first lower electrode 156 and the second lower electrode 176 of the two capacitor cells from each other. Thus, after the first lower electrode 156 and the second lower electrode 176 are formed, the formation of a decoupling capacitor 150 including a first capacitor unit 105a and a second capacitor unit 105b in the back side 103 of the semiconductor device structure 200 is completed.

[0090] Furthermore, in some embodiments, a bottom dielectric material 182 may also be formed on the surface of the finally formed third conductive material. Figure 1 (Not shown in the image) to isolate the lower electrode of the capacitor unit, the bottom dielectric material 182 may be the first dielectric material 154 mentioned above (not shown in the image) Figure 1 One or more of the materials described herein. As an example, the bottom dielectric material 182 may be a high-k dielectric material. In some embodiments, the bottom dielectric material 182 may be the same material as the first dielectric material 154. The bottom dielectric material 182 may be formed by one or more of the methods described above for forming conductive materials, which will not be repeated here. It will be understood that in some embodiments, the bottom dielectric material 182 and the first dielectric material 154 may be different types of materials.

[0091] Although the decoupling capacitor 150 with a specific configuration has been described and illustrated in the preceding figures, this application is not limited thereto. It will be understood that the back side 103 of the die 105 may include any number of decoupling capacitors 150, which may include at least one first capacitor cell 150a and at least one second capacitor cell 150b. In some embodiments, the back side 103 of the die 105 may include one decoupling capacitor 150, which may include any number of first capacitor cells 150a and any number of second capacitor cells 150b. Wherein, the first upper electrodes of all first capacitor cells are electrically connected, the first lower electrodes of all first capacitor cells are electrically connected, and the second upper electrodes of all second capacitor cells are electrically connected, and the second lower electrodes of all second capacitor cells are electrically connected. It is sufficient that the first upper electrode of one first capacitor cell is electrically connected to the front side of the semiconductor device, and the second upper electrode of one second capacitor cell is electrically connected to the front side of the semiconductor device, and that the first upper and first lower electrodes of one first capacitor cell are cross-connected to the second upper and second lower electrodes of one second capacitor cell through a longitudinally overlapping structure with conductive plugs in the connection area. In addition, the first capacitor unit may also have the aforementioned reference. Figure 5A and Figure 5B The configuration is designed to increase the amount of capacitance. In some embodiments, the first upper electrode of a plurality of first capacitor cells in the decoupling capacitor is electrically connected to the front side of the semiconductor device, and / or the second upper electrode of a plurality of second capacitor cells in the decoupling capacitor is electrically connected to the front side of the semiconductor device. In some embodiments, the first conductive via and the second conductive via may be positioned relative to... Figure 1 and Figure 2A-2C The figures show different cross-sections. In some embodiments, one or more first conductive holes may be included above the first capacitor unit, and one or more second conductive holes may be included above the second capacitor unit.

[0092] In some embodiments, an integrated circuit system is provided, which includes a semiconductor device having the semiconductor device structure described above. The integrated circuit system including the semiconductor device of the embodiments of this application can adopt various configurations, and this application does not limit the form of the integrated circuit system.

[0093] In some embodiments, an electronic device is also provided, comprising an integrated circuit system having the above-described semiconductor device structure. The electronic device provided in this application embodiment may be a mobile phone, computer, tablet computer, personal digital assistant (PDA), in-vehicle computer, television, smart wearable device, smart home device, etc. Figure 8As shown, an example of this electronic device is illustrated using a mobile phone as an example. The mobile phone 800 includes an integrated circuit system 801 having the semiconductor device structure described in the embodiments of this application. It is understood that the mobile phone 800 may also include various other components. The embodiments of this application do not limit the number, location, or form of the integrated circuit system in the mobile phone, nor do they limit the specific form of the above-mentioned electronic device.

[0094] Throughout this application, "above"

[0095] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A semiconductor device comprising: a die comprising a first side and a second side opposite the first side; a decoupling capacitor within the second side of the die and comprising a first capacitor cell and a second capacitor cell disposed laterally apart; wherein the first capacitor cell comprises a first upper electrode and a first lower electrode; the second capacitor cell comprises a second upper electrode and a second lower electrode; wherein the first upper electrode is in electrical communication with the second lower electrode and the first lower electrode is in electrical communication with the second upper electrode comprises: the first upper electrode is in electrical communication with the second lower electrode through one or more first electrically conductive plugs, and the second upper electrode is in electrical communication with the first lower electrode through one or more second electrically conductive plugs; wherein the first upper electrode and the second lower electrode extend toward each other to a first longitudinal overlap, the first electrically conductive plugs pass through a first dielectric material or a second dielectric material between the first upper electrode and the second lower electrode in the first longitudinal overlap, the first electrically conductive plugs contact the first upper electrode and the second lower electrode at opposite ends of the first electrically conductive plugs, respectively; and the first lower electrode and the second upper electrode extend toward each other to a second longitudinal overlap, the second electrically conductive plugs pass through a first dielectric material or a second dielectric material between the first lower electrode and the second upper electrode in the second longitudinal overlap, the second electrically conductive plugs contact the first lower electrode and the second upper electrode at opposite ends of the second electrically conductive plugs, respectively; a first electrically conductive via between the first capacitor cell and the first side filled with a first electrically conductive material that electrically communicates the first upper electrode of the first capacitor cell with the first side of the semiconductor device; a second electrically conductive via between the second capacitor cell and the first side filled with a second electrically conductive material that electrically communicates the second upper electrode of the second capacitor cell with the first side of the semiconductor device.

2. The semiconductor device of claim 1, wherein the first electrically conductive via is directly adjacent to the first upper electrode of the first capacitor cell, the first electrically conductive material contacts the first upper electrode of the first capacitor cell; and the second electrically conductive via is directly adjacent to the second upper electrode of the second capacitor cell, the second electrically conductive material contacts the second upper electrode of the second capacitor cell.

3. The semiconductor device of claim 1, wherein there is a base material between the first side and the second side of the die, the base material has one or more components of integrated circuitry within the base material.

4. The semiconductor device of claim 1, wherein the first capacitor cell comprises a first dielectric material between the first upper electrode and the first lower electrode; the second capacitor cell comprises a second dielectric material between the second upper electrode and the second lower electrode.

5. The semiconductor device of claim 4, wherein the first dielectric material and the second dielectric material are the same material.

6. The semiconductor device of claim 4, wherein: ​ the first upper electrode is electrically isolated from the second upper electrode by the first dielectric material or the second dielectric material; and the first lower electrode is electrically isolated from the second lower electrode by the first dielectric material or the second dielectric material.

7. The semiconductor device of claim 1, wherein the first longitudinal overlap and the second longitudinal overlap are disposed in a pinched configuration.

8. The semiconductor device of any of claims 1-7, further comprising a third capacitor cell, the third capacitor unit includes a third upper electrode, a third lower electrode, and a third dielectric material between the third upper electrode and the third lower electrode; wherein a third upper electrode of the third capacitor cell is in electrical communication with the first upper electrode of the first capacitor cell and a third lower electrode of the third capacitor cell is in electrical communication with the first lower electrode of the first capacitor cell; or a third upper electrode of the third capacitor cell is in electrical communication with the second upper electrode of the second capacitor cell and a third lower electrode of the third capacitor cell is in electrical communication with the second lower electrode of the second capacitor cell.

9. The semiconductor device of claim 8, wherein the first capacitor cell comprises a first dielectric material between the first upper electrode and the first lower electrode; the second capacitor cell comprises a second dielectric material between the second upper electrode and the second lower electrode; the first dielectric material, the second dielectric material, and the third dielectric material individually comprise one of silicon dioxide, hafnium oxide, tantulum oxide, and zirconium oxide.

10. The semiconductor device of claim 9, wherein the first dielectric material, the second dielectric material, and the third dielectric material are the same material.

11. The semiconductor device of claim 8, wherein the first upper electrode, the second upper electrode, and the third upper electrode are made of the same material; and the first lower electrode, the second lower electrode, and the third lower electrode are made of the same material.

12. The semiconductor device of any of claims 1-7, wherein the first upper electrode is made of a first conductive material, and the second upper electrode is made of a second conductive material.

13. The semiconductor device of any of claims 1-7, the first capacitor cell comprises a first dielectric material between the first upper electrode and the first lower electrode; the second capacitor cell comprises a second dielectric material between the second upper electrode and the second lower electrode; the first capacitor cell further comprises an intermediate electrode, the first dielectric material is between the first upper electrode and the intermediate electrode, and there is a dielectric material a between the intermediate electrode and the first lower electrode, wherein the first upper electrode and the first lower electrode are in electrical communication.

14. The semiconductor device of any of claims 1-7, the first capacitor cell further comprises a dielectric material b between the first dielectric material and the first lower electrode, wherein the first dielectric material and the dielectric material b are different materials.

15. The semiconductor device of claim 8, wherein The first upper electrode, the second upper electrode, and the third upper electrode each include a sidewall extending in a direction substantially perpendicular with respect to a major surface of the base material.

16. Integrated circuitry comprising the semiconductor device of any of the preceding claims.

17. An electronic device comprising the integrated circuitry of claim 16.

18. A method of fabricating a semiconductor device, the semiconductor device being the semiconductor device of any of claims 1-15; the method comprising: forming one or more components of integrated circuitry in a base material of a die; forming a first conductive via and a second conductive via in the base material from a first side of the die; forming a first recess and a second recess in the base material from a second side of the die to respectively expose a portion of the first conductive via and a portion of the second conductive via; forming an insulating liner material within the first recess and the second recess and a surface of the base material between the first recess and the second recess; and forming a first capacitor cell within the first recess and a second capacitor cell within the second recess.

19. The method of claim 18, wherein, prior to forming a first recess and a second recess in the base material from a second side of the die to expose a portion of the first conductive via and a portion of the second conductive via, filling the first conductive via with a first conductive material, and filling the second conductive via with a second conductive material.

20. The method of claim 18, wherein the first conductive material and the second conductive material are the same material.

21. The method of any of claims 18-20, wherein, prior to forming a first recess and a second recess in the base material from a second side of the die to expose a portion of the first conductive via and a portion of the second conductive via, thinning the base material.

22. The method of any of claims 18-20, wherein forming a first capacitor cell within the first recess and a second capacitor cell within the second recess comprises: forming an opening in the insulating liner material within the first recess and the second recess to respectively expose a portion of the first conductive via and a portion of the second conductive via; forming a first conductive material adjacent to the insulating liner material; patterning and removing a portion of the first conductive material between the first recess and the second recess; forming a first dielectric material adjacent to the first conductive material; forming a conductive plug opening in the first dielectric material to expose the first conductive material; forming a third conductive material adjacent to the first dielectric material and filling the conductive plug opening; patterning and removing another portion of the third conductive material.

23. The method of claim 22, further comprising: after forming a first capacitor cell within the first recess and a second capacitor cell within the second recess, forming a bottom dielectric material adjacent to the third conductive material.

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