Imaging device and electronic device

CN117410301BActive Publication Date: 2026-11-03SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
CN202311354630.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-03-18
Filing Date
2021-01-28
Publication Date
2026-11-03
Estimated Expiration
2041-01-28

AI Technical Summary

Technical Problem

The uneven thickness of the gate insulating film on the inner wall of the hole inside the semiconductor substrate leads to low charge transport efficiency. In particular, the difference in film thickness caused by the different thermal oxidation rates of the (110) and (100) planes forms a potential barrier, which hinders charge transport.

Method used

The vertical transistor of the imaging device is designed such that the cross-section of the first gate electrode is along the crystal orientation of the semiconductor substrate. <100> The structure is elongated, with a thicker portion of the gate insulating film near the end along the long axis, and thick film regions are provided at the source and drain terminals to counteract the potential barrier and improve charge transport efficiency.

Benefits of technology

By optimizing the thickness distribution of the gate insulating film, the influence of the potential barrier is reduced, the charge transfer efficiency is improved, and the performance of the imaging device is enhanced.

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Abstract

An imaging device and an electronic device having high charge transport efficiency are provided. The imaging device is provided with a semiconductor substrate and a vertical transistor provided on the semiconductor substrate. The semiconductor substrate is provided with a hole portion that is open on a first main plane side. The vertical transistor includes a first gate electrode and a first gate insulating film, the first gate electrode is provided in the hole portion, and the first gate insulating film is provided between an inner wall of the hole portion and the first gate electrode. A cross section of the first gate electrode taken along a plane parallel to the first main plane has an elongated shape in a <100> crystal direction direction of the semiconductor substrate.
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Description

[0001] This application is a divisional application of the Chinese national phase application of PCT application filed on January 28, 2021, with international application number PCT / JP2021 / 003105 and invention title "Imaging Apparatus and Electronic Device". The entry date of the Chinese national phase application was September 7, 2022, with application number 202180019697.5. Technical Field

[0002] This disclosure relates to imaging devices and electronic devices. Background Technology

[0003] In solid-state imaging devices that include a photodiode and a transistor that reads the charge converted by the photodiode, a configuration is known in which a transfer transistor for transferring charge is arranged vertically (e.g., refer to PTL 1) to reduce the area occupied by the device and increase the light-receiving area of ​​the photodiode. The vertical transistor includes: a hole formed in a semiconductor substrate; a gate insulating film formed to cover the inner wall of the hole; and a gate electrode formed to fill the interior of the hole via the gate insulating film.

[0004] [List of Citations]

[0005] [Patent Literature]

[0006] [PTL 1]

[0007] JP 2011-14751A Summary of the Invention

[0008] [Technical Issues]

[0009] The inner walls of holes formed inside semiconductor substrates have various crystal planes. Representative crystal planes of semiconductor materials (e.g., Si) include the (110) plane and the (100) plane, which is tilted at 45 degrees relative to the (110) plane. Due to the different thermal oxidation rates of the (110) and (100) planes, a difference in film thickness arises in the gate insulating film formed on the inner walls of the holes, depending on the crystal plane. This difference in film thickness may act as a barrier and inhibit charge transport.

[0010] This disclosure is made in view of this situation, and its purpose is to provide imaging devices and electronic devices with excellent charge transport efficiency.

[0011] [Solution to the problem]

[0012] An imaging apparatus according to one aspect of the present disclosure includes: a semiconductor substrate; and a vertical transistor disposed on the semiconductor substrate, wherein the semiconductor substrate has a hole opening on a first main plane side, the vertical transistor has a first gate electrode disposed within the hole and a first gate insulating film disposed between the inner wall of the hole and the first gate electrode, and the cross section of the first gate electrode cut along a plane parallel to the first main plane has a crystal orientation in the semiconductor substrate. <100> A slender shape in the direction of.

[0013] Therefore, the plane of (110), in which a thicker first gate insulating film is formed between the inner walls of the aperture, is positioned near the end of the cross-section of the first gate electrode cut along a plane parallel to the first main plane in the long axis direction. Furthermore, through thermal oxidation of the plane of (110), a thick portion of the first gate insulating film is formed near the end in the long axis direction. By providing regions (thick film regions) at the source and drain terminals of the vertical transistor that contact the thick film portion in the semiconductor substrate, the potential barrier generated in the thick film region can be offset and reduced by each potential gradient generated at the source and drain terminals. Therefore, the charge e of the vertical transistor can be increased. - Transmission efficiency.

[0014] An electronic device according to one aspect of the present disclosure includes: an optical component; an imaging device into which light transmitted through the optical component is incident; and a signal processing circuit configured to process a signal output from the imaging device, wherein the imaging device includes: a semiconductor substrate; and a vertical transistor disposed in the semiconductor substrate, the semiconductor substrate having a hole opening on a first main plane side, the vertical transistor having a first gate electrode disposed inside the hole and a first gate insulating film disposed between the inner wall of the hole and the first gate electrode, and the cross-section of the first gate electrode cut along a plane parallel to the first main plane having a crystal orientation in the semiconductor substrate. <100> It has an elongated shape in the direction of the image. Therefore, it is possible to provide electronic devices that include imaging devices with excellent charge transport efficiency. Attached Figure Description

[0015] Figure 1 This is a diagram illustrating an example configuration of an imaging apparatus according to an embodiment of the present disclosure.

[0016] Figure 2 This is a plan view illustrating an example of a pixel-sharing structure of an imaging apparatus according to an embodiment of the present disclosure.

[0017] Figure 3 This is a plan view illustrating an example configuration of pixels according to an embodiment of the present disclosure.

[0018] Figure 4 This is a cross-sectional view illustrating an example of pixel configuration according to an embodiment of the present disclosure.

[0019] Figure 5 This is a cross-sectional view illustrating a first configuration example of the first gate electrode and the first gate insulating film according to an embodiment of the present disclosure.

[0020] Figure 6 This is a cross-sectional view illustrating a second configuration example of the first gate electrode and the first gate insulating film according to an embodiment of the present disclosure.

[0021] Figure 7 This is a schematic diagram illustrating the potential distribution of a semiconductor substrate in the periphery of a first gate electrode according to an embodiment of the present disclosure.

[0022] Figure 8 This is a cross-sectional view showing the configuration of the first gate electrode and the first gate insulating film according to a comparative example of the present disclosure.

[0023] Figure 9 This is a schematic diagram showing the potential distribution around the first gate electrode of a semiconductor substrate according to a comparative example of the present disclosure.

[0024] Figure 10 This is a plan view illustrating the pixel configuration of a first variant of an embodiment according to the present disclosure.

[0025] Figure 11 This is a plan view illustrating the pixel configuration of a second variation of an embodiment according to the present disclosure.

[0026] Figure 12 This is a plan view illustrating the pixel configuration of a third variation of an embodiment according to the present disclosure.

[0027] Figure 13 This is a plan view illustrating the pixel configuration of a fourth variation of an embodiment according to the present disclosure.

[0028] Figure 14 This is a plan view illustrating the pixel configuration of a fifth variation of an embodiment according to the present disclosure.

[0029] Figure 15 This is a conceptual diagram illustrating an example of the application of the technology (the technology) according to this disclosure to an electronic device.

[0030] Figure 16 This is a diagram illustrating an example of a schematic configuration of an endoscopic surgical system to which the technology (the technology) according to this disclosure can be applied.

[0031] Figure 17 It shows Figure 16 A block diagram illustrating an example of the functional configuration of the camera head and CCU.

[0032] Figure 18This is a block diagram illustrating a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to this disclosure can be applied.

[0033] Figure 19 This is a diagram showing an example of the mounting location of the imaging unit. Detailed Implementation

[0034] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. In the description of the drawings referred to below, the same or similar parts are labeled with the same or similar reference numerals. However, it should be noted that the drawings are schematic and the relationships between thickness and planar dimensions, the thickness ratios of each layer, etc., differ from actual dimensions. Therefore, specific thicknesses and dimensions should be determined by considering the following description. Furthermore, it goes without saying that the drawings also include parts with different dimensional relationships and ratios.

[0035] Furthermore, it should be understood that the definitions of direction (such as up and down) in the following description are merely for the sake of brevity and are not intended to limit the technical concept of this disclosure. For example, it is apparent that when viewing an object after a 90-degree rotation, up-down is converted to and interpreted as left-right, and when viewing an object after a 180-degree rotation, up-down is interpreted as inverted.

[0036] Furthermore, in the following description, "plan view" refers to a view of the surface 111a of the semiconductor substrate 111, which will be described later, in the normal direction.

[0037] <Example>

[0038] (General configuration example)

[0039] Figure 1 This is a diagram illustrating an example configuration of an imaging apparatus 100 according to an embodiment of the present disclosure. Figure 1 The imaging device 100 shown is, for example, a CMOS solid-state imaging device. Figure 1 As shown, the imaging device 100 is configured to have a pixel region (so-called imaging region) 103 (including pixels 102, which are multiple photoelectric conversion elements, arranged regularly in two dimensions) and a peripheral circuit portion on a semiconductor substrate 111 (e.g., a silicon substrate). Pixels 102 are configured to have photodiodes serving as photoelectric conversion elements and multiple pixel transistors (so-called MOS transistors). The multiple pixel transistors can be composed of three transistors, including a transfer transistor, a reset transistor, and an amplification transistor. Alternatively, the multiple pixel transistors can be composed of four transistors by adding a selective transistor to the aforementioned three transistors. Since the equivalent circuitry per unit pixel is the same as usual, its detailed description will be omitted.

[0040] Pixel 102 may also have a shared pixel structure. The shared pixel structure consists of multiple photodiodes, multiple transmission transistors, a shared floating diffuser, and each of the other shared pixel transistors. In other words, in the shared pixel structure, the photodiodes and transmission transistors constituting multiple unit pixels are configured to share each of the other pixel transistors except for the transmission transistor.

[0041] The peripheral circuitry includes a vertical drive circuit 104, a column signal processing circuit 105, a horizontal drive circuit 106, an output circuit 107, and a control circuit 108.

[0042] The control circuit 108 receives data such as an input clock and an indication of the operating mode, and outputs data such as internal information of the imaging device. Specifically, the control circuit 108 generates clock signals and control signals based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock, which serve as references for the operation of the vertical drive circuit 104, the column signal processing circuit 105, the horizontal drive circuit 106, and so on. Furthermore, the control circuit 108 inputs these signals to the vertical drive circuit 104, the column signal processing circuit 105, the horizontal drive circuit 106, and so on.

[0043] The vertical driving circuit 104, for example, is composed of a shift register, selects a pixel driving line, provides pulses for driving the pixels to the selected pixel driving line, and drives the pixels in each row. That is, the vertical driving circuit 104 sequentially selects and scans each pixel 102 in the pixel region 103 in the vertical direction for each row, and provides a pixel signal based on the signal charge generated according to the amount of light received in the photoelectric conversion element of each pixel 102 to the column signal processing circuit 105 via the vertical signal line 109.

[0044] For example, a column signal processing circuit 105 is provided for each column of pixels 102, and signal processing, such as noise reduction, is performed on the signals output from the pixels 102 in each row of pixels. That is, the column signal processing circuit 105 performs signal processing (such as CDS for removing fixed pattern noise specific to the pixels 102), signal amplification, and AD conversion. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 105 to connect between the output stage and the horizontal signal line 110.

[0045] The horizontal drive circuit 106, for example, is composed of a shift register, which sequentially selects each column signal processing circuit 105 by sequentially outputting horizontal scan pulses, and outputs pixel signals from each column signal processing circuit 105 to the horizontal signal line 110.

[0046] Output circuit 107 performs signal processing on signals sequentially provided from each column signal processing circuit 105 via horizontal signal line 110 and outputs the processed signal. For example, output circuit 107 may perform only buffering, or it may perform black level adjustment, column change correction, various types of digital signal processing, etc. Input / output terminal 112 exchanges signals with external devices.

[0047] (Pixel configuration example)

[0048] Figure 2 This is a plan view illustrating an example of a pixel-sharing structure of an imaging apparatus 100 according to an embodiment of the present disclosure. Figure 2 As shown in the imaging apparatus 100, a total of four pixels 102, including, for example, two pixels 102 arranged in a vertical direction and two pixels 102 arranged in a horizontal direction, constitute a shared pixel structure. A shared pixel structure includes four photodiodes PD (an example of a "photoelectric conversion unit" according to this disclosure), four transmission transistors Tr (an example of a "vertical transistor" according to this disclosure), a shared floating diffuser FD (an example of an "electric field holding unit" according to this disclosure), a shared selective transistor (not shown), a shared reset transistor (not shown), and a shared amplifying transistor (not shown).

[0049] A floating diffuser (FD) is disposed in the center of four pixels 102 constituting a shared pixel structure. The gate electrode GE of the transfer transistor Tr is disposed near the floating diffuser FD. Each gate electrode GE of the four pixels 102 is arranged to surround a floating diffuser FD in a planar view. A pixel separator 120 is disposed on the periphery of each pixel 102. The pixel separator 120 is constructed of, for example, an impurity diffusion layer of a conductivity type different from that of the semiconductor substrate 111, deep trench isolation, etc.

[0050] exist Figure 2 In the diagram, the surface 101a of the semiconductor substrate 111 is shown above the plane of the paper. This semiconductor substrate 111 is provided with a multilayer wiring layer (not shown) consisting of multiple wiring layers and multiple interlayer insulating films. On the other hand, in the direction perpendicular to the plane of the paper... Figure 2 The direction above the paper plane indicates the rear surface side of the semiconductor substrate 111, which is a light-incident surface into which light is incident and is provided with an on-chip lens, a color filter, etc. (neither of which are shown). The imaging device 100 is a back-illuminated CMOS image sensor that performs photoelectric conversion on light incident from the rear surface side of the semiconductor substrate 111.

[0051] Figure 3 This is a plan view illustrating an example configuration of pixel 102 according to an embodiment of the present disclosure. Figure 4This is a cross-sectional view showing an example configuration of pixel 102 according to an embodiment of the present disclosure. Figure 4 schematically showing along Figure 3 The cross-section cut by line A3-A'3 in the diagram. Semiconductor substrate 111 is, for example, a single-crystal silicon substrate or a single-crystal silicon layer formed on a substrate (not shown) by epitaxial growth. Figure 4 As shown, the conductivity type of the semiconductor substrate 111 is, for example, P-type.

[0052] like Figure 3 and Figure 4 As shown, a photodiode PD is disposed inside a P-type semiconductor substrate 111. The photodiode PD is, for example, formed of an N-type impurity diffusion layer. The photodiode PD performs photoelectric conversion on incident light incident from the rear surface side of the semiconductor substrate 111 and accumulates the acquired charge e. - .

[0053] The transfer transistor Tr is positioned from the interior of the semiconductor substrate 111 to the top of surface 111a (an example of the "first main plane" according to this disclosure). For example, the transfer transistor Tr is an N-type vertical transistor having a gate electrode GE and a gate insulating film 1 disposed between the gate electrode GE and the semiconductor substrate 111, and using a photodiode PD as the source and a floating diffuser FD as the drain. The transfer transistor Tr transfers charge e - Transfer from photodiode (PD) to floating diffuser (FD).

[0054] A floating diffusion FD is disposed on the surface 111a side of the semiconductor substrate 111 and is composed of, for example, an N-type impurity diffusion layer. The floating diffusion FD retains the charge e that has been transferred from the transfer transistor Tr. - .

[0055] The structure of the transmission transistor Tr will now be described in more detail. The semiconductor substrate 111 has a hole H1 that opens towards surface 111a and is adjacent to the photodiode PD. The gate electrode GE has a first gate electrode VG and a second gate electrode TG. The first gate electrode VG is disposed within the hole H1 via a first gate insulating film 11 and is configured to extend longitudinally (in other words, in the thickness direction of the semiconductor substrate 111). The second gate electrode TG is disposed on a second gate insulating film 12 and connected to the first gate electrode VG. The first gate electrode VG and the second gate electrode TG are made of, for example, a polycrystalline silicon film doped with impurities. Alternatively, the first gate electrode VG and the second gate electrode TG can be made of metal or the like. The first gate electrode VG and the second gate electrode TG are integrally formed.

[0056] The gate insulating film 1 has a first gate insulating film 11 and a second gate insulating film 12. The first gate insulating film 11 is disposed between the inner wall of the aperture H1 and the first gate electrode VG. The second gate insulating film 12 is disposed on the surface 111a side of the semiconductor substrate 111 and connected to the first gate insulating film 11. The second gate insulating film 12 is located between the surface 111a of the semiconductor substrate 111 and the second gate electrode TG. The first gate insulating film 11 and the second gate insulating film 12 are, for example, silicon dioxide films formed by thermal oxidation of the semiconductor substrate 111. The first gate insulating film 11 and the second gate insulating film 12 are integrally formed.

[0057] The charge e generated by the photoelectric conversion of the photodiode PD - The charge e travels longitudinally (e.g., in the thickness direction of the semiconductor substrate 111) along the first gate electrode VG of the transfer transistor Tr, then horizontally (e.g., in a direction horizontal to the surface 111a of the semiconductor substrate 111) along the second gate electrode TG, and reaches the floating diffusion FD. - When the charge e is transferred from the photodiode PD to the floating diffuser FD, - Move along the side surface of the first gate electrode VG to avoid the first gate electrode VG.

[0058] Although not shown, a charge transport channel is formed in the semiconductor substrate 111 in a region opposite to the first gate electrode VG, passing through the first gate insulating film 11. Furthermore, a charge transport channel may also be formed in the semiconductor substrate 111 in a region opposite to the second gate electrode TG, passing through the second gate insulating film 12. For example, the charge transport channel may be formed of a P-type impurity diffusion layer. Forming charge transport channels in the aforementioned regions allows for the adjustment of various characteristics of the transport transistor (e.g., threshold voltage and cutoff-state breakdown voltage) to desired values.

[0059] (Crystal Orientation)

[0060] Figures 2 to 4 The semiconductor substrate 111 shown is, for example, a silicon substrate. The surface 111a of the semiconductor substrate 111 is a plane with a crystal plane of (100) or a plane equivalent to a crystal plane of (100). Examples of planes equivalent to a (100) plane include a (010) plane, a (001) plane, a (-100) plane, a (0-10) plane, and a (00-1) plane. For convenience, in this specification, a plane equivalent to a (100) plane will be simply referred to as a (100) plane.

[0061] The normal direction of a crystal plane is its crystal orientation. The crystal orientation of the (100) plane is... <100> Orientation. For convenience, in this specification, the crystal orientation of the (100) plane will be simply referred to as... <100> The direction, and the crystal orientation of the plane that is equal to the (100) plane, will also be simply referred to as <100> direction.

[0062] Crystal orientation <110> direction and <100> The directions intersect at a 45-degree angle. In this specification, for convenience, not only... <110> The crystal orientation of the direction and equivalent to <110> The crystal orientation of the direction will be simply referred to as <110> direction.

[0063] (Example of the configuration of the first gate electrode)

[0064] Figure 5 This is a cross-sectional view showing a first configuration example of the first gate electrode VG and the first gate insulating film 11 according to an embodiment of the present disclosure. Figure 5 A cross-section of the first gate electrode VG and the first gate insulating film 11 is shown, cut along a plane (hereinafter also referred to as a horizontal plane) parallel to the surface 111a of the semiconductor substrate 111. Figure 5 The cross-section of the first gate electrode VG cut along the horizontal plane (hereinafter also referred to as the VG cross-section) shown has a crystal orientation on the semiconductor substrate 111. <100> A slender shape in the direction of [the object]. For example, the VG section has a shape that is elongated in the plan view. <100> It has an elongated octagonal shape. One end of the long axis of the VG cross section of the first gate electrode VG is located on the photodiode PD side, and the other end of the long axis of the VG cross section is located on the floating diffuser FD side. In addition, one end of the long axis of the VG cross section of the first gate VG and the other end of the long axis of the VG cross section are located below the second gate TG.

[0065] The periphery of the cross-section of the first gate insulating film 11 located around the first gate electrode VG cut along the horizontal plane (hereinafter also referred to as the insulating film cross-section) also has, in the plan view, <100> An octagonal shape that is slender in the direction of the direction.

[0066] Figure 6 This is a cross-sectional view showing a second configuration example of the first gate electrode VG and the first gate insulating film 11 according to an embodiment of the present disclosure. Figure 6 A cross-section of the first gate electrode VG and the first gate insulating film 11, cut along a horizontal plane parallel to the surface 111a of the semiconductor substrate 111, is shown. In this embodiment, the cross-section of the first gate electrode VG cut along the horizontal plane (VG cross-section) only needs to be shown in the planar view. <100> Extending in the direction. And Figure 5 The VG section in the figure represents the VG section in the figure. <100> This embodiment is not limited to cases where each side of an octagon extending in a certain direction has a straight line shape. For example... Figure 6As shown, in the VG section, facing... <110> At least a portion of the directional side can be bent to be concave inward in the plan view. Furthermore, the shape of the VG section is not limited to an octagon.

[0067] Furthermore, when viewed from above, the periphery of the cross-section (insulating film cross-section) of the first gate insulating film 11 located around the first gate electrode VG along the horizontal plane is only required to... <100> It can be extended in any direction, and is not limited to an octagon. For example... Figure 6 As shown, the periphery of the insulating film cross-section can have a shape as shown in the planar view. <100> An elliptical shape that extends in one direction.

[0068] exist Figure 5 The first configuration example shown and Figure 6 In the second configuration example shown, the first gate insulating film 11 is formed through the inner wall of the hole H1 in the thermally oxidized semiconductor substrate 111 (see reference). Figure 4 The inner wall of the aperture H1 has a first inner wall IW1 with a crystal plane of (100) and a second inner wall IW2 with a crystal plane of (110). The first gate insulating film 11 has a first portion 21 located between the first inner wall IW1 and the first gate electrode VG and a second portion 22 located between the second inner wall IW2 and the first gate electrode VG. The first portion 21 is formed by thermal oxidation of the first inner wall IW1, which has a crystal plane of (100). The second portion 22 is formed by thermal oxidation of the second inner wall IW2, which has a crystal plane of (110).

[0069] The second part 22 has a thicker film than the first part 21. This difference in film thickness is due to the difference in the crystal planes of the inner walls that provide the basis for thermal oxidation. The (110) plane is more easily thermally oxidized than the (100) plane, and a thicker oxide film is more easily formed. For example, the film thickness of the second part 22 is more than 1.1 times and less than 2.0 times the film thickness of the first part 21. Figure 5 and Figure 6 In the middle, the second part 22 is located at both ends of the long axis direction of the cross section (VG cross section) of the first gate electrode VG.

[0070] Figure 7 This is a schematic diagram illustrating the potential distribution of the semiconductor substrate 111 in the periphery of the first gate electrode VG according to an embodiment of the present disclosure. Figure 7 In this context, Tr_on indicates that a voltage equal to or higher than the threshold voltage is applied to the first gate electrode VG and the transfer transistor Tr is turned on. Tr_off indicates that no voltage is applied to the first gate electrode VG and the transfer transistor Tr is turned off. Furthermore, in... Figure 7In this context, E1 represents the end (source terminal) of the photodiode PD side along the channel region formed by the first gate electrode VG. Figure 7 In this context, E2 represents the end (drain terminal) of the floating diffusion FD side along the channel region formed along the first gate electrode VG.

[0071] In the region (hereinafter also referred to as the thick film region) in contact with the second portion 22 in the semiconductor substrate 111, a Tr_on-induced inversion layer is less likely to form compared to the region (hereinafter also referred to as the thin film region) in contact with the first portion 21 in the semiconductor substrate, and a potential barrier is more likely to be generated. Therefore, the charge e - Flow is less likely in thick film regions than in thin film regions. On the other hand, it is easier to form a potential gradient and charge e - It is easier to flow at the source terminal E1 and the drain terminal E2.

[0072] In this embodiment of the disclosure, given the VG cross section in <100> The elongated shape allows the thick-film region to be positioned at each of the source and drain terminals E1 and E2. Therefore, the transfer transistor Tr can compensate for and reduce the potential barrier generated in the thick-film region through the potential gradient at the source and drain terminals E1 and E2. Thus, the transfer transistor Tr can improve the charge e - Transmission efficiency.

[0073] In embodiments of this disclosure, preferably, when viewed in the normal direction of the surface 111a of the semiconductor substrate 111 (in a plan view), the central portion FDC of the floating diffusion FD, the central portion VGC of the VG cross-section of the first gate electrode VG cut along the horizontal plane, and the central portion PDC of the photodiode PD are aligned in a straight line or approximately aligned in a straight line. Since the potential energy of the photodiode PD reaches its maximum in the central portion PDC of the photodiode PD, the charge e per unit light intensity can be increased. - Transmission efficiency.

[0074] Furthermore, preferably, the straight line connecting the corresponding central portions FDC, VGC, and PDC is parallel to or approximately parallel to the major axis direction of the VG section. Therefore, the charge e - The ratio of the thin-film region in the transmission path can be increased. Therefore, the transmission transistor Tr can further increase the charge e. - Transmission efficiency.

[0075] (Comparative Example)

[0076] Figure 8 This is a cross-sectional view showing the configuration of the first gate electrode VG' and the first gate insulating film 11' according to a comparative example of the present disclosure. Figure 5A cross-section of the first gate electrode VG' and the first gate insulating film 11, cut along a horizontal plane parallel to the surface of the semiconductor substrate 111', is shown. Figure 8 As shown, the cross-section of the first gate electrode VG' cut along the horizontal plane has a shape similar to an octagon with a decreasing bias in one direction. Furthermore, the periphery of the cross-section of the first gate insulating film 11' located around the first gate electrode VG' along the horizontal plane has a shape similar to a perfect circle.

[0077] exist Figure 8 In the comparative example shown, the first gate insulating film 11' is formed through the inner wall of the hole H1' of the semiconductor substrate 111' by thermal oxidation. The inner wall of the hole H1' has a first inner wall IW1' with a (100) plane as a crystal plane and a second inner wall IW2' with a (110) plane as a crystal plane. The first gate insulating film 11' has a first portion 21' located between the first inner wall IW1' and the first gate electrode VG and a second portion 22' located between the second inner wall IW2' and the first gate electrode VG'. The film thickness of the second portion 22' is greater than that of the first portion 21'. The difference in film thickness is due to the difference in the crystal plane of the inner wall that provides the basis for thermal oxidation. The (110) plane is easier to thermally oxidize than the (100) plane, and a thicker oxide film is easier to form.

[0078] Figure 9 This is a schematic diagram illustrating the potential distribution around the first gate electrode VG of a semiconductor substrate 111' according to a comparative example of this disclosure. Figure 9 In the first gate electrode VG', Tr'_on indicates a state where a voltage equal to or higher than the threshold voltage is applied and the transmission transistor is turned on. Tr'_off indicates a state where no voltage is applied to the first gate electrode VG' and the transmission transistor is turned off. Furthermore, in... Figure 9 In this context, E1' represents the end (in other words, the source terminal) of the photodiode PD' side along the channel region formed by the first gate electrode VG'. Figure 9 E2 in the middle represents the end of the floating diffusion FD' side along the channel region formed by the first gate electrode VG' (in other words, the drain terminal).

[0079] In the semiconductor region (thick film region) in contact with the second portion 22', the Tr'_on inversion layer is less likely to form compared to the semiconductor region (thin film region) in contact with the first portion 21'. For example... Figure 9 As shown in the comparative example, the source terminal E1' and drain terminal E2', which are more likely to form a potential gradient, and the thick film region are positioned at different locations from each other. Figure 9In the case shown, because the potential barrier generated in the thick film region cannot be canceled out by the potential gradients at the source terminal E1' and the drain terminal E2', the charge e - Compare Figure 7 The flow is less likely in the situation shown.

[0080] (Beneficial effects of the examples)

[0081] As described so far, the imaging apparatus 100 according to an embodiment of the present disclosure includes a semiconductor substrate 111 and a vertical transmission transistor Tr disposed on the semiconductor substrate 111. The semiconductor substrate 111 has a hole H1 opening towards a surface 111a. The transmission transistor Tr has a first gate electrode VG disposed within the hole H1 and a first gate insulating film 11 disposed between the inner wall of the hole H1 and the first gate electrode VG. The cross-section of the first gate electrode VG, cut along a horizontal plane parallel to the surface 111a of the semiconductor substrate 111, has a cross-section in the crystal orientation of the semiconductor substrate 111. <100> A shape that is long and thin in the direction of travel.

[0082] Therefore, between the inner walls of the aperture H1, a thicker (110) plane of the first gate insulating film 11 is positioned near the end of the VG cross-section along its long axis. Furthermore, through thermal oxidation of the (110) plane, a second portion 22, which is a thick film portion of the first gate insulating film 11, is formed near the end of the VG cross-section along its long axis. In the semiconductor substrate 111, regions (thick film regions) that contact the second portion 22 are respectively provided at the source terminal E1 and the drain terminal E2 of the transmission transistor Tr. Therefore, the potential barrier generated in the thick film region can be offset and reduced by each potential gradient generated at the source terminal E1 and the drain terminal E2. Therefore, the charge e of the transmission transistor Tr can be increased. - Transmission efficiency.

[0083] (First variation)

[0084] Figure 10 This is a plan view illustrating the configuration of pixel 102A in a first variation of an embodiment according to the present disclosure. Figure 10 As shown in this embodiment, the end of the first gate electrode VG on the photodiode PD side, located at both ends of its cross-section along the long axis, can protrude from below the second gate electrode TG toward the side of the photodiode PD. In this case, the charge e - The transmission path connects directly from the photodiode PD to the thin-film region of the transmission transistor Tr, without passing through the thick-film region. The source terminal E1 of the transmission transistor Tr is located in the thin-film region, and the thick-film region on the source side (photodiode PD side) is offset from the charge e. - The transmission path. Even with this configuration, the transmission transistor Tr can improve the charge e -Transmission efficiency.

[0085] (Second variation)

[0086] Figure 11 This is a plan view illustrating the configuration of pixel 102B in a second variation of an embodiment according to the present disclosure. Figure 11 As shown, in an embodiment of this disclosure, the end of the floating diffusion FD side at one end of the long axis direction of the cross-section of the first gate electrode VG can protrude from below the second gate electrode TG toward the floating diffusion FD side. In this case, the charge e - The transmission path connects directly from the thin-film region of the transmission transistor Tr to the floating diffuser FD without traversing the thick-film region. The drain terminal E2 of the transmission transistor Tr is located in the thin-film region, and the thick-film region on the drain side (floating diffuser FD side) is offset from the charge e. - The transmission path. Even with this configuration, the transmission transistor Tr can improve the charge e - Transmission efficiency.

[0087] (Third variation)

[0088] Figure 12 This is a plan view illustrating the configuration of pixel 102C in a third variation of an embodiment according to the present disclosure. Figure 12 As shown in this embodiment, the two ends of the long axis of the VG cross section of the first gate VG can protrude from below the second gate TG. The end of the VG cross section on the photodiode PD side can protrude from below the second gate electrode TG toward the side of the photodiode PD, and the end of the VG cross section on the floating diffusion FD side can protrude from below the second gate electrode TG toward the side of the floating diffusion FD.

[0089] In this case, charge e - The transmission path connects directly from the photodiode PD to the thin-film region of the transmission transistor Tr without passing through the thick-film region, and directly from the thin-film region to the floating diffuser FD without passing through the thick-film region. The source terminal E1 of the transmission transistor Tr is located in the thin-film region, and the thick-film region on the source side (photodiode PD side) is offset from the charge e. - The transmission path. The drain terminal E2 of the transmission transistor Tr is located in the thin film region, and the thick film region on the drain side (floating diffusion FD side) is offset from the charge e. - The transmission path. Even with this configuration, the transmission transistor Tr can improve the charge e - Transmission efficiency.

[0090] (Fourth and Fifth Variations)

[0091] Figure 13This is a plan view showing the configuration of pixel 102D in a fourth variation of an embodiment according to the present disclosure. Figure 14 This is a plan view illustrating the configuration of pixel 102E in a fifth variation of an embodiment according to the present disclosure. Figure 13 , Figure 14 In the diagram, the second gate TG is not shown. For example... Figure 13 , Figure 14 As shown in the embodiments of this disclosure, a pixel 102D may be provided with N (where N is an integer equal to or greater than 2) first gate electrodes VG. The N first gate electrodes VG are arranged at intervals in the minor axis direction of the VG cross section. The minor axis direction refers to the direction perpendicular to the major axis direction in a planar view. Figure 13 Indicates N=2 and Figure 14 This represents the case where N=3. Using this configuration, as the quantity N increases, the charge e... - The greater the number of transmission paths, the smaller the on-resistance of the transmission transistor Tr can be.

[0092] <Other Embodiments>

[0093] While this disclosure has been described based on the foregoing embodiments and variations, the descriptions and drawings that form part of this disclosure should not be construed as limiting it. Various alternative embodiments, examples, and operational techniques will be apparent to those skilled in the art based on this disclosure. It is self-evident that the technology according to this disclosure (the technology) includes various embodiments not described herein.

[0094] For example, although the above embodiments have described four pixels 102 forming a shared pixel structure, the present technology is not limited thereto. In the present technology, pixels 102 do not need to form a shared pixel structure. Specifically, in addition to the elements described above, a pixel 102 may be composed of a photodiode, a transmission transistor, a floating diffuser, a reset transistor, and an amplification transistor, or a pixel 102 may be composed of a selective transistor. Similarly, each of pixels 102A, 102B, 102C, 102D, and 102E does not need to form a shared pixel structure. As described above, the present technology can perform at least one of various omissions, substitutions, and modifications of constituent elements without departing from the spirit of the above embodiments. Furthermore, the beneficial effects described in this specification are merely exemplary and not intended to be limiting, and other beneficial effects may occur.

[0095] <Applied to electronic devices>

[0096] For example, the technology according to this disclosure (the technology) can be applied to various electronic devices including imaging systems such as digital cameras, digital video cameras and the like (hereinafter collectively referred to as cameras), mobile devices such as mobile phones with imaging capabilities, or other devices with imaging capabilities.

[0097] Figure 15 This is a conceptual diagram illustrating an example of the application of the technology (the present technology) according to this disclosure to an electronic device 300. For example... Figure 15 For example, electronic device 300 is a camera and has a solid-state imaging device 201, an optical lens 210, a shutter device 211, a drive circuit 212, and a signal processing circuit 213. The optical lens 210 is an example of an "optical component" of this disclosure.

[0098] Light transmitted through optical lens 210 is incident on solid-state imaging device 201. For example, optical lens 210 forms an image of the image light (incident light) from the object on the imaging surface of solid-state imaging device 201. As a result, signal charge accumulates in solid-state imaging device 201 for a specific time period. Shutter device 211 controls the light illumination period and light blocking period for solid-state imaging device 201. Drive circuit 212 provides drive signals for controlling the transmission operation of solid-state imaging device 201 and the shutter operation of shutter device 211. Signal transmission of solid-state imaging device 201 is performed according to the drive signals (timing signals) provided from drive circuit 212. Signal processing circuit 213 performs various signal processing operations. For example, signal processing circuit 213 processes the signal output from solid-state imaging device 201. The signal-processed video signal is stored in a storage medium such as memory or output to a monitor.

[0099] It should be noted that shutter operation in electronic device 300 can be achieved using an electronic shutter (e.g., a global shutter) operated by solid-state imaging device 201 instead of a mechanical shutter. When shutter operation in electronic device 300 is achieved using an electronic shutter, shutter device 211... Figure 15 The text indicates that it can be omitted.

[0100] In electronic device 300, the aforementioned imaging device 100 is applied to solid-state imaging device 201. Thus, electronic device 300 with improved performance can be obtained. It should be noted that electronic device 300 is not limited to a camera. Electronic device 300 can be a mobile device such as a mobile phone with imaging capabilities, or other devices with imaging capabilities.

[0101] <Applications in endoscopic surgical systems>

[0102] The technology disclosed herein (the technology) can be applied to various products. For example, the technology disclosed herein can be applied to endoscopic surgical systems.

[0103] Figure 16 This is a diagram illustrating an example of a schematic configuration of an endoscopic surgical system that applies the technology (the technology) according to this disclosure.

[0104] Figure 16 The illustration shows an operator (doctor) 11131 performing surgery on a patient 11132 on a bed 11133 using an endoscopic surgical system 11000. As shown, the endoscopic surgical system 11000 consists of an endoscope 11100, other surgical instruments 11110 such as an insufflator 1111 or an electrically powered processing device 11112, a support arm device 11120 supporting the endoscope 11100, and a trolley 11200 equipped with various endoscopic surgical devices.

[0105] Endoscope 11100 includes a lens barrel 11101 and a camera head 11102 connected to the base of the lens barrel 11101. A region of the lens barrel 11101 with a predetermined length from its distal end is inserted into the body cavity of a patient 11132. In the illustrated example, endoscope 11100 is configured as a so-called rigid endoscope with a rigid lens barrel 11101; however, it can also be configured as a so-called flexible endoscope with a flexible lens barrel.

[0106] An opening is provided at the distal end of the lens barrel 11101, and the objective lens is mounted in this opening. A light source device 11203 is connected to the endoscope 11100. Light generated by the light source device 11203 is guided to the front end of the lens barrel 11101 via a light guide extending into the lens barrel 11101, and the light is then directed through the objective lens toward the object being observed within the body cavity of the patient 11132. The endoscope 11100 can be a direct-viewing endoscope, an oblique-viewing endoscope, or a lateral-viewing endoscope.

[0107] An optical system and imaging element are housed inside the camera head 11102, and light reflected from the observed target (observation light) is converged onto the imaging element by the optical system. The imaging element performs photoelectric conversion on the observation light to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent as RAW data to the camera control unit (CCU) 11201.

[0108] The CCU11201 consists of a central processing unit (CPU), a graphics processing unit (GPU), and other components, and comprehensively controls the operation of the endoscope 11100 and the display device 11202. Furthermore, the CCU11201 receives image signals from the camera head 11102 and performs various types of image processing on the image signals for displaying images based on the image signals, such as image development processing (de-mosaic processing).

[0109] The display device 11202 displays images based on the image signals that have been processed by the CCU11201 under the control of the CCU11201.

[0110] The light source device 11203 is composed of a light source such as an LED (light-emitting diode) and supplies illumination light to the endoscope 11100 when photographing surgical sites, etc.

[0111] Input device 11204 is the input interface of endoscopic surgery system 11000. Users can input various information or commands into endoscopic surgery system 11000 through input device 11204. For example, users can input commands to change the imaging conditions of endoscope 11100 (type of illumination light, magnification, focal length, etc.).

[0112] The instrument control device 11205 drives and controls the electrically powered processing instrument 11112 to perform tissue cauterization, incision, or vascular closure. To ensure the field of vision of the endoscope 11100 and the surgeon's working space, the pneumoperitoneum device 11206 inflates the body cavity of the patient 11132 by introducing gas through the pneumoperitoneum tube 11111. The recorder 11207 is a device capable of recording various information about the surgery. The printer 11208 is a device capable of printing various information about the surgery in various formats, including text, images, and graphics.

[0113] The light source device 11203 that provides illumination light to the endoscope 11100 when photographing the surgical site can be, for example, an LED, a laser light source, or a white light source composed of a combination thereof. When the white light source is composed of a combination of RGB laser light sources, the light source device 11203 can adjust the white balance of the captured image because the output intensity and output timing of each color (each wavelength) can be controlled with high precision. Furthermore, in this case, by illuminating the observation target with laser light from each of the RGB laser light sources in a time-sharing manner and controlling the driving of the imaging element of the camera head 11102 in sync with the illumination timing, images corresponding to RGB can also be captured in a time-sharing manner. According to this method, color images can be obtained even if a color filter is not provided in the imaging element.

[0114] The drive of the light source device 11203 can be controlled to change the intensity of the light to be output at predetermined intervals. By controlling the drive of the imaging element of the camera head 11102 in sync with the timing of the change in light intensity, acquiring images in a time-sharing manner, and combining images, images with a high dynamic range can be generated that do not contain so-called obstructing shadows or overexposed highlights.

[0115] Additionally, the light source device 11203 can also be configured to supply light in a specified wavelength band corresponding to special light observation. In special light observation, for example, narrow-band light observation (narrow-band light observation) is performed by emitting light with a narrower frequency band than the illumination light (i.e., white light) used in normal observation, utilizing the wavelength dependence of light absorption by biological tissues, to image specified tissues such as blood vessels on the mucosal surface with high contrast. Alternatively, in special light observation, fluorescence observation can also be performed by acquiring an image through fluorescence generated by emitting excitation light. Fluorescence observation can be performed by emitting excitation light toward body tissue and observing fluorescence from the body tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into body tissue and emitting excitation light corresponding to the fluorescence wavelength of the reagent onto the body tissue to obtain a fluorescence image. The light source device 11203 can be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0116] Figure 17 It shows Figure 16 A block diagram illustrating an example of the functional configuration of the camera head 11102 and CCU11201 shown.

[0117] Camera head 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. Camera unit 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. Camera head 11102 and camera unit 11201 are connected to communicate with each other via transmission cable 11400.

[0118] Lens unit 11401 is an optical system disposed in the connection portion with lens barrel 11101. Observation light received from the distal end of lens barrel 11101 is guided to camera head 11102 and incident on lens unit 11401. Lens unit 11401 is composed of a combination of multiple lenses, including zoom lenses and focusing lenses.

[0119] The imaging unit 11402 is composed of imaging elements. The imaging elements constituting the imaging unit 11402 can be a single element (a so-called single-plate element) or multiple elements (a so-called multi-plate element). For example, when the imaging unit 11402 is composed of multi-plate elements, each imaging element generates an image signal corresponding to each RGB value, and a color image can be obtained by combining the image signals. Optionally, the imaging unit 11402 can be configured to include pairs of imaging elements for acquiring image signals corresponding to the right and left eyes in a three-dimensional (3D) display, respectively. By performing a 3D display, the operator 11131 can more accurately determine the depth of biological tissue in the surgical site. When the imaging unit 11402 is composed of multi-plate elements, multiple lens units 11401 can be configured to correspond to each imaging element.

[0120] The imaging unit 11402 need not be located in the camera head 11102. For example, the imaging unit 11402 can be immediately located behind the objective lens inside the lens barrel 11101.

[0121] The drive unit 11403 is composed of an actuator, and under the control of the camera head control unit 11405, the zoom lens and focusing lens of the lens unit 11401 move a predetermined distance along the optical axis. In this way, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0122] The communication unit 11404 is composed of a communication device for sending various information to or receiving various information from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as raw data to the CCU 11201 via the transmission cable 11400.

[0123] The communication unit 11404 receives control signals from the CCU 11202 for controlling the drive of the camera head 11102, and supplies control signals to the camera head control unit 11405. The control signals include, for example, information about imaging conditions, such as information indicating the frame rate of the specified captured image, information indicating the exposure value when the image is captured, and / or information indicating the magnification and focus of the specified captured image.

[0124] Imaging conditions (such as the aforementioned frame rate, exposure value, magnification, and focus) can be appropriately specified by the user or can be automatically set by the control unit 11413 of the CCU11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (automatic exposure) function, AF (automatic focus) function, and AWB (automatic white balance) function.

[0125] The camera head control unit 11405 controls the driving of the camera head 11102 based on the control signals received from the CCU 111201 via the communication unit 11404.

[0126] The communication unit 11411 consists of a communication device that sends and receives various information to and from the camera head 11102. The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.

[0127] In addition, the communication unit 11411 sends control signals for controlling the camera head 11102 to the camera head 11102. Image signals or control signals can be transmitted via electrical communication, optical communication, etc.

[0128] The image processing unit 11412 applies various types of image processing to the image signal, which is the raw data sent from the camera head 11102.

[0129] The control unit 11413 performs various controls on imaging the surgical site via the endoscope 11100 and displaying the captured image obtained by imaging the surgical site. For example, the control unit 11413 generates control signals for controlling the drive of the camera head 11102.

[0130] Furthermore, the control unit 11413 causes the display device 11202 to display a captured image of the surgical site, etc., based on the image signal processed by the image processing unit 11412. In doing so, the control unit 11413 can use different image recognition techniques to identify different objects in the captured image. For example, the control unit 11413 can identify processing tools such as forceps, specific biological sites, bleeding, and spores when using the powered processing tool 11112 by detecting the shape, color, etc., of the edges of objects contained in the captured image. When the display device 11202 displays the captured image, the control unit 11413 can overlay various surgical support information onto the image of the surgical site to display the results of the captured image recognition. By overlaying and displaying surgical assistance information and presenting it to the operator 11131, the burden on the operator 11131 can be reduced or the operator 11131 can perform operations reliably.

[0131] The transmission cable 11400 that connects camera head 11102 and CCU11201 to each other is an electrical signal cable that supports electrical signal communication, an optical fiber that supports optical communication, or a composite cable thereof.

[0132] Here, although the example shown uses a transmission cable 11400 to perform communication in a wired manner, communication between the camera head 11102 and the CCU 11201 can alternatively be performed wirelessly.

[0133] Examples of endoscopic surgical systems to which the technology according to this disclosure can be applied have been described above. The technology according to this disclosure can be applied to, for example, the endoscope 11100, the imaging unit 11402 of the camera head 11102, and the image processing unit 11412 of the CCU 111201, among the components described above. Specifically, the aforementioned imaging device 100 can be applied to the imaging unit 10402. Because applying the technology according to this disclosure to the endoscope 11100, the imaging unit 11402 of the camera head 11102, and the image processing unit 11412 of the CCU 11201 enables the acquisition of clearer images of the surgical site, allowing the operator to reliably confirm the surgical site. Furthermore, because applying the technology according to this disclosure to the endoscope 11100, the imaging unit 11402 of the camera head 11102, and the image processing unit 11412 of the CCU 11201 enables the acquisition of images of the surgical site with lower latency, treatment can be performed with the same sensation as when the operator observes the surgical site by touch.

[0134] Although the endoscopic surgical system has been described as an example here, the techniques according to this disclosure can also be applied to microsurgical systems, etc.

[0135] <Applied to moving objects>

[0136] The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein can be implemented as a device to be installed on any type of mobile object, such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0137] Figure 18 This is a block diagram illustrating a schematic configuration example of a vehicle control system, which is an example of a mobile body control system to which the technology according to this disclosure can be applied.

[0138] The vehicle control system 12000 includes multiple electronic control units interconnected via a communication network 12001. Figure 18 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and a comprehensive control unit 12050. Additionally, as functional components of the comprehensive control unit 12050, the figure shows a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0139] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 functions as a drive force generator that generates drive force for the vehicle, such as an internal combustion engine or drive electric motor, a drive force transmission mechanism that transmits drive force to the wheels, a steering mechanism that adjusts the vehicle's steering angle, and a braking device that generates braking force for the vehicle.

[0140] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for keyless entry systems, smart key systems, power window devices, or various lights such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from various switches transmitted from a portable device that replaces the key can be input to the body system control unit 12020. The body system control unit 12020 receives these radio wave or signal inputs and controls the vehicle's door locking devices, power window devices, lights, etc.

[0141] The exterior information detection unit 12030 detects information about the exterior of the vehicle on which the vehicle control system 12000 is installed. For example, the imaging unit 12031 is connected to the exterior information detection unit 12030. The exterior information detection unit 12030 causes the imaging unit 12031 to capture images of the exterior of the vehicle and receives the captured images. The exterior information detection unit 12030 can perform object detection processing or distance detection processing for people, cars, obstacles, signs, or text on the road based on the received images.

[0142] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal based on the amount of light received. The imaging unit 12031 can also output an electrical signal as an image or as ranging information. Furthermore, the light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0143] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041, which detects the driver's state, is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level based on the detection information input from the driver state detection unit 12041, or determine whether the driver is dozing off.

[0144] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on internal or external vehicle information acquired by the external vehicle information detection unit 12030 or the internal vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, to implement ADAS (Advanced Driver Assistance Systems) functions, the microcomputer 12051 can perform cooperative control, including vehicle collision avoidance, impact buffering, and following based on vehicle distance, cruise control, vehicle collision warning, lane departure warning, etc.

[0145] In addition, the microcomputer 12051 controls the drive force generator, steering mechanism, braking device, etc., based on the information about the vehicle's surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040. As a result, it can perform cooperative control such as autonomous driving that does not depend on the driver's operation.

[0146] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on information about the vehicle's exterior obtained by the external information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control to prevent glare by controlling the headlights to switch from high beam to low beam, etc., according to the position of the vehicle in front or oncoming vehicle detected by the external information detection unit 12030.

[0147] The audio / image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying passengers inside the vehicle or disseminating notification information to an external device. Figure 18 In the example shown, an audio speaker 12061, a display unit 12062, and a dashboard 12063 are illustrated as such output devices. For example, the display unit 12062 may include at least one of an in-vehicle display and a head-up display.

[0148] Figure 19 This is a diagram showing an example of the mounting position of the imaging unit 12031.

[0149] exist Figure 19 In the vehicle 12100, imaging units 12101, 12102, 12103, 12104 and 12105 are used as imaging unit 12031.

[0150] Imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, inside the vehicle 12100 at locations such as the front nose, side mirrors, rear bumper, rear door, and the upper part of the windshield. Imaging unit 12101, installed at the front nose inside the vehicle, and imaging unit 12105, installed at the upper part of the windshield, primarily acquire images of the front of the vehicle 12100. Imaging units 12102 and 12103, installed at the side mirrors, primarily acquire images of the sides of the vehicle 12100. Imaging unit 12104, installed at the rear bumper or rear door, primarily acquires images of the rear of the vehicle 12100. The front view images acquired by imaging units 12101 and 12105 are mainly used for detecting vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0151] and, Figure 19 An example of the imaging range of imaging units 12101 to 12104 is shown. Imaging range 12111 represents the imaging range of imaging unit 12101 located at the front nose, imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103 located at the side mirrors, respectively, and imaging range 12114 represents the imaging range of imaging unit 12104 located on the rear bumper or rear door. For example, by overlaying multiple image data captured by imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

[0152] At least one of the imaging units 12101 to 12104 may have the function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0153] For example, the microcomputer 12051 can specifically extract the nearest three-dimensional object (i.e., a three-dimensional object traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher)) on the path of the vehicle 12100 as the preceding vehicle by acquiring the distance and the time change of distance (relative speed relative to the vehicle 12100) of each three-dimensional object in the imaging range 12111 to 12114 based on distance information obtained from imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can pre-set a vehicle-to-vehicle distance to be maintained in front of the preceding vehicle and can perform automatic braking control (including follow-stop control), automatic acceleration control (including follow-start control), etc. Therefore, for example, cooperative control for the purpose of automatic driving of the vehicle can be performed without driver intervention.

[0154] For example, the microcomputer 12051 can classify and extract three-dimensional data related to three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and other three-dimensional objects (such as electrodes) based on distance information obtained from imaging units 12101 to 12104, and can use this three-dimensional data to perform automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that the driver of the vehicle 12100 can see and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk, which represents the degree of risk of colliding with each obstacle. When the collision risk is equal to or higher than a set value and there is a possibility of collision, it outputs an alarm to the driver through the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering through the drive system control unit 12010, thus providing driving support for collision avoidance.

[0155] At least one of the imaging units 12101 to 12104 can be an infrared camera that detects infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian exists in the captured images of the imaging units 12101 to 12104. For example, such pedestrian identification is performed by a process of extracting feature points from the captured images of the imaging units 12101 to 12104, which are infrared cameras, and a process of performing pattern matching processing on a series of feature points representing the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the captured images of the imaging units 12101 to 12104 and identifies the pedestrian, the audio / image output unit 12052 controls the display unit 12062 so that the square outline used for emphasis overlaps with and is displayed with the identified pedestrian. In addition, the audio / image output unit 12052 can control the display unit 12062 so that an icon indicating a pedestrian, etc., is displayed at a desired location.

[0156] Examples of vehicle control systems to which the technology according to this disclosure can be applied have been described above. The technology according to this disclosure can be applied to the imaging unit 12031, etc., in the above-described configuration. Specifically, the aforementioned imaging device 100 can be applied to the imaging unit 12031. By applying the technology according to this disclosure to the imaging unit 12031, a clearer captured image can be obtained, and thus driver fatigue can be reduced.

[0157] This disclosure can also be configured as follows.

[0158] (1) An imaging device, comprising:

[0159] Semiconductor substrates; and

[0160] Vertical transistors are disposed on a semiconductor substrate, wherein

[0161] A semiconductor substrate has a hole that opens on the first main plane side.

[0162] Vertical transistors have:

[0163] A first gate electrode is disposed inside the aperture; and

[0164] A first gate insulating film is disposed between the inner wall of the aperture and the first gate electrode, and

[0165] The cross-section of the first gate electrode, cut along a plane parallel to the first principal plane, has a crystal orientation in the semiconductor substrate. <100> A slender shape in the direction of.

[0166] (2) According to the imaging device in (1), wherein,

[0167] The inner wall has the following characteristics:

[0168] The first inner wall has a crystal plane of (100); and

[0169] The second inner wall has a crystal plane of (110).

[0170] The first gate insulating film has:

[0171] The first part is located between the first inner wall and the first gate electrode; and

[0172] The second part is located between the second inner wall and the first gate electrode, and

[0173] The membrane thickness of the second part is greater than that of the first part.

[0174] (3) According to the imaging device in (2), wherein,

[0175] The second part is located at the end of the cross-section of the first gate electrode along its long axis.

[0176] (4) The imaging device according to (2) or (3), wherein,

[0177] The thickness of the second part of the membrane is more than 1.1 times but less than 2.0 times thicker than the thickness of the first part of the membrane.

[0178] (5) An imaging device according to any one of (1) to (4), wherein

[0179] Vertical transistors also include:

[0180] A second gate insulating film is disposed on the first main plane side of the semiconductor substrate; and

[0181] The second gate electrode is disposed on the second gate insulating film and connected to the first gate electrode.

[0182] (6) The imaging apparatus according to any one of (1) to (5) further comprises:

[0183] A photoelectric conversion unit is disposed inside a semiconductor substrate; and

[0184] A charge holding section is disposed on the first main plane side of the semiconductor substrate and configured to retain the charge generated by the photoelectric conversion section, wherein...

[0185] The end of the cross-section of the first gate electrode along its long axis is located on the photoelectric conversion section side, and the other end along its long axis is located on the charge retention section side.

[0186] The vertical transistor is configured to transfer the charge generated in the photoelectric conversion section to the charge holding section.

[0187] (7) The imaging device according to (6), wherein

[0188] In a plan view along the normal direction of the first principal plane of the semiconductor substrate, the central portion of the charge holding portion, the central portion of the cross-section of the first gate electrode, and the central portion of the photoelectric conversion portion are arranged in a straight line or approximately in a straight line.

[0189] (8) The imaging device according to (5), wherein,

[0190] The two ends of the cross-section of the first gate electrode are located below the second gate electrode along the long axis.

[0191] (9) According to the imaging device of (5), wherein,

[0192] At least one of the two ends of the cross section of the first gate electrode protrudes from below the second gate electrode in the long axis direction.

[0193] (10) An imaging apparatus according to any one of (1) to (9), wherein

[0194] The vertical transistor has multiple first gate electrodes, and

[0195] Multiple first gate electrodes are arranged at intervals along the short axis of the cross section.

[0196] (11) An imaging apparatus according to any one of (1) to (10), wherein

[0197] The first principal plane is a plane with crystal plane (100) or a plane equivalent to a plane with crystal plane (100).

[0198] (12) An electronic device, comprising:

[0199] Optical components;

[0200] An imaging device, into which light transmitted through optical components is incident; and

[0201] The signal processing circuit is configured to process the signal output from the imaging device.

[0202] The imaging device includes:

[0203] Semiconductor substrates; and

[0204] Vertical transistors are mounted on a semiconductor substrate.

[0205] A semiconductor substrate has a hole that opens on the first main plane side.

[0206] Vertical transistors have:

[0207] A first gate electrode is disposed inside the aperture; and

[0208] A first gate insulating film is disposed between the inner wall of the aperture and the first gate electrode, and

[0209] The cross-section cut along a plane parallel to the first principal plane has a crystal orientation in the semiconductor substrate. <100> A slender shape in the direction of.

[0210] [List of Reference Numbers]

[0211] 1. Gate insulating film 11, 11' First gate insulating film 12. Second gate insulating film 21, 21' First part 22, 22' Second part 100 Imaging device 101a, 111a Surface 102, 102A, 102B, 102C, 102D, 102E Pixel 103 Pixel area (imaging area) 104 Vertical drive circuit; 105 Column signal processing circuit; 106 Horizontal drive circuit; 107 Output circuit; 108 Control circuit; 109 Vertical signal line; 110 Horizontal signal line; 111, 111' Semiconductor substrate; 112 Input / output terminal; 120 Pixel separator; 201 Solid-state imaging device; 210 Optical lens; 211 Shutter device; 212 Drive circuit; 213 Signal processing circuit; 300 Electronic equipment; 10402 Imaging unit; 11000 Endoscopic surgical system; 11100 Endoscope; 11101 Endoscope tube; 11102 Camera head; 11110 Surgical instruments; 11111 Pneumoperitoneum tube; 11112 Power-on processing device; 11120 Support arm device; 11131 Operator (doctor); 11131 Operator; 11132 Patient; 11133 Bed; 11200 Cart; 11201 Camera control unit (CCU) 11202 Display device; 11203 Light source device; 11204 Input device; 11205 Handling device control device; 11206 Pneumoperitoneum device; 11207 Recorder; 11208 Printer; 11400 Transmission cable; 11401 Lens unit; 11402 Imaging unit; 11403 Drive unit; 11404 Communication unit; 11405 Camera head control unit; 11411 Communication unit; 11412 Image processing unit; 11413 Control unit; 12000 Vehicle control system; 12001 Communication network; 12010 Drive system control unit; 12020 Body system control unit; 12030 External information detection unit; 12031 Imaging unit; 12040 Internal information detection unit; 12041 Driver status detection unit; 12050 Integrated control unit; 12051 Microcomputer; 12052 Audio / Image Output 12061 Audio Speaker 12062 Display Unit 12063 Instrument Panel 12100 Vehicle 12101 Imaging Unit 12102 Imaging Unit 12103 Imaging Unit 12104 Imaging Unit 12105 Imaging Unit 12111 Imaging Range 12112 Imaging Range 12113 Imaging Range 12114 Imaging Range CCU 11201 Imaging Unit CCU 11201 Camera Head E1, E1' Source Terminal E2, E2' Drain Terminal FD Floating Diffusion FDC, PDC, VGC Center Part GE Gate Electrode H1, H1' Hole Part I Vehicle Network IW1, IW1' First Inner Wall IW2, IW2' Second Inner Wall PD Photodiode TG, TG' Second Gate Electrode Tr Transmission Transistor VG, VG' First Gate Electrode

Claims

1. An imaging device, comprising: The first to fourth photoelectric conversion units are disposed in the semiconductor substrate; A charge holding portion is disposed in the semiconductor substrate and on the first main plane of the semiconductor substrate, and First to fourth transmission transistors, wherein the first transmission transistor is configured to transfer charge generated in the first photoelectric conversion unit to the charge holding unit, the second transmission transistor is configured to transfer charge generated in the second photoelectric conversion unit to the charge holding unit, the third transmission transistor is configured to transfer charge generated in the third photoelectric conversion unit to the charge holding unit, and the fourth transmission transistor is configured to transfer charge generated in the fourth photoelectric conversion unit to the charge holding unit. Specifically, when viewed along the normal direction of the first main plane of the semiconductor substrate, the first to the fourth photoelectric conversion units are arranged in a 2x2 matrix, and the first and second photoelectric conversion units are arranged diagonally. The first transmission transistor includes a first gate electrode disposed in the semiconductor substrate and a first gate insulating film disposed between the semiconductor substrate and the first gate electrode. The second transmission transistor includes a second gate electrode disposed in the semiconductor substrate. The first gate electrode has an octagonal cross-section cut along a horizontal plane and has a first side to an eighth side. In the plan view, the first side is positioned as the center of the second gate electrode that is closest to the first side to the eighth side, and the first side is positioned opposite to the second side. The first gate insulating film, when cut along a horizontal plane, comprises a first portion to an eighth portion respectively disposed on the first side to the eighth side, and each of the third to eighth portions of the first gate insulating film belongs to either a first group or a second group. The thickness of the first gate insulating film belonging to the second group is greater than the thickness of the first gate insulating film belonging to the first group. Wherein, the sum of the lengths of the third to eighth sides of the first gate insulating film facing the first group is longer than the sum of the lengths of the third to eighth sides of the first gate insulating film facing the second group.

2. The imaging device according to claim 1, wherein, The first to eighth portions of the first gate insulating film belonging to the first group face the plane (100) of the semiconductor substrate, and the first to eighth portions of the first gate insulating film belonging to the second group face the plane (110) of the semiconductor substrate.

3. The imaging device according to claim 2, wherein, The semiconductor substrate is a silicon substrate.

4. The imaging device according to claim 1, wherein, The thickness of the first gate insulating film belonging to the second group is more than 1.1 times and less than 2.0 times thicker than the thickness of the first gate insulating film belonging to the first group.

5. The imaging apparatus according to claim 1, wherein, The transmission transistor further includes: A second gate insulating film is disposed on the first main plane of the semiconductor substrate; and The third gate electrode is disposed on the second gate insulating film and is in contact with the first gate electrode.

6. The imaging apparatus according to claim 1, wherein, When viewed in the normal direction of the first main plane of the semiconductor substrate, the central portion of the charge holding portion, the central portion of the cross-section of the first gate electrode, and the central portion of the photoelectric conversion portion are aligned in a straight line or approximately aligned in a straight line.

7. The imaging apparatus according to claim 1, wherein, The transmission transistor has a plurality of first gate electrodes, wherein, when viewed in the normal direction of the first main plane of the semiconductor substrate, the central portion of the charge holding portion and the central portion of the photoelectric conversion portion are aligned in a straight line, and wherein the plurality of first gate electrodes are arranged at intervals in a direction perpendicular to the straight line.

8. The imaging apparatus according to claim 1, wherein, The first principal plane is a (100) plane.

9. The imaging apparatus according to claim 1, wherein, At least a portion of the first to eighth sides of the first gate insulating film belonging to the second group are bent to be recessed inward in a plan view.

10. An electronic device, comprising: Optical components; An imaging device, wherein light transmitted through the optical components is incident on the imaging device; as well as The signal processing circuit is configured to process the signal output from the imaging device. The imaging device includes: The first to fourth photoelectric conversion units are disposed in the semiconductor substrate; A charge holding portion is disposed in the semiconductor substrate and on a first main plane of the semiconductor substrate; and First to fourth transmission transistors, wherein the first transmission transistor is configured to transfer charge generated in the first photoelectric conversion unit to the charge holding unit, the second transmission transistor is configured to transfer charge generated in the second photoelectric conversion unit to the charge holding unit, the third transmission transistor is configured to transfer charge generated in the third photoelectric conversion unit to the charge holding unit, and the fourth transmission transistor is configured to transfer charge generated in the fourth photoelectric conversion unit to the charge holding unit. Specifically, when viewed along the normal direction of the first main plane of the semiconductor substrate, the first to the fourth photoelectric conversion units are arranged in a 2x2 matrix, and the first and second photoelectric conversion units are arranged diagonally. The first transmission transistor includes a first gate electrode disposed in the semiconductor substrate and a first gate insulating film disposed between the semiconductor substrate and the first gate electrode. The second transmission transistor includes a second gate electrode disposed in the semiconductor substrate. The first gate electrode has an octagonal cross-section cut along a horizontal plane and has a first side to an eighth side. In the plan view, the first side is positioned as the center of the second gate electrode that is closest to the first side to the eighth side, and the first side is positioned opposite to the second side. The first gate insulating film, when cut along a horizontal plane, comprises a first portion to an eighth portion respectively disposed on the first side to the eighth side, and each of the third to eighth portions of the first gate insulating film belongs to either a first group or a second group. The thickness of the first gate insulating film belonging to the second group is greater than the thickness of the first gate insulating film belonging to the first group. Wherein, the sum of the lengths of the third to eighth sides of the first gate insulating film facing the first group is longer than the sum of the lengths of the third to eighth sides of the first gate insulating film facing the second group.

Citation Information

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