Display circuit, display panel and display device

Abstract

The application relates to a display circuit, a display panel and a display device, which replace a transistor contained in the display circuit with a double-gate transistor to realize threshold voltage compensation of the double-gate transistor. Specifically, a first threshold compensation module and a second threshold compensation module are controlled to be turned on in a compensation stage, the top gate of the double-gate transistor is short-circuited with the first electrode, and the bottom gate is short-circuited with the second electrode. Under the action of a compensation node VDD voltage, a current flowing through a transistor to a reset signal line is generated, a potential is gradually reduced to a threshold voltage of the transistor, and the threshold voltage is positively biased to 0, so that threshold voltage compensation of the transistor is realized. Since the threshold voltage compensation of the transistor contained in the display circuit can be realized, the influence of unstable characteristics of a thin film transistor in the display circuit on a light-emitting current can be effectively eliminated. Even in the case of threshold voltage drift of the transistor, the light-emitting current flowing through a light-emitting device is still kept constant, the brightness uniformity of the display panel is improved, and the problem of poor display quality is effectively solved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display circuit, display panel and display device. Background Technology

[0002] With the development of display technology, display panels are being used more and more widely, and the requirements for display panels are also getting higher and higher.

[0003] The existing display panels have defects in display quality, and there is an urgent need for a new type of display circuit to improve the display effect. Summary of the Invention

[0004] Therefore, it is necessary to provide a display circuit, a display panel, and a display device to address the aforementioned technical problems and improve the display effect of the display panel.

[0005] In a first aspect, embodiments of this application provide a display circuit, including a dual-gate transistor, a first threshold compensation module, and a second threshold compensation module. The first threshold compensation module and the second threshold compensation module are used to compensate the threshold voltage of the dual-gate transistor, wherein...

[0006] The first gate and first electrode of the dual-gate transistor are both connected to the first threshold compensation module, and the second gate and second electrode of the dual-gate transistor are both connected to the second threshold compensation module. The first threshold compensation module is also connected to the first power supply voltage terminal, and the second threshold compensation module is also connected to the reset signal line.

[0007] In one embodiment, the first threshold compensation module includes a first control unit, a first conduction unit, and a first storage unit, wherein,

[0008] The first terminal of the first control unit is connected to the first terminal of the first storage unit and the first power supply voltage terminal. The second terminal of the first control unit is connected to the first terminal of the first conduction unit and the first electrode of the dual-gate transistor. The control terminal of the first control unit is connected to the first control signal line. The second terminal of the first conduction unit is connected to the first gate of the dual-gate transistor and the second terminal of the first storage unit. The control terminal of the first conduction unit is connected to the first conduction signal line.

[0009] In the first initialization phase, the first conducting unit is used to conduct in response to the first conducting signal on the first conducting signal line, and the first control unit is used to conduct in response to the first control signal on the first control signal line, transmitting the first power supply voltage at the first power supply voltage terminal to the second terminal of the first storage unit through the first control unit and the first conducting unit, so as to complete the initialization of the first storage unit.

[0010] In one embodiment, the second threshold compensation module includes a second conduction unit and a first reset unit, wherein,

[0011] The first end of the second conduction unit is connected to the second gate of the dual-gate transistor, the second end of the second conduction unit is connected to the second terminal of the dual-gate transistor and the first end of the first reset unit, the second end of the first reset unit is connected to the reset signal line, and the control terminals of the second conduction unit and the first reset unit are both connected to the first conduction signal line.

[0012] In the first compensation phase, the first turn-on unit is used to turn on the first gate and the first terminal of the dual-gate transistor in response to the first turn-on signal on the first turn-on signal line, the second turn-on unit is used to turn on the second gate and the second terminal of the dual-gate transistor in response to the first turn-on signal on the first turn-on signal line, and the first reset unit is used to turn on in response to the first turn-on signal on the first turn-on signal line, and discharge the first power supply voltage stored at the second terminal of the first storage unit to the reset signal line through the dual-gate transistor until the threshold voltage of the dual-gate transistor is compensated.

[0013] In one embodiment, a driving transistor and a voltage writing module are also included, wherein,

[0014] The dual-gate transistor is connected between the gate and the first electrode of the driving transistor and is used to compensate the threshold voltage of the driving transistor during the driving compensation phase.

[0015] The voltage writing module is connected to the gate of the driving transistor through the dual-gate transistor. The voltage writing module is used to couple a voltage containing data voltage information to the gate of the driving transistor through the dual-gate transistor during the data writing stage.

[0016] Optionally, it further includes a first light-emitting control module and a light-emitting module. The control terminal of the first light-emitting control module is connected to a first light-emitting control signal line. The first light-emitting control module, the driving transistor, and the light-emitting module are connected in series between the first power supply voltage terminal and the second power supply voltage terminal. The driving transistor is used to drive the light-emitting module to emit light during the light-emitting stage.

[0017] In one embodiment, a compensation switch module is further included, the compensation switch module being connected to the second gate of the dual-gate transistor and the second conduction signal line, the compensation switch module being used to turn on the dual-gate transistor in response to a second conduction signal on the second conduction signal line at least during the drive compensation phase and the data writing phase;

[0018] The first light emission control module is further configured to turn on at least during the drive compensation phase in response to the first light emission control signal on the first light emission control signal line, and transmit the first power supply voltage at the first power supply voltage terminal to the gate of the drive transistor via the dual-gate transistor;

[0019] Optionally, the first light-emitting control module is implemented by reusing the first control unit, the first light-emitting control signal line is the first control signal line, and the first light-emitting control signal is the first control signal;

[0020] Optionally, the compensation switch module includes a first capacitor, a first end of which is connected to the second conduction signal line, and a second end of which is connected to the second gate of the dual-gate transistor.

[0021] Optionally, the compensation switch module includes a first transistor, the gate of the first transistor is connected to the second conduction signal line, and the second terminal of the first transistor is connected to the second gate of the dual-gate transistor.

[0022] Optionally, the compensation switch module includes a first capacitor and a first transistor, the gate of the first transistor is connected to the second conduction signal line, the first terminal of the first transistor is connected to a DC potential terminal, the second terminal of the first transistor is connected to the second gate of the dual-gate transistor, and the first capacitor is connected between the gate and the second terminal of the first transistor.

[0023] In one embodiment, the voltage writing module includes a data writing unit and a coupling unit;

[0024] The control terminal of the data writing unit is connected to the first scan line, the first terminal of the data writing unit is connected to the data line, the second terminal of the data writing unit is connected to the first terminal of the coupling unit, and the second terminal of the coupling unit is connected to the first electrode of the driving transistor.

[0025] The data line is configured to transmit a fixed voltage during the drive compensation phase to reset the potential at the first end of the coupling unit, and to transmit a data voltage during the data writing phase.

[0026] In one embodiment, the voltage writing module includes a data writing unit, a second reset unit, and a coupling unit;

[0027] The first terminal of the second reset unit is connected to a fixed voltage, the second terminal of the second reset unit is connected to the first terminal of the coupling unit, the second terminal of the coupling unit is connected to the first electrode of the driving transistor, the first terminal of the coupling unit is also connected to the second terminal of the data writing unit, the first terminal of the data writing unit is connected to a data line, the control terminal of the data writing unit is connected to a first scan line, the control terminal of the second reset unit is connected to a second light emission control signal line, and the second reset unit is used to transmit the fixed voltage to the first terminal of the coupling unit during the driving compensation phase.

[0028] The data line is configured to transmit data voltage at least during the data writing phase.

[0029] In one embodiment, it further includes a second light-emitting control module, an initialization module, and a storage module, wherein,

[0030] The second light-emitting control module is connected between the second terminal of the driving transistor and the first terminal of the light-emitting module. The second terminal of the light-emitting module is connected to the second power supply voltage terminal, and the control terminal of the second light-emitting control module is connected to the second light-emitting control signal line.

[0031] The first light-emitting control module is configured to be turned on at least during the driving compensation phase and the light-emitting phase in response to a first light-emitting control signal on the first light-emitting control signal line, and the second light-emitting control module is configured to be turned on at least during the driving compensation phase and the light-emitting phase in response to a second light-emitting control signal on the second light-emitting control signal line.

[0032] The control terminal of the initialization module is connected to the second conduction signal line, the first terminal of the initialization module is connected to the reset signal line, the second terminal of the initialization module is connected to the first terminal of the light-emitting module, and the storage module is connected between the gate of the driving transistor and the first terminal of the light-emitting module.

[0033] The initialization module is used to transmit the reset voltage on the reset signal line to the first end of the light-emitting module during the drive compensation phase. The first reset unit is also used to transmit the reset voltage on the reset signal line to the first end of the storage module at least during the first initialization phase and the first compensation phase.

[0034] Optionally, the reset signal line connected to the first reset unit and the reset signal line connected to the initialization module are the same reset signal line;

[0035] Optionally, the reset signal line connected to the first reset unit and the reset signal line connected to the initialization module are different reset signal lines;

[0036] Optionally, the storage module includes a second capacitor, the first end of which is connected to the gate of the driving transistor, and the second end of which is connected to the first end of the light-emitting module.

[0037] Secondly, embodiments of this application provide a display panel, including the display circuit provided in any of the above embodiments.

[0038] Thirdly, embodiments of this application provide a display device, including the display panel as described above.

[0039] The aforementioned display circuit, display panel, and display device achieve threshold voltage compensation by replacing the transistors in the display circuit with dual-gate transistors and adding a first threshold compensation module and a second threshold compensation module. Specifically, during the compensation phase, the first threshold compensation module and the second threshold compensation module are controlled to conduct, connecting the first gate and the first electrode of the dual-gate transistor, and connecting the second gate and the second electrode, with a zero potential difference between the two connected components. Furthermore, under the action of the first power supply voltage VDD of the initialized compensation node, a current is generated flowing through the dual-gate transistor to the reset signal line, and the potential of the compensation node gradually decreases to the threshold voltage VDD of the dual-gate transistor. th Forward bias until channel turn-off, threshold voltage V th Setting it to 0 achieves the threshold voltage V of the dual-gate transistor. th The compensation is achieved by compensating for the threshold voltage of the transistors included in the display circuit. This effectively eliminates the influence of the unstable characteristics of the thin-film transistors in the display circuit on the light-emitting current. That is, even when the threshold voltage of the transistors included in the display circuit drifts, the light-emitting current flowing through the light-emitting device remains constant, thereby improving the brightness uniformity of the display panel and effectively solving the problem of poor display quality. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic diagram of the display circuit in one embodiment;

[0042] Figure 2 This is a schematic diagram of the display circuit in another embodiment;

[0043] Figure 3 This is a circuit diagram of the display circuit in one embodiment;

[0044] Figure 4 This is a schematic diagram of the display circuit in yet another embodiment;

[0045] Figure 5 This is a schematic diagram of the display circuit in yet another embodiment;

[0046] Figure 6 This is a schematic diagram of the display circuit in yet another embodiment;

[0047] Figure 7 This is a schematic diagram of the display circuit in yet another embodiment;

[0048] Figure 8 This is a schematic diagram of the display circuit in yet another embodiment;

[0049] Figure 9 This is a schematic diagram of the display circuit in yet another embodiment;

[0050] Figure 10 This is a schematic diagram of the display circuit in yet another embodiment;

[0051] Figure 11 This is a schematic diagram of the display circuit in yet another embodiment;

[0052] Figure 12 This is a schematic diagram of the display circuit in yet another embodiment;

[0053] Figure 13 This is a schematic diagram of the display circuit in yet another embodiment;

[0054] Figure 14 This is a schematic diagram of the display circuit in yet another embodiment;

[0055] Figure 15 This is a schematic diagram of the circuit structure of the display circuit in another embodiment;

[0056] Figure 16 This is a timing diagram of the drive circuitry in one embodiment;

[0057] Figure 17 This is a timing diagram of the drive circuitry in another embodiment;

[0058] Figure 18 This is a schematic diagram of a display panel in one embodiment;

[0059] Figure 19 This is a schematic diagram of a display device in one embodiment.

[0060] Explanation of reference numerals in the attached figures:

[0061] T1: Dual-gate transistor; 110: First threshold compensation module; 120: Second threshold compensation module; N1: Compensation node; Vref: Reset voltage; VDD: First power supply voltage; 111: First control unit; 112: First conduction unit; 113: First storage unit; 121: Second conduction unit; 122: First reset unit; A1: First conduction signal; B: First control signal; T2: Second transistor; T3: Third transistor; T4: Fourth transistor; T5: Fifth transistor; Cst3: Third capacitor; 130: Voltage writing module; T6: Driving transistor; Vcom: Fixed voltage; Vdata: Data voltage; 140: First light-emitting control module; 150: Light-emitting module; VSS: Second power supply voltage; EM1: First light-emitting control module; 160: Compensation switch module; A2: Second conduction signal; Cst1: First capacitor; T7: First transistor; VGH: DC voltage; 170: Second light emission control module; 180: Initialization module; 190: Storage module; EM2: Second light emission control signal; Vref1: First reset voltage; Vref2: Second reset voltage; 131: Data writing unit; 133: Coupling unit; N2: Write node; 132: Second reset unit; Scan: Scan signal; T8: Eighth transistor; T9: Ninth transistor; T10: Tenth transistor; T11: Eleventh transistor; D1: Light emission diode; Cst2: Second capacitor; Cst4: Fourth capacitor; 100: Display circuit; 200: Display panel; 300: Display device. Detailed Implementation

[0062] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0063] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0064] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0065] It is understood that in the following embodiments, "connection" should be interpreted as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., transmit electrical signals or data to each other. It is understood that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a portion of an element" refers to part or all of an element.

[0066] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0067] It should be noted that in related technologies, display panels suffer from poor display quality due to the instability of the thin-film transistors (TFTs) in the display circuit. The inventors have discovered that in commonly used display panel circuits, taking the pixel circuit as an example, a typical display panel includes a drive thin-film transistor (DTFT) and at least one switch thin-film transistor (STFT). The drive transistor primarily controls the light-emitting current flowing through the light-emitting device, while the switch transistor primarily configures the gate-source voltage of the drive transistor. Furthermore, circuit simulation results show that when the threshold voltage V of the drive transistor... th When forward biased by 5V, the screen current increases from 64.6nA to 68.2nA, an increase of 5.6%; when the threshold voltage V of the transistor used to control data writing to the gate of the driving transistor... th When forward biased by 5V, the plate current increases from 64.6nA to 67.3nA, an increase of 4.2%; when the threshold voltage V of the switching transistor connected to the gate of the driving transistor for threshold voltage compensation of the driving transistor is... th When forward biased by 5V, the screen current increases from 64.6nA to 74.6nA, an increase of 15.5%. This indicates that the threshold voltage drift of various transistors in the display circuit affects the display quality of the display panel to varying degrees. Currently, to address the problem of poor display quality, common solutions focus on compensating for the threshold voltage drift of the driving transistors, neglecting the fact that the threshold voltage drift of the switching transistors also couples to the driving transistors, causing changes in screen brightness.

[0068] To address the aforementioned problems, the inventors have further developed a technical solution for the embodiments of this application, which can replace any transistor contained in the display circuit with a dual-gate transistor, and add a first threshold compensation module and a second threshold compensation module connected to it to achieve threshold voltage compensation, effectively solving the problem of poor display quality caused by the instability of thin-film transistor characteristics.

[0069] Figure 1 This is a schematic diagram of a display circuit provided in an embodiment of this application, with reference to... Figure 1 The display circuit provided in this application embodiment includes a dual-gate transistor T1, a first threshold compensation module 110, and a second threshold compensation module 120. The first threshold compensation module 110 and the second threshold compensation module 120 are used to compensate the threshold voltage of the dual-gate transistor T1. The first gate and the first electrode of the dual-gate transistor T1 are both connected to the first threshold compensation module 110, and the second gate and the second electrode of the dual-gate transistor T1 are both connected to the second threshold compensation module 120. The first threshold compensation module 110 is also connected to a first power supply voltage terminal, and the second threshold compensation module 120 is also connected to a reset signal line.

[0070] Specifically, the first power supply voltage terminal is used to connect a positive voltage to initialize the compensation node N1 through the first threshold compensation module 110. For example, the first power supply voltage terminal can be connected to the first power supply voltage VDD. The compensation node N1 is specifically the end where the first threshold compensation module 110 is connected to the first gate (taking the bottom gate BG as an example) of the dual-gate transistor T1. It can be understood that when the compensation node N1 is at a positive first power supply voltage VDD, the potential of the first gate of the dual-gate transistor T1 connected to the compensation node N1 is also the first power supply voltage VDD, thereby enabling control of the threshold voltage V of the dual-gate transistor T1. th <0.

[0071] Furthermore, after initializing compensation node N1, the first threshold compensation module 110 can be turned on to short-circuit the first gate and first electrode of dual-gate transistor T1, while the second threshold compensation module 120 is turned on to short-circuit the second gate and second electrode of dual-gate transistor T1. It can be understood that after the short circuit, the potential difference between the first gate and first electrode, and between the second gate and second electrode, is zero, enabling dual-gate transistor T1 to conduct. Subsequently, under the action of the first power supply voltage VDD of the initialized compensation node N1, a current will flow from compensation node N1 through the first threshold compensation module 110, dual-gate transistor T1, and second threshold compensation module 120 to the reset signal line Vref. The potential of compensation node N1 will gradually decrease until the threshold voltage Vref of dual-gate transistor T1 is reached. th Forward bias turns the channel off, turning off the dual-gate transistor T1. At this time, the threshold voltage V of the dual-gate transistor T1... thThe threshold voltage V of the dual-gate transistor T1 is set to 0, thereby achieving the desired threshold voltage V. th Compensation.

[0072] The aforementioned display circuit, by replacing the transistors contained in the display circuit with dual-gate transistors and adding a first threshold compensation module and a second threshold compensation module to achieve threshold voltage compensation, can effectively eliminate the influence of the unstable characteristics of the thin-film transistors in the display circuit on the light-emitting current. That is, even when the threshold voltage of the transistors included in the display circuit drifts, the light-emitting current flowing through the light-emitting device remains constant, thereby improving the brightness uniformity of the display panel and effectively solving the problem of poor display quality of the display panel.

[0073] Figure 2 This is a schematic diagram of a display circuit provided in an embodiment of this application, with reference to... Figure 2 The first threshold compensation module 110 includes a first control unit 111, a first conduction unit 112, and a first storage unit 113. The first terminal of the first control unit 111 is connected to the first terminal of the first storage unit 113 and a first power supply voltage terminal. The second terminal of the first control unit 111 is connected to the first terminal of the first conduction unit 112 and the first terminal of the dual-gate transistor T1. The control terminal of the first control unit 111 is connected to a first control signal line. The second terminal of the first conduction unit 112 is connected to the first gate of the dual-gate transistor T1 and the second terminal of the first storage unit 113. The control terminal of the first conduction unit 112 is connected to a first conduction signal line. In the first initialization phase, the first conduction unit 112 is turned on in response to a first conduction signal A1 on the first conduction signal line, and the first control unit 111 is turned on in response to a first control signal B on the first control signal line. The first power supply voltage at the first power supply voltage terminal is transmitted to the second terminal of the first storage unit 113 via the first control unit 111 and the first conduction unit 112 to complete the initialization of the first storage unit 113.

[0074] Please continue to refer to this. Figure 2The second threshold compensation module 120 includes a second conduction unit 121 and a first reset unit 122. The first terminal of the second conduction unit 121 is connected to the second gate of the dual-gate transistor T1, and the second terminal of the second conduction unit 121 is connected to the second terminal of the dual-gate transistor T1 and the first terminal of the first reset unit 122. The second terminal of the first reset unit 122 is connected to the reset signal line Vref. The control terminals of both the second conduction unit 121 and the first reset unit 122 are connected to the first conduction signal line. During the first compensation stage, the first conduction unit... The first gate of the dual-gate transistor T1 is turned on in response to the first conduction signal A1 on the first conduction signal line. The second conduction unit 121 is turned on in response to the first conduction signal A1 on the first conduction signal line. The second reset unit 122 is turned on in response to the first conduction signal A1 on the first conduction signal line. The first power supply voltage stored at the second terminal of the first storage unit 113 is discharged to the reset signal line through the dual-gate transistor T1 until the threshold voltage of the dual-gate transistor T1 is compensated.

[0075] Understandable, with Figure 2 Taking the display circuit shown as an example, the process of compensating the threshold voltage of the dual-gate transistor T1 includes at least a first initialization stage and a first compensation stage.

[0076] Specifically, in the first initialization phase, the first turn-on unit 112 turns on in response to the first turn-on signal A1, and the first control unit 111 turns on in response to the first control signal B. The first power supply voltage VDD is transmitted to the second terminal (compensation node N1) of the first storage unit 113 via the first control unit 111 and the first turn-on unit 112, thereby initializing the first storage unit 113 (the voltage of compensation node N1 is the first power supply voltage VDD). At this time, since the first terminal of the first storage unit 113 is connected to the first gate of the dual-gate transistor T1 (taking the bottom gate BG as an example), the threshold voltage V of the dual-gate transistor T1 is increased. th <0.

[0077] Subsequently, the first compensation stage begins. The first control unit 111 turns off in response to the first control signal B, and the first conduction unit 112 remains on in response to the first conduction signal A1, shorting the bottom gate of the dual-gate transistor T1 to its first electrode (BGD), resulting in a zero potential difference. Simultaneously, the second conduction unit 121 remains on in response to the first conduction signal A1, shorting the top gate of the dual-gate transistor T1 to its second electrode (TGS), again resulting in a zero potential difference, further keeping the dual-gate transistor T1 continuously on. With the dual-gate transistor T1 continuously on and the first reset unit 122 on in response to the first conduction signal A1, a first discharge path is generated, flowing from the compensation node N1 through the first conduction unit 112, the dual-gate transistor T1, and the first reset unit 122 to the reset signal line Vref. The potential of the compensation node N1 gradually decreases until the threshold voltage Vref of the dual-gate transistor T1 is reached. th The transistor is gradually forward biased until the channel is turned off, thus turning off the dual-gate transistor T1. At this time, the threshold voltage V of the dual-gate transistor T1... th The threshold voltage V of the dual-gate transistor T1 is set to 0, thereby achieving the desired threshold voltage V. th The compensation is performed. It can be understood that after compensation, the bottom gate voltage (BG voltage) of the dual-gate transistor T1 will be stored in the first memory cell 113, continuously affecting the threshold voltage V of the dual-gate transistor T1. th Compensation is performed to ensure the display quality of the display panel in subsequent display stages.

[0078] Figure 3 This is a schematic diagram of a display circuit provided in an embodiment of this application.

[0079] For example, refer to Figure 3 The first control unit 111 includes a second transistor T2. The gate of the second transistor T2 is connected to the first control signal line. The first terminal of the second transistor T2 is connected to the first terminal of the first storage unit 113 and the first power supply voltage terminal. The second terminal of the second transistor T2 is connected to the first terminal of the first conduction unit 112 and the first terminal D of the dual-gate transistor T1.

[0080] For example, please continue to refer to Figure 3 The first conducting unit 112 includes a third transistor T3. The gate of the third transistor T3 is connected to the first conducting signal line. The first terminal of the third transistor T3 is connected to the second terminal of the second crystal T2 and the first terminal D of the dual-gate transistor T1. The second terminal of the third transistor T3 is connected to the bottom gate BG of the dual-gate transistor T1 and the second terminal of the first memory unit 113.

[0081] For example, please continue to refer to Figure 3The first storage cell 113 includes a third capacitor Cst3. The first terminal of the third capacitor Cst3 is connected to the first power supply voltage terminal and the first terminal of the second transistor T2. The second terminal of the third capacitor Cst3 (compensation node N1) is connected to the bottom gate BG of the dual-gate transistor T1 and the second terminal of the third transistor T3.

[0082] For example, please continue to refer to Figure 3 The second conduction unit 121 includes a fourth transistor T4, the gate of the fourth transistor T4 is connected to the first conduction signal line, the first terminal of the fourth transistor T4 is connected to the top gate TG of the dual-gate transistor T1, and the second terminal of the fourth transistor T4 is connected to the second terminal S of the dual-gate transistor T1 and the first terminal of the first reset unit 122.

[0083] For example, please continue to refer to Figure 3 The first reset unit 122 includes a fifth transistor T5. The gate of the fifth transistor T5 is connected to the first conduction signal line. The first terminal of the fifth transistor T5 is connected to the second terminal S of the dual-gate transistor T1 and the second terminal of the fourth transistor T4. The second terminal of the fifth transistor T5 is connected to the reset signal line.

[0084] It is understandable that the above-mentioned threshold voltage compensation method for transistors can be applied to any display circuit, as long as the display circuit contains thin-film transistors, and the unstable characteristics of thin-film transistors may lead to poor display quality in the display panel used in the display circuit.

[0085] For example, the following describes an application scenario for threshold voltage compensation of a switching transistor in a pixel circuit, using a pixel circuit as an example of a display circuit. In this embodiment, the switching transistor is connected to the gate of a driving transistor and is used for threshold voltage compensation of the driving transistor.

[0086] Figure 4 This is a schematic diagram of a display circuit provided in an embodiment of this application. (Reference) Figure 4 The switching transistor used for threshold voltage compensation of the driving transistor in the display circuit needs to be replaced with a dual-gate transistor T1, and a first threshold compensation module 110 and a second threshold compensation module 120 need to be added for threshold voltage compensation. In addition, the display circuit also includes a driving transistor T6 and a voltage writing module 130. The dual-gate transistor T1 is connected between the gate G and the first electrode D of the driving transistor T6, and is used to compensate the threshold voltage of the driving transistor T6 during the driving compensation phase. The voltage writing module 130 is connected to the gate G of the driving transistor T6 through the dual-gate transistor T1, and is used to couple a voltage containing data voltage information to the gate of the driving transistor T6 via the dual-gate transistor T1 during the data writing phase.

[0087] Specifically, after completing the threshold voltage compensation for the dual-gate transistor T1, the dual-gate transistor T1 can be used to perform threshold voltage compensation for the driving transistor T6, thus entering the driving compensation stage.

[0088] During the drive compensation phase, the dual-gate transistor T1 is first turned on. The first power supply voltage VDD initializes the gate G and first terminal D of the drive transistor T1, ensuring that the potentials of both the gate G and first terminal D are maintained at the first power supply voltage VDD. Furthermore, the dual-gate transistor T1 is kept on, connecting the gate G and first terminal D of the drive transistor T6. With the potentials of the gate G and first terminal D of the drive transistor T1 at the first power supply voltage VDD, the drive transistor T6 will generate a current flowing from its first terminal D to its second terminal S, until the voltage difference between the gate G and the second terminal S of the drive transistor T6 equals the threshold voltage V of the drive transistor T6. th When the threshold voltage V is reached, the driving transistor T6 is turned off. Therefore, the voltage at the gate G of the driving transistor T6 is equal to its threshold voltage V. th The associated voltage enables threshold compensation for the driving transistor T6. During this process, the voltage writing module 130 can be configured to input a fixed voltage Vcom.

[0089] Furthermore, during the data writing stage, the control voltage writing module 130 couples the voltage Vdata containing data voltage information to the gate G of the driving transistor T6 via the dual-gate transistor T1, so that the voltage of the gate G of the driving transistor T6 is associated with the data voltage Vdata.

[0090] Figure 5 This is a schematic diagram of a display circuit provided in an embodiment of this application. Optionally, refer to... Figure 5 The above-mentioned display circuit may further include a first light-emitting control module 140 and a light-emitting module 150. The control terminal of the first light-emitting control module 140 is connected to the first light-emitting control signal line. The first light-emitting control module 140, the driving transistor T6 and the light-emitting module 150 are connected in series between the first power supply voltage terminal and the second power supply voltage terminal. The driving transistor T6 is used to drive the light-emitting module 150 to emit light during the light-emitting stage.

[0091] The first power supply voltage terminal is used to connect to the first power supply voltage VDD, and the second power supply voltage terminal is used to connect to the second power supply voltage VSS. The first power supply voltage VDD can be a positive voltage, and the second power supply voltage VSS can be a negative voltage.

[0092] Specifically, the first light-emitting control module 140 is turned on at least during the driving compensation stage and the light-emitting stage in response to the first light-emitting control signal EM1 on the first light-emitting control signal line, so that the first power supply voltage VDD at the first power supply voltage terminal is transmitted to the first terminal D of the driving transistor T6 through the first light-emitting control module 140, and is transmitted to the gate G of the driving transistor T6 through the dual-gate transistor T1.

[0093] In the driving compensation phase, the first light-emitting control module 140 and the dual-gate transistor T1 must be turned on first to initialize the gate G and first electrode D of the driving transistor T1 using the first power supply voltage VDD. Then, the first light-emitting control module 140 is turned off while the dual-gate transistor T1 remains on. The dual-gate transistor T1 connects the gate G and first electrode D of the driving transistor T6. With the potential of the gate G and first electrode D of the driving transistor T1 equal to the first power supply voltage VDD, the driving transistor T6 will generate a current flowing from its first electrode D to its second electrode S until the voltage difference between the gate G and the second electrode S of the driving transistor T6 equals the threshold voltage V of the driving transistor T6. th When the threshold voltage V is reached, the driving transistor T6 is turned off. Therefore, the voltage at the gate G of the driving transistor T6 is equal to its threshold voltage V. th The associated voltage enables threshold compensation for the driving transistor T6. During the light-emitting phase, the first light-emitting control module 140 is continuously turned on, and the driving transistor T6 generates a driving current based on the voltage of its gate G, driving the light-emitting module 150 to emit light.

[0094] Figure 6 This is a schematic diagram of a display circuit provided in an embodiment of this application. Optionally, the first light-emitting control module 140 can be implemented by reusing the first control unit 111, the first light-emitting control signal line is the first control signal line, and the first light-emitting control signal EM1 is the first control signal B.

[0095] In the drive compensation phase, the first control unit 111 and the dual-gate transistor T1 must first be turned on to initialize the gate G and first electrode D of the driving transistor T1 using the first power supply voltage VDD. Then, the first control unit 111 must be turned off while the dual-gate transistor T1 remains on. The dual-gate transistor T1 connects the gate G and first electrode D of the driving transistor T6. With the potential of the gate G and first electrode D of the driving transistor T1 equal to the first power supply voltage VDD, the driving transistor T6 will generate a current flowing from its first electrode D to its second electrode S until the voltage difference between the gate G and the second electrode S of the driving transistor T6 equals the threshold voltage V of the driving transistor T6. th When the threshold voltage V is reached, the driving transistor T6 is turned off. Therefore, the voltage at the gate G of the driving transistor T6 is equal to its threshold voltage V. thThe associated voltage enables threshold compensation for the driving transistor T6. During the light-emitting phase, the first control unit 111 is continuously turned on, and the driving transistor T6 generates a driving current based on the voltage of its gate G, driving the light-emitting module 150 to emit light.

[0096] Figure 7 This is a schematic diagram of a display circuit provided in an embodiment of this application. (Reference) Figure 7 In one exemplary embodiment, the display circuit further includes a compensation switch module 160, which is connected to the second gate of the dual-gate transistor T1 and the second conduction signal line. The compensation switch module 160 is used to turn on the dual-gate transistor T1 in response to the second conduction signal A2 on the second conduction signal line, at least during the drive compensation phase and the data writing phase.

[0097] Figure 8 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 8 In one exemplary embodiment, the compensation switch module 160 includes a first capacitor Cst1, with a first terminal of the first capacitor Cst1 connected to a second conduction signal line and a second terminal of the first capacitor Cst1 connected to the second gate of a dual-gate transistor T1. Specifically, during the drive compensation phase and the data writing phase, a second conduction signal A2 on the second conduction signal line is coupled to the top gate TG of the dual-gate transistor T1 via the first capacitor Cst1, thereby turning on the dual-gate transistor T1.

[0098] Figure 9 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 9 In one exemplary embodiment, the compensation switch module 160 includes a first transistor T7. The control terminal of the first transistor T7 is connected to a second conduction signal line via its first electrode, and the second electrode of the first transistor T7 is connected to the second gate of the dual-gate transistor T1. Specifically, during the drive compensation phase and the data writing phase, the first transistor T7 conducts in response to a second conduction signal A2 on the second conduction signal line, transmitting the second conduction signal A2 connected to its first electrode to the top gate TG of the dual-gate transistor T1, thereby turning on the dual-gate transistor T1.

[0099] Figure 10 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 10In one exemplary embodiment, the compensation switch module 160 includes a first capacitor Cst1 and a first transistor T7. The control terminal of the first transistor T7 is connected to a second conduction signal line, the first electrode of the first transistor T7 is connected to a DC potential terminal, and the second electrode of the first transistor T7 is connected to the second gate of the dual-gate transistor T1. The first capacitor Cst1 is connected between the gate and the second electrode of the first transistor T7. Specifically, during the drive compensation phase and the data writing phase, the first transistor T7 is turned on in response to the second conduction signal A2 on the second conduction signal line, transmitting the DC voltage VGH connected to its first electrode to the top gate TG of the dual-gate transistor T1, thereby turning on the dual-gate transistor T1.

[0100] It is understood that, in the above embodiments, by controlling the conduction scheme of the dual-gate transistor through different control methods, it is possible to ensure that the dual-gate transistor conducts stably and effectively during the drive compensation stage and the data writing stage, thereby ensuring the stable display of the display panel.

[0101] Figure 11 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 11 In one exemplary embodiment, based on the above embodiments, the display circuit further includes a second light-emitting control module 170. The second light-emitting control module 170 is connected between the second terminal S of the driving transistor T6 and the first terminal of the light-emitting module 150. The second terminal of the light-emitting module 150 is connected to the second power supply voltage terminal. The control terminal of the second light-emitting control module 170 is connected to the second light-emitting control signal line. The second light-emitting control module 170 is used to conduct at least during the driving compensation phase and the light-emitting phase in response to the second light-emitting control signal EM2 on the second light-emitting control signal line.

[0102] Please continue to refer to this. Figure 11 In one exemplary embodiment, based on the above embodiments, the display circuit further includes an initialization module 180. The control terminal of the initialization module 180 is connected to the second conduction signal line, the first terminal of the initialization module 180 is connected to the reset signal line, and the second terminal of the initialization module 180 is connected to the first terminal of the light-emitting module 150. The initialization module 180 is used to transmit the reset voltage on the reset signal line to the first terminal of the light-emitting module 150 during the drive compensation phase.

[0103] Specifically, the initialization module 180 transmits the reset voltage Vref to the first terminal of the light-emitting module 150 during the drive compensation phase to initialize the potential of the first terminal of the light-emitting module 150. The reset voltage Vref is lower than the turn-on voltage of the light-emitting module 150; for example, the reset voltage Vref can be negative. Since the initialization module 180 is continuously turned on in response to the second conduction signal A2 during the drive compensation and data writing phases, the potential of the first terminal of the light-emitting module 150 is maintained at the reset voltage Vref, preventing the light-emitting module 150 from "stealing light" during non-light-emitting phases.

[0104] For example, the drive compensation stage may include an initialization sub-stage and a compensation sub-stage, wherein the initialization sub-stage is used to initialize the gate G of the drive transistor T6 and the light-emitting module 150, and the compensation sub-stage is used to compensate the threshold voltage of the drive transistor T6.

[0105] During the initialization sub-stage, the first control unit 111 is turned on in response to the first control signal B, and the first power supply voltage VDD is transmitted to the first terminal D of the driving transistor T6 via the first control unit 111. Simultaneously, the compensation switch module 160 transmits the second turn-on signal A2 to the top gate TG of the dual-gate transistor T1, turning on the dual-gate transistor T1. This connects the gate G and the first terminal D of the driving transistor T6, making the potentials of both the gate G and the first terminal D of the driving transistor T6 the first power supply voltage VDD, with zero potential difference, thus turning on the driving transistor T6. Simultaneously, the initialization module 180 is turned on in response to the second turn-on signal A2, transmitting the reset voltage Vref to the first terminal of the light-emitting module 150 to initialize the first terminal of the light-emitting module 150.

[0106] During the compensation sub-stage, the first control unit 111 turns off in response to the first control signal B, the initialization module 180 and the dual-gate transistor T1 remain on in response to the second conduction signal A2, and the second light-emitting control module 170 turns on in response to the second light-emitting control signal EM2. Under the action of the first power supply voltage VDD of the gate G of the driving transistor T6, a second discharge path will be generated from the first terminal D of the driving transistor T6 through the driving transistor T6, the second light-emitting control module 170 and the second initialization unit 180 to the reset signal line. The potential of the first terminal D of the driving transistor T6 will gradually decrease until it drops to Vref+Vth, at which point the driving transistor T6 turns off. At this time, the voltage of the gate G of the driving transistor T6 is also Vref+Vth. While realizing the threshold voltage compensation of the driving transistor T6, the reset voltage Vref can also be transmitted to the gate G of the driving transistor T6 to realize the gate initialization of the driving transistor T6.

[0107] For example, the reset signal line connected to the first reset unit 122 and the reset signal line connected to the initialization module 180 can be the same reset signal line or different reset signal lines. In this embodiment, to avoid the threshold voltage compensation of the dual-gate transistor and the driving transistor being implemented through the same reset signal line, resulting in a large loading on the reset signal line, the reset signal line connected to the first reset unit 122 and the reset signal line connected to the initialization module 180 are implemented through different reset signal lines, i.e., as shown below. Figure 12 As shown, the first reset unit 122 is connected to the first reset signal line, and the initialization module 180 is connected to the second reset signal line.

[0108] Please continue to refer to this. Figure 11 In one exemplary embodiment, based on the above embodiments, the display circuit further includes a storage module 190, which is connected between the gate G of the driving transistor T6 and the first terminal of the light-emitting module 150. The first reset unit 122 is further configured to transmit the reset voltage Vref on the reset signal line to the first terminal of the storage module 190 during the first initialization phase and the first compensation phase. Specifically, during the first initialization phase and the first compensation phase, the first reset unit 122, in response to the first conduction signal A1 being turned on, transmits the reset voltage Vref to the first terminal of the storage module 190 (the gate G of the driving transistor T6) to initialize the storage module 190.

[0109] Figure 13 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 13 In one exemplary embodiment, based on the above embodiments, the voltage writing module 130 includes a data writing unit 131 and a coupling unit 133; the control terminal of the data writing unit 131 is connected to a first scan line, the first end of the data writing unit 131 is connected to a data line, the second end of the data writing unit 131 is connected to the first end of the coupling unit 133, and the second end of the coupling unit 131 is connected to the first terminal D of the driving transistor T6; the data line is configured to transmit a fixed voltage Vcom during the drive compensation phase to reset the potential of the first end of the coupling unit 133, and to transmit a data voltage Vdata during the data writing phase.

[0110] Specifically, during the drive compensation phase, the data writing unit 131 responds to the scan signal Scan transmitted on the first scan line and turns on, outputting the fixed voltage Vcom transmitted on the data line to the first terminal of the coupling unit 133. At the same time, the first power supply voltage VDD is transmitted to the second terminal of the coupling unit 133 via the first control unit 111 to keep the voltage across the coupling unit 133 stable.

[0111] During the data writing phase, the voltage transmitted on the data line becomes the data voltage Vdata. The data writing unit 131 remains on in response to the scan signal Scan transmitted on the first scan line, outputting the data voltage Vdata transmitted on the data line to the first terminal of the coupling unit 133. The voltage at the first terminal of the coupling unit 133 jumps. Under the coupling effect of the coupling unit 133, the difference between the data voltage Vdata and the fixed voltage Vcom (Vdata-Vcom) is coupled to the first terminal D of the driving transistor T6, so that the potential of the first terminal D of the driving transistor T6 changes from the potential Vref+Vth at the end of the drive compensation phase to Vref+Vth+Vdata-Vcom, and then is transmitted to the gate G of the driving transistor T6 through the dual-gate transistor T1, realizing the writing of the data voltage Vdata to the gate G of the driving transistor T6 (potential Vref+Vth+Vdata-Vcom). It can be understood that at this time, the potential of the second terminal S of the driving transistor T6 remains at the reset voltage Vref.

[0112] In this implementation, by multiplexing the data lines to transmit the fixed voltage Vcom and the data voltage Vdata in a time-division manner, it is beneficial to save the number of signal lines on the display panel and achieve a high PPI.

[0113] It is understandable that, in order to avoid interference caused by using the same signal line to transmit data voltage Vdata and fixed voltage Vcom, different signal lines can be used for transmission. Figure 14 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 14 In one exemplary embodiment, based on the above embodiments, the voltage writing module 130 includes a data writing unit 131, a second reset unit 132, and a coupling unit 133; the first end of the second reset unit 132 is connected to a fixed voltage Vcom, the second end of the second reset unit 132 is connected to the first end of the coupling unit 133, the second end of the coupling unit 133 is connected to the first electrode of the driving transistor T6, the first end of the coupling unit 133 is also connected to the second end of the data writing unit 131, the first end of the data writing unit 131 is connected to a data line, the control end of the data writing unit 131 is connected to a first scan line, the control end of the second reset unit 132 is connected to a second light emission control signal line, and the second reset unit 132 is used to transmit the fixed voltage Vcom to the first end of the coupling unit 133 during the drive compensation phase; the data line is configured to transmit data voltage at least during the data writing phase.

[0114] Specifically, during the drive compensation phase, the data writing unit 131 turns off in response to the scan signal Scan transmitted on the first scan line, and the second reset unit 132 turns on in response to the second light emission control signal EM2 on the second light emission control signal line, outputting the fixed voltage Vcom connected to the first terminal to the first terminal (writing node N2) of the coupling unit 133. At the same time, the first power supply voltage VDD is transmitted to the second terminal of the coupling unit 133 through the first control unit 111 to keep the voltage across the coupling unit 133 stable.

[0115] During the data writing phase, the data writing unit 131 is turned on in response to the scan signal Scan transmitted on the first scan line, outputting the data voltage Vdata transmitted on the data line to the first terminal of the coupling unit 133, so that the potential of the writing node N2 changes to the difference between the data voltage Vdata and the fixed voltage Vcom (Vdata-Vcom). Then, under the coupling action of the coupling unit 133, the voltage of the writing node N2 is coupled to the first terminal D of the driving transistor T6, so that the potential of the first terminal D of the driving transistor T6 changes from the potential Vref+Vth at the end of the drive compensation phase to Vref+Vth+Vdata-Vcom, and then is transmitted to the gate G of the driving transistor T6 through the dual-gate transistor T1, realizing the writing of the data voltage Vdata to the gate G of the driving transistor T6 (potential Vref+Vth+Vdata-Vcom). At the same time, the potential of the second terminal S of the driving transistor T6 remains at the reset voltage Vref.

[0116] Figure 15 This is a schematic diagram of another display circuit provided in an embodiment of the present invention, with reference to... Figure 15 The light-emitting module 150 is a light-emitting diode D1, and the second light-emitting control module 170 includes an eighth transistor T8. The gate of the eighth transistor T8 is connected to the second light-emitting control signal line, the first terminal of the eighth transistor T8 is connected to the second terminal S of the driving transistor T6, and the second terminal of the eighth transistor T8 is connected to the anode of the light-emitting diode D1.

[0117] For example, please continue to refer to Figure 15 The initialization module 180 includes a ninth transistor T9, the gate of which is connected to a second conduction signal line, the first terminal of which is connected to a reset signal line, and the second terminal of which is connected to the anode of a light-emitting diode D1.

[0118] For example, please continue to refer to Figure 15The data writing unit 131 includes a tenth transistor T10, the second reset unit 132 includes an eleventh transistor T11, and the coupling unit 133 includes a fourth capacitor Cst4. The gate of the tenth transistor T10 is connected to the first scan line, the first terminal of the tenth transistor T10 is connected to the data line, the second terminal of the tenth transistor T10 is connected to the first terminal of the fourth capacitor Cst4 (write node N2), the gate of the eleventh transistor T11 is connected to the second light emission control signal line, the first terminal of the eleventh transistor T11 is connected to a fixed voltage Vcom, the second terminal of the eleventh transistor T11 is connected to the first terminal of the fourth capacitor Cst4, and the second terminal of the fourth capacitor Cst4 is connected to the first terminal D of the driving transistor T1.

[0119] For example, please continue to refer to Figure 15 The storage module 190 includes a second capacitor Cst2, the first terminal of which is connected to the gate G of the driving transistor T6, and the second terminal of which is connected to the anode of the light-emitting diode D1.

[0120] Figure 16 A driving timing diagram of a display circuit provided in this application embodiment can be applied to... Figure 15 The display circuit shown is used to Figure 15 Taking the example of N-type transistors as shown, the specific operation of the display circuit provided in the embodiments of this application will be explained. (Combined with...) Figure 15 and Figure 16 The operation of the display circuit provided in this embodiment includes a switching compensation stage t1, a driving compensation stage t2, a data writing stage t3, and a light emission stage t4. The switching compensation stage t1 further includes a first initialization stage t11 and a first compensation stage t12, and the driving compensation stage t2 also includes a second initialization stage t21 and a second compensation stage t22.

[0121] In the first initialization stage t11 of the switching compensation phase t1, the first control signal B is at the on level (e.g., high level); the second light-emitting control signal EM2 is at the off level (e.g., low level); the first conduction signal A1 is at the on level (e.g., high level); the second conduction signal A2 is at the off level (e.g., low level); and the scan signal Scan is at the off level (e.g., low level). Therefore, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted through the second transistor T2 and the third transistor T3 to the second terminal of the third capacitor Cst3 (compensation node N1), thus initializing the third capacitor Cst3 (the voltage at compensation node N1 is the first power supply voltage VDD). The reset voltage Vref is transmitted through the fifth transistor T5 to the first terminal of the second capacitor Cst2 and the gate G of the driving transistor T6, thus initializing the second capacitor Cst2. Therefore, the voltages at the first and second terminals of the third capacitor Cst3 are both VDD, and the voltage at the first terminal of the second capacitor Cst2 is the reset voltage Vref. The voltage at the first terminal D of the driving transistor T6 is the first power supply voltage VDD, and the voltage at the gate G is the reset voltage Vref, so the driving transistor T6 is turned off.

[0122] In the first compensation stage t21 of the switching compensation phase t1, the first control signal B is at the off level (e.g., low level); the second light-emitting control signal EM2 is at the off level (e.g., low level); the first conduction signal A1 is at the conduction level (e.g., high level); the second conduction signal A2 is at the off level (e.g., low level); and the scan signal Scan is at the off level (e.g., low level). Therefore, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on. The second transistor T2 switches to off in response to the first control signal B, and simultaneously, the second terminal of the third capacitor Cst3 is connected to the bottom gate BG of the dual-gate transistor T1, causing the threshold voltage V of the dual-gate transistor T1 to... th <0. The third transistor T3 is turned on, shorting the bottom gate of the dual-gate transistor T1 to its first terminal (BGD), resulting in a zero potential difference. The fourth transistor T4 is turned on, shorting the top gate of the dual-gate transistor T1 to its second terminal (TGS), also resulting in a zero potential difference, further keeping the dual-gate transistor T1 continuously on. With the dual-gate transistor T1 continuously on and the fifth transistor T5 on, a first discharge path is generated, flowing from the compensation node N1 through the third transistor T3, the dual-gate transistor T1, and the fifth transistor T5 to the reset signal line. The potential of the compensation node N1 will gradually decrease until the threshold voltage V of the dual-gate transistor T1 is reached. th Gradually forward biased until channel turn-off, threshold voltage V th The threshold voltage V of the dual-gate transistor T1 is set to 0. thThe compensation is performed. Therefore, the third capacitor Cst3 stores the bottom gate voltage of the dual-gate transistor T1 after compensation, and the voltage at the first terminal of the second capacitor Cst2 is the reset voltage Vref. The voltage at the first terminal D of the driving transistor T6 is the same as the voltage at the first terminal of the third capacitor Cst3, and the voltage at the gate G is the reset voltage Vref, so the driving transistor T6 remains off.

[0123] In the second initialization stage t21 of the drive compensation stage t2, the first control signal B is at the on level (e.g., high level); the second light-emitting control signal EM2 is at the off level (e.g., low level); the first turn-on signal A1 is at the off level (e.g., low level); the second turn-on signal A2 is at the on level (e.g., high level); and the scan signal Scan is at the off level (e.g., low level). Therefore, the dual-gate transistor T1, the second transistor T2, and the ninth transistor T9 are turned on. The first power supply voltage VDD is transmitted to the first terminal D of the driving transistor T6 via the second transistor T2. At the same time, the dual-gate transistor T1 is turned on, making the gate G and the first terminal D of the driving transistor T6 connected. The potentials of the gate G and the first terminal D of the driving transistor T6 are both the first power supply voltage VDD, with zero potential difference, and the driving transistor T6 is turned on. Simultaneously, the reset voltage Vref is transmitted to the anode of the light-emitting diode D1 via the ninth transistor T9, initializing the anode of the light-emitting diode D1. Therefore, the voltages at the gate (G) and first terminal (D) of the driving transistor T6 are both VDD, the voltage at the first terminal of the second capacitor Cst2 is VDD, and the voltage at the second terminal is Vref. The voltage at the first terminal of the LED D1 is Vref to prevent the LED D1 from lighting up unnecessarily.

[0124] In the second compensation stage t22 of the drive compensation stage t2, the first control signal B is at the off level (e.g., low level); the second light-emitting control signal EM2 is at the on level (e.g., high level); the first on signal A1 is at the off level (e.g., low level); the second on signal A2 is at the on level (e.g., high level); and the scan signal Scan is at the off level (e.g., low level). Therefore, the dual-gate transistor T1, the eighth transistor T8, the ninth transistor T9, and the eleventh transistor T11 are turned on. The gate G of the drive transistor T6 is shorted to its first terminal D, forming a diode structure. This creates a second discharge path that flows from the first terminal D of the drive transistor T6 through the drive transistor T6, the eighth transistor T8, and the ninth transistor T9 to the reset signal line. When the voltage at the first terminal D of the drive transistor T6 drops to Vref + Vth, the drive transistor T6 is turned off. At this time, the voltage of the gate G of the driving module 110 is also Vref + Vth. This not only compensates for the threshold voltage of the driving transistor T6 but also transmits the reset voltage Vref to the gate of the driving transistor T6, thus initializing the gate of the driving transistor T6. The second capacitor Cst2 stores the gate voltage of the driving transistor T6. Simultaneously, the eleventh transistor T11 is turned on, and the voltage at the first terminal (written to node N2) of the fourth capacitor Cst4 is a fixed voltage Vcom. The voltage at the first terminal of the light-emitting diode D1 is maintained at Vref to prevent the light-emitting diode D1 from lighting up unnecessarily.

[0125] During the data writing phase t3, the first control signal B is at the off level (e.g., low); the second light-emitting control signal EM2 is at the off level (e.g., low); the first conduction signal A1 is at the off level (e.g., low); the second conduction signal A2 is at the conduction level (e.g., high); and the scan signal Scan is at the conduction level (e.g., high). Therefore, the dual-gate transistor T1, the ninth transistor T9, and the tenth transistor T10 are turned on. The data voltage Vdata transmitted on the data line is output to the first terminal of the fourth capacitor Cst4 (writing node N2), causing the potential change at the writing node N2 to be the difference between the data voltage Vdata and the fixed voltage Vcom (Vdata-Vcom), and the voltage change at the first terminal of the fourth capacitor Cst4 to be Vdata-Vcom. With the dual-gate transistor T1 turned on, under the coupling effect of the fourth capacitor Cst4, the voltage at the gate G of the driving transistor T6 changes from the potential Vref+Vth at the end of the drive compensation phase to Vref+Vth+Vdata-Vcom, and is stored in the second capacitor Cst2. The voltage at the second terminal of the second capacitor Cst2 is maintained at the reset voltage Vref under the holding effect of the ninth transistor T9, and the voltage difference across the second capacitor Cst2 is Vth+Vdata-Vcom. The voltage at the second terminal S of the driving transistor T6 remains at the reset voltage Vref.

[0126] During the light-emitting stage t4, the first control signal B is at the on level (e.g., high level); the second light-emitting control signal EM2 is at the on level (e.g., high level); the first on signal A1 is at the off level (e.g., low level); the second on signal A2 is at the off level (e.g., low level); and the scan signal Scan is at the off level (e.g., low level). Therefore, the second transistor T2, the eighth transistor T8, and the eleventh transistor T11 are turned on. The first power supply voltage VDD is transmitted to the first terminal D of the driving transistor T6 via the second transistor T2. Therefore, the voltage at the first terminal D of the driving transistor T6 is VDD, the voltage at the second terminal S is Voled, and the voltage at the gate G is Vref + Vth + Vdata - Vcom + Voled - Vref = Vth + Vdata - Vcom + Voled. Consequently, the gate-source voltage difference Vgs of the driving transistor T6 is Vth + Vdata - Vcom, meaning the voltage difference across the second capacitor Cst2 remains constant. The driving transistor T6 will generate a driving current I based on the voltage at its gate and point D, driving the light-emitting diode D1 to emit light. The driving current I can be expressed as:

[0127]

[0128] Where μ is the electron mobility of the driving transistor T6, and C ox W / L represents the channel capacitance per unit area of ​​the driving transistor T6, and W / L represents the width-to-length ratio of the driving transistor T6. According to the formula for the driving current I, the driving current I is independent of the first power supply voltage VDD, the second power supply voltage VSS, the dual-gate transistor T1, and the threshold voltage of the driving transistor T6. Therefore, the display circuit provided in this embodiment can compensate for display unevenness caused by the threshold voltages of the driving transistor T6 and the dual-gate transistor T1, and the voltage drop (IR drop) of the first power supply voltage VDD and the second power supply voltage VSS, which is beneficial to improving display quality. Furthermore, it can be understood that when switching to the light-emitting stage t4, when the second conduction signal A2 changes from an on level to an off level, it will couple to the gate G of the driving transistor T6, pulling down the gate voltage of the driving transistor T6. This promotes maintaining a low potential at the gate of the driving transistor T6 and does not cause a loss in threshold compensation, eliminating the problem of gate voltage loss caused by potential coupling in the prior art.

[0129] As another optional implementation provided in the embodiments of this application, refer to Figure 17 As shown in the timing diagram, the second light emission control signal EM2 can be turned on in the second initialization stage t21 of the drive compensation stage t2, that is, the first control signal B and the second light emission control signal EM2 can have overlapping conduction periods, as long as the second compensation stage t22 is sufficient to complete the threshold voltage compensation of the drive transistor T6.

[0130] In one exemplary embodiment, a display panel is also provided, including the display circuit provided in any of the above embodiments. Therefore, the display panel also has the same beneficial effects as the display circuit described in any of the above embodiments. The similarities can be understood with reference to the explanation of the display circuit above. Figure 18 This is a schematic diagram of the structure of a display panel 200 provided in an embodiment of this application. In this embodiment, the display panel 200 includes any of the display circuits 100 provided in the above embodiments.

[0131] In one exemplary embodiment, a display device is also provided, including a display panel as described above. Figure 19 This is a schematic diagram of the structure of the display device 300 provided in the embodiments of this application, as shown below. Figure 19 As shown, the display device 300 includes any of the display panels 200 provided in the above embodiments. For example, as... Figure 19 As shown, the display device 300 includes a display panel 200. Therefore, the display device 300 also has the beneficial effects of the display panel 200 in the above embodiments. The similarities can be understood with reference to the explanation of the display panel 200 above, and will not be repeated below.

[0132] For example, the display device 300 can be a mobile phone or any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet computer, digital camera, smart bracelet, smart glasses, vehicle display, industrial control equipment, medical display screen, touch interactive terminal, etc. This application embodiment does not make any special limitation in this regard.

[0133] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0134] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0135] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A display circuit, characterized in that, The device includes a dual-gate transistor, a driving transistor, a voltage writing module, a first light-emitting control module, and a light-emitting module. The dual-gate transistor is connected between the gate and a first electrode of the driving transistor and is used to compensate the threshold voltage of the driving transistor during the driving compensation phase. The voltage writing module is connected to the gate of the driving transistor through the dual-gate transistor and is used to couple a voltage containing data voltage information to the gate of the driving transistor through the dual-gate transistor during the data writing phase. The control terminal of the first light-emitting control module is connected to a first light-emitting control signal line. The first light-emitting control module, the driving transistor, and the light-emitting module are connected in series between a first power supply voltage terminal and a second power supply voltage terminal. The driving transistor is used to drive the light-emitting module to emit light during the light-emitting phase. It also includes a first threshold compensation module, a second threshold compensation module, and a compensation switch module. The first threshold compensation module includes a first control unit, a first conduction unit, and a first storage unit. The second threshold compensation module includes a second conduction unit and a first reset unit. The first end of the first control unit is connected to the first end of the first storage unit and the first power supply voltage end. The second end of the first control unit is connected to the first end of the first conduction unit and the first electrode of the dual-gate transistor. The control end of the first control unit is connected to a first control signal line. The second end of the first conduction unit is connected to the first gate of the dual-gate transistor and the second end of the first storage unit. The second end of the first storage unit is a compensation node. The control end of the first conduction unit is connected to a first conduction signal line. The first end of the second conduction unit is connected to the second gate of the dual-gate transistor. The second end of the second conduction unit is connected to the second electrode of the dual-gate transistor and the first end of the first reset unit. The second end of the first reset unit is connected to a reset signal line. The control ends of the second conduction unit and the first reset unit are both connected to the first conduction signal line. The first threshold compensation module and the second threshold compensation module are used to compensate the threshold voltage of the dual-gate transistor. In the first initialization phase, the first conduction unit is used to conduct in response to the first conduction signal on the first conduction signal line, and the first control unit is used to conduct in response to the first control signal on the first control signal line, transmitting the first power supply voltage at the first power supply voltage terminal to the second terminal of the first storage unit through the first control unit and the first conduction unit to complete the initialization of the first storage unit. In the first compensation phase, the first conduction unit is used to conduct the first gate and the first electrode of the dual-gate transistor in response to the first conduction signal on the first conduction signal line, and the second conduction unit is used to conduct the second gate and the second electrode of the dual-gate transistor in response to the first conduction signal on the first conduction signal line. The first reset unit is used to conduct in response to the first conduction signal on the first conduction signal line, discharging the first power supply voltage stored at the second terminal of the first storage unit to the reset signal line through the dual-gate transistor until the threshold voltage of the dual-gate transistor is compensated. The compensation switch module is connected to the second gate of the dual-gate transistor and the second conduction signal line. The compensation switch module is used to turn on the dual-gate transistor in response to the second conduction signal on the second conduction signal line at least during the drive compensation phase and the data writing phase. The first light emission control module is further configured to turn on at least during the drive compensation phase in response to the first light emission control signal on the first light emission control signal line, and transmit the first power supply voltage at the first power supply voltage terminal to the gate of the drive transistor via the dual-gate transistor; The compensation switch module includes a first capacitor and a first transistor. The gate of the first transistor is connected to the second conduction signal line, the first terminal of the first transistor is connected to a DC potential terminal, the second terminal of the first transistor is connected to the second gate of the dual-gate transistor, and the first capacitor is connected between the gate and the second terminal of the first transistor.

2. The display circuit according to claim 1, characterized in that, The first light-emitting control module is implemented by reusing the first control unit, the first light-emitting control signal line is the first control signal line, and the first light-emitting control signal is the first control signal.

3. The display circuit according to claim 1, characterized in that, The voltage writing module includes a data writing unit and a coupling unit; The control terminal of the data writing unit is connected to the first scan line, the first terminal of the data writing unit is connected to the data line, the second terminal of the data writing unit is connected to the first terminal of the coupling unit, and the second terminal of the coupling unit is connected to the first electrode of the driving transistor. The data line is configured to transmit a fixed voltage during the drive compensation phase to reset the potential at the first end of the coupling unit, and to transmit a data voltage during the data writing phase.

4. The display circuit according to claim 1, characterized in that, The voltage writing module includes a data writing unit, a second reset unit, and a coupling unit; The first terminal of the second reset unit is connected to a fixed voltage, the second terminal of the second reset unit is connected to the first terminal of the coupling unit, the second terminal of the coupling unit is connected to the first electrode of the driving transistor, the first terminal of the coupling unit is also connected to the second terminal of the data writing unit, the first terminal of the data writing unit is connected to a data line, the control terminal of the data writing unit is connected to a first scan line, the control terminal of the second reset unit is connected to a second light emission control signal line, and the second reset unit is used to transmit the fixed voltage to the first terminal of the coupling unit during the driving compensation phase. The data line is configured to transmit data voltage at least during the data writing phase.

5. The display circuit according to claim 3 or 4, characterized in that, It also includes a second light-emitting control module, an initialization module, and a storage module, among which, The second light-emitting control module is connected between the second terminal of the driving transistor and the first terminal of the light-emitting module. The second terminal of the light-emitting module is connected to the second power supply voltage terminal, and the control terminal of the second light-emitting control module is connected to the second light-emitting control signal line. The first light-emitting control module is configured to be turned on at least during the driving compensation phase and the light-emitting phase in response to a first light-emitting control signal on the first light-emitting control signal line; the second light-emitting control module is configured to be turned on at least during the driving compensation phase and the light-emitting phase in response to a second light-emitting control signal on the second light-emitting control signal line. The control terminal of the initialization module is connected to the second conduction signal line, the first terminal of the initialization module is connected to the reset signal line, the second terminal of the initialization module is connected to the first terminal of the light-emitting module, and the storage module is connected between the gate of the driving transistor and the first terminal of the light-emitting module. The initialization module is used to transmit the reset voltage on the reset signal line to the first end of the light-emitting module during the drive compensation phase. The first reset unit is also used to transmit the reset voltage on the reset signal line to the first end of the storage module at least during the first initialization phase and the first compensation phase.

6. The display circuit according to claim 5, characterized in that, The reset signal line connected to the first reset unit is the same as the reset signal line connected to the initialization module.

7. The display circuit according to claim 5, characterized in that, The reset signal line connected to the first reset unit is a different reset signal line from the reset signal line connected to the initialization module.

8. The display circuit according to claim 5, characterized in that, The storage module includes a second capacitor, the first end of which is connected to the gate of the driving transistor, and the second end of which is connected to the first end of the light-emitting module.

9. A display panel, characterized in that, Includes the display circuit as described in any one of claims 1 to 8.

10. A display device, characterized in that, Includes the display panel as described in claim 9.

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