Electronic device and display screen thereof

Abstract

The application discloses an electronic device and a display screen thereof. The display screen comprises a display panel having a first panel area and a second panel area arranged in sequence; the first panel area is bent towards a side away from a display surface; the display panel has a pixel circuit array and a display array arranged on the pixel circuit array; the pixel circuit array has a plurality of array-arranged pixel circuits; the display array has a plurality of light emitting elements connected with the pixel circuits; a first reflecting element located in a first sub-area is used for changing the direction of light emitted by the light emitting elements in the first panel area, so that the light emitting elements in the first panel area emit light through the first sub-area; the light emitting elements in the second panel area emit light through a second sub-area; and the display screen can sequentially display image information displayed by the light emitting elements connected with each column of pixel circuits in the display area based on the arrangement sequence of each column of pixel circuits.

Description

Technical Field

[0001] This application relates to the field of electronic equipment technology, and more specifically, to an electronic device and its display screen. Background Technology

[0002] With the continuous advancement of science and technology, more and more electronic devices with display functions are being widely used in people's daily lives and work, bringing great convenience to people's daily lives and work, and becoming an indispensable tool for people today.

[0003] The main component of an electronic device that enables display functionality is the display panel. Existing display panels require a certain border area to be reserved at the edge of the display area for arranging display driving circuits and signal lines to control the light-emitting elements within the display area to display images.

[0004] As display resolutions continue to improve, the size of the display driving circuitry within the bezel area is getting larger and larger, the number of signal lines is also increasing, and the required bezel width is also getting larger and larger, which is not conducive to the design requirements of narrow bezels in electronic devices. Summary of the Invention

[0005] In view of the above, this application provides an electronic device and its display screen, the solution of which is as follows:

[0006] A display screen, wherein the display area of ​​the display screen has a first sub-area and a second sub-area arranged sequentially;

[0007] The display screen includes:

[0008] The display panel has a first panel area and a second panel area arranged sequentially; the first panel area is bent toward a side away from the display surface; the display panel has a pixel circuit array and a display array disposed on the pixel circuit array; the pixel circuit array has a plurality of pixel circuits arranged in an array; the display array has a plurality of light-emitting elements connected to the pixel circuits; each of the first panel areas has at least two columns of pixel circuits and light-emitting elements connected to the pixel circuits; the second panel area has at least one column of pixel circuits and light-emitting elements connected to the pixel circuits.

[0009] A first reflective element located in the first sub-region is used to change the direction of light emitted by the light-emitting element in the first panel area, so that the light-emitting element in the first panel area emits light and displays through the first sub-region; the light-emitting element in the second panel area emits light and displays through the second sub-region.

[0010] The display screen can sequentially display the image information displayed by the light-emitting elements connected to each column of pixel circuits in the display area based on the arrangement order of each column of pixel circuits.

[0011] This application also provides an electronic device, including the aforementioned display screen.

[0012] As described above, the electronic device and its display screen provided in this application have a first panel area and a second panel area. The first panel area is bent towards the side away from the display surface. By changing the direction of light emitted from the light-emitting elements in the first panel area through a first reflective element in the first sub-area of ​​the display screen, the light-emitting elements in the bent first panel area can emit light and display in the first sub-area, thereby enabling a narrow bezel design or even a bezel-less design of the display panel in the first sub-area. Moreover, the display screen can sequentially display the display information of the light-emitting elements connected to each column of pixel circuits in the display area based on the arrangement order of each column of pixel circuits, avoiding the problem of image distortion caused by reflection of the light-emitting elements in the first panel area. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0014] The structures, proportions, sizes, etc., shown in the accompanying drawings are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed in the specification, and are not intended to limit the implementation conditions of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportions, or adjustments to the size, without affecting the effects and purposes that this application can produce, should still fall within the scope of the technical content disclosed in this application.

[0015] Figure 1 A schematic diagram illustrating the principle of implementing a narrow bezel design for a display screen;

[0016] Figure 2 for Figure 1 The diagram shown illustrates the image display principle of the display screen.

[0017] Figure 3 This application provides a schematic diagram illustrating the principle of implementing a narrow bezel design for a display screen.

[0018] Figure 4 for Figure 3 The diagram shown illustrates the image display principle of the display screen.

[0019] Figure 5 for Figure 3 A cross-sectional view of the display panel shown on the screen;

[0020] Figure 6 A schematic diagram illustrating the principle of image display on a display screen provided in an embodiment of this application;

[0021] Figure 7 for Figure 6 A schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in the display panel of the screen shown.

[0022] Figure 8 A schematic diagram illustrating the layout principle of data lines and signal lines in a display screen, provided in an embodiment of this application;

[0023] Figure 9 A schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel of a display screen provided in an embodiment of this application;

[0024] Figure 10 A schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel of another display screen provided in an embodiment of this application;

[0025] Figure 11 A schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel of another type of display provided in this application embodiment;

[0026] Figure 12 A schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel of another type of display provided in this application embodiment;

[0027] Figure 13 for Figure 12 The image shown is a cross-sectional view of the display panel in the first panel area.

[0028] Figure 14 A schematic diagram illustrating the principle of image display on another display screen provided in an embodiment of this application;

[0029] Figure 15 A schematic diagram of the reflection principle of a first reflective element provided in an embodiment of this application;

[0030] Figure 16 A schematic diagram illustrating the reflection principle of another first reflective element provided in this application embodiment;

[0031] Figure 17 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0032] The embodiments of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0033] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0034] As described in the background section, the edges of the display panel require a bezel area for the placement of display driving circuits and signal lines, resulting in a large bezel area that hinders the implementation of narrow bezel designs in electronic devices. To reduce the bezel width of the display panel, electronic devices can employ methods such as... Figure 1 The display screen shown.

[0035] refer to Figure 1 and Figure 2 As shown, Figure 1 A schematic diagram illustrating the principle of achieving a narrow bezel design for a display screen. Figure 2 for Figure 1 The diagram shows the image display principle of the display screen shown. The display screen includes:

[0036] Display panel 11, display panel 11 has a display array including a plurality of light-emitting elements 12; display panel 11 has a bent portion to bend a portion of the light-emitting elements 12 on one side of display panel 11 toward the side away from the display surface; Figure 1 and Figure 2 The image shows the first light-emitting element P1 to the nth light-emitting element P1 arranged sequentially in the same row. n The illustration is given using the bent portion of the display panel 11, including the first light-emitting element P1 to the fourth light-emitting element P4, as an example; n is a positive integer greater than 1.

[0037] The border area 13 located at the edge of the bent portion is used to set the display driving circuit, which is used to control the light-emitting element 12 to display images;

[0038] The reflector 14 is used to reflect the light emitted from the light-emitting element 12 in the bent part, so that all the light-emitting elements 12 in the display panel 11 can emit light from the same side of the display screen to display the image.

[0039] Combination Figure 1 and Figure 2 As shown, the display panel can bend the bezel area 13 of the display panel 11 to the back of the display panel 11, reducing the bezel width of the display screen. However, the order of the images displayed by the light-emitting elements 12 in the bent portion is reversed compared to the actual arrangement of the light-emitting elements 12 in the display panel 11. Specifically, the first light-emitting element P1 to the fourth light-emitting element P4 correspond to the first virtual image P1' to the fourth virtual image P4' in sequence. The arrangement order of the virtual images P' displayed by the first light-emitting element P1 to the fourth light-emitting element P4 in the bent portion is from the fourth virtual image P4' to the first virtual image P2', causing the displayed image to become disordered.

[0040] In view of this, embodiments of this application provide an electronic device and its display screen. The display panel of the display screen has a first panel area and a second panel area. The first panel area is bent toward the side opposite to the display surface. By changing the propagation direction of the light emitted by the light-emitting elements in the first panel area through a first reflective element in the first sub-area of ​​the display screen, the light-emitting elements in the bent first panel area can emit light and display in the first sub-area, thereby enabling a narrow bezel design or even a bezel-less design of the display panel in the first sub-area. Moreover, the display screen can sequentially display the display information of the light-emitting elements connected to each column of pixel circuits in the display area based on the arrangement order of each column of pixel circuits, avoiding the problem of image distortion caused by reflection of the light-emitting elements in the first panel area.

[0041] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0042] refer to Figures 3-5 As shown, Figure 3 This is a schematic diagram illustrating the principle of implementing a narrow bezel design for a display screen, as provided in an embodiment of this application. Figure 4 for Figure 3 The diagram shown illustrates the image display principle of the display screen. Figure 5 for Figure 3 The image shows a cross-sectional view of the display panel. The display area has a first sub-area AA1 and a second sub-area AA2 arranged sequentially.

[0043] The display screen includes:

[0044] Display panel 21 has a first panel area 211 and a second panel area 212 arranged sequentially. The first panel area 211 is bent toward the side away from the display surface. The display panel 21 has a pixel circuit array 1 and a display array 2 disposed on the pixel circuit array 1. The pixel circuit array 1 has a plurality of pixel circuits 30 arranged in an array. The display array 2 has a plurality of light-emitting elements P connected to the pixel circuits 30. The first panel area has at least two columns of pixel circuits 30 and light-emitting elements P connected to the pixel circuits 30. The second panel area 212 has at least one column of pixel circuits 30 and light-emitting elements P connected to the pixel circuits 30.

[0045] The first reflective element 23 is located in the first sub-area AA1. The first reflective element 23 is used to change the direction of the light emitted by the light-emitting element P in the first panel area 211, so that the light-emitting element P in the first panel area 211 emits light through the first sub-area AA1; the light-emitting element P in the second panel area 212 emits light through the second sub-area AA2.

[0046] like Figure 3 As shown, a border area 24 can be provided on the side of the first panel area 211 away from the second panel area 212. The border area 24 is used to house the driving circuit. The driving circuit can control the light-emitting element P to display images through the pixel circuit. Since the border area 24 of the display panel 21 is bent to the back of the display panel 21 based on the first panel area 211, the border area 24 of the display panel 21 will not affect the bezel width of the display screen, thereby reducing the bezel width of the display screen and even realizing a bezel-less design of the display screen.

[0047] The display screen is able to sequentially display the image information T displayed by the light-emitting elements P connected to each column of pixel circuits 30 in the display area based on the arrangement order of each column of pixel circuits 30.

[0048] Each light-emitting element P can display set image information T based on the connected pixel circuit 30. The first sub-region AA1 points in the direction of the second sub-region AA2 (hereinafter referred to as the first direction F1), and a row of light-emitting elements P includes the first light-emitting element P1 to the nth light-emitting element P. n The row of pixel circuits 30 connected to the row of light-emitting elements P has, sequentially, pixel circuits 1 to n in the first direction F1. The light-emitting elements P connected to the pixel circuits 1 to n can sequentially display image information T1 to nth image information T. n On the display surface, the display screen can sequentially display the first image information T1 to the nth image information T along the first direction F1. n This is to avoid the problem of the displayed image being distorted due to reflection caused by the light-emitting element P in the first panel area 211.

[0049] In this embodiment, the light-emitting element P can be an OLED (organic light-emitting diode) or a micro LED (inorganic light-emitting diode). The micro LED can be a Mini LED or a Micro LED.

[0050] The pixel circuit 30 includes multiple thin-film transistors (TFTs) and a storage capacitor. The pixel circuit 30 can be a 7T1C (including 7 TFTs and 1 storage capacitor) circuit structure or an 8T1C (including 8 TFTs and 1 storage capacitor) circuit structure. The embodiments of this application do not limit the circuit form of the pixel circuit 30.

[0051] exist Figure 5 In the illustrated configuration, an OLED is used as an example for the light-emitting element P. The display panel 21 has a substrate 100, which is made of a flexible material to allow the first panel region 211 to be bent relative to the second panel region 212. The light-emitting element P includes: an anode 31 located on the side of the pixel circuit array 1 facing away from the substrate 100; an organic light-emitting layer 32 located on the surface of the anode 31; and a cathode 33 located on the surface of the organic light-emitting layer 32. In the display array 2, the cathodes 33 of each light-emitting element P are the same transparent electrode layer.

[0052] The pixel circuit array 1 includes: a first metal layer M1 located between the display array 2 and the substrate 100, the first metal layer M1 including the gate of the TFT; a second metal layer M2 located between the first metal layer M1 and the display array 2, the second metal layer M2 including the source and drain of the TFT; and a third metal layer M3 located between the second metal layer M2 and the display array 2, the third metal layer including a connecting wire connecting the anode 31 and the pixel circuit 30. The first metal layer M1 also includes one electrode of a storage capacitor, the other electrode of which is located in a fourth metal layer Mc, the fourth metal layer Mc being located between the first metal layer M1 and the second metal layer M2. In the display panel 1, an insulating layer is provided between adjacent metal layers.

[0053] The display panel 21 has a plurality of pixel circuits 30 and light-emitting elements P connected to each pixel circuit 30 in a one-to-one correspondence. In the second panel area 212,

[0054] refer to Figure 6 and Figure 7 As shown, Figure 6 This is a schematic diagram illustrating the principle of image display on a display screen according to an embodiment of this application. Figure 7 for Figure 6 The diagram shown illustrates the layout of pixel circuits and light-emitting elements in the display panel of the screen. (For clarity, this is a simplified illustration.) Figure 7The layout of the pixel circuit 30 and the light-emitting element P is illustrated in a top view of the display panel 21 when it is not bent. The display panel 21 has multiple signal lines D' and multiple data lines D that are connected one-to-one with the pixel circuit columns; the signal lines D' and data lines D extend in the same direction; the signal lines D' are connected one-to-one with the data lines D located in the first panel area 211, and the signal lines D' are used to adjust the timing of the input data signals of the data lines D in the first panel area 211.

[0055] The bonding area 43 has multiple pins arranged sequentially in the first direction F1 to provide data signals to the pixel circuit. In the first panel area 211, data lines D are connected to corresponding pins via signal lines D'. In the second panel area 212, data lines D are connected to corresponding pins. When n=12, in the first panel area 211, the first signal line D1' to the fourth signal line D4' are connected to the first pin PIN1 to the fourth pin PIN4, respectively, and the fifth data line D5 to the twelfth data line D... 12 Connect to pins 5 through 12 respectively. 12 connect.

[0056] in, Figure 7 The dashed line L marks the bend between the first panel region 211 and the second panel region 212, and the thin vertical solid line is the data line D used to provide data signals to the pixel circuit 3. The pixel circuit array 1 has multiple pixel circuits 30 arranged in an array.

[0057] In this embodiment, the timing of the data signal input to the data line D in the first panel area 211 can be adjusted by the signal line D', thereby enabling the light-emitting elements P in the (1+j)th column to transmit the signal. 1+j The data signal provided by the Nj-th column pixel circuit enables the first sub-region AA1 to sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reverse sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0058] like Figure 6 and Figure 7 As shown, the first panel area 211 includes: a first column of pixel circuits to a Nth column of pixel circuits arranged sequentially, and an i-th column of light-emitting elements P is disposed on the surface of the i-th column of pixel circuits. i , i is a positive integer not greater than N; the i-th column of pixel circuits is located on the side away from the second panel region 212; in the first sub-region AA1, the N-th column of light-emitting element P NThe virtual images P' of the first column of light-emitting elements P1 are arranged sequentially along the first direction F1, which is parallel to the display surface and points from the first sub-region AA1 to the second sub-region AA2. The first panel area 211 has at least two columns of pixel circuits, so N is not less than 2. Figure 6 and Figure 7 The diagram illustrates this using N=4 as an example. Obviously, N can be set to any positive integer not less than 2 based on the requirements, and is not limited to N=4.

[0059] exist Figure 6 and Figure 7 In the configuration shown, along the first direction F1, the n light-emitting elements P located in the same row are, in order, the first light-emitting element P1 in the first column to the nth light-emitting element P in the nth column. n Based on the first reflective element 23, the first light-emitting element P1 to the Nth light-emitting element P in the first panel area 211 N It can sequentially possess the first virtual image P1' to the Nth virtual image P N In this method, the first reflecting element 23 includes a plane mirror, such that in the first sub-region AA1, the Nth column light-emitting element P N The virtual images P' of the first row of light-emitting elements P1 are arranged sequentially along the first direction F1. That is, along the first direction F1, the virtual images P' of the first light-emitting elements P1 to P' of the Nth light-emitting elements P' are arranged sequentially. N The arrangement order of the virtual images P' is the Nth virtual image P N 'To the first virtual image P1'.

[0060] The display array 2 of the display panel 21 is configured to have n columns of light-emitting elements P and n columns of pixel circuits 30, with each pixel circuit 30 and light-emitting element P connected in a one-to-one correspondence. Pixel circuits 30 connected to light-emitting elements P in the same column are located in the same column. n is a positive integer greater than 2. N is less than n.

[0061] In order for the display screen to sequentially display the image information T displayed by the light-emitting elements P connected to each column of pixel circuits 30 in the display area based on the arrangement order of each column of pixel circuits 30, for light-emitting elements P in the same row, in the first sub-area AA1, the light-emitting elements P in the (1+j)th column... 1+j It can display the data signal provided by the Nj-th column pixel circuit, where j is an integer not less than N. Thus, although the reflection of the first reflective element 23 causes the virtual image P' of the light-emitting element P in the first panel area 211 to be reversed in the first direction F1, as... Figure 6 As shown, the first virtual image P1' to the Nth virtual image P N Arranged sequentially in the opposite direction of the first direction F1, and passing through the (1+j)th column of light-emitting elements P 1+jThe data signal provided by the Nj-th column pixel circuit enables the first sub-region AA1 to sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reverse sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0062] exist Figure 6 and Figure 7 In the illustrated configuration, in the first panel area 211, the data lines D connected to the first column of pixel circuits to the Nth column of pixel circuits are sequentially the first data line D1 to the Nth data line D2. N The signal line D' is located within the first panel area 211, and the first panel area 211 has N signal lines D', which are sequentially the first signal line D1' to the Nth signal line D' in the first direction F1. N ';Data line D (1+j) 1+j With the Njth signal line D N-j 'Connection. In this method, the order of the data lines D connected to each column of pixel circuits 30 in the first panel area 211 is transferred through the signal line D', thereby adjusting the timing of the input data signals of each column of pixel circuits 30, and enabling the connection from the first virtual image P1' to the Nth virtual image P. N When arranged sequentially in the opposite direction of the first direction F1, the first sub-region AA1 can sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reversed sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0063] for Figure 6 and Figure 7 In the illustrated configuration, in the column direction of the pixel circuit array 1, the pixel circuit columns and light-emitting element columns are arranged opposite each other in the direction (second direction) from the pixel circuit array 1 to the display array 2. For the oppositely arranged pixel circuit columns and light-emitting element columns, the light-emitting element P and the pixel circuit 30 are arranged opposite each other in the second direction, and the vertical projection of the pixel opening center of the light-emitting element P onto the pixel circuit array 1 lies within the area of ​​the opposite pixel circuit 30. In this configuration, within both the first panel area 211 and the second panel area 212, the light-emitting element P is connected to the pixel circuit 30 that is perpendicularly opposite it in the second direction.

[0064] Optional, such as Figure 7 As shown, all signal lines D' can be configured to be located in the first panel area 211. In other configurations, at least one signal line D' can be located in the second panel area 211.

[0065] like Figure 7As shown, in the first panel area 211, data lines D are connected to their corresponding signal lines D' via connecting lines 41. Data lines D and signal lines D' are located on the same metal layer, but on a different metal layer than connecting lines 41. Connecting lines 41 are connected to the corresponding data lines D and signal lines D' via conductive vias Via. Optionally, data lines D and signal lines D' can be located on the second metal layer M2, and connecting lines 41 can be located on the first metal layer M1. In this configuration, the connecting lines 41 and signal lines D' can be arranged using existing metal layers in the display panel, eliminating the need for additional metal layers and reducing panel thickness.

[0066] The data line D and signal line D' can be connected using a single connecting line 41. For example... Figure 7 As shown, the data line D and signal line D' are connected by multiple connecting lines 41 to reduce the connection impedance and improve the response speed of the data signal.

[0067] like Figure 7 As shown, multiple signal lines D' are distributed within the first panel area, and data lines D and signal lines D' are arranged alternately in the row direction of the pixel circuit array 1. Each column of light-emitting elements P has one data line D and one signal line D' on the side facing the pixel circuit array 1. The data lines D and signal lines D' are located below the display array 2, and due to the limited panel wiring space, there will inevitably be overlapping portions between the data lines D and / or signal lines D' and the light-emitting elements P, thus affecting the light emitted by the light-emitting elements P. In this method, each column of light-emitting elements P in the first panel area 211 is arranged opposite to one data line D and one signal line D'. The overlapping portions have a better consistency in the effect on the light emitted by different light-emitting elements P, thereby avoiding the color shift problem caused by poor consistency of the effect.

[0068] Data line D and signal line D' have a reflective effect on light. In order to improve the uniformity of reflection of reflected light by the display panel 21, data line D and signal line D' are evenly distributed in the first panel area 211.

[0069] refer to Figure 8 As shown, Figure 8 This application provides a schematic diagram of the layout principle of data lines and signal lines in a display screen, and... Figure 7 The difference lies in that the signal lines D' are all located in the second panel area 212. In the first direction F1, when the first panel area 211 has the first data line D1 to the Nth data line D... N At that time, the second panel area 212 has the first signal line D1' to the Nth signal line D arranged in sequence. N In this method, the 1+j data line D is also set. 1+j With the Njth signal line D N-j'connect.

[0070] exist Figure 8 In the illustrated configuration, since the fan-out line connecting signal line D' and the corresponding pin PIN crosses with the fan-out line connecting data line D and the corresponding pin PIN in the second panel area 212, the crossed fan-out lines need to be placed on different metal layers to avoid short circuits.

[0071] refer to Figure 9 As shown, Figure 9 This application provides a schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel of a screen. Figure 7 Based on the method shown, Figure 9 In this method, the second panel area 212 has multiple auxiliary wires 42 that correspond one-to-one with the rows of light-emitting elements. The auxiliary wires 42 are on the same layer as the signal line D' and extend in the same direction as the signal line D'. By setting the auxiliary wires 42, the difference in light reflection effect between the first panel area 211 and the second panel area 212 caused by the setting of the signal line D' can be resolved.

[0072] Optionally, the auxiliary wires 42 and the data lines D are arranged alternately in the second panel area 212. Further, the auxiliary wires 42 and the data lines D can be evenly distributed in the second panel area 212.

[0073] In the second panel area 212, a column of light-emitting elements P is set to correspond to a data line D and an auxiliary wire 42. The column of light-emitting elements P is located above the corresponding data line D and auxiliary wire 42, so that the wiring below the anode 31 of different columns of light-emitting elements P has the same or similar effect on the flatness of the anode 31, so as to avoid the color shift problem caused by this effect.

[0074] In one embodiment of this application, an auxiliary wire 42 is connected to a fixed voltage signal to prevent parasitic signals in the auxiliary wire 42 from affecting image display. Optionally, the auxiliary wire 42 is connected to the cathode 33, in which case the fixed voltage signal is the DC low-voltage signal PVEE input to the cathode 33. In other embodiments, the auxiliary wire 42 can also be connected to the power signal line connected to the pixel circuit 30, in which case the fixed voltage signal is the DC high-voltage signal PVDD.

[0075] refer to Figure 10 As shown, Figure 10 This application provides a schematic diagram of the pixel circuit and light-emitting element layout principle in a display panel of another display screen, combined with... Figure 6 and Figure 10As shown, in this configuration, the display panel 21 has multiple data lines D connected one-to-one with the pixel circuit array 1; in the first panel area 211, the data lines D connected to each column of pixel circuits 30 are sequentially the first data line D1 to the Nth data line D. N In the second panel area 212, a bonding area 43 is provided on one side of the display array 2 in the direction of extension of the data line D; in the first direction F1, the bonding area 43 has pins PIN1 to PINn. n n is a positive integer greater than N; the (1+j)th data line D 1+j Connect PIN to pin Nj N-j .

[0076] exist Figure 10 In the illustrated configuration, the connection order of the data lines D connected to each column of pixel circuits 30 in the first panel area 211 and the pins PINs providing data signals in the bonding area 43 is adjusted, thereby adjusting the timing of the input data signals of each column of pixel circuits 30, enabling the processing of data signals from the first virtual image P1' to the Nth virtual image P1'. N When arranged sequentially in the opposite direction of the first direction F1, the first sub-region AA1 can sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reverse sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0077] Optionally, to prevent the binding area 43 from bending along with the first panel area 211, the binding area 43 is located in the second panel area 212, with no overlap with the first panel area 211.

[0078] like Figure 10 As shown, for data line D located in the first panel area 41, data line D is connected to the corresponding pin PIN through the first fan-out line 44; wherein, the first fan-out line 44 is located on at least two different metal layers. The first fan-out line 44 can be laid out using at least two metal layers from the first metal layer M1 to the fourth metal layer Mc, so that there is no need to add a separate metal layer to lay out the first fan-out line 44, thus reducing the panel thickness.

[0079] Optionally, each first fan-out line 44 includes a first trace portion 441 and a second trace portion 442, with the first trace portion 441 and the second trace portion 442 located on different metal layers. The first trace portion 441 and the second trace portion 442 of the same first fan-out line 44 are connected through conductive vias. The first trace portion 441 of each first fan-out line 44 is located on the same metal layer and is parallel to each other. The second trace portion 442 of each first fan-out line 44 is located on the same metal layer and is parallel to each other. By using two different metal layers, from the first metal layer M1 to the fourth metal layer Mc, to arrange the first fan-out lines 44, cross-circuiting and short-circuiting of different first fan-out lines 44 on the same layer can be avoided when adjusting the connection order of the data line D and the pin PIN.

[0080] Compared to Figures 7-9 As shown, Figure 10 The method shown does not require adjusting the connection order of the pixel circuit 30 and the data line D in the display panel, nor does it require adding a separate signal line D'. It only requires adjusting the layout of the existing fan-out lines to achieve the adjustment of the connection order of the data line D and the pin PIN in the first panel area 211.

[0081] like Figure 10 As shown, for data line D located in the second panel area 212, data line D is connected to the corresponding pin PIN through the second fan-out line 45; the same second fan-out line 45 is located in the same metal layer; different second fan-out lines 45 are located in the same metal layer, or at least two second fan-out lines 45 are located in different metal layers. In this method, at least one metal layer from the first metal layer M1 to the fourth metal layer Mc is used to lay out the second fan-out line 45, without the need to add a separate metal layer, thus reducing the thickness of the panel. The second panel area 212 has pixel circuits from the (N+1)th column to the nth column. The data lines D connected to each of the pixel circuits from the (N+1)th column to the nth column are arranged sequentially along the first direction F1, that is, the qth column pixel circuit is connected to the qth data line D. q q is a positive integer not less than N+1 and not greater than n. The q-th data line D q Connect pin q q .

[0082] In the second panel area 212, since the q-th column pixel circuit is connected to the q-th data line D q q-th data line D q Connect pin q q Therefore, there is no intersection between different second-fan output lines 45. The same second-fan output line 45 can be located in the same metal layer. The same second-fan output line 45 does not need to be located in different metal layers, thus avoiding the situation where different parts of the same second-fan output line 45 are located in different metal layers and require conductive holes.

[0083] exist Figure 10In the illustrated configuration, different second fan-out lines 45 can be located on the same metal layer or on different metal layers. When at least two second fan-out lines 45 are located on different metal layers, the width of the fan-out area used for arranging the fan-out lines in the first direction F1 can be reduced.

[0084] refer to Figure 11 As shown, Figure 11 This is a schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel according to another embodiment of this application. The display panel 21 has multiple data lines D that are connected one-to-one with the columns of pixel circuits; in the first panel area 211, the data lines D connected to each column of pixel circuits 30 are sequentially the first data line D1 to the Nth data line D. N In the second panel area 212, a bonding area 43 is provided on one side of the display array 2 in the extension direction of the data line D (column direction of the pixel circuit array 1); in the first direction F1, the bonding area 43 has pins PIN1 to PINn. n n is a positive integer greater than N; when scanning the same row of pixel circuit 30, the Nth pin PIN N Data signals are sequentially input to pin 1 (PIN1).

[0085] exist Figure 11 In this method, along the first direction F1, there are sequentially arranged data lines D1 to Dn. n It has a first column of pixel circuits and an nth column of pixel circuits arranged sequentially. The pixel circuits 30 in the ath column of pixel circuits are all connected to the ath data line D. a Connect, where a is a positive integer not greater than n. The a-th data line D a With pin a a Connection. This method does not require adjusting the connection order of pixel circuit 30 and data line D, nor does it require adjusting the connection order of data line D and pins. It only requires changing the display drive signal bound to the binding area 43 to pins 1 through n. n The timing sequence of the input data signals is pin N. N By connecting to pin PIN1, the timing of the input data signals of each column of pixel circuits 30 can be adjusted, enabling control from the first virtual image P1' to the Nth virtual image P1'. N When arranged sequentially in the opposite direction of the first direction F1, the first sub-region AA1 can sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reversed sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0086] In this embodiment, the light-emitting element P has an anode 31 and a cathode 33. The pixel circuit 30 is connected to the anode 31 of the light-emitting element P to provide driving current to the light-emitting element P and control the light-emitting state of the light-emitting element. Figures 7-11 In the illustrated configuration, each pixel circuit 30 is connected to the anode 31 of the light-emitting element P on its surface. Based on this connection, by adjusting the timing of the input data signal of each column of pixel circuits 30 through adjusting the signal line D', the first fan-out line 44, or the pin PIN, the timing of the input data signal can be adjusted, enabling the processing of data from the first virtual image P1' to the Nth virtual image P1'. N When arranged sequentially in the opposite direction of the first direction F1, the first sub-region AA1 can sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reversed sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0087] refer to Figure 12 and Figure 13 As shown, Figure 12 This is a schematic diagram illustrating the layout principle of pixel circuits and light-emitting elements in a display panel of another type of display provided in this application embodiment. Figure 13 for Figure 12 The diagram shows a cross-sectional view of the display panel in the first panel area. In this configuration, in the first panel area 211, the pixel circuit 30 is insulated from the anode of the light-emitting element on the surface of the pixel circuit P, i.e., there is no circuit between the pixel circuit 30 and the light-emitting element P opposite each other in the second direction; for the light-emitting elements P in the same row, the anode 31 of the light-emitting element in the (1+j)th column is connected to the pixel circuit in the Njth column. In this configuration, for the pixel circuits in columns 1 to 4, in any column of pixel circuits, the pixel circuit 30 and the light-emitting element P on its surface are as follows... Figure 13 As shown. For the pixel circuits in columns N+1 to n, in any column of pixel circuits, pixel circuit 30 and its surface light-emitting element P are as follows: Figure 5 As shown. In this method, the connection between the pixel circuit 50 and the corresponding light-emitting element P can be achieved by changing the adapter wire 51 between the light-emitting element P and the pixel circuit 30. The adapter wire can be set through the third metal layer M3 and / or the second metal layer M2.

[0088] Figure 12 In the configuration shown, in the second panel area 212, the pixel circuits 30 are all connected to the anode 31 of the light-emitting element P on its surface. Figure 12 The data lines are identified by vertical lines that overlap with the pixel circuit columns in the center column direction. This method eliminates the need to adjust the pin and data line connection order.

[0089] exist Figure 12 and Figure 13In the illustrated method, there is no need to adjust the timing of the signal line D', the first fan-out line 44, and the pin PIN to input the data signal. By adjusting the connection order of the pixel circuit 30 and the anode 31 of the light-emitting element, the timing of the input data signal of each column of pixel circuit 30 can be adjusted, enabling the operation from the first virtual image P1' to the Nth virtual image P1'. N When arranged sequentially in the opposite direction of the first direction F1, the first sub-region AA1 can sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reverse sorting of the virtual image P of the light-emitting element P' in the first panel area 211.

[0090] In this embodiment, the light-emitting elements P are arranged in a diamond pattern as an example for illustration. The display panel 21 has three light-emitting elements P with different emitting colors, namely a red photon sub-pixel R emitting red light, a green photon sub-pixel G emitting red light, and a blue photon sub-pixel G emitting blue light.

[0091] Specifically, adjacent rows of light-emitting elements P are staggered, such that light-emitting elements at odd positions in a row are located in odd columns, and light-emitting elements at even positions are located in even columns; in any two adjacent rows of light-emitting elements P, one row consists of alternating red photonic pixels R and blue photonic pixels G arranged in the first direction F1, and the other row consists entirely of green photonic pixels G; in any two adjacent columns of light-emitting elements P, one column consists of alternating red photonic pixels R and blue photonic pixels G arranged in the first direction F1, and the other column consists entirely of green photonic pixels G.

[0092] When using a diamond arrangement, display control can be achieved through Pixel Rendering (SPR) display driving mode. In SPR display driving mode, the smallest display unit includes a green sub-pixel G and an adjacent blue sub-pixel G and a red sub-pixel R; or the smallest display unit includes a green sub-pixel G and its two nearest neighbors, blue sub-pixels G and two red sub-pixels R; or the smallest display unit includes two adjacent green sub-pixels G in two column directions and one of the two green sub-pixels G's two nearest neighbors, blue sub-pixels G and two red sub-pixels R; or the smallest display unit includes two adjacent green sub-pixels G in two column directions and the two nearest neighbors, blue sub-pixels G and three red sub-pixels R.

[0093] The arrangement of the light-emitting elements P in this application embodiment is not limited, but obviously the light-emitting elements P can also be arranged in an array.

[0094] In the above embodiments, such as Figure 6As shown, the light-emitting element P in the first panel area 211 forms a virtual image P' in the first sub-area AA1 based on the same reflective surface of the first reflective element 23. Thus, the same plane mirror can be used as the first reflective element 23, simplifying its structure. In this case, the timing of the input data signals to each column of pixel circuits 30 can be adjusted using any of the methods described above, even if the reflection by the first reflective element 23 causes the first virtual image P1' to the Nth virtual image P... N Arranging them sequentially in the opposite direction of the first direction F1 also allows the first sub-region AA1 to sequentially display the first image information T1 to the Nth image information T in the first direction F1. N This solves the problem of image distortion caused by the reversed sorting of the virtual images P' of the light-emitting elements P in the first panel area 211.

[0095] refer to Figure 14 As shown, Figure 14 This is a schematic diagram of another display screen for image display provided in this application embodiment. Unlike the real-time method described above, in this method, the first panel area 211 includes: a first column of pixel circuits to the Nth column of pixel circuits arranged in sequence, and an i-th column of light-emitting elements disposed on the surface of the i-th column of pixel circuits, where i is a positive integer not greater than N; the i-th column of pixel circuits is located on the side away from the second panel area 212; in the first sub-area AA1, the virtual images P' of the first column of light-emitting elements to the Nth column of light-emitting elements are arranged in sequence along the first direction F1, which is parallel to the display surface and extends from the first sub-area AA1 to the second sub-area AA2.

[0096] Compared to the methods described above, Figure 14 In the illustrated configuration, after passing through the first reflective element 23, the first virtual image P1' to the Nth virtual image P N Arranged in the forward sequence along the first direction F1, it eliminates the need to adjust the timing of the signal line D', the first fan-out line 44, and the pin input data signals, as well as the connection order of the pixel circuit 30 and the anode 31 of the light-emitting element. That is, it utilizes the existing display panel electrical connection structure and pin input timing, requiring no electrical structure adjustment. By adjusting the reflected light path of the first reflective element 23 optically, the first virtual image P1' to the Nth virtual image P can be realized. N Arranged sequentially along the first direction F1, so that the first sub-region AA1 can sequentially display the first image information T1 to the Nth image information T along the first direction. N .

[0097] refer to Figure 15 As shown, Figure 15 This is a schematic diagram of the reflection principle of a first reflecting element provided in an embodiment of this application. The first reflecting element 23 includes: a first reflecting surface Q1 to an Nth reflecting surface Q that are not coplanar. NThe i-th reflecting surface is used to reflect the light emitted from the i-th column of light-emitting elements; the first reflecting surface Q1 to the Nth reflecting surface Q N The light-emitting elements are arranged sequentially at intervals along the first direction F1, with the first column of light-emitting elements P1 pointing towards the Nth column of light-emitting elements P. N The virtual images are arranged sequentially at intervals along the direction. This method utilizes multiple non-coplanar reflecting surfaces to achieve the first virtual image P1' to the Nth virtual image P. N Arranged in a forward sequence along the first direction F1, there is no need to modify the electrical connection structure in the display panel, the manufacturing process of the display panel is simple and the manufacturing cost is low.

[0098] exist Figure 15 In the configuration shown, the first reflecting surface Q1 to the Nth reflecting surface Q N Each of these can correspond to a separate reflector. In this case, the first reflecting element 23 has N separate reflectors, which sequentially have a first reflecting surface Q1 to an Nth reflecting surface Q. N .

[0099] refer to Figure 16 As shown, Figure 16 This is a schematic diagram illustrating the reflection principle of another first reflecting element provided in an embodiment of this application. In this embodiment, the first reflecting element 23 has an integral sawtooth reflecting surface, with the first to Nth reflecting surfaces corresponding to a sawtooth reflecting surface in sequence. In this embodiment, the first reflecting element 23 includes two irregularly shaped reflectors with sawtooth structures, relative to... Figure 15 The multiple separate reflector structures shown have better mechanical stability and facilitate the fixed installation of the first reflective element 23 in the first sub-region AA1.

[0100] exist Figure 16 In the configuration shown, the first reflecting surface Q1 to the Nth reflecting surface Q N Each reflective surface is a serrated bevel inclined relative to the first direction F1, and there is a serrated plane parallel to the first direction F1 between two adjacent reflective surfaces. The serrated bevel has a reflective coating to improve the reflectivity of the light emitted from the light-emitting element P, thereby increasing the brightness of the first sub-region AA1. The serrated plane is a light-transmitting surface to further improve the brightness of the first sub-region AA1.

[0101] In other methods, the irregularly shaped reflector near the first panel area 211 can be configured to have a first refractive index, and the irregularly shaped reflector away from the first panel area 211 can have a second refractive index. The first refractive index is greater than the second refractive index. In this case, there is no need to set a reflective coating on the sawtooth inclined surface. The total internal reflection of the light emitted by the light-emitting element P can be achieved on the corresponding sawtooth inclined surface based on the total internal reflection from the optically denser medium to the optically less dense medium.

[0102] All the methods described above are based on the bending method on one side of the display panel 21. For rectangular or near-rectangular displays, the narrow bezel design can be achieved by setting all four bezel areas of the display panel to use the above structure.

[0103] Based on the display screen provided in the above embodiments, another embodiment of this application also provides an electronic device, which can perform the following functions: Figure 17 As shown.

[0104] refer to Figure 17 As shown, Figure 17 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device includes the display screen 51 provided in the above embodiment. The electronic device can be an electronic device with display function, such as a mobile phone, tablet computer, laptop computer, or wearable device.

[0105] In the electronic device provided in this application embodiment, the display screen 51 provided in the above embodiment can significantly reduce the bezel width, thereby achieving a bezel-less product structure.

[0106] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on its differences from other embodiments, and similar or identical parts between embodiments can be referred to interchangeably. For the electronic devices disclosed in the embodiments, since they correspond to the displays disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the relevant sections of the display screen description.

[0107] It should be noted that, in the description of this application, the accompanying drawings and embodiments are illustrative rather than restrictive. The same reference numerals throughout the embodiments identify the same structures. Additionally, for ease of understanding and description, the thicknesses of some layers, films, panels, regions, etc., may be exaggerated in the drawings. It is also understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element may be directly on the other element or there may be intermediate elements. Furthermore, "on" means positioning an element on or below another element, but does not inherently mean positioning it above another element according to the direction of gravity.

[0108] The terms "upper," "lower," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. When a component is considered to be "connected" to another component, it can be directly connected to the other component or there may be a component positioned centrally in the middle.

[0109] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0110] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display screen, characterized in that, The display screen has a first sub-area and a second sub-area arranged in sequence. The display screen includes: The display panel has a first panel area and a second panel area arranged sequentially; the first panel area is bent toward a side away from the display surface; the display panel has a pixel circuit array and a display array disposed on the pixel circuit array; the pixel circuit array has a plurality of pixel circuits arranged in an array; the display array has a plurality of light-emitting elements connected to the pixel circuits; the first panel area has at least two columns of pixel circuits and light-emitting elements connected to the pixel circuits; the second panel area has at least one column of pixel circuits and light-emitting elements connected to the pixel circuits. A first reflective element located within the first sub-region is used to change the direction of light emitted by the light-emitting element in the first panel area, so that the light-emitting element in the first panel area emits light through the first sub-region; and the light-emitting element in the second panel area emits light through the second sub-region. The display screen is capable of sequentially displaying the image information of the light-emitting elements connected to each column of pixel circuits in the display area based on the arrangement order of the pixel circuits in each column.

2. The display screen according to claim 1, characterized in that, The first panel area includes: a first column of pixel circuits to an Nth column of pixel circuits arranged sequentially, an ith column of light-emitting elements disposed on the surface of the ith column of pixel circuits, where i is a positive integer not greater than N; the ith column of pixel circuits is located on the side away from the second panel area; in the first sub-area, the virtual images of the Nth column of light-emitting elements to the first column of light-emitting elements are arranged sequentially along a first direction, the first direction being parallel to the display surface and pointing from the first sub-area to the second sub-area; For the light-emitting elements in the same row, in the first sub-region, the light-emitting elements in the (1+j)th column can display the data signal provided by the pixel circuit in the (Nj)th column, where j is an integer not less than N.

3. The display screen according to claim 2, characterized in that, The display panel has multiple signal lines and multiple data lines that are connected one-to-one with the pixel circuit columns; the signal lines and the data lines extend in the same direction; The signal lines are connected one-to-one with the data lines located in the first panel area, and the signal lines are used to adjust the timing of the input data signals of the data lines in the first panel area.

4. The display screen according to claim 3, characterized in that, In the first panel area, the data lines are connected to the corresponding signal lines via connecting lines; The data line and the signal line are located on the same metal layer, but on a different metal layer than the connecting line; the connecting line is connected to the corresponding data line and the signal line through a conductive hole.

5. The display screen according to claim 3, characterized in that, In the first panel area, the data lines connected to the first column of pixel circuits to the Nth column of pixel circuits are sequentially the first data line to the Nth data line; the signal line is located in the first panel area, and there are N signal lines in the first panel area, which are sequentially the first signal line to the Nth signal line in the first direction; the 1+j data line is connected to the Nj signal line.

6. The display screen according to claim 5, characterized in that, In the row direction of the pixel circuit column, the data lines and the signal lines are arranged alternately; Each of the light-emitting elements in each column has a data line and a signal line on the side facing the pixel circuit array.

7. The display screen according to claim 5, characterized in that, In the second panel area, there are multiple auxiliary wires that correspond one-to-one with the rows of light-emitting elements. The auxiliary wires are on the same layer as the signal lines and extend in the same direction as the signal lines.

8. The display screen according to claim 7, characterized in that, The auxiliary wire is connected to a fixed voltage signal.

9. The display screen according to claim 2, characterized in that, The display panel has multiple data lines that are connected one-to-one with the pixel circuit columns; in the first panel area, the data lines connected to each column of the pixel circuit are sequentially the 1st data line to the Nth data line. In the second panel area, a bonding area is provided on one side of the display array in the direction of extension of the data line; in the first direction, the bonding area has pins 1 to n, where n is a positive integer greater than N; the 1+j data line is connected to the Nj pin.

10. The display screen according to claim 9, characterized in that, For the data line located in the first panel area, the data line is connected to the corresponding pin through the first fan-out line; The first fan-out line is located in at least two different metal layers.

11. The display screen according to claim 10, characterized in that, For the data line located in the second panel area, the data line is connected to the corresponding pin through the second fan-out line; The same second fan-out line is located in the same metal layer; different second fan-out lines are located in the same metal layer, or at least two second fan-out lines are located in different metal layers.

12. The display screen according to claim 2, characterized in that, The display panel has multiple data lines that are connected one-to-one with the pixel circuit columns; in the first panel area, the data lines connected to each column of the pixel circuit are sequentially the 1st data line to the Nth data line. In the second panel area, in the direction of extension of the data line, one side of the display array has a bonding area; in the first direction, the bonding area has pins 1 to n, where n is a positive integer greater than N; when scanning the same row of pixel circuits, pins N to 1 are sequentially input with data signals.

13. The display screen according to claim 2, characterized in that, In the first panel area, the pixel circuit is insulated from the light-emitting element anode on the surface of the pixel circuit; For the light-emitting elements in the same row, the anode of the light-emitting element in column 1+j is connected to the pixel circuit in column Nj.

14. The display screen according to claim 2, characterized in that, The light-emitting element in the first panel area forms a virtual image in the first sub-area based on the same reflective surface of the first reflective element.

15. The display screen according to claim 1, characterized in that, The first panel area includes: a first column of pixel circuits to a Nth column of pixel circuits arranged in sequence, and an ith column of light-emitting elements disposed on the surface of the ith column of pixel circuits, where i is a positive integer not greater than N; the ith column of pixel circuits is located on the side away from the second panel area. In the first sub-region, the virtual images of the first column of light-emitting elements to the Nth column of light-emitting elements are arranged sequentially along a first direction, which is parallel to the display surface and points from the first sub-region to the second sub-region.

16. The display screen according to claim 15, characterized in that, The first reflective element includes: a first to an Nth non-coplanar reflective surface; the i-th reflective surface is used to reflect the light emitted from the i-th column of light-emitting elements; The first to the Nth reflective surfaces are arranged at intervals in the first direction, and are arranged at intervals in the direction from the first column of light-emitting elements to the Nth column of light-emitting elements.

17. The display screen according to claim 16, characterized in that, The first reflective element has N separate reflective mirrors, which have a first reflecting surface to an Nth reflecting surface in sequence; Alternatively, the first reflective element has an integral sawtooth reflective surface, with the first to Nth reflective surfaces corresponding to one of the sawtooth reflective surfaces in sequence.

18. An electronic device, characterized in that, Includes the display screen as described in any one of claims 1-17.

Images