Display device, apparatus and driving method

Abstract

The application discloses a display device, equipment and driving method, including timing controller, source driver, detection module and switch module, timing controller includes: sending at least first differential signal pair and second differential signal pair to source driver differential signal sending module, source driver includes: receiving at least first differential signal pair and second differential signal pair differential signal receiving module;And, the clock data recovery circuit based on detection signal output control signal;Detection module based on detection signal output control signal;Switch module is closed or disconnected in response to control signal, to make first differential signal pair and / or second differential signal pair pass through first data bus pair and / or second data bus pair transmission.The application can ensure that the display frame picture is stable in the display picture brightness when high-low frequency switching, and the display picture flicker problem is improved.

Description

Technical Field

[0001] This application relates to the field of liquid crystal display technology, and in particular to a display device, apparatus, and driving method. Background Technology

[0002] Currently, LCD displays have increasingly higher requirements for refresh rates and image quality. To prevent screen tearing, FreeSync or G-Sync functions are needed. This function reduces the refresh rate by increasing the V-Blank width (vertical sync pulse width) to match the graphics card's frame rate, thus preventing screen tearing. However, in FreeSync mode, the low-frequency V-Blank time is long, and pixel electrode leakage leads to a lower final voltage, resulting in lower display brightness. When the video signal switches between high and low frequencies, the display brightness becomes unstable, and the display flickers severely. Summary of the Invention

[0003] This application provides a display device to solve the technical problem of screen flickering when video signals switch between high and low frequencies in the prior art. Another embodiment of this application provides a display apparatus, and yet another embodiment provides a display panel driving method.

[0004] To address the aforementioned technical problems, embodiments of this application disclose the following technical solutions:

[0005] In a first aspect, a display device is provided, including a timing controller and a source driver, the source driver outputting a data signal to the display panel, the timing controller comprising:

[0006] A differential signal transmission module is configured to transmit at least a first differential signal pair and a second differential signal pair to the source driver via corresponding point-to-point connections, wherein each of the corresponding point-to-point connections includes a first data bus pair and a second data bus pair connected between the timing controller and the source driver.

[0007] The source driver includes:

[0008] A differential signal receiving module, configured to receive at least a first differential signal pair and a second differential signal pair from the first data bus pair and the second data bus pair;

[0009] A clock data recovery circuit is configured to receive a clock data recovery signal via a clock signal line connected to the timing controller, and output a detection signal based on the clock data recovery signal.

[0010] The display panel further includes a detection module and a switch module. The detection module receives the detection signal and outputs a control signal based on the detection signal. The switch module is connected to the first data bus pair and the second data bus pair. The switch module closes or opens in response to the control signal, so that the first differential signal pair and / or the second differential signal pair are transmitted through the first data bus pair and / or the second data bus pair.

[0011] In conjunction with the first aspect, the first differential signal pair and / or the second differential signal pair are transmitted to the source driver via the first data bus pair and / or the second data bus pair, and the source driver sends the data signal to the display panel based on the first differential signal pair and / or the second differential signal pair.

[0012] In conjunction with the first aspect, the detection module determines the frame rate of the displayed frame in the first differential signal pair and / or the second differential signal pair based on the detection signal, and outputs the control signal based on the frame rate.

[0013] In conjunction with the first aspect, the detection module compares the frame rate of the current moment in the displayed frame with a threshold.

[0014] In response to the current frame rate being greater than a threshold, the detection module closes the switch module, and the first differential signal pair and the second differential signal pair are respectively transmitted to the source driver through the first data bus pair and / or the second data bus pair;

[0015] In response to the current frame rate being less than a threshold, the detection module disconnects the switching module, and the first differential signal pair is transmitted to the source driver via the first data bus pair or the second data bus pair; or...

[0016] In response to the current frame rate being less than a threshold, the detection module disconnects the switch module, and the second differential signal pair is transmitted to the source driver via the first data bus pair or the second data bus pair.

[0017] In conjunction with the first aspect, the first data bus pair includes a first line and a second line, one end of the first line and the second line are connected to the differential signal transmitting module, and the other end of the first line and the second line are connected to the differential signal receiving module.

[0018] In conjunction with the first aspect, the second data bus pair includes a third line and a fourth line, one end of the third line and the fourth line being connected to the differential signal transmitting module, and the other end of the third line and the fourth line being connected to the differential signal receiving module.

[0019] In conjunction with the first aspect, the switching module includes a first transistor and a second transistor. The first gate of the first transistor and the second gate of the second transistor are both connected to the detection module. The first source of the first transistor and the second source of the second transistor are respectively connected to the differential signal transmitting module through the first line and the second line. The first drain of the first transistor and the second drain of the second transistor are respectively connected to the differential signal receiving module through the first line and the second line.

[0020] In conjunction with the first aspect, the switching module includes a third transistor and a fourth transistor. The third gate of the third transistor and the fourth gate of the fourth transistor are both connected to the detection module. The third source of the third transistor and the fourth source of the fourth transistor are respectively connected to the differential signal transmitting module through the third line and the fourth line. The third drain of the third transistor and the fourth drain of the fourth transistor are respectively connected to the differential signal receiving module through the third line and the fourth line.

[0021] Secondly, a display panel driving method is provided, the method comprising:

[0022] The differential signal receiving module receives the first differential signal pair and / or the second differential signal pair output by the differential signal transmitting module;

[0023] The differential signal receiving module outputs a detection signal based on the first differential signal pair and / or the second differential signal pair;

[0024] The detection module receives the detection signal and outputs a control signal based on the detection signal;

[0025] The switching module responds to the control signal by closing or opening, so that the first differential signal pair and / or the second differential signal pair are transmitted through the first data bus pair and / or the second data bus pair and drive the control panel display screen.

[0026] Thirdly, a display device is provided, comprising a display apparatus as described in any one of the first aspects, or, driving a display panel in the display device using a display panel driving method as described in the second aspect.

[0027] One of the above technical solutions has the following advantages or beneficial effects:

[0028] Compared with the prior art, the present application provides a display panel including a timing controller and a source driver. The source driver outputs data signals to the display panel. The timing controller includes a differential signal transmission module configured to transmit at least a first differential signal pair and a second differential signal pair to the source driver via corresponding point-to-point connections. Each of the corresponding point-to-point connections includes a first data bus pair and a second data bus pair connected between the timing controller and the source driver. The source driver includes a differential signal receiving module configured to receive signals from the first data bus pair and the second data bus pair. The display panel includes at least a first differential signal pair and a second differential signal pair; a clock data recovery circuit configured to receive a clock data recovery signal via a clock signal line connected to a timing controller, and output a detection signal based on the clock data recovery signal; the display panel also includes a detection module and a switch module, the detection module receiving the detection signal and outputting a control signal based on the detection signal; the switch module is connected to the first data bus pair and the second data bus pair, and the switch module closes or opens in response to the control signal, so that the first differential signal pair and / or the second differential signal pair are transmitted through the first data bus pair and / or the second data bus pair. The display panel provided in this application controls the on / off state of the first wiring harness and / or the second wiring harness through the switch module, so that the video signal can be transmitted from the transmitting module to the receiving module through the first wiring harness and / or the second wiring harness, so that the brightness of the displayed image is stable when the video signal switches between high and low frequencies, and the problem of display screen flicker is improved.

[0029] This application discloses a display panel driving method, comprising: receiving a first differential signal pair and / or a second differential signal pair output by a differential signal transmitting module via a differential signal receiving module; outputting a detection signal based on the first differential signal pair and / or the second differential signal pair by the differential signal receiving module; receiving the detection signal by a detection module and outputting a control signal based on the detection signal; and closing or opening a switching module in response to the control signal to transmit the first differential signal pair and / or the second differential signal pair through a first data bus pair and / or a second data bus pair and drive the control panel display screen. The display panel driving method provided in this application transmits video signals to the receiving module after the switching module connects the first wiring harness and / or the second wiring harness, thereby stabilizing the brightness of the display screen when the video signal switches between high and low frequencies and improving the problem of display screen flicker. Attached Figure Description

[0030] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0031] Figure 1 This is a schematic diagram of the connection of the display panel provided in an embodiment of this application;

[0032] Figure 2 This is a schematic diagram of the wiring connections of the display panel provided in an embodiment of this application;

[0033] Figure 3 This application provides schematic diagrams of the wiring connections for a display panel in some embodiments.

[0034] Figure 4 A schematic diagram of the wiring connections of a display panel provided in another embodiment of this application;

[0035] Figure 5 This is a schematic diagram of the module circuit connection of the display device provided in the embodiment of this application. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0037] The applicant noted that current LCD display products have increasingly higher requirements for refresh rates and image quality. To prevent screen tearing, Freesync or G-sync functions are needed. This function reduces the refresh rate by increasing the Vporch (width of the vertical sync pulse) to match the frame rate output by the graphics card, thus preventing screen tearing. However, in Freesync mode, the long V-Blank time at low frequencies leads to pixel electrode leakage and a lower final voltage, resulting in lower display brightness. When the video signal switches between high and low frequencies, the display brightness becomes unstable, and the screen flickers severely. By using frequency reduction, the pixel leakage flicker caused by the long V-Blank time at low frame rates can be avoided. However, current IC (integrated circuit) chips have limited speed range and cannot support a very large refresh rate range. For example, a QHD (Quarter High Definition) 180Hz display needs to achieve frequency downsampling from 48Hz to 180Hz. While using a 1.8Gbps two-pair drive can meet the 180Hz requirement, this type of drive has a minimum rate of 0.6Gbps per pair. When downsampling to 48Hz, if two pairs are still used, each pair would only achieve a rate of 0.3Gbps, which is below the minimum drive rate and therefore cannot be achieved. To enable low frame rate data transmission while downsampling, a controllable switching module is installed on the drive lines. This module judges the signal's frame rate. When the signal is at a low frame rate, the switching module is open, and only one pair of drive lines is used for transmission, ensuring the downsampling frame rate is higher than the minimum rate in the drive lines. When the signal is at a high frame rate, the switching module is closed, and two pairs of drive lines are used for transmission, achieving high-frequency signal transmission. This stabilizes the brightness of the displayed image during high-to-low frequency switching and reduces screen flicker.

[0038] The specific implementation methods of this application are illustrated below through examples:

[0039] like Figures 1 to 5As shown, this application provides a display device including a timing controller and a source driver. The source driver outputs data signals to a display panel. The timing controller includes a differential signal transmitting module configured to transmit at least a first differential signal pair and a second differential signal pair to the source driver via corresponding point-to-point connections. Each of the corresponding point-to-point connections includes a first data bus pair and a second data bus pair connected between the timing controller and the source driver. The source driver includes a differential signal receiving module configured to receive signals from the first data bus pair and the second data bus pair. At least a first differential signal pair and a second differential signal pair; a clock data recovery circuit configured to receive a clock data recovery signal via a clock signal line connected to a timing controller, and output a detection signal based on the clock data recovery signal; the display panel further includes a detection module and a switch module, the detection module receiving the detection signal and outputting a control signal based on the detection signal; the switch module is connected to the first data bus pair and the second data bus pair, and the switch module closes or opens in response to the control signal to allow the first differential signal pair and / or the second differential signal pair to be transmitted through the first data bus pair and / or the second data bus pair. Specifically, as shown... Figure 2 As shown, the differential signal transmitting module includes a timing controller (Tcon), and the differential signal receiving module includes a source driver IC. The timing controller includes a transmitting end, and the source driver includes a receiving end. The transmitting end and the receiving end are connected via a first data bus pair and a second data bus pair. The source driver also includes a CDR (Clock Data Recover) circuit. The CDR circuit acquires the data signal sent by the timing controller, reads the clock signal from the data signal, and calibrates the clock signal. If the clock signal remains unchanged, the CDR circuit outputs a low-level detection signal, and the detection module and the switching module maintain their previous states. If the clock signal changes, the CDR circuit outputs a high-level detection signal. At this time, the detection module compares the current frame rate in the displayed frame with a threshold, and connects the first data bus pair and / or the second data bus pair according to the comparison structure.

[0040] like Figures 1 to 5 As shown, in this embodiment of the application, the first differential signal pair and / or the second differential signal pair are transmitted to the source driver via the first data bus pair and / or the second data bus pair, and the source driver sends data signals to the display panel based on the first differential signal pair and / or the second differential signal pair. Figure 2 As shown, in this embodiment of the application, the switch module, under the control of the control signal, enables both the first data bus pair and the second data bus pair to be turned on. At this time, the high frame rate video signal is transmitted to the source driver through the first data bus pair and the second data bus pair. Figure 3 As shown, in other embodiments of this application, the switching module, under the control of a control signal, enables the first data bus pair to be connected and the second data bus pair to be disconnected. At this time, the low frame rate video signal is transmitted to the source driver through the first data bus pair. Figure 4 As shown, in some other embodiments of this application, the switching module, under the control of a control signal, enables the second data bus pair to be connected and the first data bus pair to be disconnected. At this time, the low frame rate video signal is transmitted to the source driver through the second data bus pair. After receiving the video signal, the source driver sends the video signal to the pixels.

[0041] like Figures 1 to 5 As shown in this embodiment, the detection module determines the frame rate of the displayed frame in the first differential signal pair and / or the second differential signal pair based on the detection signal, and outputs a control signal based on the frame rate. Specifically, the detection module compares the current frame rate of the displayed frame in the first differential signal pair and / or the second differential signal pair with a threshold. If the current frame rate is greater than the threshold, the detection module outputs a control signal to control the switch module to connect both the first data bus pair and the second data bus pair, and the first differential signal pair and / or the second differential signal pair are transmitted to the differential signal receiving module through the first data bus pair and the second data bus pair. If the current frame rate is less than the threshold, the detection module outputs a control signal to control the switch module to connect either the first data bus pair or the second data bus pair, and the first differential signal pair and / or the second differential signal pair are transmitted to the differential signal receiving module through the first data bus pair or the second data bus pair. In this embodiment, the threshold can be set according to the transmission limits of the first data bus pair and the second data bus pair, or it can be determined according to the frame rate of the previous video signal, comparing the frame rate of the current video signal with the threshold or the frame rate of the previous video signal, and determining whether to use one data bus pair or two data bus pairs for transmission based on the comparison result.

[0042] like Figures 1 to 4As shown in this embodiment, the first data bus pair includes a first line L1 and a second line L2. One end of the first line L1 and the second line L2 are connected to a differential signal transmitting module, and the other end of the first line L1 and the second line L2 are connected to a differential signal receiving module. The second data bus pair includes a third line L3 and a fourth line L4. One end of the third line L3 and the fourth line L4 are connected to the differential signal transmitting module, and the other end of the third line L3 and the fourth line L4 are connected to the differential signal receiving module. Specifically, when the frame rate of the displayed frame is low, the differential signal transmitting module can complete the transmission through the first line L1 and the second line L2 or the third line L3 and the fourth line L4. Furthermore, during transmission, the first differential signal pair and / or the second differential signal pair will not interfere with each other, resulting in a clear display without flickering. When the frame rate of the displayed frame is high, the differential signal transmission module transmits the signal through the first line L1, the second line L2, the third line L3, and the fourth line L4. Transmitting the first differential signal pair and / or the second differential signal pair through multiple lines ensures that the video signal is stable and there will be no flickering.

[0043] like Figure 2 As shown in the embodiment of this application, the switching module includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4. The first gate and second gate of the first transistor T1 and the second transistor T2 are both connected to the detection module. The first source and second source of the first transistor T1 and the second transistor T2 are respectively connected to the differential signal transmission module via the first line L1 and the second line L2. The first drain and second drain of the first transistor T1 and the second transistor T2 are respectively connected to the differential signal receiving module via the first line L1 and the second line L2. The third gate and fourth gate of the third transistor T3 and the fourth transistor T4 are both connected to the detection module. The third source and fourth source of the third transistor T3 and the fourth transistor T4 are respectively connected to the differential signal transmission module via the third line L3 and the fourth line L4. The third drain and fourth drain of the third transistor T3 and the fourth transistor T4 are respectively connected to the differential signal receiving module via the third line L3 and the fourth line L4. Specifically, each line has a transistor for controlling the connection and disconnection of the line. Under the control of the detection module, the connected line can be effectively controlled. Figure 3As shown, in some other embodiments of this application, the switching module may only include a first transistor T1 and a second transistor T2. The first transistor T1 and the second transistor T2 are respectively connected to the first line L1 and the second line L2 to control the on / off state of the first line L1 and the second line L2, while the third line L3 and the fourth line L4 remain connected to the timing controller and the source driver. Therefore, when the display frame is at a low frame rate, the first differential signal pair and / or the second differential signal pair are transmitted through the third line L3 and the fourth line L4; when the display frame is at a high frame rate, the detection module closes the first transistor T1 and the second transistor T2, and the first differential signal pair and / or the second differential signal pair are transmitted together through the first line L1, the second line L2, the third line L3, and the fourth line L4. Similarly, as... Figure 4 As shown, in some other embodiments of this application, the switching module may only include a third transistor T3 and a fourth transistor T4. The third transistor T3 and the fourth transistor T4 are respectively connected to the third line L3 and the fourth line L4 to control the on / off state of the third line L3 and the fourth line L4, while the first line L1 and the second line L2 remain connected to the timing controller and the source driver. Therefore, when the displayed frame rate is low, the first differential signal pair and / or the second differential signal pair are transmitted through the first line L1 and the second line L2; when the displayed frame rate is high, the detection module closes the third transistor T3 and the fourth transistor T4, and the first differential signal pair and / or the second differential signal pair are transmitted together through the first line L1, the second line L2, the third line L3, and the fourth line L4. Regardless of whether the displayed frame rate is low or high, the first differential signal pair and / or the second differential signal pair can be transmitted through two or four lines, thereby ensuring the stability of the video signal and preventing flickering of the displayed image.

[0044] This application embodiment also provides a display panel driving method, the method comprising: receiving a first differential signal pair and / or a second differential signal pair output by a differential signal transmitting module through a differential signal receiving module; the differential signal receiving module outputting a detection signal based on the first differential signal pair and / or the second differential signal pair; the detection module receiving the detection signal and outputting a control signal based on the detection signal; and a switching module closing or opening in response to the control signal, so that the first differential signal pair and / or the second differential signal pair are transmitted through a first data bus pair and / or the second data bus pair and drive the control panel display screen.

[0045] This application also provides a display device, including the display apparatus provided in any of the above embodiments, or driving the display panel in the display device using the display panel driving method provided in the above embodiments.

[0046] The above provides a detailed description of a display panel, device, and driving method provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display device, comprising a timing controller and a source driver, wherein the source driver outputs a data signal to a display panel, characterized in that, The timing controller includes: A differential signal transmission module is configured to transmit at least a first differential signal pair and a second differential signal pair to the source driver via corresponding point-to-point connections, wherein each of the corresponding point-to-point connections includes a first data bus pair and a second data bus pair connected between the timing controller and the source driver. The source driver includes: A differential signal receiving module, configured to receive at least a first differential signal pair and a second differential signal pair from the first data bus pair and the second data bus pair; A clock data recovery circuit is configured to receive a clock data recovery signal via a clock signal line connected to the timing controller, and output a detection signal based on the clock data recovery signal. The display panel further includes a detection module and a switch module. The detection module receives the detection signal and outputs a control signal based on the detection signal. The switch module is connected to the first data bus pair and the second data bus pair. The switch module closes or opens in response to the control signal, so that the first differential signal pair and / or the second differential signal pair are transmitted through the first data bus pair and / or the second data bus pair. The switching module includes a first transistor, a second transistor, a third transistor, and a fourth transistor, which are respectively connected to the detection module, the differential signal transmitting module, and the differential signal receiving module.

2. The display device as claimed in claim 1, characterized in that, The first differential signal pair and / or the second differential signal pair are transmitted to the source driver via the first data bus pair and / or the second data bus pair, and the source driver sends the data signal to the display panel based on the first differential signal pair and / or the second differential signal pair.

3. The display device as claimed in claim 2, characterized in that, The detection module determines the frame rate of the displayed frame in the first differential signal pair and / or the second differential signal pair based on the detection signal, and outputs the control signal based on the frame rate.

4. The display device as claimed in claim 3, characterized in that, The detection module compares the current frame rate in the displayed frame with a threshold. In response to the current frame rate being greater than a threshold, the detection module closes the switch module, and the first differential signal pair and the second differential signal pair are respectively transmitted to the source driver through the first data bus pair and / or the second data bus pair; In response to the current frame rate being less than a threshold, the detection module disconnects the switch module, and the first differential signal pair is transmitted to the source driver via the first data bus pair or the second data bus pair; or, In response to the current frame rate being less than a threshold, the detection module disconnects the switch module, and the second differential signal pair is transmitted to the source driver via the first data bus pair or the second data bus pair.

5. The display device as claimed in claim 1, characterized in that, The first data bus pair includes a first line and a second line, one end of the first line and the second line are connected to the differential signal transmitting module, and the other end of the first line and the second line are connected to the differential signal receiving module.

6. The display device as claimed in claim 5, characterized in that, The second data bus pair includes a third line and a fourth line, one end of the third line and the fourth line being connected to the differential signal transmitting module, and the other end of the third line and the fourth line being connected to the differential signal receiving module.

7. The display device as claimed in claim 5, characterized in that, The switching module includes a first transistor and a second transistor. The first gate of the first transistor and the second gate of the second transistor are both connected to the detection module. The first source of the first transistor and the second source of the second transistor are respectively connected to the differential signal transmitting module through the first line and the second line. The first drain of the first transistor and the second drain of the second transistor are respectively connected to the differential signal receiving module through the first line and the second line.

8. The display device as claimed in claim 6, characterized in that, The switching module includes a third transistor and a fourth transistor. The third gate of the third transistor and the fourth gate of the fourth transistor are both connected to the detection module. The third source of the third transistor and the fourth source of the fourth transistor are respectively connected to the differential signal transmitting module through the third line and the fourth line. The third drain of the third transistor and the fourth drain of the fourth transistor are respectively connected to the differential signal receiving module through the third line and the fourth line.

9. A display panel driving method, characterized in that, The method includes: The differential signal receiving module receives the first differential signal pair and / or the second differential signal pair output by the differential signal transmitting module; The clock data recovery circuit receives the clock data recovery signal and outputs a detection signal based on the clock data recovery signal; The detection module receives the detection signal and outputs a control signal based on the detection signal; The switching module responds to the control signal by closing or opening, so that the first differential signal pair and / or the second differential signal pair are transmitted through the first data bus pair and / or the second data bus pair and drive the control panel display screen; The switching module includes a first transistor, a second transistor, a third transistor, and a fourth transistor, which are respectively connected to the detection module, the differential signal transmitting module, and the differential signal receiving module.

10. A display device, characterized in that, The display device includes any one of claims 1-8, or the display panel in the display device is driven by the display panel driving method as described in claim 9.

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