Display device and electrostatic protection method

By adding an electrostatic sensing unit and a voltage suppression element to the LCD panel, and combining this with the electrostatic discharge working mode of the timing control chip, the display abnormality problem caused by electrostatic discharge was solved, thereby improving the anti-static capability of the display panel and reducing power consumption.

CN117471792BActive Publication Date: 2026-04-07TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-09-27
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

Existing LCD panels are prone to Grade C anomalies during electrostatic discharge testing, resulting in black screens in some display areas and requiring a restart to restore them. Current technology is unable to effectively solve this problem.

Method used

An electrostatic discharge sensing unit and a voltage suppression component are added to the display panel. The timing control chip determines the electrostatic discharge working mode and only enters the continuous refresh register mode when electrostatic discharge is detected, simplifying the operation of the display system.

Benefits of technology

It improves the anti-static capability of the display panel, ensuring the reliability and continuity of the display, reducing display abnormalities caused by electrostatic discharge, and reducing power consumption.

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Abstract

The application relates to a display device and an electrostatic protection method. The display device comprises an electrostatic protection device and a display panel. The electrostatic protection device comprises: a chip on film; an electrostatic sensing unit, one end of which is arranged on the chip on film, and the other end of which is arranged on an array substrate. The electrostatic sensing unit is used for sensing electrostatic discharge from the array substrate or a first transient voltage of an external environment; a voltage suppression element, which is electrically connected to the electrostatic sensing unit, is used for attenuating the first transient voltage to obtain a second transient voltage; and a timing control chip, which is electrically connected to the voltage suppression element, is used for judging whether to enter an electrostatic discharge working mode based on the second transient voltage, and continuously refreshing a register of a target chip according to original display data of the display panel in the electrostatic discharge working mode. The application can improve the anti-static capability of the display panel, ensure that the display panel meets the specification requirements, improve the working reliability, and solve the problem of display abnormalities caused by electrostatic discharge.
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Description

Technical Field

[0001] This application relates to the field of display panel technology, and in particular to a display device and an electrostatic discharge protection method. Background Technology

[0002] Electrostatic discharge (ESD) is a common near-field electromagnetic hazard. Due to the widespread use of liquid crystal display (LCD) panels, their ESD resistance is receiving increasing attention. In actual product development, ESD testing can lead to abnormal screen display due to malfunctions in the driver chip. Figure 1 A schematic diagram illustrating abnormal screen phenomena related to this technology is shown. For example... Figure 1 As shown, under normal circumstances, the display panel will display the full blue block 11, full green block 12, full red block 13, and full white block 14 sequentially from top to bottom during the test. However, due to the fact that the chips and other components in the LCD panel are easily affected by electrostatic discharge, some display areas will experience a black screen problem as shown in the black block 15, which cannot be restored on its own and requires a restart to display normally.

[0003] The electrostatic discharge standard can be divided into several levels. Level A indicates that no abnormality occurred on the display panel during the electrostatic test; Level B indicates that an abnormality occurred on the display panel, but the abnormality can be resolved on its own; Level C indicates that an abnormality occurred on the display panel, but the panel can be restored after restarting and powering on. Figure 1 The phenomenon described is also classified as Grade C, which has the highest probability of occurrence in actual testing. Therefore, an effective solution is urgently needed to address the panel anomalies corresponding to the highest probability Grade C. Summary of the Invention

[0004] In view of this, this application proposes a display device and an electrostatic discharge protection method, which can effectively improve the anti-static capability of the display panel, ensure that the display panel meets the specifications, improve the reliability of the display panel operation, thereby solving the display abnormality problem caused by electrostatic discharge. At the same time, it only enters a specific continuous refresh register mode when static electricity is detected, which simplifies the operation of the display system and reduces the power consumption of some continuous refreshes.

[0005] According to one aspect of this application, an electrostatic discharge (ESD) protection device is provided. The display device includes an ESD protection device and a display panel. The ESD protection device is electrically connected to the display panel. The display panel includes an array substrate. The ESD protection device includes: a flip-chip film with at least one driving chip disposed on it; an ESD sensing unit with one end disposed on the flip-chip film and the other end disposed on the array substrate, the ESD sensing unit being used to sense a first transient voltage from electrostatic discharge from the array substrate or from the external environment; a voltage suppression element electrically connected to the ESD sensing unit for attenuating the first transient voltage to obtain a second transient voltage; and a timing control chip electrically connected to the voltage suppression element for determining whether to enter an ESD operating mode based on the second transient voltage, and continuously refreshing the register of the target chip in the ESD operating mode according to the original display data read from the display panel.

[0006] According to another aspect of this application, an electrostatic discharge (ESD) protection method is provided, which is applied to the display device. The ESD protection method includes: acquiring a second transient voltage of an ESD sensing unit; determining whether a timing control chip is in an ESD discharge working mode based on the second transient voltage; and continuously refreshing the register of a target chip based on the original display data read from the display panel when the timing control chip enters the ESD discharge working mode.

[0007] By adding an electrostatic sensing unit and an electrostatic detection mechanism, the anti-static capability of the display panel can be effectively improved according to various aspects of this application, ensuring that the display panel meets the specifications and improving the reliability of the display panel operation, thereby solving the display abnormality problem caused by electrostatic discharge. At the same time, it only enters a specific continuous refresh register mode when electrostatic discharge is detected, which simplifies the operation of the display system and reduces the power consumption of some continuous refreshes. Attached Figure Description

[0008] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0009] Figure 1 A schematic diagram illustrating abnormal screen phenomena related to this technology.

[0010] Figure 2 A block diagram illustrating a display device according to an embodiment of this application.

[0011] Figure 3 A schematic diagram of a display device according to an embodiment of this application is shown.

[0012] Figure 4 A flowchart illustrating an embodiment of the electrostatic discharge protection method of this application is shown.

[0013] Figure 5 A schematic diagram of an embodiment of the electrostatic protection method of this application is shown. Detailed Implementation

[0014] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0015] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0016] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0017] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials. In some instances, methods, means, elements, and circuits well known to those skilled in the art are not described in detail in order to highlight the main points of this application.

[0018] Figure 2 A block diagram illustrating a display device according to an embodiment of this application is shown. Figure 2 As shown, the display device includes an electrostatic discharge (ESD) protection device and a display panel 100, wherein the ESD protection device is electrically connected to the display panel 100. The display panel 100 may be a liquid crystal display (LCD) panel. The display panel 100 may include an array substrate, which may be a glass substrate, for supporting display components such as thin-film transistors and pixel electrodes.

[0019] In one embodiment, such as Figure 2 As shown, the electrostatic discharge (ESD) protection device includes a chip-on-film (COF) 10, an ESD sensing unit 20, a voltage suppression element 30, and a timing control chip 40. The COF 10 can be a flexible film used to fix the driver chip onto a flexible circuit board, providing flexible support for components such as the driver chip.

[0020] For example, multiple flip-chip films 10 may be provided. Figure 2 In the middle, four flip-chip films 10 can be provided from left to right, and the multiple flip-chip films 10 can be evenly spaced apart.

[0021] In one embodiment, at least one driver chip 50 is disposed on the flip-chip film 10. For example, in Figure 2 In this process, each of the flip-chip films 10 is provided with a driving chip 50. The driving chip 50 may be a source driver, used to transmit data signals to the data lines in the display panel to make the corresponding pixels light up or turn off.

[0022] In one embodiment, the electrostatic sensing unit 20 is disposed on the flip-chip film 10 and the array substrate, and the electrostatic sensing unit 20 is used to sense a first transient voltage from electrostatic discharge or external environment.

[0023] Typically, electrostatic discharge (ESD) testing involves using an electrostatic gun to perform ESD testing on the gap between the bezel and the screen. Analysis of the panel anomalies corresponding to the highest probability (C level) revealed that during ESD, extremely high electrostatic voltages are conducted through the chip-on-film to components such as the driver chip, power management chip (PMIC), and timing control chip (TCON), causing interference to the internal modules of these chips and affecting normal screen display. Since the chip-on-film is directly connected to the glass, the main discharge path for ESD is from the glass to the chip-on-film, and then into the entire display system. After identifying the root cause of the panel anomalies, the applicant strategically placed electrostatic sensing units on the chip-on-film 10 and the array substrate. This allows the electrostatic sensing units 20 to promptly and accurately sense the first transient voltage from ESD or the external environment, providing a foundation for subsequent ESD handling.

[0024] Specifically, the electrostatic sensing unit 20 can be implemented through a series of electronic circuit designs. The electrostatic sensing unit 20 is bonded to the glass via a flip-chip thin film. For ease of understanding, the function of the electrostatic sensing unit 20 can be compared to that of an antenna. When electrostatic discharge reaches a certain level, the first transient voltage can be generated on the electrostatic sensing unit 20.

[0025] In one embodiment, the voltage suppression element 30 is electrically connected to the electrostatic sensing unit 20. The voltage suppression element 30 is used to attenuate the first transient voltage to obtain a second transient voltage. Since the first transient voltage sensed by the electrostatic sensing unit 20 may be too large, the voltage suppression element 30 is needed to attenuate the first transient voltage before further processing to avoid the excessively high transient voltage impacting the subsequent circuits and causing damage to them.

[0026] In one embodiment, the voltage suppression element is a varistor. The varistor is used to clamp the voltage and absorb excess current when the electrostatic sensing circuit experiences overvoltage. The varistor has a response time on the nanosecond level, offering fast response and low cost.

[0027] In one embodiment, the timing control chip 40 is electrically connected to the voltage suppression element 30. The timing control chip 40 is used to determine whether to enter the electrostatic discharge working mode based on the second transient voltage, and in the electrostatic discharge working mode, continuously refresh the register of the target chip according to the original display data read from the display panel.

[0028] Because it uses the original display data of the display panel to continuously refresh the registers of the target chip, it can restore the screen to the state before electrostatic discharge without powering the display panel back on, thus ensuring the continuity of the screen display under electrostatic discharge or external environmental interference.

[0029] In one embodiment, the electrostatic sensing unit 20 may include a first circuit assembly and a second circuit assembly, with the first circuit assembly electrically connected to the second circuit assembly. The first circuit assembly, the second circuit assembly, the voltage suppression element, and the timing control chip can collectively form an electrostatic sensing circuit.

[0030] See Figure 2 The first circuit assembly includes at least one first electronic circuit 201, each first electronic circuit 201 being located at a corresponding side edge of the flip-chip film 10. For example, in Figure 2 In this embodiment, for the leftmost flip-chip film, a first electronic circuit 201 can be provided on its left edge; for the rightmost flip-chip film, a first electronic circuit 201 can also be provided on its right edge. By placing the first electronic circuit on the side edge of the corresponding flip-chip film, the embodiments of this application can reduce the impact of the first electronic circuit on the driver chip, while reserving sufficient layout space for other components of the flip-chip film.

[0031] In one embodiment, multiple first electronic circuits are provided, and these multiple first electronic circuits are arranged in parallel. The first electronic circuits 201 can extend along the extension direction of the flip-chip film (i.e., Figure 2 The multiple first electronic circuits 201 are arranged in a vertical direction and can be parallel to each other. By arranging multiple first electronic circuits in parallel, the embodiments of this application enable different first electronic circuits to independently sense electrostatic anomalies at the junction of the display panel and the flip-chip film.

[0032] See also Figure 2 The second line component 202 may be disposed on the array substrate. Figure 2 On (not shown), the second circuit assembly 202 is electrically connected to at least one of the first electronic circuits 201. The second circuit assembly 202 may be disposed along the border of the display panel 100. In this application, the display panel 100 may include a display area and a non-display area, and the second circuit assembly 202 may be arranged in the non-display area of ​​the display panel 100.

[0033] In one embodiment, the second circuit assembly 202 is a single second electronic circuit, and the two ends of the second electronic circuit are respectively electrically connected to the first electronic circuit 201 on the two flip-chip films located at the edge of the display panel. Figure 2 As shown, the two flip-chip films located at the edge of the display panel areFigure 2 The leftmost and rightmost flip-chip films are shown. These two flip-chip films are symmetrical about the center of the display panel 100, and the first electronic circuit 201 on the leftmost flip-chip film is disposed on the left edge of the flip-chip film, while the first electronic circuit 201 on the rightmost flip-chip film is disposed on the right edge of the flip-chip film.

[0034] In one embodiment, the second circuit assembly 202 includes a horizontal electronic circuit disposed opposite to a plurality of first electronic circuits 201 and two vertical electronic circuits disposed on both sides of the flip-chip film. The horizontal electronic circuits opposite to the plurality of first electronic circuits 201 are arranged along the length direction of the display panel 100, and the two vertical electronic circuits are arranged along the width direction of the display panel 100. For example, the horizontal electronic circuits are perpendicular to the plurality of first electronic circuits 201, and the vertical electronic circuits are parallel to the plurality of first electronic circuits 201. The horizontal electronic circuits and the two vertical electronic circuits are respectively arranged around three sides of the display panel 100, while the first electronic circuits are arranged along one side of the display panel 100 where the flip-chip film is located.

[0035] In one embodiment, the display device further includes: at least one first control board 60, wherein a plurality of first electronic circuits 201 are connected in series on the first control board 60 and electrically connected to the voltage suppression element 30 via a connector. The first control board is connected to at least one of the aforementioned flip-chip films. For example, in Figure 2 In this embodiment, two first control boards can be provided, namely an XR board and an XL board. Each first control board 60 can be provided with a first connector 601, and multiple first electronic circuits 201 corresponding to each first control board 60 are connected in series to the first connector 601. Each first control board 60 is connected to two corresponding flip-chip films. It is understood that the correspondence between the number of first control boards and flip-chip films can be set as needed, and this application is not limited in this respect.

[0036] In one embodiment, the display device further includes a second control board 70, which is connected to at least one of the first control boards 60 via the connector. The timing control chip 40 and the voltage suppression element 30 are both disposed on the second control board 70. The second control board 70 may be a printed circuit board (PCB). Figure 3In this configuration, a second control board 70 may be provided. The second control board 70 may be provided with at least one second connector 701, which can be electrically connected to the first connector 601 via a flexible flat cable (FFC).

[0037] Figure 3 A schematic diagram of a display device according to an embodiment of this application is shown. Figure 3 As shown, for example, 12 flip-chip films are provided, and the corresponding source driver chips are DR1-DR12. Each source driver chip has a first electronic circuit on its side, and a second electronic circuit can be provided in the non-display area of ​​the panel. Multiple parallel first electronic circuits can be converged to a first control board, and then electrically connected to the second control board where the timing control chip (TCON) is located. When an abnormal electrostatic discharge occurs at the interface between the panel and the flip-chip film, the first electronic circuit can automatically generate a corresponding first transient voltage. It can be understood that... Figure 4 The number of source driver chips is exemplary and is not limited in this application.

[0038] The display device may further include other devices such as an external memory, which may be disposed on the second control board for storing the original display data of the display panel. It is understood that this application does not limit the other components of the display device.

[0039] Figure 4 A flowchart illustrating an embodiment of the electrostatic discharge (ESD) protection method of this application is shown. Figure 5 As shown, the electrostatic discharge (ESD) protection method is applied to the display device, and the ESD protection method includes:

[0040] Step S1: Obtain the second transient voltage of the electrostatic sensing unit;

[0041] In one embodiment, the execution entity of the electrostatic discharge protection method may be the timing control chip. The timing control chip can continuously detect the second transient voltage.

[0042] Step S2: Determine whether the timing control chip should enter electrostatic discharge mode based on the second transient voltage;

[0043] Further, the step of determining whether the timing control chip is in electrostatic discharge operating mode based on the second transient voltage includes:

[0044] Step S21: Determine whether the second transient voltage is zero;

[0045] Step S22: If the second transient voltage is zero, control the display panel to display normally; if the second transient voltage is not zero, determine whether the duration of the second transient voltage is greater than a preset duration threshold.

[0046] The duration threshold can be preset. When the second transient voltage is not zero, it can be further determined whether the second transient voltage exceeds the preset voltage threshold, and whether the duration for which the second transient voltage exceeds the preset voltage threshold is greater than the preset duration threshold.

[0047] Step S23: If the duration of the second transient voltage is greater than a preset duration threshold, enter the electrostatic discharge working mode; if the duration of the second transient voltage is less than or equal to the preset duration threshold, start timing and acquire the second transient voltage after several frames.

[0048] For example, if the duration of the second transient voltage is less than or equal to a preset duration threshold, timing is started, and the second transient voltage after 100 frames can be obtained.

[0049] Furthermore, the electrostatic protection method further includes:

[0050] Step S24: Determine whether the duration of the second transient voltage after several frames is greater than a preset duration threshold;

[0051] Step S25: If the duration of the second transient voltage after several frames is greater than a preset duration threshold, enter the electrostatic discharge working mode; if the duration of the second transient voltage after several frames is less than or equal to the preset duration threshold, control the display panel to display normally.

[0052] Specifically, if the duration of the second transient voltage is less than or equal to a preset duration threshold, the second transient voltage can be detected and judged again after several frames. If the duration of the second transient voltage after several frames exceeds the preset duration threshold, the timing control chip can enter the electrostatic discharge working mode.

[0053] Step S3: When the timing control chip enters the electrostatic discharge working mode, the register of the target chip is continuously refreshed according to the original display data of the display panel read.

[0054] The target chip can be the timing control chip itself, the power management chip, and the source driver. The registers of the target chip can be refreshed periodically.

[0055] Figure 5 A schematic diagram illustrating an embodiment of the electrostatic discharge protection method of this application is shown. ​As shown, the timing control chip can continuously detect ESD signals (i.e., the second transient voltage). When the voltage value of the second transient voltage is detected to be non-zero for the first time, it can be determined whether to enter the electrostatic discharge test mode. If the electrostatic discharge test mode is entered, the original display data of the display panel is read from the external memory, and the original display data is written to the temporary registers of the timing control chip itself, the power management chip, and the source driver every N frames, where N is a natural number, thereby refreshing the registers of the timing control chip itself, the power management chip, and the source driver every N frames; if the electrostatic discharge test mode is not entered, a timer can be started, and it can be determined whether an ESD signal is detected after several frames (e.g., 100 frames). If an ESD signal is detected, the electrostatic discharge test mode can be entered; if no ESD signal is detected, the display panel can be controlled to work normally.

[0056] When in electrostatic discharge (ESD) test mode or when there is a large amount of static electricity in the external environment, the static electricity will be detected by the display system through this terminal. At this time, the entire display system will enter a specific mode. In this mode, the registers of each chip will be repeatedly refreshed to resolve display abnormalities caused by ESD.

[0057] When performing electrostatic discharge testing or when the ambient static electricity is too high, the detection circuit has a high transient voltage. After being attenuated by the varistor, it is detected by the I / O interface of the timing control chip. At this time, TCON / PMIC / ESD will enter the ESD detection reset mechanism.

[0058] In summary, by adding an electrostatic sensing unit and an electrostatic detection mechanism, this application can effectively improve the anti-static capability of the display panel, ensure that the display panel meets the specifications, improve the reliability of the display panel operation, and thus solve the display abnormality problem caused by electrostatic discharge. At the same time, it only enters a specific continuous refresh register mode when electrostatic discharge is detected, which simplifies the operation of the display system and reduces the power consumption of some continuous refreshes.

[0059] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0060] The display device and electrostatic protection method provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display device, characterized in that, The display device includes an electrostatic discharge (ESD) protection device and a display panel. The ESD protection device is electrically connected to the display panel. The display panel includes an array substrate. The ESD protection device includes: A flip-chip film, wherein at least one driver chip is disposed on the flip-chip film; An electrostatic sensing unit is provided, with one end of the electrostatic sensing unit disposed on the flip-chip film and the other end of the electrostatic sensing unit disposed on the array substrate. The electrostatic sensing unit is used to sense electrostatic discharge from the array substrate or a first transient voltage from the external environment. A voltage suppression element, electrically connected to the electrostatic sensing unit, is used to attenuate the first transient voltage to obtain a second transient voltage; A timing control chip, electrically connected to the voltage suppression element, is used to determine whether to enter the electrostatic discharge working mode based on the second transient voltage, and to continuously refresh the register of the target chip in the electrostatic discharge working mode according to the original display data read from the display panel. The electrostatic sensing unit includes a first circuit assembly and a second circuit assembly. The first circuit assembly includes at least one first electronic circuit electrically connected to the voltage suppression element. Each first electronic circuit is located at the side edge of the corresponding flip-chip film. The second circuit assembly is disposed on the array substrate and is electrically connected to at least one of the first electronic circuits. The second circuit assembly is a single second electronic circuit, and its two ends are respectively electrically connected to the first electronic circuits on the two flip-chip films located at the edges of the display panel.

2. The display device according to claim 1, characterized in that, The first electronic circuit has multiple lines, and the multiple first electronic circuits are connected in parallel.

3. The display device according to claim 1, characterized in that, The display device further includes: At least one first control board, and multiple first electronic circuits connected in series on the first control board are electrically connected to the voltage suppression element via connectors.

4. The display device according to claim 3, characterized in that, The display device further includes: The second control board is connected to at least one of the first control boards via the connector, and the timing control chip and the voltage suppression element are both disposed on the second control board.

5. The display device according to claim 1, characterized in that, The voltage suppression element is a varistor.

6. A method for electrostatic discharge protection, characterized in that, The electrostatic discharge protection method is applied to the display device as described in any one of claims 1-5, and the electrostatic discharge protection method includes: Obtain the second transient voltage of the electrostatic sensing unit; Based on the second transient voltage, determine whether the timing control chip is in electrostatic discharge working mode; When the timing control chip enters the electrostatic discharge working mode, the registers of the target chip are continuously refreshed according to the original display data read from the display panel.

7. The electrostatic protection method according to claim 6, characterized in that, The step of determining whether the timing control chip is in electrostatic discharge mode based on the second transient voltage includes: Determine whether the second transient voltage is zero; If the second transient voltage is zero, the display panel is controlled to display normally; if the second transient voltage is not zero, it is determined whether the duration of the second transient voltage is greater than a preset duration threshold. If the duration of the second transient voltage is greater than a preset duration threshold, the system enters electrostatic discharge mode; if the duration of the second transient voltage is less than or equal to the preset duration threshold, timing is started and the second transient voltage is acquired after several frames.

8. The electrostatic protection method according to claim 7, characterized in that, The electrostatic protection method further includes: Determine whether the duration of the second transient voltage after several frames is greater than a preset duration threshold; If the duration of the second transient voltage after several frames exceeds a preset duration threshold, the system enters electrostatic discharge mode; if the duration of the second transient voltage after several frames is less than or equal to the preset duration threshold, the system controls the display panel to display normally.

Citation Information

Patent Citations

  • Display screen and device and method for electrostatic interference prevention of display screen

    CN106294048A

  • Electronic paper display screen display driving method and device and electronic equipment

    CN116088242A