Display device

Abstract

This application discloses a display device. The display device includes a display panel and a driving module. The display panel includes multiple data lines and multiple sub-pixels connected to the data lines; within one frame display period, each sub-pixel corresponds to a grayscale level for display, and each grayscale level has a positive polarity voltage and a negative polarity voltage symmetrical with respect to a common voltage. The data lines are used to output a corresponding data voltage to each sub-pixel. The driving module is connected to the display panel to output the data voltage to the data lines. The driving module includes an adjustment unit, which is used to increase the voltage value of the positive polarity voltage to obtain a compensated positive polarity voltage. The data voltage is either a negative polarity voltage or a compensated positive polarity voltage. This application can improve the charging uniformity of the display panel, improving the display effect while avoiding other image quality problems.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically to a display device. Background Technology

[0002] With the continuous development of the panel industry, display panels with special driving architectures (dual-gate, tri-gate, etc.), large sizes, high resolutions, and high refresh rates are increasingly favored by consumers. However, the development of display product driving architectures, the increase in size, and the improvement of resolution and refresh rates have also brought about the problem of insufficient charging rate. For example... Figure 1 As shown, due to RC delay in the traces, the waveforms of the scan and data signals are distorted due to losses. At the points where the scan and data signals are furthest from the voltage output terminal, the waveforms are severely distorted. For example, Figure 1 The charging rate is worst in region "B".

[0003] Furthermore, to prevent liquid crystal polarization, each grayscale level corresponds to a positive voltage and a negative voltage, and the data voltage transmitted via the data line will switch between positive and negative polarities. For example... Figure 2 As shown, the shaded area represents the effective charging time. It can be seen that due to the distortion of the scanning signal waveform under the influence of RC Delay, the effective charging time of the positive polarity voltage (SICP) corresponding to the same gray level is less than the effective charging time of the negative polarity voltage (SICN), thus affecting the display uniformity. Summary of the Invention

[0004] This application provides a display device to solve the technical problem in the prior art where the effective charging time of the positive polarity voltage corresponding to the same gray level is less than the effective charging time of the negative polarity voltage, thus affecting the uniformity of the display.

[0005] This application provides a display device, which includes:

[0006] The display panel includes multiple data lines and multiple sub-pixels connected to the data lines. Within one frame display cycle, each sub-pixel corresponds to a grayscale level for display. Each grayscale level has a positive voltage and a negative voltage symmetrical with respect to a common voltage. The data lines are used to output a corresponding data voltage to each sub-pixel.

[0007] A driving module is connected to the display panel and is used to output the data voltage to the data line; the driving module includes an adjustment unit, which is used to increase the voltage value of the positive voltage to obtain a compensated positive voltage.

[0008] Wherein, the data voltage is either the negative polarity voltage or the compensated positive polarity voltage.

[0009] Optionally, in some embodiments of this application, the driving module includes a timing control chip, and the adjustment unit is integrated in the timing control chip;

[0010] Each grayscale level has a positive grayscale level and a negative grayscale level. The positive grayscale level corresponds to the positive voltage, and the negative grayscale level corresponds to the negative voltage. The adjustment unit is used to increase the grayscale value of the positive grayscale level in each frame of the display image.

[0011] Optionally, in some embodiments of this application, the timing control chip is further used to set the polarity of the data voltage transmitted by each of the data lines in the first frame of the display screen.

[0012] Optionally, in some embodiments of this application, the driving module includes a system chip, a timing control chip, and a source driver chip, wherein the timing control chip is integrated in the system chip and the adjustment unit is integrated in the source driver chip.

[0013] Optionally, in some embodiments of this application, the source driver chip includes a data memory, a latch, and a digital-to-analog converter arranged sequentially;

[0014] The adjustment unit is disposed between the data storage and the digital-to-analog converter or after the digital-to-analog converter, and the adjustment unit is used to adjust the positive polarity voltage corresponding to a row of sub-pixels each time.

[0015] Optionally, in some embodiments of this application, the latch includes a first latch and a second latch, the second latch being disposed between the first latch and the digital-to-analog converter, the second latch being used to latch the data voltage corresponding to the sub-pixel in the current row, and the first latch being used to latch the data voltage corresponding to the sub-pixel in the next row;

[0016] The adjustment unit is located between the first latch and the second latch.

[0017] Optionally, in some embodiments of this application, within the same frame display period, the polarity of the data voltage transmitted by each of the two adjacent data lines is opposite;

[0018] The sub-pixels are arranged in an array, and the polarity of the data voltage corresponding to each two adjacent sub-pixels is opposite, or the polarity of the data voltage corresponding to each two adjacent columns of sub-pixels is opposite.

[0019] Optionally, in some embodiments of this application, the polarity of the data voltage transmitted on the same data line is opposite within two adjacent display frame cycles.

[0020] Optionally, in some embodiments of this application, the driving module is further configured to determine the increase value of the positive polarity gray level corresponding to the gray level based on the pure color image display characteristics of the gray level.

[0021] Optionally, in some embodiments of this application, the driving module further includes a register, through which the driving module sets and adjusts the increment value of the positive polarity gray level corresponding to each gray level.

[0022] Optionally, in some embodiments of this application, the grayscale includes a first grayscale and a second grayscale, the first grayscale is greater than the second grayscale, and the increase in the positive voltage corresponding to the first grayscale is greater than the increase in the positive voltage corresponding to the second grayscale.

[0023] Optionally, in some embodiments of this application, for the same grayscale, the compensated positive voltage corresponding to the sub-pixel closer to the driving module is greater than the compensated positive voltage corresponding to the sub-pixel farther from the driving module.

[0024] This application provides a display device. An adjustment unit is provided in the driving module of the display device to increase the value of a positive voltage to obtain a compensated positive voltage. A data line is used to output a corresponding negative voltage or a compensated positive voltage to each sub-pixel within one frame display cycle. Therefore, by increasing the value of the positive voltage in each frame display and charging the corresponding sub-pixel with the compensated positive voltage, the charging difference between the positive and negative voltages corresponding to the same grayscale can be reduced, improving the charging uniformity of the display panel. Furthermore, since the negative voltage and the compensated positive voltage corresponding to the same grayscale are still output simultaneously, the coupling effect on the common voltage can be canceled, improving the display effect without affecting the common voltage, thereby avoiding other image quality problems such as screen crosstalk. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of signal transmission loss in the display device provided in this application;

[0027] Figure 2 This is a schematic diagram of the first charging rate of the sub-pixel provided in this application;

[0028] Figure 3 This is a schematic diagram of the second charging rate of the sub-pixel provided in this application;

[0029] Figure 4 This is a first structural schematic diagram of the display device provided in this application;

[0030] Figure 5 This is a schematic diagram of the third charging rate of the sub-pixel provided in this application;

[0031] Figure 6 This is a second structural schematic diagram of the display device provided in this application;

[0032] Figure 7 This is a schematic diagram of the data voltage transmitted via the data line in the multi-frame display screen provided in this application;

[0033] Figure 8 This is a schematic diagram of a pixel arrangement for a display panel provided in this application;

[0034] Figure 9 This is a schematic diagram of the third structure of the display device provided in this application;

[0035] Figure 10 This is a first structural schematic diagram of the source driver chip provided in this application;

[0036] Figure 11 This is a schematic diagram of the second structure of the source driver chip provided in this application. Detailed Implementation

[0037] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second," etc., may explicitly or implicitly include one or more of the stated features, and thus should not be construed as limiting this application. Furthermore, it should be noted that unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly, for example, they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0039] This application provides a display device, which will be described in detail below. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of the embodiments of this application.

[0040] Please see Figure 3 , Figure 3 This is a schematic diagram of the second charging rate of a sub-pixel provided in this application. To reduce the charging difference between the positive polarity voltage (SiC P) and the negative polarity voltage (SiC N) corresponding to the same gray level, the applicant has, in related technologies, effectively compensated for the charging difference between the positive and negative polarity voltages corresponding to the same gray level by advancing the charging time of the positive polarity voltage or delaying the charging time of the negative polarity voltage. However, this solution is prone to causing image crosstalk.

[0041] Specifically, such as Figure 2 As shown, when positive and negative voltages of the same grayscale are output simultaneously, the positive and negative voltages change simultaneously. Therefore, the coupling of the in-plane common voltage (COM) cancels each other out, and the value of the common voltage does not change. However, as... Figure 3 As shown, when the output times of the positive and negative voltages of the same gray level are staggered, the voltage transition times of the positive and negative voltages are different, and the coupling of the common voltage cannot cancel each other out, which will cause the voltage value of the common voltage to fluctuate, thus causing display crosstalk problems.

[0042] In response, the applicant proposed a new technical solution. Please refer to [link / reference]. Figure 4 and Figure 5 , Figure 4 This is a first structural schematic diagram of the display device provided in this application. Figure 5 This is a schematic diagram of the third charging rate of the sub-pixels provided in this application. In the embodiments of this application, the display device 100 includes a display panel 10 and a driving module 20.

[0043] The display panel 10 includes multiple data lines 11 and multiple sub-pixels 12 connected to the data lines 11. Within one display frame cycle, each sub-pixel 12 corresponds to a grayscale level for display, and each grayscale level has a positive voltage and a negative voltage symmetrical with respect to a common voltage. The data lines 11 are used to output corresponding data voltages to each sub-pixel 12 within one display frame cycle.

[0044] The driving module 20 is connected to the display panel 10. The driving module 20 outputs a data voltage to the data line 11. The driving module 20 includes an adjustment unit 201. The adjustment unit 201 increases the positive voltage value to obtain a compensated positive voltage. The data voltage is either a negative voltage or a compensated positive voltage.

[0045] like Figure 5 As shown, the dashed line represents the waveform of the positive voltage. It can be seen that the effective charging time (shaded area) of the positive voltage is shorter than that of the negative voltage. When the positive voltage value is increased, the effective charging time of the compensated positive voltage (SiC P1) increases significantly. Ideally, for the same grayscale, the optimal compensation value for the positive voltage can be found through adjustment, so that the effective charging time of the compensated positive voltage is exactly the same as that of the negative voltage.

[0046] In this embodiment, an adjustment unit 201 is provided in the driving module 20. The adjustment unit 201 obtains a compensated positive voltage by increasing the value of the positive voltage. The data line 11 outputs a corresponding negative voltage or a compensated positive voltage to each sub-pixel 12 within one frame display cycle. Thus, by charging the corresponding sub-pixel 12 with the compensated positive voltage, the charging difference between the positive and negative voltages corresponding to the same gray level can be reduced, improving the charging uniformity of the display panel 10. Furthermore, for the same gray level, since the negative voltage and the compensated positive voltage are still output simultaneously, and the negative voltage and the compensated positive voltage change simultaneously, the coupling of the common voltage cancels each other out. This improves the display effect without affecting the common voltage, thereby avoiding other image quality problems such as screen crosstalk.

[0047] It should be noted that during the actual display process of the display panel 10, the adjustment unit 201 does not need to compensate for the positive voltage corresponding to each gray level. The adjustment unit 201 only needs to compensate for the positive voltage appearing in each frame of the display.

[0048] In some embodiments of this application, the display panel 10 may further include scan lines 13. Each sub-pixel 12 is connected to a corresponding data line 11 and scan line 13. The sub-pixel 12 is displayed under the control of the data line 11 and scan line 13. When the display panel 10 is displaying, the sub-pixel 12 presented in each frame of the display image may be a red sub-pixel, a green sub-pixel, a blue sub-pixel, a white sub-pixel, a yellow sub-pixel, etc., and this application does not specifically limit this.

[0049] In some embodiments of this application, the display panel 10 may adopt driving methods such as dot flip, column flip, and frame flip to further improve display problems such as screen flickering. This application does not make specific limitations in this regard.

[0050] In some embodiments of this application, each grayscale level corresponds to a positive grayscale level and a negative grayscale level. The positive grayscale level corresponds to a positive voltage, and the negative grayscale level corresponds to a negative voltage. The grayscale values ​​of the positive and negative grayscale levels are the same, but opposite in sign. The positive and negative voltages corresponding to the same grayscale level are symmetrical with respect to a common voltage. The voltage value of the common voltage can be set according to the actual display effect of the display panel 10.

[0051] In some embodiments of this application, the adjustment unit 201 can perform grayscale increase processing on the positive polarity grayscale corresponding to each grayscale level, thereby adjusting the positive polarity voltage to obtain a compensated positive polarity voltage. The adjustment unit 201 can also directly perform voltage increase processing on the positive polarity voltage corresponding to each grayscale level to obtain a compensated positive polarity voltage. The adjustment method of the adjustment unit 201 can be set according to its location in the driving module 20, which will be specifically described in the following embodiments.

[0052] In some embodiments of this application, the driving module 20 is further configured to determine the increase in the positive voltage corresponding to the grayscale level based on the solid color image of the grayscale. It is understood that each solid color image has its own display characteristics. The driving module 20 can determine the increase in the positive voltage corresponding to the grayscale level based on the corresponding display characteristics.

[0053] In this context, a pure color image in grayscale refers to a display frame where all sub-pixels 12 are displayed under the same grayscale driving force. Display characteristics can refer to the brightness of the displayed image, the charging difference between different positions, etc.

[0054] Understandably, if the image display data input to the display panel is 8-bit binary, then 2 will be generated. 8This generates 256 different gray levels, from the darkest to the brightest, from gray level 0 to gray level 255. Gray level 0 is the lowest gray level, and gray level 255 is the highest gray level. The charging difference between the positive and negative polarity voltages may differ for different gray levels. Therefore, initially, the required increase in positive polarity voltage for each gray level can be determined by measuring a pure color image at each gray level.

[0055] Of course, in some embodiments of this application, only a portion of the solid color image at certain gray levels can be measured to determine the required increase in the positive voltage corresponding to those gray levels. Then, through interpolation or other processing methods, the required increase in the positive voltage corresponding to other gray levels can be obtained.

[0056] For example, in some embodiments, the grayscale includes a first grayscale and a second grayscale. The first grayscale is greater than the second grayscale. The increase in the positive voltage corresponding to the first grayscale is greater than the increase in the positive voltage corresponding to the second grayscale.

[0057] It is understandable that the larger the grayscale level, the larger the corresponding positive and negative voltage values. For example... Figure 5 As shown, under the same scanning signal, the higher the voltage value, the greater the charging difference (difference in shadow area) between the positive and negative voltages. Therefore, when the first gray level is greater than the second gray level, this embodiment sets the increase in the positive voltage corresponding to the first gray level to be greater than the increase in the positive voltage corresponding to the second gray level. This effectively reduces the charging difference between the positive and negative voltages corresponding to higher gray levels, further improving the display uniformity of the display panel 10.

[0058] Furthermore, according to the pattern in this embodiment, the increase in the positive voltage corresponding to other gray levels can be obtained based on the increase in the positive voltage corresponding to some gray levels, thereby simplifying the initial measurement process.

[0059] It should be noted that, in the embodiments of this application, the increase in the positive voltage corresponding to the gray level can be either a voltage increase or a gray level increase. It is understood that, since there is a one-to-one correspondence between voltage and gray level, increasing the gray level value can also achieve the technical effect of increasing the voltage value.

[0060] In some embodiments of this application, the driving module 20 may further include a register (not shown in the figure). The register is used to store the increment value of the positive polarity gray level corresponding to each gray level. Of course, the driving module 20 can also adjust the increment value of the positive polarity voltage corresponding to each gray level through the register. Specifically, the increment value of the positive polarity voltage can be set through the register according to the charging difference between the positive and negative polarity voltages of the current product. Then, the increment value of the positive polarity voltage stored in the register is adjusted by observing the display effect or directly measuring the charging waveform until the charging difference between the positive and negative polarity voltages meets the set conditions.

[0061] Once the increase in the positive voltage corresponding to each gray level is recorded, it can be applied to complex display screens. That is, for different display screens, the positive voltage of different gray levels can be compensated accordingly based on the increase in the positive gray level corresponding to each gray level stored in the register.

[0062] In some embodiments of this application, for the same gray level, the compensated positive voltage corresponding to the sub-pixel 12 closer to the driving module 20 is greater than the compensated positive voltage corresponding to the sub-pixel 12 farther from the driving module 20.

[0063] Understandably, the data voltage is transmitted from the driving module 20 to the display panel 10. Due to RC delay, the waveform of the data signal transmitted along the same data line 11 is distorted due to losses. The further away from the driving module 20, the more severe the distortion and the worse the charging effect. Therefore, for the same grayscale, setting the compensated positive voltage corresponding to the sub-pixel 12 closer to the driving module 20 to be greater than the compensated positive voltage corresponding to the sub-pixel 12 farther from the driving module 20 can further reduce the charging difference at different locations in the display panel 10 and improve the display effect.

[0064] Please see Figure 6 , Figure 6 This is a second structural schematic diagram of the display device provided in this application. Figure 4 The difference in the display device 100 shown is that, in this embodiment, the driving module 20 includes a timing control chip 21. An adjustment unit 201 is integrated into the timing control chip 21. The adjustment unit 201 is used to increase the grayscale value of the positive polarity grayscale in each frame of the display image.

[0065] The driving module 20 may further include a system chip 22 and a source driver chip 23. The system chip 22 provides image data to the timing control chip 21. The image data includes multiple frames of display data. Each frame of display data includes the grayscale corresponding to each sub-pixel in the display frame. The timing control chip 21 processes the image data and transmits it to the source driver chip 23. The source driver chip 23 outputs a data voltage to the data line 11.

[0066] For details, please refer to Figure 7 and Figure 8 . Figure 7 This is a schematic diagram of the data voltage transmitted via the data line in the multi-frame display screen provided in this application. Figure 8 This is a schematic diagram of the pixel arrangement of a display panel provided in this application.

[0067] like Figure 7 As shown in the figure, this embodiment of the application uses the display panel 10 displaying 10 frames of a solid color image with 32 gray levels as an example for illustration, but it should not be construed as a limitation of this application. Here, + / - signs represent positive and negative polarities, respectively. As can be seen from the figure, the positive polarity gray level corresponding to gray level 32 increases by 2 gray levels, becoming gray level 34. The negative polarity gray level corresponding to gray level 32 remains unchanged at -32 gray level. Then, this cycle repeats across different frames, always maintaining a higher gray level output for the positive polarity gray level, which effectively compensates for the problem of insufficient charging of the positive polarity voltage corresponding to the same gray level.

[0068] Specifically, within the same frame display cycle, the polarity of the data voltage transmitted by every two adjacent data lines 11 is opposite. The polarity of the data voltage corresponding to every two adjacent sub-pixels 12 is also opposite. That is, the display panel adopts a column flip combined with a flip pixel driving architecture. For example, the first data line D1 transmits a positive data voltage, the second data line D2 transmits a negative data voltage, the third data line D3 transmits a positive data voltage, the fourth data line D4 transmits a negative data voltage, the fifth data line D5 transmits a positive data voltage, and the sixth data line D6 transmits a negative data voltage.

[0069] Furthermore, within two adjacent display frames, the polarity of the data voltage transmitted by the same data line 11 is opposite. For example, in the first frame, the first data line D1 transmits a positive data voltage; in the second frame, the first data line D1 transmits a negative data voltage; this will not be elaborated further here.

[0070] In this embodiment, although the timing control chip 21 does not know which data line 11 transmits a positive data voltage and which transmits a negative data voltage, the positive and negative polarity outputs of the source driver chip 23 are controlled by the timing control chip 21. Therefore, the timing control chip 21 can implement the function of the adjustment unit 201 by pre-setting.

[0071] Specifically, in some embodiments of this application, the timing control chip 21 is also used to set the polarity of the data voltage transmitted by each data line 11 in the first frame of the display screen. That is, the initial state of the source driver chip 23 can be set by the timing control chip 21. For example, in the first frame, the first data line D1 transmits a positive data voltage, and the second data line D2 transmits a negative data voltage; in the second frame, the first data line D1 transmits a negative data voltage, and the second data line D2 transmits a positive data voltage; and so on, in the 2n-1th frame, the first data line D1 transmits a positive data voltage, and the second data line D2 transmits a negative data voltage; in the 2nth frame, the first data line D1 transmits a negative data voltage, and the second data line D2 transmits a positive data voltage. Wherein, n is an integer greater than or equal to 2.

[0072] Please see Figure 9 , Figure 9 This is a third structural schematic diagram of the display device provided in this application. (and...) Figure 6 The difference of the display device 100 shown is that, in this embodiment of the application, the timing control chip 21 is integrated into the system chip 22, and the adjustment unit 201 is integrated into the source driver chip 23.

[0073] In this embodiment, the timing control chip 21 is integrated into the system chip 22, which is equivalent to adopting an architecture without the timing control chip 21, thus saving costs.

[0074] Please see Figure 10 , Figure 10 This is a first structural schematic diagram of the source driver chip provided in this application. In the embodiments of this application, the source driver chip 23 includes a data memory 231, a latch 232, and a digital-to-analog converter 233 arranged sequentially. The data memory 231, latch 232, and digital-to-analog converter 233 are structures well known to those skilled in the art and will not be described in detail here.

[0075] The adjustment unit 201 is disposed between the data memory 231 and the digital-to-analog converter 233. The adjustment unit 201 is used to adjust the voltage value of the positive polarity voltage corresponding to a row of sub-pixels 12 each time.

[0076] It is understood that in the source driver chip 23 of this application embodiment, the latch 232 latches and transmits the data voltage corresponding to a row of sub-pixels 12 each time. Therefore, the adjustment unit 201 is used to adjust the voltage value of the positive polarity voltage corresponding to a row of sub-pixels 12 each time.

[0077] Specifically, when the adjustment unit 201 is located between the data memory 231 and the digital-to-analog converter 233, the adjustment unit 201 performs grayscale increase processing on the positive polarity voltage corresponding to a row of sub-pixels 12, thereby adjusting the positive polarity voltage.

[0078] The source driver chip 23 also includes a data interface module 234, a level converter 235, and an output buffer 236. The level converter 235 is located between the data interface module 234 and the data memory 231. The output buffer 236 is located after the digital-to-analog converter 233. The data interface module 234 is used to receive display data and clock signals transmitted from the timing control chip 21, and to transmit the display data to the data memory 231 and the clock signal to the level converter 235. After the digital-to-analog converter 233 converts the digital signal into a data voltage (analog signal), the output buffer 236 is used to enhance the driving capability of the data voltage and output the data voltage to the data line 11 in the display panel 10.

[0079] In some embodiments of this application, latch 232 includes a first latch 2321 and a second latch 2322. The second latch 2322 is disposed between the first latch 2321 and the digital-to-analog converter 233. The second latch 2322 is used to latch the data voltage corresponding to the current row sub-pixel 12. The first latch 2321 is used to latch the data voltage corresponding to the next row sub-pixel 12. Adjustment unit 201 is disposed between the first latch 2321 and the second latch 2322.

[0080] Please see Figure 11 , Figure 11 This is a schematic diagram of the second structure of the source driver chip provided in this application. Figure 10 The difference in the source driver chip 23 shown is that, in this embodiment, the adjustment unit 201 is located after the digital-to-analog converter 233. Specifically, the adjustment unit 201 is located between the digital-to-analog converter 233 and the output buffer 236.

[0081] In this embodiment, since the digital-to-analog converter 233 converts the digital signal into a data voltage (analog signal), the adjustment unit 201 directly increases the voltage of the positive polarity voltage corresponding to a row of sub-pixels 12. Specifically, the adjustment unit 201 can still call the gray-level increase value of the positive polarity voltage corresponding to each gray level stored in the register, and then increase the voltage of the positive polarity voltage corresponding to the corresponding gray level.

[0082] In the display device 100 provided in this application, the driving module 20 includes an adjustment unit 201. The adjustment unit 201 obtains a compensated positive voltage by increasing the value of the positive voltage. The data line 11 outputs a corresponding negative voltage or a compensated positive voltage to each sub-pixel 12 within one frame display cycle. Therefore, by using the compensated positive voltage to charge the corresponding sub-pixel 12, the charging difference between the positive and negative voltages corresponding to the same gray level can be reduced. This ensures the charging uniformity of the display panel 10 and avoids other image quality problems such as crosstalk.

[0083] The display device provided in the embodiments of this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A display device, characterized in that, include: The display panel includes multiple data lines and multiple sub-pixels connected to the data lines; Within one frame display cycle, each sub-pixel corresponds to a grayscale for display. Each grayscale has a positive voltage and a negative voltage that are symmetrical with respect to a common voltage. The data line is used to output the corresponding data voltage to each sub-pixel. as well as A driving module is connected to the display panel and is used to output the data voltage to the data line; the driving module includes an adjustment unit, which is used to increase the voltage value of the positive voltage to obtain a compensated positive voltage. Wherein, the data voltage is the negative polarity voltage or the compensated positive polarity voltage; The driving module includes a timing control chip, and the adjustment unit is integrated into the timing control chip; Each grayscale has a positive grayscale and a negative grayscale, the positive grayscale corresponds to the positive voltage, the negative grayscale corresponds to the negative voltage, and the adjustment unit is used to increase the grayscale value of the positive grayscale in each frame of the display image. For the same gray level, the compensated positive voltage corresponding to the sub-pixel closer to the driving module is greater than the compensated positive voltage corresponding to the sub-pixel farther from the driving module; The timing control chip is also used to set the polarity of the data voltage transmitted by each data line in the first frame of the display screen; Within the same frame display cycle, the polarity of the data voltage transmitted by each of the two adjacent data lines is opposite; The sub-pixels are arranged in an array, and the polarity of the data voltages corresponding to each pair of adjacent sub-pixels is opposite.

2. The display device according to claim 1, characterized in that, The driving module includes a system chip, a timing control chip, and a source driver chip. The timing control chip is integrated in the system chip, and the adjustment unit is integrated in the source driver chip.

3. The display device according to claim 2, characterized in that, The source driver chip includes a data memory, a latch, and a digital-to-analog converter arranged sequentially. The adjustment unit is disposed between the data storage and the digital-to-analog converter or after the digital-to-analog converter, and the adjustment unit is used to adjust the positive polarity voltage corresponding to a row of sub-pixels each time.

4. The display device according to claim 3, characterized in that, The latch includes a first latch and a second latch, the second latch being disposed between the first latch and the digital-to-analog converter, the second latch being used to latch the data voltage corresponding to the sub-pixel in the current row, and the first latch being used to latch the data voltage corresponding to the sub-pixel in the next row; The adjustment unit is located between the first latch and the second latch.

5. The display device according to claim 1, characterized in that, Within two adjacent display frame cycles, the polarity of the data voltage transmitted on the same data line is opposite.

6. The display device according to any one of claims 1-4, characterized in that, The driving module is also used to determine the increase value of the positive polarity voltage corresponding to the grayscale based on the pure color image of the grayscale.

7. The display device according to claim 6, characterized in that, The driving module also includes a register for storing the increment of the positive voltage corresponding to each gray level.

8. The display device according to any one of claims 1-4, characterized in that, The grayscale includes a first grayscale and a second grayscale, the first grayscale is greater than the second grayscale, and the increase in the positive voltage corresponding to the first grayscale is greater than the increase in the positive voltage corresponding to the second grayscale.

Images