Tiled display apparatus and method of manufacturing the same

Abstract

The embodiment of the present application provides a spliced display device and a manufacturing method thereof, wherein the spliced display device provided by the embodiment of the present application comprises at least two spliced display screens, a seam optimization unit is arranged between any two adjacent display screens, and the seam optimization unit covers a splicing gap between the two adjacent display screens. Wherein, the seam optimization unit comprises a light emitting device, and at least one of the two adjacent display screens is provided with a target pixel circuit electrically connected with the light emitting device, so as to drive the light emitting device. In this way, by introducing the seam optimization unit and arranging the light emitting device in the seam optimization unit, and by driving and displaying the light emitting device through the target pixel circuit on the display screen, the visual visible problem at the splicing gap position caused by the machining tolerance, edge grinding and the like can be effectively avoided, the seamless splicing effect in vision is realized, and the overall display effect of the spliced display device is improved.

Description

Technical Field

[0001] This application relates to the field of display device manufacturing, and more specifically, to a splicing display device and its manufacturing method. Background Technology

[0002] With the continuous development of display technology, users are paying more and more attention to the visual experience of display products, driving the development of display technology towards high-definition, intelligence, and integration. In particular, as users demand ever-expanding screen sizes and high-definition intelligent displays, in some display usage scenarios, in order to obtain a larger display area, it is necessary to splice multiple individual displays to form a larger splicing screen.

[0003] Micro-LED displays, with their advantages of being purely solid-state displays, long lifespan, high brightness, and compatibility with flexible substrates, are poised to become a future trend in the display industry. Currently, conventional Micro-LED display manufacturing processes require the sequential fabrication of each film layer of the driving circuit, followed by mass transfer bonding of the Micro-LED devices to the backplane driving circuit to achieve the desired display. However, due to limitations in manufacturing capabilities, large-size Micro-LED displays often require the splicing of several smaller panels. In conventional Micro-LED display structures, manufacturing processes, and splicing techniques, achieving a seamless splicing effect through simple splicing alone is difficult due to edge grinding and various processing tolerances. Summary of the Invention

[0004] To overcome the technical problems mentioned in the above background, in a first aspect, embodiments of this application provide a splicing display device, the splicing display device including at least two spliced ​​displays, and a seam optimization unit disposed between any two adjacent displays, the seam optimization unit covering the splicing gap between the two adjacent displays, wherein:

[0005] The seam optimization unit includes a light-emitting device, and at least one of the two adjacent displays is provided with a target pixel circuit electrically connected to the light-emitting device for driving the light-emitting device.

[0006] According to an optional embodiment of the first aspect, the first display screen includes a first main pixel circuit for driving a first display device in the first display screen, and the second display screen includes a second main pixel circuit for driving a second display device in the second display screen.

[0007] Wherein, at least one of the first primary pixel circuits is electrically connected to the light-emitting device in the seam optimization unit as the target pixel circuit, and / or, at least one of the second primary pixel circuits is electrically connected to the light-emitting device in the seam optimization unit as the target pixel circuit.

[0008] According to an optional implementation of the first aspect, the two adjacent displays include a first display and a second display, wherein:

[0009] The first display screen includes a first light-emitting pixel area and a first transition area. The first light-emitting pixel area includes a main pixel circuit and a backup pixel circuit. The main pixel circuit is used to drive a first display device of the first display screen. The first transition area includes a first transition component electrically connected to the backup pixel circuit.

[0010] The light-emitting device of the stitch optimization unit is electrically connected to the backup pixel circuit, and the target pixel circuit includes the backup pixel circuit.

[0011] According to an optional embodiment of the first aspect, the second display screen includes a second light-emitting pixel area and a second transition area, the second transition area includes a second transition member, and a second ground power line of the second display screen extends to the second transition area and is electrically connected to the second transition member.

[0012] The positive electrode of the light-emitting device in the seam optimization unit is electrically connected to the first adapter, and the negative electrode is electrically connected to the second adapter.

[0013] According to an optional implementation of the first aspect, the two adjacent displays include a first display and a second display, wherein:

[0014] The first display screen includes a first light-emitting pixel area and a first transition area. The first light-emitting pixel area includes a first main pixel circuit and a first backup pixel circuit. The first main pixel circuit is used to drive the first display device in the first display screen. The first transition area includes a first transition component electrically connected to the first backup pixel circuit.

[0015] The second display screen includes a second light-emitting pixel area and a second transition area. The second light-emitting pixel area includes a second main pixel circuit and a second spare pixel circuit. The second main pixel circuit is used to drive the second display device in the second display screen. The second transition area includes a second transition piece electrically connected to the second spare pixel circuit.

[0016] The target pixel circuit includes a first backup pixel circuit and a second backup pixel circuit, and the stitching optimization unit includes a first light-emitting device electrically connected to the first adapter and a second light-emitting device electrically connected to the second adapter.

[0017] According to an optional embodiment of the first aspect, the first grounding power line of the first display screen extends to the first transition area and is insulated from the first transition component; the second grounding power line of the second display screen extends to the second transition area and is insulated from the second transition component; the positive electrode of the first light-emitting device is electrically connected to the first transition component and the negative electrode is electrically connected to the first grounding power line; the positive electrode of the second light-emitting device is electrically connected to the second transition component and the negative electrode is electrically connected to the second grounding power line.

[0018] According to an optional implementation of the first aspect, the splicing display device further includes a splicing board, and the at least two spliced ​​displays are spliced ​​on the splicing board;

[0019] The display screen includes a substrate, a driving layer on the substrate, light-emitting devices spaced apart from each other on the driving layer, and a first light-shielding layer disposed on the driving layer and at least partially located between adjacent light-emitting devices.

[0020] Preferably, the seam optimization unit includes an electrode layer, a light-emitting layer located on the side of the electrode layer opposite to the splicing panel, and a second light-shielding layer located on the side of the light-emitting layer opposite to the electrode layer, wherein the second light-shielding layer has pixel openings for light transmission;

[0021] Preferably, the splicing display device further includes a third light-shielding layer located on the side of the electrode layer near the splicing panel, the third light-shielding layer at least filling the splicing gap between two adjacent displays.

[0022] According to an optional embodiment of the first aspect, the light-emitting layer includes a passivation layer, a first semiconductor layer, a light-emitting material layer, and a second semiconductor layer, which are sequentially stacked from the side of the electrode layer away from the splicing panel. The electrode layer includes a first electrode and a second electrode. The first electrode is connected to the first semiconductor layer through a first through-hole penetrating the passivation layer. The second electrode is connected to the second semiconductor layer through a second through-hole penetrating the passivation layer, the first semiconductor layer, and the light-emitting material layer. The passivation layer extends into the second through-hole to insulate and isolate the first semiconductor layer and the second electrode.

[0023] Preferably, the seam optimization unit further includes isolation pillars, and the light-emitting layer has isolation windows on both sides of the position corresponding to the pixel opening, which penetrate the first semiconductor layer, the light-emitting material layer, and the second semiconductor layer. The isolation pillars are located inside the isolation windows, and the orthographic projection of the pixel opening on the light-emitting layer is located between two adjacent isolation windows.

[0024] Preferably, in the seam optimization unit, the pixel opening corresponding to the light-emitting device with a different light-emitting color than the light-emitting material layer has a quantum dot material layer with a color corresponding to the light-emitting color of the light-emitting device.

[0025] Secondly, embodiments of this application also provide a method for manufacturing a splicing display device, the method comprising:

[0026] Provide a splicing board;

[0027] Provide at least two displays and splice the at least two displays sequentially on the splicing board, wherein at least one of the two adjacent displays has a target pixel circuit;

[0028] A seam optimization unit with a light-emitting device is provided, and one of the seam optimization units is connected between any two adjacent displays, such that the seam optimization unit covers the seam gap between the two adjacent displays and forms an electrical connection between the light-emitting device and the target pixel circuit.

[0029] According to an alternative embodiment of the second aspect, the method further includes the step of manufacturing the display screen, which includes:

[0030] A driving layer is formed on a substrate, and a main pixel circuit and a spare pixel circuit are formed on the driving layer, wherein the spare pixel circuit serves as the target pixel circuit.

[0031] A display device electrically connected to the main pixel circuit and an adapter electrically connected to the spare pixel circuit are formed on the driving layer;

[0032] A first light-shielding layer is formed on the driving layer, such that the first light-shielding layer is at least partially located between adjacent display devices;

[0033] Preferably, the method further includes the step of manufacturing the seam optimization unit, which includes:

[0034] A light-emitting layer is formed on a substrate, the light-emitting layer including a first semiconductor layer, a light-emitting material layer, a second semiconductor layer, and a buffer layer, wherein the buffer layer, the second semiconductor layer, the light-emitting material layer, and the first semiconductor layer are sequentially stacked on the substrate;

[0035] A passivation layer is formed on the side of the second semiconductor layer away from the light-emitting layer, and an electrode layer is formed based on the passivation layer; wherein, the electrode layer includes a first electrode connected to the first semiconductor layer through a first via penetrating the passivation layer and a second electrode connected to the second semiconductor layer through a second via penetrating the passivation layer, the first semiconductor layer, and the light-emitting material layer; the passivation layer extends into the second via to insulate and isolate the first semiconductor layer and the second electrode;

[0036] A temporary support plate is bonded to one side of the electrode layer and the substrate is removed. Then, a second light-shielding layer is formed on the buffer layer and a pixel opening for light transmission is made on the second light-shielding layer.

[0037] A quantum dot material layer of a corresponding color is formed within the pixel opening of a light-emitting device that emits a different color than the light-emitting material layer.

[0038] Preferably, the method further includes:

[0039] A third light-shielding layer is formed at the position corresponding to the splicing gap between the splicing panel and the adjacent display screen, so that the third light-shielding layer at least fills the splicing gap.

[0040] In summary, compared with the prior art, the splicing display device and its manufacturing method provided in this application introduce a seam optimization unit connected between adjacent displays. Light-emitting devices are set in the seam optimization unit, and the light-emitting devices are driven by the target pixel circuit on the spliced ​​displays. This effectively avoids visual visibility problems at the splicing seam caused by processing tolerances, edge grinding, etc., achieving a seamless splicing effect and improving the overall display effect of the splicing display device. Attached Figure Description

[0041] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a cross-sectional schematic diagram of two adjacent displays included in the splicing display device provided in this application embodiment;

[0043] Figure 2 This is a plan view of two adjacent displays included in the splicing display device provided in the embodiments of this application;

[0044] Figure 3 This is a partial planar structural diagram of the first display screen among two adjacent display screens included in the splicing display device provided in this application embodiment;

[0045] Figure 4 This is a partial planar structural diagram of the second display screen among two adjacent display screens included in the splicing display device provided in this application embodiment;

[0046] Figure 5 This is a partial planar structural schematic diagram of the seam optimization unit provided in the embodiments of this application;

[0047] Figure 6 This is a schematic diagram of another partial planar structure of the second display screen in one of two adjacent display screens included in the splicing display device provided in this application embodiment;

[0048] Figure 7 This is a schematic diagram of the structure of the display screen in the splicing display device provided in the embodiments of this application;

[0049] Figure 8 This is a partial cross-sectional structural diagram of the seam optimization unit provided in the embodiments of this application;

[0050] Figure 9 This is a schematic diagram illustrating the process of splicing the first display screen and the second display screen in the manufacturing method of the splicing display device provided in this application embodiment;

[0051] Figure 10 This is a schematic diagram of the manufacturing process of the display screen in the manufacturing method of the splicing display device provided in the embodiments of this application;

[0052] Figure 11 This is a schematic diagram of the manufacturing process of the seam optimization unit in the manufacturing method of the splicing display device provided in the embodiments of this application.

[0053] Icons: 1-Display screen; 10-First display screen; 101-First display device; 102-First primary pixel circuit; 103-First backup pixel circuit; 111-First light-emitting pixel area; 112-First adapter area; 1121-First adapter; 1122-First grounding power line; 1111-Substrate; 1112-Driver layer; 1113-Display device; 1114-First light-shielding layer; 1115-Connecting pad; 1116-Bonding metal; 1117-Primary pixel circuit; 1118-Backup pixel circuit; 20-Second display screen; 201-Second display device; 202-Second primary pixel circuit; 203-Second backup pixel circuit; 211-Second... 212-Light-emitting pixel area; 2121-Second transition area; 2122-Second transition component; 2122-Second grounding power line; 30-Matching seam optimization unit; 301-First light-emitting device; 302-Second light-emitting device; 31-Electrode layer; 311-First electrode; 312-Second electrode; 32-Light-emitting layer; 320-Passivation layer; 321-First semiconductor layer; 322-Light-emitting material layer; 323-Second semiconductor layer; 324-Buffer layer; 33-Second light-shielding layer; 331-Pixel opening; 34-Encapsulation layer; 35-Isolation pillar; 350-Isolation window; 40-Matching board; 41-Third light-shielding layer; 50-Transfer head; 100-Substrate; 200-Temporary support plate. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0055] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0056] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0057] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0058] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0059] As mentioned in the background section, the inventors have discovered that in traditional display splicing schemes, taking a Micro-LED display with a glass substrate as an example, if the edge alignment of the glass substrate is used as the standard, due to cutting errors, the distance between the pixels in the splicing area and the glass edge will vary. Compared to the effective display area, the spacing between adjacent pixels on the two displays on either side of this splicing area will also vary. Furthermore, the edge grinding creates a thickness gradient area at the glass edge, which can cause the display status in the splicing seam area to be either dark or bright. If pixel alignment is used to ensure that the pixel spacing at the splicing seam is consistent with the effective display area, the splicing seam between the glass panels cannot be controlled, resulting in a noticeable seam visible when the screen is off, thus affecting the overall display effect of the splicing display device.

[0060] In view of this, embodiments of this application provide a splicing display device and its manufacturing method, which can effectively improve the display effect at the splicing seam of the splicing display device, achieving a seamless splicing effect or a near-seamless splicing effect. The splicing display device provided in this application includes at least two spliced ​​display screens, with a seam optimization unit disposed between any two adjacent display screens, the seam optimization unit covering the splicing seam between the two adjacent display screens. The seam optimization unit includes a light-emitting device, and at least one of the two adjacent display screens is provided with a target pixel circuit electrically connected to the light-emitting device to drive the light-emitting device.

[0061] The following description, in conjunction with the accompanying drawings, provides exemplary alternative embodiments for implementing the above-described solutions.

[0062] First, please refer to Figure 1 and Figure 2 As shown, Figure 1 This is a cross-sectional schematic diagram of two adjacent displays included in the splicing display device provided in this application embodiment. Figure 2This is a plan view of two adjacent displays included in the splicing display device provided in this application embodiment. The splicing display device provided in this application embodiment includes at least two displays 1, which may include a first display 10 and a second display 20 that are adjacent to each other and spliced ​​together by a seam optimization unit 30. Exemplarily, the first display 10 and the second display 20 may be two devices disposed on the same plane.

[0063] Combination Figure 3 As shown, Figure 3 This is a partial planar structural schematic diagram of the first display screen 10. The first display screen 10 may include a first light-emitting pixel area 111 and a first transition area 112. As an alternative example, the first transition area 112 may be located on the side of the first light-emitting pixel area 111 closer to the second display screen 20, but is not limited thereto.

[0064] As an optional example, the first light-emitting pixel area 111 includes a first primary pixel circuit 102 and a first backup pixel circuit 103, and the first transition area 112 includes a first adapter 1121 electrically connected to the first backup pixel circuit 103. The first primary pixel circuit 102 can be used to drive the first display device 101 in the first display screen 10, and the first backup pixel circuit 103 can be disposed near the first transition area 112, but is not limited thereto.

[0065] Further integration Figure 4 As shown, Figure 4 This is a partial planar structural schematic diagram of the second display screen 20. The second display screen 20 includes a second light-emitting pixel area 211 and a second transition area 212. The second light-emitting pixel area 211 includes a second primary pixel circuit 202 and a second backup pixel circuit 203. The second transition area 212 includes a second adapter 2121 electrically connected to the second backup pixel circuit 203. The second primary pixel circuit 202 can be used to drive the second display device 201 in the second display screen 20. The second backup pixel circuit 203 can be located on the side of the second light-emitting pixel area 211 near the second transition area 212, but is not limited thereto.

[0066] Based on the above, in this embodiment, the target pixel circuit may include the first backup pixel circuit 103 and the second backup pixel circuit 203. It should be understood that... Figure 3 and Figure 4The illustrations show that adjacent first display screens 10 and second display screens 20 each include a corresponding target pixel circuit. It is understood that in other embodiments, the first spare pixel circuit 103 in the first display screen 10 or the second spare pixel circuit 203 in the second display screen 20 may be omitted. This application does not specifically limit the arrangement of target pixel circuits in different display screens 1, as long as the resulting splicing display device has a target pixel circuit capable of driving the light-emitting devices in the seam optimization unit 30.

[0067] In another possible example, both the first spare pixel circuit 103 of the first display screen 10 and the second spare pixel circuit 203 of the second display screen 20 can be omitted. In this way, at least one of the first primary pixel circuits 102 is electrically connected to the light-emitting device in the bezel optimization unit 30 as the target pixel circuit, and / or at least one of the second primary pixel circuits 202 is electrically connected to the light-emitting device in the bezel optimization unit 30 as the target pixel circuit. In this embodiment, the light-emitting device in the bezel optimization unit 30 can share a pixel circuit with the first display device 101 in the first display screen 10, or share a pixel circuit with the second display device 201 in the second display screen 20.

[0068] As a preferred example, the following description takes the example of two adjacent displays 1 each having a corresponding target pixel circuit. For example, the first display 10 includes a first backup pixel circuit 103, and the second display 20 includes a second backup pixel circuit 203.

[0069] Please see Figure 5 As shown, Figure 5This is a partial planar structural schematic diagram of the seam optimization unit 30. As a possible example, the seam optimization unit 30 may include a first light-emitting device 301 electrically connected to the first adapter 1121 and a second light-emitting device 302 electrically connected to the second adapter 2121. It should be understood that in other embodiments, the seam optimization unit 30 may also include only one of the first light-emitting device 301 and the second light-emitting device 302. For example, when only the first display screen 10 is equipped with a target pixel circuit (first backup pixel circuit 103), the seam optimization unit 30 may include only the first light-emitting device 301; and when only the second display screen 20 is equipped with a target pixel circuit (second backup pixel circuit 203), the seam optimization unit 30 may include only the second light-emitting device 302. Both the first light-emitting device 301 and the second light-emitting device 302 can be LED devices used to emit any one of the three colors R, G, and B. For example, the first light-emitting device 301 and the second light-emitting device 302 can each exist as a light-emitting pixel unit consisting of LEDs of three different colors: R, G, and B. For example, each light-emitting pixel unit may include three LEDs for emitting R, G, and B light respectively.

[0070] It should be understood that, for ease of explanation, this embodiment uses a set of adjacent first display screens 10 and second display screens 20 as an example. In other embodiments, the splicing display device may include multiple sets of adjacent display screens 1. For example, in the splicing display device, one of any two adjacent display screens 1 can serve as the first display screen 10, and the other can serve as the second display screen 20.

[0071] Further reading Figure 3 and Figure 4To drive the light-emitting devices in the seam optimization unit 30, in one possible implementation, the first ground power line 1122 of the first display screen 10 extends to the first transition area 112 and is insulated from the first transition member 1121, and the second ground power line 2122 of the second display screen 20 extends to the second transition area 212 and is insulated from the second transition member 2121. Thus, the positive terminal (P-pole) of the first light-emitting device 301 can be electrically connected to the first transition member 1121, and the negative terminal can be electrically connected to the first ground power line 1121 of the first display screen 10. In this way, the first light-emitting device 301 is connected between the first spare pixel circuit 103 and the first ground power line 1122 of the first display screen 10, and can be driven by the first spare pixel circuit 103. For example, one of the first light-emitting devices 301 can be connected to one of the first backup pixel circuits 103. Different first light-emitting devices 301 can share a first ground power line 1122, or they can be connected to different first ground power lines 1122 respectively. This embodiment does not specifically limit this.

[0072] Correspondingly, the positive terminal of the second light-emitting device 302 can be electrically connected to the second adapter 2121, and the negative terminal can be electrically connected to the second ground power line 2122 of the second display screen 20. Thus, the second light-emitting device 302 is connected between the second spare pixel circuit 203 and the second ground power line 2122 of the second display screen 20, thereby enabling the second light-emitting device 302 to be driven by the second spare pixel circuit 203. For example, one second light-emitting device 302 can be connected to one second spare pixel circuit 203. Different second light-emitting devices 302 can share a single second ground power line 2122, or they can be connected to different second ground power lines 2122. This embodiment does not specifically limit this.

[0073] Furthermore, in another alternative implementation, a scheme is described below where one of two adjacent displays 1 has a target pixel circuit. Exemplarily, in this implementation, the display 1 with the target pixel circuit is defined as the first display 10. Based on this, in this implementation, it is also combined with... Figure 3As shown, the first display screen 10 includes a first light-emitting pixel area 111 and a first transition area 112 located on the side of the first light-emitting pixel area 111 near the second display screen 20. The first light-emitting pixel area 111 includes a target pixel circuit (e.g., a first spare pixel channel 103) near the side of the first transition area 112. The first transition area 112 includes a first adapter 1121 electrically connected to the target pixel circuit.

[0074] The light-emitting device of the stitching optimization unit 30 is electrically connected to the target pixel circuit.

[0075] Correspondingly, in this implementation, for example Figure 6 As shown, the second display screen 20 may include a second light-emitting pixel area 211 and a second transition area 212 located on the side of the second light-emitting pixel area 211 near the first transition area 112. The second transition area 212 includes a second transition member 2121, and the second ground power line 2122 of the second display screen 20 extends to the second transition area 212 and is electrically connected to the second transition member 2121. Accordingly, the positive electrode of the light-emitting device of the seam optimization unit 30 can be electrically connected to the first transition member 1121, and the negative electrode can be electrically connected to the second transition member 2121. Thus, with Figure 4 Compared to the second display screen 20, Figure 6 The target pixel circuit (such as the second spare pixel circuit 203) of the second display screen 20 can be omitted. The light-emitting device of the stitching optimization unit 30 is electrically connected between the target pixel circuit set in the first display screen 10 and the second ground power line 2122 set in the second display screen 20. The light-emitting device can be driven by sending a driving signal to the light-emitting device through the target pixel circuit set in the first display screen 10.

[0076] Furthermore, combined Figure 1 and Figure 7 As shown, in this embodiment, the splicing display device further includes a splicing board 40, on which at least two spliced ​​display screens 1 are spliced.

[0077] The display screen 1 further includes a substrate 1111, a driving layer 1112 located on the substrate 1111, display devices 1113 spaced apart from each other on the driving layer 1112, and a first light-shielding layer 1114 disposed on the driving layer 1112 and at least partially located between adjacent display devices 1113. It should be understood that the display devices 1113 can be driven by the main pixel circuitry of the display screen 1 for display. As an example, when the display screen 1 is the first display screen 10, the display device 1113 is the first display device 101; when the display screen 1 is the second display screen 20, the display device 1113 is the second display device 201.

[0078] Correspondingly, in order to further improve the visual integrity of the splicing display device, combined with Figure 8 As shown, the seam optimization unit 30 may further include an electrode layer 31, a light-emitting layer 32 located on the side of the electrode layer 31 away from the splicing plate 40, and a second light-shielding layer 33 located on the side of the light-emitting layer 32 away from the electrode layer 31, wherein the second light-shielding layer 33 has a pixel opening 331 for light transmission.

[0079] In this embodiment, both the first light-shielding layer 1114 and the second light-shielding layer 33 can be formed using opaque materials (such as black ink). Thus, the first light-shielding layer 1114 and the second light-shielding layer 33 can serve as the black matrix for the display screen 1 and the seam optimization unit 30, respectively, to prevent color mixing between adjacent light-emitting devices or adjacent display devices 1113. Furthermore, due to the presence of the first light-shielding layer 1114 and the second light-shielding layer 33, the second light-shielding layer 33 can cover the seam between two adjacent display screens 1, allowing the first light-shielding layer 1114 and the second light-shielding layer 33 to present a visually "uniform black" effect. This further achieves a seamless splicing effect between adjacent display screens 1, eliminating the visual impact of the seam on the display effect.

[0080] The light-emitting layer 32 may include a passivation layer 320, a first semiconductor layer 321, a light-emitting material layer 322, and a second semiconductor layer 323, sequentially stacked from the electrode layer 31 away from the splicing panel 40. The electrode layer 31 may include a first electrode 311 and a second electrode 312. The first electrode 311 is connected to the first semiconductor layer 321 through a first through-hole penetrating the passivation layer 320. The second electrode 312 is connected to the second semiconductor layer 323 through a second through-hole penetrating the passivation layer 320, the first semiconductor layer 321, and the light-emitting material layer 322. The passivation layer 320 extends into the second through-hole to insulate and isolate the first semiconductor layer 321 and the second electrode 312. Furthermore, the light-emitting layer 32 may also include a buffer layer 324 located between the second semiconductor layer 323 and the second light-shielding layer 33. One of the first electrode 311 and the second electrode 312 can be used as a positive electrode to connect to a connector (such as the first connector 1121 or the second connector 2121) on the spare pixel circuit in the display screen 1, and the other can be used as a negative electrode to connect to the ground power line, thereby driving the corresponding light-emitting device of the seam optimization unit 30. In this embodiment, Figure 8 The diagram shows a partial schematic of one of the light-emitting devices in the seam optimization unit 30. Each light-emitting device includes a light-emitting layer 32 corresponding to a pixel opening 331 and an electrode layer 31, among other components. Furthermore, the light-emitting material layer can be a material layer for emitting blue light. When the light emitted by the light-emitting device is not blue light, a quantum dot layer corresponding to the emission color of the light-emitting device is also disposed within the pixel opening 331. For example, when the light emitted by the light-emitting device is red light, a red quantum dot layer is disposed within the pixel opening 331; similarly, when the light emitted by the light-emitting device is green light, a green quantum dot layer is disposed within the pixel opening 331. The quantum dot layer can be printed at the pixel opening 331 using inkjet printing (IJT) and is disposed on the same layer as the second light-shielding layer 33.

[0081] Furthermore, in this embodiment, the seam optimization unit 30 may further include an encapsulation layer 34 located on the side of the second light-shielding layer 33 facing away from the light-emitting layer 32. Additionally, the seam optimization unit 30 may also include isolation pillars 35. The light-emitting layer 32 has isolation windows on both sides of the pixel opening 331, penetrating the first semiconductor layer 321, the light-emitting material layer 322, and the second semiconductor layer 323. The isolation pillars 35 are located within the isolation windows, and the orthographic projection of the pixel opening 331 onto the light-emitting layer 32 is located between two adjacent isolation windows.

[0082] In addition, to prevent light emitted by the light-emitting device of the seam optimization unit 30 from leaking from one side of the splicing panel 40, combined with Figure 1 As shown, the splicing display device may further include a third light-shielding layer 41 located on the side of the electrode layer 31 near the splicing panel 40, and the third light-shielding layer 41 at least fills the splicing gap between the two adjacent display screens 1.

[0083] In one possible implementation, combining Figure 7 As shown, the adapter of the display screen 1 (such as the first adapter 1121 of the first display screen 10 or the second adapter 2121 of the second display screen 20) includes an adapter pad 1115 and a bonding metal 1116 located above the adapter pad 1115. The bonding metal 1116 and the driving layer 1112 are electrically connected through the adapter pad 1115. The bonding metal 1116 is used to form an electrical connection with the seam optimization unit 30. Furthermore, in order to provide sufficient space height between two adjacent display screens 1 (such as the first display screen 10 and the second display screen 20) to place the seam optimization unit 30, the adapter pad 1115 can be at least partially embedded in the driving layer 1112. For example, in a preferred embodiment, the adapter pad 1115 can be fully embedded in the driving layer 1112, which makes the thickness redundancy of the seam optimization unit 30 larger and makes it easier to make the surface of the seam optimization unit 30 in the splicing display device flush or substantially flush with the surface of the display screen 1, thereby improving the overall splicing effect of the splicing display device.

[0084] Furthermore, based on the above, this application embodiment also provides a method for manufacturing a splicing display device, which includes the following steps S100-S300, which will be described in detail below.

[0085] Step S100: Provide a splicing board 40.

[0086] Step S200: Provide at least two display screens 1 and splice the at least two display screens 1 sequentially on the splicing plate 40, wherein at least one of the two adjacent display screens 1 has a target pixel circuit.

[0087] Step S300: Provide a seam optimization unit 30 with a light-emitting device, and connect one of the seam optimization units 30 between any two adjacent display screens 1, so that the seam optimization unit 30 covers the seam gap between the two adjacent display screens 1 and forms an electrical connection between the light-emitting device and the target pixel circuit.

[0088] The above method will be described exemplarily below using two adjacent first display screens 10 and second display screens 20 of the at least two display screens 1 as examples.

[0089] In one possible example, the first display screen 10 may include a first light-emitting pixel area 111 and a first transition area 112. The first light-emitting pixel area 111 includes a first spare pixel circuit 103, and the first transition area 112 includes a first adapter 1121 electrically connected to the first spare pixel circuit 103.

[0090] The second display screen 20 includes a second light-emitting pixel area 211 and a second transition area 212. The second light-emitting pixel area 211 includes a second spare pixel circuit 203, and the second transition area 212 includes a second adapter 2121 electrically connected to the second spare pixel circuit 203.

[0091] The seam optimization unit 30 includes a first light-emitting device 301 electrically connected to the first adapter 1122 and a second light-emitting device 302 electrically connected to the second adapter 2122. Thus, the target pixel circuit includes a first backup pixel circuit 103 and a second backup pixel circuit 203.

[0092] Based on the above, combined with Figure 9 As shown, the implementation process of the above method may include the following:

[0093] First, the first display screen 10 and the second display screen 20 are disposed on the substrate 40, and the first transition area 112 of the first display screen 10 and the second transition area 212 of the second display screen 20 are disposed adjacent to each other.

[0094] Secondly, a third light-shielding layer 41 is formed on the splicing panel 40 at a position corresponding to the splicing gap between the first display screen 10 and the second display screen 20, so that the third light-shielding layer 41 at least fills the splicing gap.

[0095] Then, the seam optimization unit 30 is transferred between the first display screen 10 and the second display screen 20 via the transfer head 50, and the seam optimization unit 30 is electrically connected between the first adapter 1121 of the first adapter area 112 and the second adapter 2121 of the second adapter area 212, so that the light-emitting devices of the seam optimization unit 30 (e.g., including the first light-emitting device 301 and the second light-emitting device 302) can be driven by the target pixel circuits (e.g., the first spare pixel circuit 103 and the second spare pixel circuit 203) of the first display screen 10 and the second display screen 20 to achieve the display effect of the seam optimization unit 30.

[0096] Furthermore, based on the above, the manufacturing method of the splicing display device provided in this application embodiment may further include the step of manufacturing the display screen. (In conjunction with...) Figure 10As shown, the steps for manufacturing the display screen 1 may include the following steps S110-S130, which are illustrated below.

[0097] Step S110: A driving layer 1112 is formed based on a substrate 1111, and a main pixel circuit 1117 and a spare pixel circuit 1118 are formed on the driving layer 1112.

[0098] It is understood that when the manufactured display screen 1 is used as the first display screen 10 and spliced ​​with the second display screen 20, the primary pixel circuit 1117 is the first primary pixel circuit 102, and the backup pixel circuit 1118 is the first backup pixel circuit 103. Correspondingly, when the manufactured display screen 1 is used as the second display screen 20 and spliced ​​with the first display screen 10, the primary pixel circuit 1117 is the second primary pixel circuit 202, and the backup pixel circuit 1118 is the second backup pixel circuit 203. The adapter may include an adapter pad 1115 and a bonding metal 1116 located on the adapter pad 1115.

[0099] Step S120: A display device 1113 electrically connected to the main pixel circuit 1117 and an adapter electrically connected to the spare pixel circuit 1118 are formed on the driving layer 1112.

[0100] It is understood that when the manufactured display screen 1 is used as the first display screen 10 and spliced ​​with the second display screen 20, the display device 1113 is the first display device 101, and the adapter is the first adapter 1121. Correspondingly, when the manufactured display screen 1 is used as the second display screen 20 and spliced ​​with the first display screen 10, the display device 1113 is the second display device 201, and the adapter is the second adapter 2121. The connecting pad 1115 is at least partially embedded within the driving layer 1112. For example, the connecting pad 1115 can use the same material as the spare pixel circuit 1118 and be manufactured in the same process. Simultaneously, during manufacturing, an electrical connection can be established between the spare pixel circuit 1118 and the connecting pad 1115.

[0101] Step S130: A first light-shielding layer 1114 is formed on the driving layer 1112, such that the first light-shielding layer 1114 is at least partially located between adjacent display devices 1113.

[0102] Next, based on the above, the manufacturing method of the splicing display device provided in this application embodiment may further include the step of manufacturing the splicing seam optimization unit. Combined with... Figure 11 As shown, the steps for manufacturing the display screen 1 may include the following steps S210-S270, which are illustrated below.

[0103] Step S210: A light-emitting layer 32 is formed on a substrate 100.

[0104] As an example, the substrate 100 may be, but is not limited to, a sapphire substrate. The light-emitting layer 32 may be a multilayer epitaxial layer formed sequentially on the sapphire substrate. For example, the multilayer epitaxial layer may include a first semiconductor layer 321, a light-emitting material layer 322, a second semiconductor layer 323, and a buffer layer 324, wherein the buffer layer 324, the second semiconductor layer 323, the light-emitting material layer 322, and the first semiconductor layer 321 are sequentially stacked on the substrate 100.

[0105] Step S220: Based on the light-emitting layer 32, an isolation window 350 is formed that penetrates the first semiconductor layer 321, the light-emitting material layer 322, and the second semiconductor layer 323.

[0106] In this embodiment, according to actual needs, for example, using pixels (such as three display devices including RGB three colors) as the unit, to ensure that the spacing between each light-emitting device is consistent with the spacing between the display devices of the display screen 1, multiple isolation windows 350 can be formed by patterning processing, and the light-emitting area of ​​one light-emitting device can be corresponding between two adjacent isolation windows 350.

[0107] Step S230: Fill the isolation window 350 with isolation material to form an isolation column 35.

[0108] The insulating material can be an organic material, but is not limited to it. It should be understood that, if the spacing between the light-emitting pixels of the stitching optimization unit 30 is not considered, steps S220 and S230 may be omitted in other embodiments.

[0109] In step S240, a passivation layer 320 is formed on the side of the second semiconductor layer 323 away from the light-emitting layer 322, and an electrode layer 31 is formed based on the passivation layer 320. The electrode layer 31 includes a first electrode 311 connected to the first semiconductor layer 321 through a first through-hole penetrating the passivation layer 320, and a second electrode 312 connected to the second semiconductor layer 323 through a second through-hole penetrating the passivation layer 320, the first semiconductor layer 321, and the light-emitting material layer 322. The passivation layer 320 extends into the second through-hole to insulate the first semiconductor layer 321 and the second electrode 312. Furthermore, one of the first electrode 311 and the second electrode 312 can be connected as a positive electrode to the adapter (such as the first adapter 1121 or the second adapter 2121), and the other can be connected as a negative electrode to the ground power line, thereby driving the corresponding light-emitting device of the seam optimization unit 30. A light-emitting device can be formed between two adjacent isolation pillars 35.

[0110] In step S250, a temporary support plate 200 is used to bond to one side of the electrode layer and the substrate 100 is removed. Then, a second light-shielding layer 33 is formed on the buffer layer 324 and a pixel opening 331 for light transmission is formed on the second light-shielding layer 33.

[0111] In this embodiment, the orthographic projection of the pixel opening 331 onto the light-emitting layer 32 is located between two adjacent isolation pillars 35.

[0112] Step S260: A quantum dot material layer 332 of a corresponding color is formed in the pixel opening 331 of the light-emitting device that has a different light-emitting color than the light-emitting material layer 322.

[0113] For example, in this embodiment, the light-emitting material layer 322 is preferably a blue light-emitting material, and the seam optimization unit 30 can include a red light-emitting device R, a green light-emitting device G, and a blue light-emitting device B. Therefore, the quantum dot material layer 322 is not needed for the pixel opening area 331 corresponding to the blue light-emitting device B, but a green quantum dot layer is needed for the pixel opening area 331 corresponding to the green light-emitting device G, and a red quantum dot layer is needed for the pixel opening area 331 corresponding to the red light-emitting device R. The quantum dot material layer 332 can be fabricated at the position corresponding to the pixel opening 331 using inkjet printing (IJP) and is disposed on the same layer as the second light-shielding layer 33, so that any two adjacent quantum dot material layers 332 of different colors can be isolated by the second light-shielding layer 33 to avoid color mixing.

[0114] Step S270: An encapsulation layer 34 is formed above the second light-shielding layer 33.

[0115] After forming the encapsulation layer 34, the temporary support plate 200 can be removed by custom cutting and splitting the layers to form the desired structure. Figure 8 The seam optimization unit 30 is shown. The encapsulation layer 34 can be a silicon nitride encapsulation layer, a silicon oxide encapsulation layer, etc., but is not limited to these.

[0116] In summary, the splicing display device and its manufacturing method provided in this application introduce a seam optimization unit connected between adjacent displays. Light-emitting devices are set in the seam optimization unit, and the light-emitting devices are driven by the target pixel circuit on the spliced ​​displays. This can effectively avoid visual visibility problems at the splicing seam position caused by processing tolerances, edge grinding, and other issues, achieving a seamless splicing effect and improving the overall display effect of the splicing display device.

[0117] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0118] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A splicing display device, characterized in that, It includes at least two spliced ​​displays, and a seam optimization unit is set between any two adjacent displays, the seam optimization unit covering the splicing gap between the two adjacent displays, wherein: The seam optimization unit includes a light-emitting device, and at least one of the two adjacent displays is provided with a target pixel circuit electrically connected to the light-emitting device for driving the light-emitting device. The two adjacent displays include a first display and a second display. The positive electrode of the light-emitting device of the seam optimization unit is connected to the target pixel circuit of the first display, and the negative electrode of the light-emitting device of the seam optimization unit is connected to the second ground power line of the second display.

2. The splicing display device according to claim 1, characterized in that, The first display screen includes a first main pixel circuit for driving a first display device in the first display screen, and the second display screen includes a second main pixel circuit for driving a second display device in the second display screen; Wherein, at least one of the first primary pixel circuits is electrically connected to the light-emitting device in the seam optimization unit as the target pixel circuit, and / or, at least one of the second primary pixel circuits is electrically connected to the light-emitting device in the seam optimization unit as the target pixel circuit.

3. The splicing display device according to claim 1, characterized in that, The first display screen includes a first light-emitting pixel area and a first transition area. The first light-emitting pixel area includes a main pixel circuit and a backup pixel circuit. The main pixel circuit is used to drive a first display device of the first display screen. The first transition area includes a first transition component electrically connected to the backup pixel circuit. The light-emitting device of the stitch optimization unit is electrically connected to the backup pixel circuit, and the target pixel circuit includes the backup pixel circuit.

4. The splicing display device according to claim 3, characterized in that, The second display screen includes a second light-emitting pixel area and a second transition area. The second transition area includes a second adapter. The second ground power line of the second display screen extends to the second transition area and is electrically connected to the second adapter. The positive electrode of the light-emitting device in the seam optimization unit is electrically connected to the first adapter, and the negative electrode is electrically connected to the second adapter.

5. The splicing display device according to any one of claims 1-4, characterized in that, The splicing display device also includes a splicing board, on which the at least two spliced ​​displays are spliced; The display screen includes a substrate, a driving layer on the substrate, light-emitting devices spaced apart from each other on the driving layer, and a first light-shielding layer disposed on the driving layer and at least partially located between adjacent light-emitting devices.

6. The splicing display device according to claim 5, characterized in that, The seam optimization unit includes an electrode layer, a light-emitting layer located on the side of the electrode layer opposite to the splicing panel, and a second light-shielding layer located on the side of the light-emitting layer opposite to the electrode layer, wherein the second light-shielding layer has pixel openings for light transmission.

7. The splicing display device according to claim 6, characterized in that, The splicing display device also includes a third light-shielding layer located on the side of the electrode layer near the splicing panel, the third light-shielding layer filling at least the splicing gap between two adjacent displays.

8. The splicing display device according to claim 6, characterized in that, The light-emitting layer includes a passivation layer, a first semiconductor layer, a light-emitting material layer, and a second semiconductor layer, which are sequentially stacked from the side of the electrode layer away from the splicing panel. The electrode layer includes a first electrode and a second electrode. The first electrode is connected to the first semiconductor layer through a first through-hole penetrating the passivation layer. The second electrode is connected to the second semiconductor layer through a second through-hole penetrating the passivation layer, the first semiconductor layer, and the light-emitting material layer. The passivation layer extends into the second through-hole to insulate and isolate the first semiconductor layer and the second electrode.

9. The splicing display device according to claim 8, characterized in that, The seam optimization unit also includes isolation pillars. The light-emitting layer has isolation windows on both sides of the position corresponding to the pixel opening, which penetrate the first semiconductor layer, the light-emitting material layer, and the second semiconductor layer. The isolation pillars are located inside the isolation windows, and the orthographic projection of the pixel opening on the light-emitting layer is located between two adjacent isolation windows.

10. The splicing display device according to claim 8, characterized in that, In the seam optimization unit, the pixel opening corresponding to the light-emitting device with a different light-emitting color than the light-emitting material layer contains a quantum dot material layer with a color corresponding to the light-emitting color of the light-emitting device.

11. A method for manufacturing a splicing display device, characterized in that, The method includes: Provide a splicing board; Provide at least two displays and splice the at least two displays sequentially on the splicing board, wherein at least one of the two adjacent displays has a target pixel circuit; A seam optimization unit with a light-emitting device is provided, and one of the seam optimization units is connected between any two adjacent displays, such that the seam optimization unit covers the seam gap between the two adjacent displays and forms an electrical connection between the light-emitting device and the target pixel circuit; The two adjacent displays include a first display and a second display. The positive electrode of the light-emitting device of the seam optimization unit is connected to the target pixel circuit of the first display, and the negative electrode of the light-emitting device of the seam optimization unit is connected to the second ground power line of the second display.

12. The method for manufacturing the splicing display device according to claim 11, characterized in that, The method further includes the step of manufacturing the display screen, which includes: A driving layer is formed on a substrate, and a main pixel circuit and a spare pixel circuit are formed on the driving layer, wherein the spare pixel circuit serves as the target pixel circuit. A display device electrically connected to the main pixel circuit and an adapter electrically connected to the spare pixel circuit are formed on the driving layer; A first light-shielding layer is formed on the driving layer, such that the first light-shielding layer is at least partially located between adjacent display devices.

13. The method for manufacturing the splicing display device according to claim 11, characterized in that, The method further includes the step of manufacturing the seam optimization unit, which includes: A light-emitting layer is formed on a substrate, the light-emitting layer including a first semiconductor layer, a light-emitting material layer, a second semiconductor layer, and a buffer layer, wherein the buffer layer, the second semiconductor layer, the light-emitting material layer, and the first semiconductor layer are sequentially stacked on the substrate; A passivation layer is formed on the side of the second semiconductor layer away from the light-emitting layer, and an electrode layer is formed based on the passivation layer; wherein, the electrode layer includes a first electrode connected to the first semiconductor layer through a first via penetrating the passivation layer and a second electrode connected to the second semiconductor layer through a second via penetrating the passivation layer, the first semiconductor layer, and the light-emitting material layer; the passivation layer extends into the second via to insulate and isolate the first semiconductor layer and the second electrode; A temporary support plate is bonded to one side of the electrode layer and the substrate is removed. Then, a second light-shielding layer is formed on the buffer layer and a pixel opening for light transmission is made on the second light-shielding layer. A quantum dot material layer of a corresponding color is formed within the pixel opening of a light-emitting device that emits a color different from that of the light-emitting material layer.

14. The method for manufacturing the splicing display device according to claim 11, characterized in that, The method further includes: A third light-shielding layer is formed at the position corresponding to the splicing gap between the splicing panel and the adjacent display screen, so that the third light-shielding layer at least fills the splicing gap.

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