A p-GaN HEMT device with high threshold voltage stability

Abstract

The present invention relates to a p-GaN HEMT device with high threshold voltage stability, belonging to the field of microelectronic technology. The device is provided with source-drain ohmic contact electrodes on a barrier layer, and a passivation layer is provided between the source-drain ohmic electrodes; the p-GaN layer is etched to retain only the region under the gate, and the p-GaN layer in the region under the gate is isolated and divided into three parts by the passivation layer, wherein the p-GaN near the source and near the drain form a Schottky contact with the gate, and the p-GaN in the middle part forms an ohmic contact with the gate. The p-GaN HEMT device provided by the present invention utilizes the shielding effect of the gate near the drain, so that the potential of the gate near the source and the middle gate is stable and will not be affected by the external drain bias stress; at the same time, the ohmic contact formed by the p-GaN in the middle part and the gate provides a path for releasing the charge generated under the high drain voltage bias, thereby improving the stability of the device threshold voltage.

Description

Technical Field

[0001] The invention belongs to the field of microelectronic technology and relates to a p-GaN HEMT device with high threshold voltage stability. Background Art

[0002] GaN has the advantages of high electron mobility, low on-resistance and high breakdown field strength, and is expected to be used in high-frequency power amplifiers and high-voltage power switches. At present, GaN HEMT has been deployed and applied in consumer electronics fast charging and electric vehicles. The p-GaN HEMT device is the mainstream solution for industrialization, and its research has attracted widespread attention from researchers. The p-GaN HEMT device based on Schottky gate is the main gate contact method currently used because of its lower gate leakage current and larger gate voltage swing. However, the charge generated by the Schottky gate p-GaN HEMT device under high drain voltage bias is difficult to release, which seriously affects the stability of the device threshold voltage [IEEE Electron Device Letters, 40 (4), 526-529, 2019]. The p-GaN HEMT device with ohmic gate structure can solve this problem well, but its gate leakage current is large and the gate swing capability is greatly limited.

[0003] Therefore, it is urgent to propose a device structure that can have high threshold voltage stability, maintain low gate leakage current and large gate swing capability, so as to comprehensively improve device reliability. Summary of the invention

[0004] In view of this, the object of the present invention is to provide a p-GaN HEMT device with high threshold voltage stability, in which the p-GaN region is isolated into three parts, and the shielding effect of the gate close to the drain is utilized to stabilize the potential of the gate close to the source and the middle gate, and will not be affected by the external drain bias stress; at the same time, the ohmic contact formed by the middle part p-GaN and the gate provides a path for releasing the charge generated under the high drain voltage bias, thereby improving the stability of the device threshold voltage.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] A p-GaN HEMT device with high threshold voltage stability comprises, from bottom to top, a substrate 101, a buffer layer 102, a channel layer 103, a barrier layer 104, a p-GaN layer 106, and a passivation layer 107, and also comprises a source-drain ohmic electrode 105 and a gate electrode; the gate electrode comprises a gate 109 close to the source, a gate 110 close to the drain, and a middle gate 108;

[0007] The source-drain ohmic electrodes 105 are located on both sides above the barrier layer 104; the passivation layer 107 is distributed between the source-drain ohmic electrodes 105; the lower surface of the passivation layer 107 is flush with the lower surface of the source-drain ohmic electrodes 105 and the p-GaN layer 106, and both are in contact with the upper surface of the barrier layer 104;

[0008] The p-GaN layer 106 is located below the gate electrode and is isolated by a passivation layer 107 and is divided into three parts, namely, a gate 109 at the source, a gate 110 close to the drain, and a gate 108 in the middle;

[0009] The gate 109 close to the source, the gate 110 close to the drain, and the p-GaN layer 106 both form Schottky contacts; the middle gate 108 forms an ohmic contact with the p-GaN layer 106 .

[0010] Preferably, the intervals between the passivation layer 107 used to separate the gate 109 close to the source, the gate 110 close to the drain, and the middle gate 108 are kept consistent.

[0011] Preferably, the gate lengths of the gate 109 close to the source, the gate 110 close to the drain, and the middle gate 108 are consistent with the width of the p-GaN layer 106 , and the gate length of the middle gate 108 is the smallest.

[0012] Preferably, the Schottky contact formed by the gate 109 close to the source and the gate 110 close to the drain with the p-GaN layer 106 can be equivalent to a capacitor and a diode in parallel; the ohmic contact formed by the middle gate 108 and the p-GaN layer 106 can be equivalent to a resistor; the gate electrode, the passivation layer 107 and the barrier layer 104 form a metal-insulator-semiconductor structure; the contact between the p-GaN layer 106 and the barrier layer 104 can also be equivalent to a capacitor and a diode in parallel.

[0013] The beneficial effect of the present invention is that the device of the present invention is helpful to stabilize the device threshold voltage component on the left high potential gate side under high drain bias voltage conditions by isolating the p-GaN region under the gate into three parts, thereby suppressing the drift of the threshold voltage of the device under high drain bias stress. At the same time, by introducing the Schottky / Ohm / Schottky hybrid gate contact structure, the ohmic contact gate in the middle part can provide a path for releasing the charge generated under high drain bias, thereby further improving the stability of the device threshold voltage.

[0014] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

[0016] Figure 1 It is a schematic diagram of the structure of a p-GaN HEMT device with high threshold voltage stability according to the present invention;

[0017] Figure 2 An equivalent circuit diagram of a p-GaN HEMT device with high threshold voltage stability under high drain voltage bias stress according to the present invention;

[0018] Reference numerals: 101 - substrate, 102 - buffer layer, 103 - channel layer, 104 - barrier layer, 105 - source and drain ohmic electrodes, 106 - p-GaN layer, 107 - passivation layer, 108 - middle gate, 109 - gate close to the source, 110 - gate close to the drain. DETAILED DESCRIPTION

[0019] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0020] Among them, the drawings are only used for illustrative explanations, and they only represent schematic diagrams rather than actual pictures, and should not be understood as limitations on the present invention. In order to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.

[0021] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "front", "rear", etc. indicate the orientation or position relationship, they are based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0022] See also Figure 1-2 ,like Figure 1 As shown, the present invention provides a p-GaN HEMT device with high threshold voltage stability, which includes, from bottom to top, a substrate 101, a buffer layer 102, a channel layer 103, a barrier layer 104, a p-GaN layer 106 and a passivation layer 107, and also includes a source-drain ohmic electrode 105 and a gate electrode; the gate electrode includes a gate 109 close to the source, a gate 110 close to the drain and a middle gate 108.

[0023] The source-drain ohmic electrodes 105 are located on both sides of the barrier layer 104 ; the passivation layer 107 is distributed between the source-drain ohmic electrodes 105 .

[0024] The p-GaN layer 106 is located below the gate and is divided into three parts; a gate 109 close to the source, a gate 110 close to the drain, and a gate 108 in the middle separated by a passivation layer 107 .

[0025] The gate 109 close to the source and the gate 110 close to the drain both form Schottky contacts with the p-GaN layer 106 ; the middle gate 108 forms an ohmic contact with the p-GaN layer 106 .

[0026] The p-GaN HEMT device provided by the present invention utilizes the shielding effect of the gate close to the drain, so that the potential of the gate close to the source and the middle gate is stable and will not be affected by the external drain bias stress; at the same time, the ohmic contact formed by the middle part p-GaN and the gate provides a path for releasing the charges generated under the high drain voltage bias, thereby improving the stability of the device threshold voltage.

[0027] Figure 2The equivalent circuit diagram of the p-GaN HEMT device with high threshold voltage stability under high drain bias stress of the present invention is shown. The Schottky contact formed by the gate 109 near the source and the gate 110 near the drain with the p-GaN layer 106 can be equivalent to the parallel connection of a capacitor and a diode, which are C1, C2, D1, and D2 respectively; the ohmic contact formed by the middle gate 108 with the p-GaN layer 106 can be equivalent to a resistor R; the gate electrode (the part of the gate without the p-GaN layer), the passivation layer 107, and the barrier layer 104 form a metal-insulator-semiconductor structure, which is equivalent to isolation capacitors C6 and C7; the contact between the p-GaN layer 106 and the barrier layer 104 can also be equivalent to the parallel connection of a capacitor and a diode, which are C3, C4, C5, D3, D4, and D5 respectively.

[0028] The working mechanism of this example is as follows: under high-voltage drain bias stress, since the p-GaN layer 106 is isolated into three parts, due to the capacitive coupling between the gate 110 close to the drain and the drain, at this time C1 is much smaller than C2, and the sizes of C6 and C7 are between C1 and C2, and C3 and C4 are much smaller than C5. The gate 109 close to the source will be shielded by the gate 110 close to the drain, so the potential at the gate 109 close to the source remains basically unchanged; at the same time, the stored charge accumulated in the p-GaN layer 106 under the gate 110 close to the drain can be discharged through the ohmic contact path formed by the middle gate 108 and the p-GaN layer 106, thereby stabilizing the potential change of this part and further improving the stability of the device threshold voltage.

[0029] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the present invention.

Claims

1. A p-GaN HEMT device with high threshold voltage stability, comprising, from bottom to top, a substrate (101), a buffer layer (102), a channel layer (103), a barrier layer (104), a p-GaN layer (106) and a passivation layer (107), characterized in that: It also includes a source-drain ohmic electrode (105) and a gate electrode; the gate electrode includes a gate (109) close to the source, a gate (110) close to the drain, and a middle gate (108); The source-drain ohmic electrodes (105) are located on both sides above the barrier layer (104); the passivation layer (107) is distributed between the source-drain ohmic electrodes (105); the lower surface of the passivation layer (107) is flush with the lower surface of the source-drain ohmic electrodes (105) and the p-GaN layer (106), and both are in contact with the upper surface of the barrier layer (104); The p-GaN layer (106) is located below the gate electrode, and the p-GaN layer is isolated into three parts by a passivation layer (107), namely, a p-GaN layer close to the source electrode, a p-GaN layer close to the drain electrode, and a middle p-GaN layer; The gate electrode (109) close to the source electrode, the gate electrode (110) close to the drain electrode and the p-GaN layer (106) all form Schottky contacts; the middle gate electrode (108) forms an ohmic contact with the p-GaN layer (106); The Schottky contact formed by the gate electrode (109) close to the source electrode and the gate electrode (110) close to the drain electrode and the p-GaN layer (106) is equivalent to the parallel connection of a capacitor and a diode; the ohmic contact formed by the middle gate electrode (108) and the p-GaN layer (106) is equivalent to a resistor; the gate electrode, the passivation layer (107) and the barrier layer (104) form a metal-insulator-semiconductor structure; and the contact between the p-GaN layer (106) and the barrier layer (104) is equivalent to the parallel connection of a capacitor and a diode.

2. The p-GaN HEMT device according to claim 1, characterized in that: The spacing of the passivation layer (107) used to separate the gate (109) close to the source, the gate (110) close to the drain, and the middle gate (108) remains consistent.

3. The p-GaN HEMT device according to claim 1, characterized in that: The gate lengths of the gate (109) close to the source, the gate (110) close to the drain, and the middle gate (108) are consistent with the width of the p-GaN layer (106), and the gate length of the middle gate (108) is the smallest.

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