A bandgap reference circuit based on high order curvature compensation

Abstract

The application discloses a band gap reference circuit based on high-order curvature compensation, comprising a reference voltage generating circuit and a high-order curvature compensation circuit, wherein the high-order curvature compensation circuit comprises a positive temperature coefficient current generating circuit, a non-temperature coefficient current generating circuit and a extraction compensation current generating circuit; the reference voltage generating circuit is used for generating a reference voltage and outputting the reference voltage through an output terminal; the positive temperature coefficient current generating circuit is used for generating a positive temperature coefficient current according to the reference voltage and outputting the positive temperature coefficient current through an output terminal; the non-temperature coefficient current generating circuit is used for generating two equal non-temperature coefficient currents according to the reference voltage and outputting the two non-temperature coefficient currents through first and second output terminals; and the extraction compensation current generating circuit is used for generating an extraction compensation current according to the positive temperature coefficient current and the non-temperature coefficient current and acting on the reference voltage generating circuit to compensate the reference voltage generated by the reference voltage generating circuit; and the application has smaller temperature drift and can meet more use scenarios.

Description

Technical Field

[0001] This invention relates to a bandgap reference circuit based on high-order curvature compensation, belonging to the field of integrated circuit technology. Background Technology

[0002] A bandgap reference provides a stable reference voltage independent of voltage fluctuations and temperature variations, and is a core module in analog, digital, and mixed-signal circuits. In analog-to-digital converters (ADCs), the reference voltage source significantly impacts the ADC's signal-to-noise ratio, gain error, and other performance parameters. With increasing ADC accuracy, especially for Sigma-Delta ADCs, the requirements for reference voltage source noise and temperature drift are becoming increasingly stringent. For example, a 24-bit ADC requires a temperature coefficient of less than 10 × 10⁻⁶ / ℃. Traditional bandgap references typically employ first-order temperature compensation techniques, limiting their temperature drift to 15 × 10⁻⁶ / ℃ to 100 × 10⁻⁶ / ℃, which is insufficient to meet the design requirements of high-precision ADC systems. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a bandgap reference circuit based on high-order curvature compensation, thereby solving the technical problem that traditional bandgap reference voltage sources cannot meet the design requirements of high-precision ADC systems.

[0004] To achieve the above objectives, the present invention is implemented using the following technical solution:

[0005] This invention provides a bandgap reference circuit based on high-order curvature compensation, comprising a reference voltage generation circuit and a high-order curvature compensation circuit. The high-order curvature compensation circuit includes a positive temperature coefficient current generation circuit, a non-temperature coefficient current generation circuit, and a decimation compensation current generation circuit. The reference voltage generation circuit generates a reference voltage and outputs it through its output terminal. The positive temperature coefficient current generation circuit generates a positive temperature coefficient current based on the reference voltage and outputs it through its output terminal. The non-temperature coefficient current generation circuit generates two equal non-temperature coefficient currents based on the reference voltage and outputs them through its first and second output terminals. The decimation compensation current generation circuit generates a decimation compensation current based on the positive temperature coefficient current and the non-temperature coefficient current, and applies it to the reference voltage generation circuit to compensate for the reference voltage generated by the reference voltage generation circuit.

[0006] Optionally, the reference voltage generating circuit includes resistors R1, R2, R3, and R4, transistors Q1 and Q2, and an amplifier AMP. One end of resistors R3 and R4 is connected to the power supply VDD, and the other end of resistor R3 is connected to the negative input terminal of amplifier AMP and the collector of transistor Q1. The other end of resistor R4 is connected to the positive input terminal of amplifier AMP and the collector of transistor Q2. The bases of transistors Q1 and Q2 are connected to the output terminal of amplifier AMP. The emitter of transistor Q2 is connected to ground VSS in sequence through resistors R1 and R2. The emitter of transistor Q1 is connected to the junction of resistors R1 and R2. The output terminal of amplifier AMP is the output terminal of the reference voltage generating circuit.

[0007] Optionally, the positive temperature coefficient current generating circuit includes MOSFETs MP1 and MP2, transistor Q3, and resistor R5. The sources of MOSFETs MP1 and MP2 are connected to the power supply VDD. The gates of MOSFETs MP1 and MP2 and the drain of MOSFET MP1 are connected to the collector of transistor Q3. The emitter of transistor Q3 is connected to ground VSS through resistor R5. The base of transistor Q3 is connected to the output terminal of amplifier AMP. The drain of MOSFET MP2 is the output terminal of the positive temperature coefficient current generating circuit.

[0008] Optionally, the non-temperature coefficient current generating circuit includes MOSFETs MP3, MP4, and MP5, and resistor R6. The sources of MOSFETs MP3, MP4, and MP5 are connected to the power supply VDD. One end of resistor R6 is connected to the gate of MOSFETs MP3, MP4, and MP5, the drain of MOSFET MP3, and the output terminal of amplifier AMP. The other end of resistor R6 is connected to ground VSS. The drains of MOSFETs MP4 and MP5 are the first and second output terminals of the non-temperature coefficient current generating circuit.

[0009] Optionally, the current extraction compensation circuit includes MOSFETs MP6, MP7, MP8, MP9, and MP10, transistors Q4, Q5, Q6, Q7, Q8, Q9, Q10, and Q11, as well as resistors R7, R8, R9, and R10; the sources of MOSFETs MP6, MP7, MP8, MP9, and MP10 are connected to the power supply VDD. The gates of MOSFETs MP6 and MP7, and the drain of MOSFET MP6, are connected to the collector of transistor Q4. The emitter of transistor Q4 is connected to ground VSS through resistor R7, and the base of transistor Q4 is connected to the second output terminal of the non-temperature coefficient current generation circuit. The drain of MOSFET MP7 is connected to one end of resistor R8, the source of transistor Q8, and the base of transistor Q11. The base of transistor Q8 is connected to the bases of transistors Q7 and Q9, the drain of transistor Q7, and the non-temperature coefficient current generation circuit. At the first output terminal of the current generating circuit, the sources of transistors Q7, Q8, and Q9 are connected to ground VSS; the drain of MOSFET MP8 is connected to the other end of resistor R8, the drain of transistor Q9, and the base of transistor Q10; the collector of transistor Q10 is connected to the output terminal of the positive temperature coefficient current generating circuit, and the source of transistor Q10 is connected to ground VSS; the drain of MOSFET MP9 is connected to the gates of MOSFETs MP8, MP9, and MP10, and transistor Q5. The drain of transistor Q5 is connected to the output terminal of the positive temperature coefficient current generating circuit; the source of transistor Q5 is connected to ground VSS through resistor R9; the drain of MOSFET MP10 is connected to the collector of transistor Q6, the junction of resistors R1 and R2; the base of transistor Q6 is connected to the collector of transistor Q11, the second output terminal of the non-temperature coefficient current generating circuit; the emitter of transistor Q6 is connected to ground VSS through resistor R10; and the source of transistor Q11 is connected to ground VSS.

[0010] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0011] This invention provides a bandgap reference circuit based on high-order curvature compensation. The bandgap reference voltage is generated by a reference voltage generating circuit, and its voltage magnitude is related to temperature with the opening downward. The extraction compensation current generated by the curvature compensation circuit is also open downward, thus generating a voltage with the opening downward in relation to temperature. Subtracting the two, a voltage with a smaller temperature dependence is finally obtained. Compared with traditional bandgap reference circuits, the present invention has a smaller temperature drift and can meet more application scenarios. Attached Figure Description

[0012] Figure 1 This is a structural block diagram of a bandgap reference circuit based on high-order curvature compensation provided in an embodiment of the present invention;

[0013] Figure 2 This is a circuit diagram of the reference voltage generation circuit provided in an embodiment of the present invention;

[0014] Figure 3 This is a voltage schematic diagram of a bandgap voltage source without high-order compensation provided in an embodiment of the present invention;

[0015] Figure 4 This is a circuit diagram of the positive temperature coefficient current generating circuit provided in an embodiment of the present invention;

[0016] Figure 5 This is a circuit diagram of a non-temperature coefficient current generating circuit provided in an embodiment of the present invention;

[0017] Figure 6 This is a circuit diagram of the extraction compensation current generation circuit provided in an embodiment of the present invention;

[0018] Figure 7 This is a circuit schematic diagram of a bandgap reference circuit based on high-order curvature compensation provided in an embodiment of the present invention.

[0019] Figure 8 This is a voltage schematic diagram of a bandgap voltage source with high-order compensation provided in an embodiment of the present invention. Detailed Implementation

[0020] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0021] Example 1:

[0022] like Figure 1 As shown, this invention provides a bandgap reference circuit based on high-order curvature compensation, including a reference voltage generation circuit and a high-order curvature compensation circuit. The high-order curvature compensation circuit includes a positive temperature coefficient current generation circuit, a non-temperature coefficient current generation circuit, and a decimation compensation current generation circuit. The reference voltage generation circuit generates a reference voltage and outputs it through its output terminal. The positive temperature coefficient current generation circuit generates a positive temperature coefficient current based on the reference voltage and outputs it through its output terminal. The non-temperature coefficient current generation circuit generates two equal non-temperature coefficient currents based on the reference voltage and outputs them through its first and second output terminals. The decimation compensation current generation circuit generates a decimation compensation current based on the positive temperature coefficient current and the non-temperature coefficient current and applies it to the reference voltage generation circuit to compensate for the reference voltage generated by the reference voltage generation circuit.

[0023] like Figure 2 As shown, specifically in this embodiment, the reference voltage generating circuit includes resistors R1, R2, R3, and R4, transistors Q1 and Q2, and an amplifier AMP. One end of resistors R3 and R4 is connected to the power supply VDD, and the other end of resistor R3 is connected to the negative input terminal of amplifier AMP and the collector of transistor Q1. The other end of resistor R4 is connected to the positive input terminal of amplifier AMP and the collector of transistor Q2. The bases of transistors Q1 and Q2 are connected to the output terminal of amplifier AMP. The emitter of transistor Q2 is connected to ground VSS through resistors R1 and R2 in sequence, and the emitter of transistor Q1 is connected to the junction of resistors R1 and R2. The output terminal of amplifier AMP is the output terminal of the reference voltage generating circuit.

[0024] With the amplifier AMP clamped, its positive and negative input terminals have the same potential, and resistors R3 and R4 have the same resistance. Therefore, the current flowing through resistors R3 and R4 is equal. Transistors Q1 and Q2 are NPN bipolar transistors with an emitter area ratio of 1:N. Therefore, the current flowing through resistor R1 is... Represented as:

[0025]

[0026] In the formula, The base-emitter voltages of transistors Q1 and Q2 are... Thermoelectric voltage is proportional to absolute temperature. , Boltzmann's constant, Thermodynamic temperature The charge carried by a single electron. Let R1 be the resistance value.

[0027] The current flowing through resistors R3 and R4 is equal, therefore the current flowing through resistor R2 is 2. The final reference voltage is expressed as:

[0028]

[0029] In the formula, Let R2 be the resistance value.

[0030] The second term on the right side of the equation has a positive temperature coefficient, and the first term has a compensated temperature coefficient. Adjustment and The ratio of the two terms cancels out the temperature coefficients, resulting in a bandgap reference output voltage with low temperature drift.

[0031] For a bipolar transistor, its collector current With base-emitter voltage The relationship is:

[0032]

[0033] In the formula, This is the saturation current of the bipolar transistor;

[0034] The base-emitter voltage of the bipolar transistor is obtained according to formula (3). The relationship with thermodynamic temperature can be expressed as:

[0035]

[0036] In the formula, The band gap energy of silicon at 0K is approximately 1.12 eV; The preset thermodynamic temperature, The value is approximately 2 / 3, which is a constant related to carrier mobility and is determined by process parameters;

[0037] Further transformation according to formula (4):

[0038]

[0039] From formula (5), it can be seen that the second term on the right side of the equation has a first-order negative correlation with temperature; while the third term has a higher-order temperature coefficient, and its second-order coefficient is less than zero. Therefore, after performing first-order temperature compensation on the bandgap reference circuit, its output voltage still has the characteristic of opening downwards, such as... Figure 3 As shown.

[0040] Therefore, there are two methods for high-order compensation. One is to design a voltage or current proportional to the square of the temperature to compensate for the second-order temperature coefficient after first-order compensation of the bandgap circuit; the other is to design a voltage or current proportional to the square of the temperature. Linearly correlated current or voltage structure. Common temperature compensation techniques include: exponential compensation, temperature coefficient resistor compensation, and segmented temperature compensation. Exponential compensation has a relatively low power supply rejection ratio; temperature coefficient compensation requires high resistor accuracy and its compensation effect is greatly affected by the manufacturing process; segmented temperature compensation requires designing different circuits to compensate for high and low temperatures separately.

[0041] This invention proposes to use two different currents to generate a downward-opening compensation current to cancel the higher-order terms of the circuit after first-order compensation, thereby achieving the effect of higher-order compensation of the reference source.

[0042] like Figure 4As shown, in this specific embodiment, the positive temperature coefficient current generating circuit includes MOSFETs MP1 and MP2, transistor Q3, and resistor R5. The sources of MOSFETs MP1 and MP2 are connected to the power supply VDD. The gates of MOSFETs MP1 and MP2, and the drain of MOSFET MP1 are connected to the collector of transistor Q3. The emitter of transistor Q3 is connected to ground VSS through resistor R5. The base of transistor Q3 is connected to the output terminal of amplifier AMP. The drain of MOSFET MP2 is the output terminal of the positive temperature coefficient current generating circuit.

[0043] Base-emitter voltage of transistor Q1 For a negative temperature coefficient voltage, equation (2) can be approximated as:

[0044]

[0045] In the formula, The reference source voltage is a constant. Since resistor R5 is approximately constant, the positive temperature coefficient current generating circuit produces a positive temperature coefficient current. :

[0046]

[0047] like Figure 5 As shown, in this specific embodiment, the non-temperature coefficient current generating circuit includes MOSFETs MP3, MP4, and MP5, and resistor R6. The sources of MOSFETs MP3, MP4, and MP5 are connected to the power supply VDD. One end of resistor R6 is connected to the gate of MOSFETs MP3, MP4, and MP5, the drain of MOSFET MP3, and the output terminal of amplifier AMP. The other end of resistor R6 is connected to ground VSS. The drains of MOSFETs MP4 and MP5 are the first and second output terminals of the non-temperature coefficient current generating circuit.

[0048] Due to the reference source voltage Since the resistance R6 is approximately constant, the non-temperature coefficient current generating circuit produces a current that is independent of temperature. :

[0049]

[0050] like Figure 6As shown, specifically in this embodiment, the current extraction and compensation circuit includes MOSFETs MP6, MP7, MP8, MP9, and MP10; transistors Q4, Q5, Q6, Q7, Q8, Q9, Q10, and Q11; resistors R7, R8, R9, and R10; and MOSFETs MP6, MP7, MP8, MP9, and MP10. The source of transistor Q4 is connected to power supply VDD. The gates of MOSFETs MP6 and MP7, and the drain of MOSFET MP6 are connected to the collector of transistor Q4. The emitter of transistor Q4 is connected to ground VSS through resistor R7. The base of transistor Q4 is connected to the second output terminal of the non-temperature coefficient current generation circuit. The drain of MOSFET MP7 is connected to one end of resistor R8, the source of transistor Q8, and the base of transistor Q11. The base of transistor Q8 is connected to the bases of transistors Q7 and Q9. The drain of transistor Q7, Q8, and Q9, and the source of transistor Q9 are connected to ground VSS. The drain of MOSFET MP8 is connected to the other end of resistor R8, the drain of transistor Q9, and the base of transistor Q10. The collector of transistor Q10 is connected to the output of the positive temperature coefficient current generating circuit, and the source of transistor Q10 is connected to ground VSS. The drain of MOSFET MP9 is connected to the gate of MOSFET MP8, MOSFET MP9, and MOSFET MP10. The drain of transistor Q5 is connected to the base of transistor Q5, which is connected to the output of the positive temperature coefficient current generating circuit. The source of transistor Q5 is connected to ground VSS through resistor R9. The drain of MOSFET MP10 is connected to the collector of transistor Q6, the junction of resistors R1 and R2. The base of transistor Q6 is connected to the collector of transistor Q11, the second output of the non-temperature coefficient current generating circuit. The emitter of transistor Q6 is connected to ground VSS through resistor R10. The source of transistor Q11 is connected to ground VSS.

[0051] The voltage difference across resistor R8 is:

[0052]

[0053] The current flowing through resistor R8 is:

[0054]

[0055] It is evident that it has Therefore, by selecting an appropriate resistance value, it can be used for higher-order curvature compensation.

[0056] The current flowing through the collector of transistor Q7 is approximately equal to the current. The current flowing through the collectors of transistors Q8 and Q9 is a replica of the current flowing through the collector of transistor Q9, and its value is approximately equal to... .

[0057] The current flowing through PMOS transistor MP7 is the sum of the current flowing through the collector of transistor Q8 and the current flowing through resistor R8, that is:

[0058]

[0059] The current flowing through MP7 is the copy flowing through MP6, therefore the current flowing through MP6 is also the current flowing through the collector of transistor Q4:

[0060]

[0061] Since the bases of transistors Q4 and Q6 are connected, the current flowing through the collector of Q6 is equal to the current flowing through the collector of Q4, which can be expressed as:

[0062]

[0063] The current flowing through MP8 is the current flowing through the collector of Q11 minus the current flowing through R8, that is:

[0064]

[0065] The current flowing through MP10 is a copy of the current flowing through MP8, that is:

[0066]

[0067] Therefore, the compensation current is extracted. The current flowing through the collector of transistor Q6 Subtract the current flowing through MP8 :

[0068]

[0069] It is an upward-opening current and can be used for higher-order curvature compensation.

[0070] like Figure 7 As shown, the system includes resistors R1-R10, bipolar transistors Q1-Q11, PMOS transistors MP1-MP10, amplifier AMP1, power supply VDD, and ground VSS. The bandgap reference voltage is generated by a reference voltage generation circuit, and its magnitude is related to temperature with the opening facing downwards. The curvature compensation circuit generates the extraction current. Since the opening is downwards, the current flowing through resistor R2 generates a voltage that is temperature-dependent (opening downwards). Subtracting the two voltages yields a voltage that is less temperature-dependent, such as... Figure 8 As shown.

[0071] like Figure 3 The voltage diagram shown is of a bandgap voltage source without high-order compensation, and its temperature drift is approximately... ;like Figure 8 The diagram shows a voltage profile of a bandgap voltage source undergoing high-order compensation, with a temperature drift of [missing information]. The temperature drift is much smaller than the 10~100 ×10-6 / ℃ after first-order compensation, and the effect is significant.

[0072] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A high-order curvature-compensated bandgap reference circuit, comprising: It includes a reference voltage generation circuit and a high-order curvature compensation circuit, wherein the high-order curvature compensation circuit includes a positive temperature coefficient current generation circuit, a non-temperature coefficient current generation circuit, and a extraction compensation current generation circuit. The reference voltage generating circuit is used to generate a reference voltage and output it through its output terminal; The positive temperature coefficient current generating circuit is used to generate a positive temperature coefficient current based on a reference voltage and output it through its output terminal. The non-temperature coefficient current generating circuit is used to generate two equal non-temperature coefficient currents based on the reference voltage and output them through its first output terminal and second output terminal; the extraction compensation current generating circuit is used to generate extraction compensation current based on the positive temperature coefficient current and the non-temperature coefficient current and apply it to the reference voltage generating circuit to compensate the reference voltage generated by the reference voltage generating circuit.

2. The high-order curvature compensation based bandgap reference circuit of claim 1, wherein, The reference voltage generating circuit includes resistors R1, R2, R3, and R4, transistors Q1 and Q2, and an amplifier AMP. One end of resistors R3 and R4 is connected to the power supply VDD, and the other end of resistor R3 is connected to the negative input terminal of amplifier AMP and the collector of transistor Q1. The other end of resistor R4 is connected to the positive input terminal of amplifier AMP and the collector of transistor Q2. The bases of transistors Q1 and Q2 are connected to the output terminal of amplifier AMP. The emitter of transistor Q2 is connected to ground VSS through resistors R1 and R2 in sequence. The emitter of transistor Q1 is connected to the junction of resistors R1 and R2. The output terminal of amplifier AMP is the output terminal of the reference voltage generating circuit.

3. The high-order curvature compensation based bandgap reference circuit of claim 1, wherein, The positive temperature coefficient current generating circuit includes MOSFETs MP1 and MP2, transistor Q3, and resistor R5. The sources of MOSFETs MP1 and MP2 are connected to the power supply VDD. The gates of MOSFETs MP1 and MP2, and the drain of MOSFET MP1 are connected to the collector of transistor Q3. The emitter of transistor Q3 is connected to ground VSS through resistor R5. The base of transistor Q3 is connected to the output of amplifier AMP. The drain of MOSFET MP2 is the output of the positive temperature coefficient current generating circuit.

4. The high-order curvature compensation based bandgap reference circuit of claim 1, wherein, The non-temperature coefficient current generating circuit includes MOSFETs MP3, MP4, and MP5, and resistor R6. The sources of MOSFETs MP3, MP4, and MP5 are connected to the power supply VDD. One end of resistor R6 is connected to the gate of MOSFETs MP3, MP4, and MP5, the drain of MOSFET MP3, and the output terminal of amplifier AMP. The other end of resistor R6 is connected to ground VSS. The drains of MOSFETs MP4 and MP5 are the first and second output terminals of the non-temperature coefficient current generating circuit.

5. The high-order curvature compensation based bandgap reference circuit of claim 2, wherein, The current extraction compensation circuit includes MOSFETs MP6, MP7, MP8, MP9, and MP10, transistors Q4, Q5, Q6, Q7, Q8, Q9, Q10, and Q11, as well as resistors R7, R8, R9, and R10. The sources of MOSFETs MP6, MP7, MP8, MP9, and MP10 are connected to the power supply VDD. The gates of MOSFETs MP6 and MP7, and the drain of MP6 are connected to the collector of transistor Q4. The emitter of transistor Q4 is connected to ground VSS through resistor R7, and the base of transistor Q4 is connected to the second output terminal of the non-temperature coefficient current generation circuit. The drain of MOSFET MP7 is connected to one end of resistor R8, the source of transistor Q8, and the base of transistor Q11. The base of transistor Q8 is connected to the bases of transistors Q7 and Q9, the drain of transistor Q7, and the non-temperature coefficient current generation circuit. At the first output terminal of the generating circuit, the sources of transistors Q7, Q8, and Q9 are connected to ground VSS; the drain of MOSFET MP8 is connected to the other end of resistor R8, the drain of transistor Q9, and the base of transistor Q10; the collector of transistor Q10 is connected to the output terminal of the positive temperature coefficient current generating circuit, and the source of transistor Q10 is connected to ground VSS; the drain of MOSFET MP9 is connected to the gates of MOSFETs MP8, MP9, and MP10, and the base of transistor Q5. The drain of transistor Q5 is connected to the output terminal of the positive temperature coefficient current generating circuit, and the source of transistor Q5 is connected to ground VSS through resistor R9. The drain of MOSFET MP10 is connected to the collector of transistor Q6, the junction of resistors R1 and R2, the base of transistor Q6 is connected to the collector of transistor Q11, the second output terminal of the non-temperature coefficient current generating circuit, the emitter of transistor Q6 is connected to ground VSS through resistor R10, and the source of transistor Q11 is connected to ground VSS.

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