Ultra-low leakage ESD protection circuit and chip

Abstract

The embodiment of the present application provides an ultra-low leakage ESD protection circuit and chip. Among them, the input end of the ultra-low leakage ESD protection circuit is connected to the first PIN pin, and the output end of the ESD protection circuit is connected to the second PIN pin; the ESD protection circuit includes an ESD module and a leakage control module connected in series, and the blocking resistance of the leakage control module is greater than the blocking resistance of the ESD module to prevent the current of the first PIN pin from flowing out of the second PIN pin through the ESD protection circuit. The ultra-low leakage ESD protection circuit provided by the embodiment of the present application can reduce the leakage current in the circuit.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of protection circuits, and in particular to an ESD protection circuit and chip with ultra-low leakage. Background Art

[0002] With the use of electrical appliances in life, electrostatic discharge has become a common phenomenon. Electrostatic discharge (ESD) may occur during the manufacture or use of electrical appliances. Since the instantaneous voltage of electrostatic discharge is usually very high (> several thousand volts), the damage caused by electrostatic discharge to components is destructive and permanent, and can directly burn integrated circuits. Therefore, preventing electrostatic damage is the number one problem in the design and manufacture of all integrated circuits.

[0003] The current solution to the electrostatic discharge phenomenon is to set hardware protection for the circuit when manufacturing the equipment. Commonly used protection hardware, such as diodes, are in the cut-off state when the circuit is working normally, and do not affect the normal operation of the circuit. When the circuit has an abnormal overvoltage and reaches its breakdown voltage, it quickly conducts to allow the instantaneous current to flow out, while clamping the abnormal high voltage within a safe level, thereby protecting the protected integrated circuit or circuit.

[0004] However, when the diode is in reverse cutoff, it is not completely ideal, and leakage current will still flow out. Large leakage current will cause greater loss to the circuit, especially in high-voltage applications. Therefore, how to reduce the leakage current in the circuit has become an urgent problem to be solved. Summary of the invention

[0005] In view of the above problems, the embodiments of the present application provide an ultra-low leakage ESD protection circuit and chip, which can reduce the leakage current in the circuit.

[0006] In the first aspect, an embodiment of the present application provides an ultra-low leakage ESD protection circuit, wherein the input end is connected to the first PIN pin, and the output end is connected to the second PIN pin; the ultra-low leakage ESD protection circuit includes an ESD module and a leakage control module connected in series, and the blocking resistance of the leakage control module is greater than the blocking resistance of the ESD module to prevent the current of the first PIN pin from flowing out of the second PIN pin through the ESD protection circuit.

[0007] In a possible implementation, when the voltage between the first PIN pin and the second PIN pin is greater than or equal to a first threshold, the ESD module and the leakage control module are turned on, so that the current of the first PIN pin is conducted to the second PIN pin through the ESD protection circuit.

[0008] In a possible implementation, the leakage control module includes a low leakage switch and a first voltage control module connected to each other.

[0009] The first voltage control module is used to control the voltage across the low leakage switch to adjust the closing degree of the low leakage switch.

[0010] In one possible implementation, the low leakage switch includes a first MOS tube, an input end of a first voltage control module is connected to the drain of the first MOS tube, a first output end of the first voltage control module is connected to the gate of the first MOS tube, and a second output end of the first voltage control module is connected to the source of the first MOS tube.

[0011] The first voltage control module is used to convert the drain voltage of the first MOS tube into a first output voltage and a second output voltage, and output the first output voltage through the first output terminal and output the second output voltage through the second output terminal. The first output voltage is greater than the second output voltage, so that the gate voltage of the first MOS tube is greater than the source voltage of the first MOS tube.

[0012] In a possible implementation, the ESD module includes a second MOS tube, a source of the second MOS tube is connected to the first PIN pin, and a drain of the second MOS tube is connected to the source of the first MOS tube.

[0013] In a possible implementation, the circuit further includes a second voltage control module and a third voltage control module. The second voltage control module is respectively connected to the first PIN pin, the second PIN pin and the gate of the first MOS tube, and the third voltage control module is respectively connected to the first PIN pin, the second PIN pin and the gate of the second MOS tube.

[0014] The second voltage control module is used to control the gate voltage of the first MOS tube, and the third voltage control module is used to control the gate voltage of the second MOS tube to control the voltage between the first PIN pin and the second PIN pin.

[0015] In one possible implementation, the second voltage control module includes a first capacitor, the first PIN pin and the gate of the first MOS tube are both connected to the input end of the first capacitor, and the second PIN pin is connected to the output end of the first capacitor; the third voltage control module includes a second capacitor, the first PIN pin and the gate of the second MOS tube are both connected to the input end of the second capacitor, and the second PIN pin is connected to the output end of the second capacitor.

[0016] In a possible implementation, a secondary leakage protection module is further included. The secondary leakage protection module is connected in series with the low leakage switch. The secondary leakage protection module includes at least one of a resistor, a diode, a bipolar transistor and a thyristor.

[0017] In a second aspect, an embodiment of the present application provides a chip comprising an ultra-low leakage ESD protection circuit as described in any one of the first aspects.

[0018] In a possible implementation, the first PIN pin is a power supply terminal, and the second PIN pin is a PAD. Or, the first PIN pin is a PAD, and the second PIN pin is a ground terminal.

[0019] The ultra-low leakage ESD protection circuit and chip provided in the embodiment of the present application increases the obstacle of static current flowing out of the circuit after passing through the ESD module and the leakage control module by connecting the ESD module and the leakage control module in series, thereby reducing the possibility of static current flowing out of the circuit, and by making the blocking resistance of the leakage control module greater than the blocking resistance of the ESD module, an obstacle is added on the path of current flowing out of the ESD module to prevent static electricity from flowing out of the ESD module, thereby further strengthening the electrostatic protection of the circuit and reducing the leakage current in the circuit. The above description is only an overview of the technical solution of the embodiment of the present application. In order to more clearly understand the technical means of the embodiment of the present application, it can be implemented in accordance with the contents of the specification, and in order to make the above and other purposes, features and advantages of the embodiment of the present application more obvious and easy to understand, the specific implementation method of the present application is specifically cited below. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, a brief introduction will be given below to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 This is a circuit structure diagram provided in an embodiment of the present application.

[0022] Figure 2 This is another circuit structure schematic diagram provided in an embodiment of the present application.

[0023] Reference numerals:

[0024] 101, first PIN pin; 102, second PIN pin;

[0025] 1. ESD protection circuit; 10. ESD module; 11. Second MOS tube;

[0026] 20. leakage control module; 21. low leakage switch; 210. first MOS tube;

[0027] D, drain; S, source; G, gate;

[0028] 22. First voltage control module; 221. First output terminal; 222. Second output terminal;

[0029] 23. A second voltage control module; 231. A first capacitor;

[0030] 24. A third voltage control module; 241. A second capacitor;

[0031] 3. Secondary leakage protection module. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used in the specification of the application are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification, claims and drawings of this application are intended to cover non-exclusive inclusions.

[0034] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase "embodiments" in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0035] The term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0036] In addition, the terms "first", "second", etc. in the specification and claims of this application or the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0037] In the description of the present application, unless otherwise specified, "plurality" means more than two (including two), and similarly, "multiple groups" means more than two groups (including two).

[0038] In the description of the present application, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense. For example, the "connection" or "connection" of a mechanical structure may refer to a physical connection. For example, the physical connection may be a fixed connection, such as a fixed connection through a fixing member, such as a fixed connection through a screw, bolt or other fixing member; the physical connection may also be a detachable connection, such as a mutual snap connection or snap connection; the physical connection may also be an integral connection, such as welding, bonding or integral molding to form a connection for connection. The "connection" or "connection" of a circuit structure may refer to an electrical connection or a signal connection in addition to a physical connection. For example, it may be a direct connection, that is, a physical connection, or it may be an indirect connection through at least one intermediate element, as long as the circuit is connected, or it may be the internal connection of two elements; the signal connection may refer to a signal connection through a media medium, such as a radio wave, in addition to a signal connection through a circuit. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0039] With the use of electrical appliances in our daily lives, static electricity has become a common phenomenon. Generally speaking, static electricity is usually generated by humans. For example, during the production, assembly, testing, storage, and transportation processes, static electricity may accumulate in the human body, instruments, or equipment, and even in the components themselves.

[0040] Electrostatic discharge is the main culprit for excessive electrical stress damage to electronic components or integrated circuit systems. The instantaneous voltage of electrostatic discharge is usually very high (> several thousand volts), and the damage caused by electrostatic discharge to components is destructive and permanent, causing the integrated circuit to burn directly. Therefore, preventing electrostatic damage is the number one problem in the design and manufacture of all integrated circuits. When people unknowingly make these charged objects come into contact, a discharge path will be formed, instantly causing electronic components or integrated circuits to be damaged by electrostatic discharge.

[0041] The current solution to the electrostatic discharge phenomenon is to set up hardware protection for the circuit when manufacturing the equipment. The principle of the ESD diode is to connect the ESD electrostatic protection diode in parallel to the circuit. When the circuit is working normally, the diode is in the cut-off state (high impedance state) and does not affect the normal operation of the circuit. When the circuit has an abnormal overvoltage and reaches its breakdown voltage, it quickly changes from a high impedance state to a low impedance state, providing a low impedance conduction path for the instantaneous current, while clamping the abnormal high voltage within a safe level, thereby protecting the protected integrated circuit or circuit. When the abnormal overvoltage disappears, the diode returns to a high impedance state and the circuit works normally.

[0042] However, the diode is not completely ideally cut off when it is reverse cut off. From the internal structure of the semiconductor material, the reverse electric field generated by the external reverse voltage in the PN junction barrier region is greater than the electric field formed by the diffused charge in the barrier region, resulting in the existence of reverse leakage current through the PN junction. The thickness of the barrier region and the magnitude of the applied reverse voltage jointly determine the magnitude of the leakage current. When subjected to reverse pressure, some tiny current will leak from the cathode to the anode. This current is usually very small, but the higher the reverse pressure, the greater the leakage current, and the leakage current will also increase with the increase in temperature. Large leakage current will bring greater losses, especially in high-voltage applications. Therefore, how to reduce the leakage current in the circuit has become a problem that needs to be solved urgently.

[0043] In order to make the technical personnel in the field of this technology better understand the solution of this application, the technical solution of this application will be described in detail below in conjunction with the accompanying drawings. It should be noted that different technical features in this application can be combined with each other without conflict.

[0044] Figure 1 is a circuit structure diagram provided by an embodiment of the present application. Figure 1 As shown, the ultra-low leakage ESD protection circuit 1 provided in the embodiment of the present application has an input end connected to the first PIN pin 101, and an output end connected to the second PIN pin 102. The ultra-low leakage ESD protection circuit 1 includes an ESD module 10 and a leakage control module 20 connected in series, wherein the blocking resistance of the leakage control module 20 is greater than the blocking resistance of the ESD module 10, so as to prevent the current of the first PIN pin 101 from flowing out of the second PIN pin 102 through the ESD protection circuit 1.

[0045] In one implementation, the first PIN pin 101 can be connected to the input end of the ESD module 10, the output end of the ESD module 10 is connected to the input end of the leakage control module 20, and the output end of the leakage control module 20 is connected to the second PIN pin 102. The current flows from the first PIN pin 101 through the ESD module 10 and the leakage control module 20 in sequence, and flows to the second PIN pin 102.

[0046] In another implementation, the first PIN pin 101 can be connected to the input end of the leakage control module 20, the output end of the leakage control module 20 is connected to the input end of the ESD module 10, and the output end of the ESD module 10 is connected to the second PIN pin 102. The current flows from the first PIN pin 101 through the leakage control module 20 and the ESD module 10 in sequence, and flows to the second PIN pin 102.

[0047] Specifically, blocking resistance refers to the resistance of a module or device in a non-conducting state, which characterizes the ability of the module or device to block the passage of current. Both the ESD module 10 and the leakage control module 20 have a large blocking resistance to reduce the current between the first PIN and the second Pin. Exemplarily, the ESD module 10 and / or the leakage control module 20 may include a switching device. When the voltage across the switching device increases, the current flows from one end of the switching device to the other end. The larger the blocking resistance, the smaller the current.

[0048] Generally, a device with resistance is connected in the circuit to prevent leakage current in the circuit from flowing out, such as the ESD module 10 in the embodiment of the present application. However, considering that the ESD module 10 can only prevent a part of the current from passing through, leakage current will still flow out, affecting the circuit performance. Therefore, a leakage control module 20 is connected in series on the basis of the ESD module 10 to further prevent the leakage current in the ESD module 10 from flowing out. Moreover, in the non-conducting state, the blocking resistance of the leakage control module 20 is much greater than the resistance of the ESD module 10, thereby ensuring the effect of the leakage control module 20 in preventing the leakage current of the ESD module 10 from flowing out.

[0049] By connecting the ESD module 10 and the leakage control module 20 in series, the obstacle to the leakage current flowing out of the circuit after passing through the ESD module 10 and the leakage control module 20 is increased, thereby reducing the possibility of the leakage current flowing out of the circuit. By making the blocking resistance of the leakage control module 20 greater than the blocking resistance of the ESD module 10, an obstacle is added to the path where the current flows out of the ESD module 10, thereby preventing the current from flowing out of the ESD module 10, thereby further reducing the leakage current in the circuit.

[0050] Optionally, when the voltage between the first PIN pin 101 and the second PIN pin 102 is greater than or equal to a first threshold, the ESD module 10 and the leakage control module 20 are turned on, so that the current of the first PIN pin 101 is conducted to the second PIN pin 102 through the ESD protection circuit 1 .

[0051] Specifically, the first threshold value can be determined according to the blocking resistance of the leakage control module 20, the blocking resistance of the ESD module 10, and the size of the static current to be discharged. When the voltage between the first PIN pin 101 and the second PIN pin 102 is greater than or equal to the first threshold value, it indicates that the static current in the circuit is large at this time. At this time, the ESD module 10 and the leakage control module 20 are turned on, guiding the static current in the circuit to flow out from the second PIN pin 102 to prevent it from accumulating in the circuit and causing harm.

[0052] In the on state, the resistance of the ESD module 10 and the leakage control module 20 are greatly reduced, and the resistance of the leakage control module 20 is slightly greater than or equal to the resistance of the ESD module 10. The resistance of the ESD module 10 and the leakage control module 20 becomes lower when they are on, so that a larger static current can be quickly discharged from the second PIN pin 102 to the outside of the circuit through the ESD module 10 and the leakage control module 20, thereby preventing the static current from flowing into the chip and causing damage to the circuit.

[0053] By setting the first threshold, the ESD module 10 and the leakage control module 20 are turned on when the static current voltage is large, and the static current is guided to flow out of the circuit from the second PIN pin 102. In the on state, the resistance of the leakage control module 20 and the resistance of the ESD module 10 are reduced, so that the static current can be quickly discharged from the second PIN pin 102 to the outside of the circuit, preventing the static current from flowing into the chip and causing damage to the circuit.

[0054] Optionally, Figure 2 is another circuit structure diagram provided by the embodiment of the present application. Figure 2 As shown, the leakage control module 20 includes a low leakage switch 21 and a first voltage control module 22 connected to each other. The first voltage control module 22 is used to control the voltage across the low leakage switch 21 to adjust the closing degree of the low leakage switch 21.

[0055] Specifically, the degree of closure can be positively correlated with the voltage difference required for the low leakage switch 21 to be turned on from off. That is, the greater the difference between the voltage at both ends of the low leakage switch 21 controlled by the leakage control module 20 and the on-voltage of the low leakage switch 21 itself, the tighter the degree of closure and the less leakage current. When the voltage at both ends of the low leakage switch 21 is greater than the degree of closure, the low leakage switch 21 is turned on and the current passes through the low leakage switch 21. The first voltage control module 22 is connected to both ends of the low leakage switch 21, and the voltage at both ends of the first voltage control module 22 is controlled respectively to control the degree of closure of the low leakage switch 21, so as to set the degree of closure of the low leakage switch 21 according to the demand for discharging static current, so that the low leakage switch 21 can meet different static current discharge requirements.

[0056] Alternatively, if Figure 2As shown, the low leakage switch 21 includes a first MOS tube 210, an input end of a first voltage control module 22 is connected to the drain D of the first MOS tube 210, a first output end 221 of the first voltage control module 22 is connected to the gate G of the first MOS tube 210, and a second output end 222 of the first voltage control module 22 is connected to the source S of the first MOS tube 210. The first voltage control module 22 is used to convert the drain D voltage of the first MOS tube 210 into a first output voltage and a second output voltage, and output the first output voltage through the first output end 221, and output the second output voltage through the second output end 222. The first output voltage is greater than the second output voltage, so that the gate G voltage of the first MOS tube 210 is greater than the source S voltage of the first MOS tube 210.

[0057] Specifically, the MOS tube is a switch element that is turned on by voltage. The turn-on voltage of the MOS tube is also called the threshold voltage, which refers to the voltage at which the U DS When the MOS tube starts to have a drain current U GS The value of U DS It refers to the voltage difference between the drain D voltage and the source S voltage, U GS It refers to the voltage difference between the gate G voltage and the source S voltage. The conductive principle of MOS tube can be simply summarized as follows: U applied between the source S and the gate G GS When the voltage is greater than the turn-on voltage, a conductive channel is formed between the source S and the drain D, allowing the electrons in the substrate to pass through and form a drain D current. GS The larger the voltage, the greater the current of the drain D. Different types of MOS tubes have different turn-on voltages, generally 3V to 5V.

[0058] It should be noted that, in the embodiment of the present application, the first MOS tube 210 and the second MOS tube 11 are both PMOS tubes as examples. When the first MOS tube 210 and the second MOS tube 11 are NMOS tubes, the scheme changes accordingly with the properties and characteristics of the NMOS tube. For example, when the first MOS tube 210 and the second MOS tube 11 are NMOS tubes, they are turned on after Ugs is greater than a turn-on voltage, and when the first MOS tube 210 and the second MOS tube 11 are PMOS tubes, they are turned on after Ugs is less than a negative turn-on voltage.

[0059] Ideally, no current flows when the MOS tube is turned off. However, in practical applications, the PN junction between the source S and the substrate of the MOS tube, and the PN junction between the drain D and the substrate are reverse biased during the operation of the MOS tube, resulting in reverse biased leakage current in the MOS tube. That is, even if the MOS tube does not form a conductive channel, it will still leak due to the reverse saturation current between the drain D and the source S.

[0060] Specifically, the input end of the first voltage control module 22 is connected to the drain D of the first MOS tube 210 to receive the drain D voltage of the first MOS tube 210, so as to perform conversion according to different conversion coefficients to obtain first output voltages and second output voltages of different magnitudes, and then output the first output voltage to the gate G of the first MOS tube 210 through the first output end 221, so that the gate G voltage of the first MOS tube 210 increases the first output voltage, and output the second output voltage to the source S of the first MOS tube 210 through the second output end 222, so that the source S voltage of the first MOS tube 210 increases the second output voltage. And by ensuring that the first output voltage is much higher than the second output voltage, it is ensured that the gate G voltage of the first MOS tube 210 is greater than the source voltage of the first MOS tube 210.

[0061] For example, the drain D voltage is 0V, and the first voltage control module 22 converts the input 0V drain D voltage into a 1V voltage and inputs it to the gate G, so that the gate G voltage is 1V, and converts the 0V drain D voltage into a 20mV source S voltage, so that the source S voltage is 20mV. The first voltage control module 22 performs different processing on the drain D voltage to make the PMOS gate G voltage greater than the source S voltage, thereby increasing the impedance of the first MOS tube 210, so that when the first MOS tube 210 is turned off, the outflow of the drain D current can be reduced, that is, the leakage current can be reduced.

[0062] The gate G voltage and the source S voltage of the first MOS tube 210 are controlled by the first voltage control module 22, so that the impedance of the first MOS tube 210 is increased and the drain D current of the first MOS tube 210 is reduced when the degree of shutdown is certain. In addition, by changing the impedance of the first MOS tube 210 through the first voltage control module 22, the leakage current can be reduced without changing the turn-on voltage of the first MOS tube 210 itself, that is, there is no need to replace a MOS tube of a different model as the first MOS tube 210, which reduces the restrictions and use requirements on the first MOS tube 210, and makes the MOS tube of the same model and specification more widely applicable.

[0063] Optionally, the ESD module 10 includes a second MOS transistor 11 .

[0064] In one implementation, the first PIN pin 101 may be connected to the source S of the second MOS transistor 11, the drain D of the second MOS transistor 11 is connected to the source S of the first MOS transistor 210, and the drain D of the first MOS transistor 210 is connected to the second PIN pin 102. The current flows from the first PIN pin 101 through the second MOS transistor 11 and the first MOS transistor 210 in sequence to the second PIN pin 102.

[0065] In another implementation, the first PIN pin 101 may be connected to the source S of the first MOS transistor 210, the drain D of the first MOS transistor 210 may be connected to the source S of the second MOS transistor 11, and the drain D of the second MOS transistor 11 may be connected to the second PIN pin 102. The current flows from the first PIN pin 101 to the second MOS transistor 210 and the second MOS transistor 11 in sequence, and flows to the second PIN pin 102.

[0066] Alternatively, if Figure 1 As shown, the circuit further includes a second voltage control module 23 and a third voltage control module 24. The second voltage control module 23 is respectively connected to the first PIN pin 101, the second PIN pin 102 and the gate G of the first MOS tube 210, and the third voltage control module 24 is respectively connected to the first PIN pin 101, the second PIN pin 102 and the gate G of the second MOS tube 11. The second voltage control module 23 is used to control the gate G voltage of the first MOS tube 210, and the third voltage control module 24 is used to control the gate G voltage of the second MOS tube 11, so as to control the voltage between the first PIN pin and the second PIN pin.

[0067] like Figure 1 As shown, the second voltage control module 23 is connected to the first PIN pin 101 and the second PIN pin 102 to obtain a stable voltage, so that the gate G voltage of the first MOS tube 210 connected thereto can be controlled. Similarly, the third voltage control module 24 is connected to the first PIN pin 101 and the second PIN pin 102 to obtain a stable voltage, so that the gate G voltage of the second MOS tube 11 connected thereto can be controlled. By controlling the gate voltages of the first MOS tube 210 and the second MOS tube 11, the voltage between the first PIN pin and the second PIN pin is controlled, so as to control whether the first PIN pin and the second PIN pin are conductive.

[0068] Alternatively, if Figure 2 As shown, the second voltage control module 23 may include a first capacitor 231, the first PIN pin 101 and the gate G of the first MOS tube 210 are both connected to the input end of the first capacitor 231, and the second PIN pin 102 is connected to the output end of the first capacitor 231; the third voltage control module 24 includes a second capacitor 241, the first PIN pin 101 and the gate G of the second MOS tube 11 are both connected to the input end of the second capacitor 241, and the second PIN pin 102 is connected to the output end of the second capacitor 241.

[0069] The function of stabilizing the voltage can be achieved by relying on the charge and discharge characteristics of the capacitor, and can also protect the gate G of the first MOS tube 210 or the second MOS tube 11 when the electrostatic discharge or voltage surge occurs. When the circuit works normally, the second PIN pin 102 has a stable voltage, and the first capacitor 231 is connected to the second PIN pin 102 and the gate G of the first MOS tube 210. On the basis of the stable voltage of the second PIN pin 102, the first capacitor 231 can further maintain the voltage of the gate G of the first MOS tube 210 stable by utilizing its own charge and discharge characteristics. Similarly, the second capacitor 241 is connected to the second PIN pin 102 and the gate G of the second MOS tube 11, so as to further maintain the voltage of the gate G of the second MOS tube 11 stable by utilizing its own charge and discharge characteristics on the basis of the stable voltage of the second PIN pin 102.

[0070] Optionally, the second voltage control module 23 may further include a first resistor, one end of the first resistor being connected to the gate G of the first MOS tube 210, and the other end being connected to the first PIN pin 101, and the first resistor being used to control the gate G voltage of the first MOS tube 210 by voltage division, thereby reducing the breakdown voltage of the first MOS tube 210, so that the first MOS tube 210 can recover after being broken down, thereby preventing the gate G of the first MOS tube 210 from being short-circuited with the source S or the gate G from being short-circuited with the drain D.

[0071] Optionally, the third voltage control module 24 may further include a second resistor, one end of which is connected to the gate G of the second MOS tube 11, and the other end of which is connected to the second PIN pin 102. The gate G voltage of the second MOS tube 11 is controlled by voltage division to reduce the breakdown voltage of the second MOS tube 11, so that the second MOS tube 11 can recover after being broken down, thereby preventing the gate G of the second MOS tube 11 from being short-circuited with the source S or the gate G from being short-circuited with the drain D.

[0072] Alternatively, if Figure 2 As shown, considering the different requirements for preventing static current from flowing into the circuit in actual applications, a secondary leakage protection module 3 can also be set in the leakage control module 20. The secondary leakage protection module 3 is connected in series with the low leakage switch 21, and the secondary leakage protection module 3 includes at least one of a resistor, a diode, a bipolar transistor and a thyristor.

[0073] For example, in some circuits that are very susceptible to static current, leakage protection needs to be further strengthened, so the secondary leakage protection module, the ESD module 10 and the leakage control module 20 can be connected in series to play a multi-layer protection role.

[0074] An embodiment of the present application further provides a chip, comprising an ultra-low leakage ESD protection circuit 1 as in any one of the above embodiments.

[0075] Optionally, in some embodiments, the first PIN pin 101 is a power supply terminal, and the second PIN pin 102 is a PAD.

[0076] In some other embodiments, the first PIN pin 101 is a PAD, and the second PIN pin 102 is a ground terminal.

[0077] Specifically, the external power supply is input into the power supply terminal of the chip from the first PIN pin 101 to supply power to the chip. It is also connected to the outside to guide static electricity out of the chip. The ground terminal is used to ground to provide a low level for the chip, and static electricity and interference signal lights can be introduced into the ground to prevent the chip performance from being damaged.

[0078] In summary, the ultra-low leakage ESD protection circuit 1 and chip provided in the embodiment of the present application, by connecting the ESD module 10 and the leakage control module 20 in series, increase the obstacle to the static current flowing out of the circuit after passing through the ESD module 10 and the leakage control module 20, reduce the possibility of static current flowing out of the circuit, and by making the blocking resistance of the leakage control module 20 greater than the blocking resistance of the ESD module 10, add an obstacle to the path of current flowing out of the ESD module 10, prevent static electricity from flowing out of the ESD module 10, thereby further strengthening the electrostatic protection of the circuit and reducing the leakage current in the circuit.

[0079] Each functional unit or module in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0080] In the claims, any reference symbols placed between brackets shall not be construed as limiting the claims. The word "comprising" described in the present application does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present application can be implemented with the aid of hardware comprising several different elements and with the aid of a suitably programmed computer. In a unit claim that lists a number of devices, several units of these devices may be embodied by the same hardware item. The use of first, second, and third, etc. does not indicate any order, and these words may be interpreted as names. The steps in the above embodiments, unless otherwise specified, should not be understood as limitations on the order of execution.

[0081] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An ultra-low leakage ESD protection circuit, characterized in that: The input end of the ESD protection circuit is connected to the first PIN pin, and the output end of the ESD protection circuit is connected to the second PIN pin; The ESD protection circuit includes an ESD module and a leakage control module connected in series, the ESD module includes a second MOS tube, the source of the second MOS tube is connected to the first PIN pin, the leakage control module includes a low leakage switch and a first voltage control module connected thereto, the first voltage control module is used to control the voltage across the low leakage switch to adjust the closing degree of the low leakage switch; The blocking resistance of the leakage control module is greater than the blocking resistance of the ESD module, so as to prevent the current of the first PIN pin from flowing out of the second PIN pin through the ESD protection circuit; The low leakage switch includes a first MOS tube, an input end of the first voltage control module is connected to the drain of the first MOS tube, a first output end of the first voltage control module is connected to the gate of the first MOS tube, and a second output end of the first voltage control module is connected to the source of the first MOS tube; The first voltage control module is used to convert the drain voltage of the first MOS tube into a first output voltage and a second output voltage, and output the first output voltage through the first output terminal, and output the second output voltage through the second output terminal; wherein the first output voltage is greater than the second output voltage, so that the gate voltage of the first MOS tube is greater than the source voltage of the first MOS tube.

2. The circuit according to claim 1, characterized in that When the voltage between the first PIN pin and the second PIN pin is greater than or equal to a first threshold, the ESD module and the leakage control module are turned on, so that the current of the first PIN pin is conducted to the second PIN pin through the ESD protection circuit.

3. The circuit according to claim 1, characterized in that The drain of the second MOS tube is connected to the source of the first MOS tube.

4. The circuit according to claim 3, characterized in that The circuit further includes a second voltage control module and a third voltage control module; the second voltage control module is respectively connected to the first PIN pin, the second PIN pin and the gate of the first MOS tube, and the third voltage control module is respectively connected to the first PIN pin, the second PIN pin and the gate of the second MOS tube; The second voltage control module is used to control the gate voltage of the first MOS tube, and the third voltage control module is used to control the gate voltage of the second MOS tube, so as to control the voltage between the first PIN pin and the second PIN pin.

5. The circuit according to claim 4, characterized in that The second voltage control module includes a first capacitor, the first PIN pin and the gate of the first MOS tube are both connected to the input end of the first capacitor, and the second PIN pin is connected to the output end of the first capacitor; The third voltage control module includes a second capacitor, the first PIN pin and the gate of the second MOS tube are both connected to the input end of the second capacitor, and the second PIN pin is connected to the output end of the second capacitor.

6. The circuit according to claim 5, characterized in that It also includes a secondary leakage protection module, which is connected in series with the ultra-low leakage switch, and the secondary leakage protection module includes at least one of a resistor, a diode, a bipolar transistor and a thyristor.

7. A chip, characterized in that: An ultra-low leakage ESD protection circuit comprising the ultra-low leakage ESD protection circuit according to any one of claims 1 to 6.

8. The chip according to claim 7, characterized in that: The first PIN pin is a power supply terminal, and the second PIN pin is a PAD; or, the first PIN pin is a PAD, and the second PIN pin is a ground terminal.

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