Electro-static discharge (ESD) protection circuit of power tube

Abstract

The invention discloses an ESD protection circuit of a power tube, and belongs to the technical field of semiconductors. The ESD protection circuit is connected between the grid electrode and the source electrode of the power tube, the ESD protection circuit comprises a target control circuit and a target transistor, the target control circuit comprises a target rectification module, the grid electrode of the target transistor is connected with the anode of the target rectification module, and the drain electrode of the target transistor is connected with the grid electrode of the power tube; the source electrode of the target transistor is connected with the source electrode of the power tube; and under the condition that the actual voltage corresponding to the target rectification module is greater than or equal to the gate threshold voltage corresponding to the target transistor, the target transistor is switched on so as to perform electrostatic discharge on the power tube based on the control loop where the target rectification module is located and the target transistor. According to the ESD protection circuit of the power tube, the risks of current leakage and mistaken opening are reduced, and the stability of a system is improved.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and particularly relates to an ESD protection circuit for a power transistor. Background Art

[0002] Gallium nitride (GaN), as a third-generation wide-bandgap semiconductor material, is well-known for its high bandgap width, high critical breakdown electric field strength, and high saturated electron mobility. GaN is rapidly gaining commercial applications in power electronics systems, especially in power conversion and automotive applications. However, GaN's ability to withstand short-duration high-energy pulse biasing is very limited, and it still faces the problem of insufficient electrostatic discharge (ESD) protection. In related technologies, there is an Figure 1 ESD protection structure as shown, which includes two resistors and a GaN high electron mobility transistor. When in the forward conduction state, the gate voltage of the HEMT in the ESD protection circuit 1 is determined by the voltage across the resistor R L However, the resistance formed by the two-dimensional electron gas (2DEG) has poor stability, resulting in large fluctuations in the ESD forward trigger voltage. It is easy to have a situation where the trigger voltage is lower than the operating voltage of the power transistor 2, thus causing an ESD false turn-on. Moreover, in the reverse operating state, there are also large fluctuations in the reverse trigger voltage, increasing the risk of leakage current and false turn-on. Summary of the Invention

[0003] This application aims to solve at least one of the technical problems existing in the related technologies. Therefore, this application provides an ESD protection circuit for a power transistor, which reduces the fluctuations of the trigger voltage, improves the stability of the ESD protection circuit, reduces the risk of false turn-on of the ESD protection circuit caused by the forward trigger voltage being lower than the operating voltage of the power transistor, and reduces the risk of leakage current and false turn-on in reverse ESD events, improving the stability of the system.

[0004] In a first aspect, this application provides an ESD protection circuit for a power transistor. The ESD protection circuit is connected between the gate and the source of the power transistor. The ESD protection circuit includes a target control circuit and a target transistor. The target control circuit includes a target rectification module. The gate of the target transistor is connected to the anode of the target rectification module. The drain of the target transistor is connected to the gate of the power transistor. The source of the target transistor is connected to the source of the power transistor.

[0005] When the actual voltage corresponding to the target rectification module is greater than or equal to the gate threshold voltage of the target transistor, the target transistor is turned on to perform electrostatic discharge on the power transistor based on the control loop where the target rectification module is located and the target transistor.

[0006] According to the ESD protection circuit for a power transistor provided by an embodiment of the present application, by setting a target rectification module in the ESD protection circuit and triggering the target transistor to turn on based on the voltage on the target rectification module, the fluctuation of the triggering voltage is reduced, the stability of the ESD protection circuit is improved, the risk of the ESD protection circuit being accidentally turned on due to the forward triggering voltage being lower than the operating voltage of the power transistor is reduced, and the leakage current and the risk of accidental turn-on in the reverse ESD event are reduced, thereby improving the stability of the system.

[0007] For the ESD protection circuit of a power transistor according to an embodiment of the present application, the target control circuit includes a first control circuit. The first control circuit includes a plurality of first rectifier diodes and a first resistor connected in series. The anode of the first rectifier diode farthest from the first resistor among the plurality of first rectifier diodes is connected to the gate of the power transistor. The anode of the first rectifier diode closest to the first resistor among the plurality of first rectifier diodes is connected to the gate of the target transistor. The cathode of the first rectifier diode closest to the first resistor is connected to one end of the first resistor. The first rectifier diode closest to the first resistor and the first resistor form the target rectification module. The other end of the first resistor is respectively connected to the source of the target transistor and the source of the power transistor;

[0008] When the current corresponding to the gate voltage of the power transistor flows out from the gate of the power transistor, the electrostatic discharge on the power transistor based on the control loop where the target rectification module is located and the target transistor includes:

[0009] Performing electrostatic discharge on the power transistor based on the first control circuit and the target transistor.

[0010] For the ESD protection circuit of a power transistor according to an embodiment of the present application, the target control circuit includes a second control circuit. The second control circuit includes a plurality of second rectifier diodes and a second resistor connected in series. The anode of the second rectifier diode farthest from the second resistor among the plurality of second rectifier diodes is connected to the source of the power transistor. The anode of the second rectifier diode closest to the second resistor among the plurality of second rectifier diodes is connected to the gate of the target transistor. The cathode of the second rectifier diode closest to the second resistor is connected to one end of the second resistor. The second rectifier diode closest to the second resistor and the second resistor form the target rectification module. The other end of the second resistor is respectively connected to the drain of the target transistor and the gate of the power transistor;

[0011] When the current corresponding to the gate voltage of the power transistor flows out from the source of the power transistor, the electrostatic discharge of the power transistor based on the control loop where the target rectification module is located and the target transistor includes:

[0012] Performing electrostatic discharge on the power transistor based on the second control circuit and the target transistor.

[0013] The ESD protection circuit of the power transistor according to an embodiment of the present application, wherein the target control circuit includes a bridge rectifier circuit, at least one third rectifier diode and a third resistor. The cathode of the third rectifier diode closest to the third resistor among the at least one third rectifier diode is respectively connected to the gate of the target transistor and one end of the third resistor. The bridge rectifier circuit includes a fourth rectifier diode, a fifth rectifier diode, a sixth rectifier diode and a seventh rectifier diode. The anode of the fourth rectifier diode is respectively connected to the gate of the power transistor and the cathode of the seventh rectifier diode. The cathode of the fourth rectifier diode is respectively connected to the cathode of the fifth rectifier diode and the anode of the third rectifier diode farthest from the third resistor among the at least one third rectifier diode. The anode of the fifth rectifier diode is respectively connected to the cathode of the sixth rectifier diode and the source of the power transistor. The anode of the sixth rectifier diode is respectively connected to the anode of the seventh rectifier diode and the other end of the third resistor;

[0014] When the current corresponding to the gate voltage of the power transistor flows out from the gate of the power transistor, the electrostatic discharge of the power transistor based on the control loop where the target rectification module is located and the target transistor includes:

[0015] Performing electrostatic discharge on the power transistor based on the fourth rectifier diode, each of the third rectifier diodes, the third resistor, the sixth rectifier diode and the target transistor.

[0016] The ESD protection circuit of the power transistor according to an embodiment of the present application. When the current corresponding to the gate voltage of the power transistor flows out from the source of the power transistor, the electrostatic discharge of the power transistor based on the control loop where the target rectification module is located and the target transistor includes:

[0017] Performing electrostatic discharge on the power transistor based on the fifth rectifier diode, each of the third rectifier diodes, the third resistor, the seventh rectifier diode and the target transistor.

[0018] The ESD protection circuit of a power transistor according to an embodiment of the present application. When the actual voltage corresponding to the target rectification module is greater than or equal to the gate threshold voltage corresponding to the target transistor, the target transistor is turned on to perform electrostatic discharge on the power transistor based on the control loop where the target rectification module is located and the target transistor, including:

[0019] When the gate voltage of the power transistor reaches the target trigger voltage and the actual voltage corresponding to the target rectification module is greater than or equal to the gate threshold voltage corresponding to the target transistor, the target transistor is turned on to perform electrostatic discharge on the power transistor based on the control loop where the target rectification module is located and the target transistor; the target trigger voltage is determined based on the number of rectifying diodes included in the target control circuit.

[0020] The ESD protection circuit of a power transistor according to an embodiment of the present application. The target trigger voltage includes a forward trigger voltage or a reverse trigger voltage; the target trigger voltage is determined based on the number of rectifying diodes included in the target control circuit, including:

[0021] When the number of rectifying diodes included in the target control circuit increases, it is determined that the forward trigger voltage increases and the reverse trigger voltage decreases;

[0022] When the number of rectifying diodes included in the target control circuit decreases, it is determined that the forward trigger voltage decreases and the reverse trigger voltage increases.

[0023] In a second aspect, the present application provides a chip, including:

[0024] The ESD protection circuit of a power transistor as described in the first aspect;

[0025] A power transistor, and the ESD protection circuit is connected between the gate and the source of the power transistor.

[0026] In a third aspect, the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, including:

[0027] The chip as described in the second aspect, and the chip is connected to the processor.

[0028] In a fourth aspect, the present application provides an electronic system, the electronic system includes a processor and a communication interface, and the communication interface is coupled to the processor, including:

[0029] The chip as described in the second aspect;

[0030] The processor is used to run programs or instructions, and the processor is connected to the chip.

[0031] One or more of the above technical solutions in the embodiments of the present application have at least one of the following technical effects:

[0032] By setting a target rectification module in the ESD protection circuit and triggering the target transistor to turn on based on the voltage on the target rectification module, the fluctuation of the trigger voltage is reduced, the stability of the ESD protection circuit is improved, the risk of mis - opening of the ESD protection circuit caused by the forward trigger voltage being lower than the operating voltage of the power transistor is reduced, and the leakage current and the risk of mis - opening in the reverse ESD event are reduced, improving the stability of the system.

[0033] Furthermore, by using rectifier diodes to build a bridge rectifier circuit, most of the devices can be shared by the forward ESD protection circuit and the reverse ESD protection circuit during electrostatic discharge, reducing the number of large resistors and rectifier diodes, saving area and cost. And there is only one large resistor in this ESD protection circuit, and when increasing the resistance value of the third resistor, the chip area does not need to be increased, further reducing the static power consumption of the ESD protection circuit.

[0034] Additional aspects and advantages of the present application will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings, where:

[0036] Figure 1 is a schematic structural diagram of an enhanced GaN - based ESD protection circuit in the related art;

[0037] Figure 2 is one of the schematic structural diagrams of the ESD protection circuit of the power transistor provided by the embodiment of the present application;

[0038] Figure 3 is another schematic structural diagram of the ESD protection circuit of the power transistor provided by the embodiment of the present application;

[0039] Figure 4 is yet another schematic structural diagram of the ESD protection circuit of the power transistor provided by the embodiment of the present application;

[0040] Figure 5 is still another schematic structural diagram of the ESD protection circuit of the power transistor provided by the embodiment of the present application;

[0041] Figure 6 is a further schematic structural diagram of the ESD protection circuit of the power transistor provided by the embodiment of the present application;

[0042] Figure 7 It is the sixth structural schematic diagram of the ESD protection circuit of the power transistor provided by the embodiment of the present application;

[0043] Figure 8 It is the structural schematic diagram of the electronic device provided by the embodiment of the present application.

[0044] Reference numerals:

[0045] Target transistor 110; power transistor 120; first resistor R1; second resistor R2; third resistor R3. Detailed implementation manners

[0046] Next, the technical solutions in the embodiments of the present application will be clearly described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0047] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data may be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order different from those illustrated or described herein, and the objects distinguished by "first", "second", etc. generally belong to the same category, and the number of objects is not limited. For example, the first object may be one or multiple. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally represents an "or" relationship between the related objects before and after.

[0048] Next, Figures 2 to 7 describe the ESD protection circuit of the power transistor in the embodiment of the present application.

[0049] It should be noted that the ESD protection circuit of the power transistor 120 can be applied to the technical fields of semiconductor devices and integrated circuits, including but not limited to technical fields such as fast charging, adapters, and chargers.

[0050] As Figure 2 shown, the ESD protection circuit of the power transistor 120 includes: a target control circuit and a target transistor 110.

[0051] In this embodiment, the ESD protection circuit is connected between the gate and the source of the power transistor 120.

[0052] The power transistor 120 can be a power semiconductor device. For example, it can be a gallium nitride (GaN) power device. Gallium nitride has a relatively wide bandgap. For example, the bandgap of gallium nitride can reach 3.4 eV. The critical breakdown electric field strength of gallium nitride is typically in the range of several megavolts per centimeter (MV / cm). The electron mobility of gallium nitride is as high as 2000 cm 2 / Vs.

[0053] When the voltage between the gate and source of the power transistor 120 is large and exceeds the ability of the power transistor 120 to withstand short-time high-energy pulse biasing, it is necessary to perform electrostatic discharge on the power transistor 120 based on the ESD protection circuit.

[0054] The ESD protection circuit can include a target control circuit and a target transistor 110.

[0055] The target control circuit can include a plurality of rectifying diodes connected in series and a target rectifying module. Among them, the source terminal and the gate terminal of the enhancement-mode p-GaN can be short-circuited to obtain a rectifying diode, with the source terminal and the gate terminal as the anode and the drain terminal as the cathode.

[0056] The target rectifying module can be formed by connecting a rectifying diode and a resistor in series. Among them, the resistor can be a resistor formed by using a two-dimensional electron gas channel or a thin-film resistor, which is not limited in this application.

[0057] The target transistor 110 can include a p-GaN high electron mobility transistor (HEMT). The target transistor 110 includes a gate, a drain, and a source.

[0058] The contact between the gate metal and the p-GaN layer of the enhancement-mode p-GaN HEMTs device is of Schottky contact type or can be Ohmic contact, which is not limited in this application.

[0059] The gate (G terminal) of the target transistor 110 is connected to the anode of the target rectifying module. The drain (D terminal) of the target transistor 110 is connected to the gate of the power transistor 120. The source (S terminal) of the target transistor 110 is connected to the source of the power transistor 120.

[0060] The target transistor 110 has a bidirectional characteristic. When a high voltage is applied to the VDS of the target transistor 110, the channel is turned on, and the current flows from the drain to the source of the target transistor 110. When a high voltage is applied to the VSD of the target transistor 110, the channel is turned on, and the current flows from the source to the drain of the target transistor 110.

[0061] In the case of a forward ESD event or a reverse ESD event, the current flowing out of the gate or source of the power transistor 120 will flow through each rectifier diode in the target control module. The current flowing out of the gate or source of the power transistor 120 will generate a voltage division on the target rectifier module. Then, the actual voltage on the target rectifier module can be obtained, and based on the magnitude relationship between the actual voltage corresponding to the target rectifier module and the gate threshold voltage corresponding to the target transistor 110, the operating state of the target transistor 110 can be determined.

[0062] In some embodiments, when the actual voltage corresponding to the target rectifier module is greater than or equal to the gate threshold voltage corresponding to the target transistor 110, the target transistor 110 conducts, and the electrostatic discharge of the power transistor 120 based on the control loop where the target rectifier module is located and the target transistor 110 may include:

[0063] When the gate voltage of the power transistor 120 reaches the target trigger voltage and the actual voltage corresponding to the target rectifier module is greater than or equal to the gate threshold voltage corresponding to the target transistor 110, the target transistor 110 conducts to perform electrostatic discharge on the power transistor 120 based on the control loop where the target rectifier module is located and the target transistor 110.

[0064] In this embodiment, the target trigger voltage is the turn-on voltage corresponding to the ESD protection circuit. When the gate voltage of the power transistor 120 reaches the target trigger voltage, it can be determined that electrostatic discharge needs to be performed on the power transistor 120 based on the ESD protection circuit to protect the power transistor 120 from being broken down.

[0065] The target trigger voltage is determined based on the number of rectifier diodes away from the resistor included in the target control circuit.

[0066] In the case where the number of rectifier diodes away from the resistor is larger, the absolute value of the target trigger voltage is larger; in the case where the number of rectifier diodes away from the resistor is smaller, the absolute value of the target trigger voltage is smaller.

[0067] The turn-on voltage of the rectifier diode is determined by the threshold voltage of the rectifier diode. Under different semiconductor processes, the threshold voltage is different, and the turn-on voltage of the rectifier diode is also different. The turn-on voltage of the rectifier diode is generally 1.1V - 1.8V. For example, Figure 2 as shown, assuming the turn-on voltage of each rectifier diode is 1.4V, when there are only 5 rectifier diodes in the target control circuit, since the current is very small when the rectifier diodes just turn on, the voltage across the resistor and the rectifier diodes close to the resistor in Circuit 3 is 1.4V, and the trigger voltage is 1.4 * 5 = 7V; when there are 10 rectifier diodes in the target control circuit, the voltage across the resistor and the rectifier diodes close to the resistor in Circuit 3 is 1.4V, and the trigger voltage is 1.4 * 10 = 14V.

[0068] In some embodiments, the target trigger voltage is determined based on the number of rectifier diodes included in the target control circuit, and may include:

[0069] When the number of rectifier diodes included in the target control circuit increases, it is determined that the forward trigger voltage increases and the reverse trigger voltage decreases;

[0070] When the number of rectifier diodes included in the target control circuit decreases, it is determined that the forward trigger voltage decreases and the reverse trigger voltage increases.

[0071] In this embodiment, the target trigger voltage may include the forward trigger voltage or the reverse trigger voltage.

[0072] The forward trigger voltage is the turn-on voltage corresponding to the control circuit for forward ESD protection, and the reverse trigger voltage is the turn-on voltage corresponding to the control circuit for reverse ESD protection.

[0073] The voltage ratio on the target rectification module can be determined based on the number of rectifier diodes included in the target control module. When the number of rectifier diodes connected in series in the target control circuit is larger, the voltage ratio on the target rectification module is smaller. Taking the forward ESD event as an example, the larger the current flowing through the target control module required to turn on the target transistor 110, that is, the larger the forward trigger voltage corresponding to the ESD protection circuit, and the larger the current / voltage flowing out of the gate of the power transistor 120;

[0074] When the number of rectifier diodes connected in series in the target control circuit is smaller, the voltage ratio on the target rectification module is larger, and the smaller the current flowing through the target control module required to turn on the target transistor 110, that is, the smaller the forward trigger voltage corresponding to the ESD protection circuit, and the smaller the current / voltage flowing out of the gate of the power transistor 120.

[0075] Taking the reverse ESD event as an example, when the voltage ratio on the target rectification module is smaller, the smaller the reverse current (the larger the absolute value) flowing through the target control module required to turn on the target transistor 110, that is, the smaller the reverse trigger voltage corresponding to the ESD protection circuit, and the smaller the current / voltage flowing out of the source of the power transistor 120;

[0076] When the voltage ratio on the target rectification module is larger, the larger the reverse current (the smaller the absolute value) flowing through the target control module required to turn on the target transistor 110, that is, the larger the reverse trigger voltage corresponding to the ESD protection circuit, and the larger the current / voltage flowing out of the source of the power transistor 120.

[0077] When the reverse trigger voltage is small (the absolute value of the reverse trigger voltage is large), the power transistor 120 can be turned off by applying a negative voltage (generally greater than the reverse trigger voltage) to the gate of the power transistor 120. The channel of the power transistor 120 can be controlled to close without turning on the ESD protection circuit, reducing the static power loss of the circuit and improving the chip efficiency.

[0078] When the actual voltage corresponding to the target rectification module is greater than or equal to the gate threshold voltage corresponding to the target transistor 110, the target transistor 110 is turned on, and the power transistor 120 operates in the saturation state of the target transistor 110 (HEMTs). Otherwise, it is turned off. Since HEMTs have no avalanche ability, the rectification device has no reverse discharge ability and can only conduct forward. Therefore, electrostatic discharge can be performed on the power transistor 120 based on the control loop where the target rectification module is located and the target transistor 110.

[0079] The control loop where the target rectification module is located can be the target control circuit, or it can be a part of the target control circuit.

[0080] When the target transistor 110 is turned on, the control loop where the target rectification module is located can form a loop with the target transistor 110, and the formed loop can perform electrostatic discharge on the power transistor 120.

[0081] In this application, in the initial stage of power-on, the current on the rectifier tube in the target control circuit is small, and the voltage across the resistor in the target control circuit accounts for a low proportion. The voltage across the target rectification module (including the rectifier tube and the resistor) can be used to turn on the channel of the target transistor 110, reducing the fluctuation of the trigger voltage corresponding to the ESD protection circuit caused by the resistance value fluctuation of the 2DEG resistor and improving the stability of the ESD protection circuit.

[0082] According to the ESD protection circuit of the power transistor 120 provided by the embodiments of the present application, by setting the target rectification module in the ESD protection circuit and triggering the target transistor 110 to turn on based on the voltage across the target rectification module, the fluctuation of the trigger voltage is reduced, the stability of the ESD protection circuit is improved, the risk of mis-turning on the ESD protection circuit caused by the forward trigger voltage being lower than the operating voltage of the power transistor 120 is reduced, and the risk of leakage current and mis-turning on in the reverse ESD event is reduced, improving the stability of the system.

[0083] As Figure 2 shown, in some embodiments, the target control circuit may include a first control circuit.

[0084] In this embodiment, as Figure 2 shown in Circuit 3, the first control circuit may include a plurality of first rectifier tubes connected in series and a first resistor R1.

[0085] The cathode of the previous first rectifier tube is connected to the anode of the next first rectifier tube.

[0086] The number of multiple first rectifier tubes can be user-defined. When the number of multiple first rectifier tubes is larger, the forward trigger voltage is larger; when the number of multiple first rectifier tubes is smaller, the forward trigger voltage is smaller.

[0087] The anode of the first rectifier tube far from the first resistor R1 among the multiple first rectifier tubes is connected to the gate of the power tube 120.

[0088] The anode of the first rectifier tube close to the first resistor R1 among the multiple first rectifier tubes is connected to the gate of the target transistor 110. The cathode of the first rectifier tube close to the first resistor R1 is connected to one end of the first resistor R1. The first rectifier tube close to the first resistor R1 and the first resistor R1 form a target rectification module.

[0089] The other end of the first resistor R1 is respectively connected to the source of the target transistor 110 and the source of the power tube 120.

[0090] As Figure 2 shown, the first control circuit includes N first rectifier tubes. When N = 5, the multiple first rectifier tubes can include rectifier tube 1, rectifier tube 2, rectifier tube 3, rectifier tube 4, and rectifier tube 5.

[0091] The anode of rectifier tube 1 is connected to the gate (G terminal) of the power tube 120. The cathode of rectifier tube 1 is connected to the anode of rectifier tube 2. The cathode of rectifier tube 2 is connected to the anode of rectifier tube 3. The cathode of rectifier tube 3 is connected to the anode of rectifier tube 4. The cathode of rectifier tube 4 is connected to the anode of rectifier tube 5. The cathode of rectifier tube 4 and the anode of rectifier tube 5 are connected to the gate (G terminal) of the target transistor 110. The cathode of rectifier tube 5 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the source (S terminal) of the power tube 120. Rectifier tube 5 and the first resistor R1 form a target rectification module. The drain (D terminal) of the target transistor 110 is connected to the gate (G terminal) of the power tube 120. The source (S terminal) of the target transistor 110 is connected to the source (S terminal) of the power tube 120.

[0092] When the current corresponding to the gate voltage of the power tube 120 flows out from the gate of the power tube 120, electrostatic discharge of the power tube 120 based on the control loop where the target rectification module is located and the target transistor 110 may include:

[0093] Performing electrostatic discharge on the power tube 120 based on the first control circuit and the target transistor 110.

[0094] When the power transistor 120 is in a normal operating state, the operating voltage of the power transistor 120 is lower than the forward trigger voltage, and the forward ESD protection circuit (the first control circuit and the target transistor 110) is in an off state; during a forward ESD event, such as Figure 3 As shown, the static electricity accumulated on the gate of the power transistor 120 will generate a transient voltage, forming a current flowing through the forward ESD protection circuit, thereby generating a voltage across the rectifier diode 5 and the first resistor R1. When the actual voltage corresponding to the target rectifier module is greater than or equal to the gate threshold voltage corresponding to the target transistor 110, the conductive channel of the target transistor 110 is turned on, the drain voltage decreases, and the forward static discharge current can flow through the channel of the target transistor 110, and the charge no longer accumulates on the gate of the power transistor 120, thus protecting the gate of the power transistor 120.

[0095] During the actual implementation process, let the current flowing through the forward ESD protection circuit be I 1 , the resistance value of the first resistor R1 be R 1 , the number of multiple first rectifier diodes be 5, the gate voltage V GS of the power transistor 120 = V O1 , the gate threshold voltage of the target transistor 110 in the discharge module 5 be V t , when the actual voltage of the target rectifier module , the ESD protection circuit starts to discharge static electricity forward.

[0096] When N = 3 or 7, the resistance value of the first resistor R1 is in the order of dozens of kΩ, and when the gate threshold voltages of all p-GAN HEMTs in the figure are the same and all are 1.4V, the turn-on voltage (i.e., the forward trigger voltage) of the ESD protection circuit is 4.2V - 9.8V;

[0097] When N = 5, the turn-on voltage of the ESD protection circuit is 7V.

[0098] By adjusting the number of series-connected rectifier diodes on the side far from the first resistor R1, the range of the forward trigger voltage can reach 4.2 - 15.4V.

[0099] In some embodiments, the target control circuit may include a second control circuit.

[0100] In this embodiment, as shown in circuit 4 in Figure 2 , the second control circuit includes multiple second rectifier diodes connected in series and a second resistor R2.

[0101] The number of multiple second rectifier diodes can be user-defined. The more the number of multiple second rectifier diodes, the smaller the reverse trigger voltage, and the fewer the number of multiple second rectifier diodes, the larger the reverse trigger voltage.

[0102] The anode of the second rectifier diode among the multiple second rectifier diodes that is far from the second resistor R2 is connected to the source electrode of the power transistor 120.

[0103] The anode of the second rectifier diode among the multiple second rectifier diodes that is close to the second resistor R2 is connected to the gate electrode of the target transistor 110. The cathode of the second rectifier diode that is close to the second resistor R2 is connected to one end of the second resistor R2. The second rectifier diode that is close to the second resistor R2 and the second resistor R2 form a target rectification module.

[0104] The other end of the second resistor R2 is respectively connected to the drain electrode of the target transistor 110 and the gate electrode of the power transistor 120.

[0105] As Figure 2 shown, the structure of the second control circuit is the same as that of the first control circuit, but in the opposite direction. The target transistor 110 has bidirectional characteristics. The first control circuit 3 and the discharge module 5 can form a forward ESD protection module, and the second control circuit 4 and the discharge module 5 can form a reverse ESD protection module.

[0106] In the second control circuit, the second control circuit includes N second rectifier diodes. When N = 5, the multiple second rectifier diodes can include rectifier diode 6, rectifier diode 7, rectifier diode 8, rectifier diode 9, and rectifier diode 10.

[0107] One end of the second resistor R2 is connected to the cathode of rectifier diode 6, and the other end of the second resistor R2 is connected to the gate electrode of the power transistor 120. The second resistor R2 and rectifier diode 6 form a target rectification module.

[0108] The anode of rectifier diode 6 is connected to the cathode of rectifier diode 7, and the anode of rectifier diode 6 is also short-circuited to the gate electrode of the target transistor 110.

[0109] The anode of rectifier diode 7 is connected to the cathode of rectifier diode 8, the anode of rectifier diode 8 is connected to the cathode of rectifier diode 9, the anode of rectifier diode 9 is connected to the cathode of rectifier diode 10, and the anode of rectifier diode 10 is respectively connected to the source electrode of the power transistor 120 and the source electrode of the target transistor 110.

[0110] When the current corresponding to the gate voltage of the power transistor 120 flows out from the source electrode of the power transistor 120, electrostatic discharge of the power transistor 120 based on the control loop where the target rectification module is located and the target transistor 110 can include:

[0111] Performing electrostatic discharge on the power transistor 120 based on the second control circuit and the target transistor 110.

[0112] When the gate voltage of the power transistor 120 is a negative voltage, the device is turned off, and the reverse ESD protection circuit (the second control circuit and the target transistor 110) is in the off state; when a reverse ESD event occurs, as Figure 4As shown, the current flows from the source of the power transistor 120 through the reverse ESD protection circuit to the gate of the power transistor 120, generating a voltage on the target rectification module. When this voltage exceeds the gate threshold voltage of the target transistor 110 in the discharge module, the current flows from the source of the target transistor 110 in the discharge module to its drain, and no longer flows through the source and gate of the power transistor 120, thereby protecting the gate of the power transistor 120.

[0113] During the actual execution process, let the current flowing through the reverse ESD protection circuit be I 2 , the resistance value of the second resistor R2 is R 2 , N = 5, the gate voltage V GS = V O2 , the gate threshold voltage of the target transistor 110 in the discharge module 5 is V t , at the actual voltage of the target rectification module , the ESD protection circuit starts to discharge static electricity in reverse.

[0114] By adjusting the number of series-connected rectifier diodes on the side far from the second resistor R2, the range of the reverse trigger voltage can reach -4.2 to -15.4 V.

[0115] In the case of a relatively small reverse trigger voltage, the gate of the power transistor 120 can be connected to a negative voltage. On the basis of completely closing the channel of the power transistor 120, it will not trigger the opening of the reverse ESD protection circuit, effectively reducing the leakage of the power transistor 120, and reducing the situation of accidentally triggering the reverse ESD protection circuit due to the voltage fluctuation of the gate of the power transistor 120.

[0116] As Figure 5 shown, in some embodiments, the target control circuit may include a bridge rectifier circuit, at least one third rectifier diode, and a third resistor R3.

[0117] In this embodiment, the cathodes of the third rectifier diodes in at least one third rectifier diode that are close to the third resistor R3 are respectively connected to the gate of the target transistor 110 and one end of the third resistor R3.

[0118] The bridge rectifier circuit may include a fourth rectifier diode, a fifth rectifier diode, a sixth rectifier diode, and a seventh rectifier diode.

[0119] Among them, the anode of the fourth rectifier diode is respectively connected to the gate of the power transistor 120 and the cathode of the seventh rectifier diode, and the cathode of the fourth rectifier diode is respectively connected to the cathode of the fifth rectifier diode and the anode of the third rectifier diode in at least one third rectifier diode that is far from the third resistor R3.

[0120] The anode of the fifth rectifier diode is respectively connected to the cathode of the sixth rectifier diode and the source of the power transistor 120.

[0121] The anode of the sixth rectifying tube is respectively connected to the anode of the seventh rectifying tube and the other end of the third resistor R3.

[0122] As Figure 5 shown, the gate of the power tube 120 is short - circuited with the drain of the target transistor 110 in the discharge module 5.

[0123] The bridge rectifier circuit may include a fourth rectifying tube (rectifying tube 11), a fifth rectifying tube (rectifying tube 12), a sixth rectifying tube (rectifying tube 13), and a seventh rectifying tube (rectifying tube 14).

[0124] The anode of the rectifying tube 11 is connected to the gate of the power tube 120, the cathode of the rectifying tube 11 is connected to the cathode of the rectifying tube 12, the anode of the rectifying tube 12 is connected to the cathode of the rectifying tube 13, and the anode of the rectifying tube 12 is also connected to the source of the power tube 120 and the source of the target transistor 110.

[0125] The anode of the rectifying tube 13 is short - circuited with the anode of the rectifying tube 14 to form a rectifier circuit.

[0126] At least one third rectifying tube may include a rectifying tube 15, a rectifying tube 16, and a rectifying tube 17.

[0127] The anode of the rectifying tube 15 is connected to the cathode of the rectifying tube 11, the anode of the rectifying tube 16 is connected to the cathode of the rectifying tube 15, the anode of the rectifying tube 17 is connected to the cathode of the rectifying tube 16, the cathode of the rectifying tube 17 is connected to the gate of the target transistor 110 and one end of the third resistor R3, and the other end of the third resistor R3 is connected to the anode of the rectifying tube 13.

[0128] In this application, a bridge rectifier circuit is built using rectifying tubes, so that the forward ESD protection circuit and the reverse ESD protection circuit can use the same devices, and the main electrostatic discharge path remains the same. The forward ESD protection circuit and the reverse ESD protection circuit can use the same control module 7 for electrostatic discharge.

[0129] As Figure 6 shown, in some embodiments, when the current corresponding to the gate voltage of the power tube 120 flows out from the gate of the power tube 120, electrostatic discharge of the power tube 120 based on the control loop where the target rectifier module is located and the target transistor 110 may include:

[0130] Performing electrostatic discharge on the power tube 120 based on the fourth rectifying tube, each third rectifying tube, the third resistor R3, the sixth rectifying tube, and the target transistor 110.

[0131] In this embodiment, when a forward ESD event occurs, the static electricity accumulated at the gate of the power transistor 120 generates a transient voltage, forming a current that sequentially flows through the rectifier diode 11, rectifier diode 15, rectifier diode 16, rectifier diode 17, the third resistor R3, and rectifier diode 13 in the ESD control module 7 to the source of the power transistor 120. When the voltages across the third resistor R3 and rectifier diode 13 exceed the gate threshold voltage of the target transistor 110 in the discharge module 5, the conductive channel of the p-GaN HEMT in the discharge module 5 is turned on, and the forward static electricity is discharged from the drain of the p-GaN HEMT through its channel to the source, thereby protecting the gate of the power transistor 120.

[0132] Let the forward current on the ESD control module 7 be I 3 , the resistance value of the third resistor R3 be R 3 , the gate voltage of the power transistor 120 be V GS = V O3 , the gate threshold voltage of the target transistor 110 in the discharge module be V t , when the actual voltages across the third resistor R3 and rectifier diode 13 , the ESD protection circuit starts to discharge the forward static electricity.

[0133] As Figure 7 shown, in some embodiments, when the current corresponding to the gate voltage of the power transistor 120 flows out from the source of the power transistor 120, electrostatic discharge of the power transistor 120 based on the control loop where the target rectification module is located and the target transistor 110 may include:

[0134] Performing electrostatic discharge on the power transistor 120 based on the fifth rectifier diode, each third rectifier diode, the third resistor R3, the seventh rectifier diode, and the target transistor 110.

[0135] In this embodiment, when a reverse ESD event occurs, the current formed by the transient voltage sequentially flows from the source of the power transistor 120 through the rectifier diode 12, rectifier diode 15, rectifier diode 16, rectifier diode 17, the third resistor R3, and rectifier diode 14 in the ESD control module 7 to the gate of the power transistor 120. When the voltages across the third resistor R3 and rectifier diode 14 exceed the gate threshold voltage of the target transistor 110 in the discharge module 5, the reverse static electricity is discharged from the source to the drain through the p-GaN HEMT channel, thereby protecting the gate of the p-GaN power device.

[0136] Let the reverse current on the ESD control module 7 be I 4 , the resistance value of the third resistor R3 be R 3 , the gate voltage of the power transistor 120 be V GS = V O4, the gate threshold voltage of the target transistor 110 in the discharge module is Vt. When the actual voltages across the third resistor R3 and the rectifier diode 14 reach a certain value, the ESD protection circuit starts to discharge static electricity in the reverse direction.

[0137] According to the ESD protection circuit of the power transistor 120 provided by the embodiments of the present application, a bridge rectifier circuit is built with rectifier diodes, enabling the forward ESD protection circuit and the reverse ESD protection circuit to share most of the components during static electricity release, reducing the number of large resistors and rectifier diodes, saving area and cost. Moreover, there is only one large resistor in this ESD protection circuit, and when increasing the resistance value of the third resistor R3, the chip area does not need to be increased, further reducing the static power consumption of the ESD protection circuit.

[0138] In some embodiments, the embodiments of the present application further provide a chip, including the ESD protection circuit of the power transistor 120 and the power transistor 120 described in any of the above embodiments.

[0139] In this embodiment, the power transistor 120 includes a gate, a source, and a drain.

[0140] The ESD protection circuit can be connected between the gate and the source of the power transistor 120.

[0141] The ESD protection circuit can protect the gate of the power transistor 120 based on the control logic in the above embodiments.

[0142] It should be understood that the chip mentioned in the embodiments of the present application can also be referred to as a system-on-chip, system chip, chip system, or system-on-a-chip, etc.

[0143] In some embodiments, as Figure 8 shown, the embodiments of the present application further provide an electronic device 800, including a processor 801, a memory 802, a computer program stored on the memory 802 and executable on the processor 801, and a chip. The chip is connected to the processor 801. When the computer program is executed by the processor 801, it implements the various processes in the above embodiments and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0144] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0145] In some embodiments, the embodiments of the present application further provide an electronic system, including a processor, a communication interface, and a chip. The communication interface is coupled to the processor, and the processor is connected to the chip. The processor is used to run programs or instructions to implement the various processes in the above embodiments and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0146] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative work.

[0147] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the essence of the above technical solution, or the part that contributes to the related technology, can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0148] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An ESD protection circuit for a power tube, characterized in that: The ESD protection circuit is connected between the gate and source of the power tube, the ESD protection circuit includes a target control circuit and a target transistor, the target control circuit includes a target rectifier module, the gate of the target transistor is connected to the anode of the target rectifier module, the drain of the target transistor is connected to the gate of the power tube, and the source of the target transistor is connected to the source of the power tube; When the actual voltage corresponding to the target rectifier module is greater than or equal to the gate threshold voltage corresponding to the target transistor, the target transistor is turned on to perform electrostatic discharge on the power tube based on the control loop where the target rectifier module is located and the target transistor.

2. The ESD protection circuit of the power tube according to claim 1, characterized in that: The target control circuit includes a first control circuit, the first control circuit includes a plurality of first rectifier tubes and a first resistor connected in series, the anode of a first rectifier tube far from the first resistor among the plurality of first rectifier tubes is connected to the gate of the power tube, the anode of a first rectifier tube close to the first resistor among the plurality of first rectifier tubes is connected to the gate of the target transistor, the cathode of the first rectifier tube close to the first resistor is connected to one end of the first resistor, the first rectifier tube close to the first resistor and the first resistor constitute the target rectifier module, and the other end of the first resistor is respectively connected to the source of the target transistor and the source of the power tube; In a case where the current corresponding to the gate voltage of the power tube flows out from the gate of the power tube, the electrostatic discharge of the power tube based on the control loop where the target rectifier module is located and the target transistor includes: Electrostatic discharge is performed on the power transistor based on the first control circuit and the target transistor.

3. The ESD protection circuit of the power tube according to claim 1, characterized in that: The target control circuit includes a second control circuit, the second control circuit includes a plurality of second rectifiers and a second resistor connected in series, the anode of a second rectifier far from the second resistor among the plurality of second rectifiers is connected to the source of the power tube, the anode of a second rectifier close to the second resistor among the plurality of second rectifiers is connected to the gate of the target transistor, the cathode of the second rectifier close to the second resistor is connected to one end of the second resistor, the second rectifier close to the second resistor and the second resistor constitute the target rectifier module, and the other end of the second resistor is respectively connected to the drain of the target transistor and the gate of the power tube; In a case where the current corresponding to the gate voltage of the power tube flows out from the source of the power tube, the electrostatic discharge of the power tube based on the control loop where the target rectifier module is located and the target transistor includes: Electrostatic discharge is performed on the power transistor based on the second control circuit and the target transistor.

4. The ESD protection circuit for a power tube according to any one of claims 1 to 3, characterized in that: The target control circuit includes a bridge rectifier circuit, at least one third rectifier and a third resistor, the cathode of the third rectifier close to the third resistor in the at least one third rectifier is respectively connected to the gate of the target transistor and one end of the third resistor, the bridge rectifier circuit includes a fourth rectifier, a fifth rectifier, a sixth rectifier and a seventh rectifier, the anode of the fourth rectifier is respectively connected to the gate of the power tube and the cathode of the seventh rectifier, the cathode of the fourth rectifier is respectively connected to the cathode of the fifth rectifier and the anode of the third rectifier far from the third resistor in the at least one third rectifier, the anode of the fifth rectifier is respectively connected to the cathode of the sixth rectifier and the source of the power tube, and the anode of the sixth rectifier is respectively connected to the anode of the seventh rectifier and the other end of the third resistor; In a case where the current corresponding to the gate voltage of the power tube flows out from the gate of the power tube, the electrostatic discharge of the power tube based on the control loop where the target rectifier module is located and the target transistor includes: Electrostatic discharge is performed on the power tube based on the fourth rectifier tube, each of the third rectifier tubes, the third resistor, the sixth rectifier tube and the target transistor.

5. The ESD protection circuit of the power tube according to claim 4, characterized in that: In a case where the current corresponding to the gate voltage of the power tube flows out from the source of the power tube, the electrostatic discharge of the power tube based on the control loop where the target rectifier module is located and the target transistor includes: Electrostatic discharge is performed on the power tube based on the fifth rectifier tube, each of the third rectifier tubes, the third resistor, the seventh rectifier tube and the target transistor.

6. The ESD protection circuit for a power tube according to any one of claims 1 to 3, characterized in that: When the actual voltage corresponding to the target rectifier module is greater than or equal to the gate threshold voltage corresponding to the target transistor, the target transistor is turned on to perform electrostatic discharge on the power tube based on the control loop where the target rectifier module is located and the target transistor, including: When the gate voltage of the power tube reaches the target trigger voltage and the actual voltage corresponding to the target rectifier module is greater than or equal to the gate threshold voltage corresponding to the target transistor, the target transistor is turned on to perform electrostatic discharge on the power tube based on the control loop where the target rectifier module is located and the target transistor; the target trigger voltage is determined based on the number of rectifier tubes included in the target control circuit.

7. The ESD protection circuit of the power tube according to claim 6, characterized in that: The target trigger voltage includes a forward trigger voltage or a reverse trigger voltage; the target trigger voltage is determined based on the number of rectifier tubes included in the target control circuit, including: In the case where the number of rectifier tubes included in the target control circuit increases, determining that the forward trigger voltage increases, and determining that the reverse trigger voltage decreases; In the case where the number of rectifier tubes included in the target control circuit is reduced, it is determined that the forward trigger voltage is reduced, and it is determined that the reverse trigger voltage is increased.

8. A chip, characterized in that: include: The ESD protection circuit of the power tube as claimed in any one of claims 1 to 7; The ESD protection circuit is connected between the gate and source of the power tube.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: include: The chip as claimed in claim 8, wherein the chip is connected to the processor.

10. An electronic system, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, wherein: include: The chip as claimed in claim 8; The processor is used to run programs or instructions, and the processor is connected to the chip.

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