Inverter neutral-point potential balance and low common-mode voltage modulation method and system based on SVPWM (Space Vector Pulse Width Modulation)

Abstract

The invention relates to the technical field of inverter pulse width modulation, in particular to a neutral-point potential balance and low common-mode voltage modulation method and system based on an SVPWM inverter, and the method comprises the steps: determining a basic voltage vector based on different switching states of an NPC three-level inverter; respectively determining the midpoint current of each fundamental voltage vector, and determining the fundamental voltage vector causing midpoint potential deviation; combining with a large vector and a zero vector, and performing mode division of a single vector space region; determining an expected current according to the DC side capacitor voltage of the inverter, and constructing a target function based on the expected current; and performing region judgment according to the output synthesized voltage vector, determining a corresponding optimal division mode, obtaining each basic voltage vector of the synthesized voltage vector and a corresponding duty ratio, and determining a switching sequence to obtain a PWM wave. While the neutral-point potential balance and common-mode voltage suppression of the NPC three-level inverter are realized, the switching frequency of the inverter is effectively reduced, and the switching loss is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of inverter pulse width modulation, in particular to a method and system for SVPWM inverter midpoint potential balance and low common mode voltage modulation. Background Art

[0002] Neutral Point Clamped (NPC) three-level inverter is widely used in renewable energy generation, motor drive and other occasions due to its advantages such as low voltage stress on switching devices, high output efficiency and low harmonic distortion rate of output voltage. However, NPC three-level inverter has problems of unbalanced midpoint potential and large common-mode voltage. At present, although some researchers use space vector pulse width modulation (SVPWM) method to solve the midpoint potential and common-mode voltage problems of NPC three-level inverter, it still has the following defects: In order to solve the problem of unbalanced midpoint potential of NPC three-level inverter, most traditional SVPWM strategies use redundant small vectors to adjust the midpoint potential. However, this method is not capable of suppressing midpoint potential fluctuations under high modulation index and low power factor. Therefore, a virtual voltage space vector (VSVPWM) strategy has been proposed. This strategy synthesizes a virtual voltage space vector by selecting a suitable basic voltage vector, so that the average midpoint current is zero when the virtual vector acts, thereby eliminating the midpoint potential fluctuations generated by the algorithm itself and achieving midpoint potential balance. However, the switching frequency of the inverter increases by 1 / 3, and the harmonic content also increases. Some people have also proposed a hybrid modulation algorithm based on these two strategies to achieve complete control of the midpoint potential of the NPC three-level inverter, and to obtain lower switching losses and harmonic content. However, the hybrid control algorithm is complex in calculation and difficult to implement.

[0003] These solutions all use a small positive vector with a large common-mode voltage, so that the common-mode voltage amplitude output by the NPC three-level inverter is 1 / 3 of the DC side voltage. For the motor, a large high-frequency common-mode voltage will generate a large motor bearing current through capacitive coupling between the stator and the rotor, causing the aging of the motor insulation, increasing the mechanical wear between the bearings, and shortening the service life of the motor. In addition, the high-frequency common-mode voltage will generate high-frequency leakage current, thereby generating electromagnetic interference and affecting the normal operation of surrounding electrical equipment. Summary of the invention

[0004] In order to solve the above problems, the first aspect of the present invention provides a method for balancing the midpoint potential and modulating the low common mode voltage of an SVPWM inverter, comprising: S1. Determine a basic voltage vector based on different switching states of the NPC three-level inverter, and divide the vector space into regions according to the basic voltage vector; S2, respectively determining the midpoint current of the NPC three-level inverter in the independent switching state for each basic voltage vector, and determining the basic voltage vector causing the midpoint potential shift based on the midpoint current; S3, taking the basic voltage vector causing the midpoint potential shift in the single vector space region as an independent switch state, and combining it with the large vector and the zero vector to perform pattern division of the single vector space region; S4, determining the expected current according to the capacitor voltage on the DC side of the NPC three-level inverter, and constructing an objective function based on the expected current; S5. Perform regional judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter, determine the corresponding optimal division mode based on the objective function, obtain each basic voltage vector and the corresponding duty cycle of the synthetic voltage vector, and determine the switching sequence to obtain the PWM wave.

[0005] In the implementation of the first aspect, the pattern division of a single vector space region in S3 is specifically: S3.1. Take the ends of the large vectors in the single vector space area as vertices, connect the vertices with the ends of the small vectors on the opposite sides as dividing lines, divide the single vector space area into two triangular areas, and obtain a first dividing mode and a second dividing mode; S3.2. Divide the single vector space region into two triangular regions using the mid vector as a dividing line, thereby obtaining a third division mode.

[0006] The specific formula of the objective function described in S4 is: , In the formula, i X , d X Represents the voltage vector U X The corresponding midpoint current and duty cycle; i NP * is the expected current; f is the objective function value.

[0007] The formula for the desired current is: , in, i NP * is the expected current, T s represents the switching period; u c1 ,u c2 The DC side capacitors are c 1. c 2The voltage across the terminals; C for c 1. c 2, c1 and c2 are the same capacitance.

[0008] In the implementation of the first aspect, the specific method of performing region judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter in S5 is as follows: S5.1.1. Determine the vector space region to which the synthetic voltage vector of the NPC three-level inverter belongs; S5.1.2. Perform coordinate transformation on the synthetic voltage vector to determine the coordinate value of the synthetic voltage vector in a 60° coordinate system; S5.1.3. Perform region judgment based on the division boundaries of the three division modes of the vector space region to which it belongs, and determine the region where the synthetic voltage vector under different division modes is located.

[0009] The specific method of determining the corresponding optimal partitioning mode based on the objective function in S5 is: S5.2.1. determining a basic voltage vector for synthesizing the voltage vector according to the area where the synthesized voltage vector is located in different division modes; S5.2.2, respectively calculating the duty ratio of the synthesized voltage vector of the determined basic voltage vectors under different division modes; S5.2.3. Substitute the calculated basic voltage vector and duty cycle under different division modes into the objective function, and determine the optimal division mode according to the objective function value of each division mode.

[0010] The specific method of determining the optimal partitioning mode according to the objective function value of each partitioning mode is as follows: The duty cycle of the basic voltage vector of each division mode is multiplied by the corresponding midpoint current to obtain the offset values ​​of the midpoint potential of different division modes in the same vector space area; Determine the offset value of the point potential and the differential value of the expected current in the three division modes of the same vector space region according to the objective function; The differential mode values ​​of the three division modes are compared, and the division mode with the smallest differential mode value is selected as the optimal division mode.

[0011] In the implementation of the first aspect, the basic voltage vector causing the midpoint potential shift is determined based on the midpoint current in S2, specifically: Determining an equivalent circuit of the switching state of each basic voltage vector based on the independent switching state of each basic voltage vector; Based on the equivalent circuit diagram of each basic voltage vector, determine the corresponding midpoint current; According to the midpoint current, the basic voltage vector whose midpoint current is not zero is screened out, that is, the basic voltage vector causing the midpoint potential shift.

[0012] The second aspect provides a system for SVPWM inverter midpoint potential balance and low common mode voltage modulation, which implements the SVPWM inverter midpoint potential balance and low common mode voltage modulation method as described above, including: A basic vector module is used to determine a basic voltage vector based on different switching states of the NPC three-level inverter, and to divide the vector space into regions according to the basic voltage vector; A midpoint potential module is used to determine the midpoint current of the NPC three-level inverter of each basic voltage vector in an independent switching state, and determine the basic voltage vector causing the midpoint potential shift based on the midpoint current; A mode division module is used to take the basic voltage vector causing the midpoint potential shift in a single vector space region as an independent switch state, and combine it with a large vector and a zero vector to perform mode division in a single vector space region; A function building module, used for determining a desired current according to a capacitor voltage on a DC side of the NPC three-level inverter, and building an objective function based on the desired current; The modulation module is used to make regional judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter, determine the corresponding optimal division mode based on the objective function, obtain the basic voltage vectors and corresponding duty cycle of the synthetic voltage vector, and determine the switching sequence to obtain the PWM wave.

[0013] The third aspect provides a device based on SVPWM inverter midpoint potential balance and low common-mode voltage modulation, including a processor and a memory, wherein the processor implements the above-mentioned method based on SVPWM inverter midpoint potential balance and low common-mode voltage modulation when executing program data stored in the memory.

[0014] The beneficial effects are as follows: the method and system for SVPWM inverter midpoint potential balance and low common-mode voltage modulation provided by the present invention optimizes the pre-selected basic voltage vector and limits the common-mode voltage amplitude to 1 / 6 of the DC side voltage. Secondly, by utilizing the characteristics of the low common-mode voltage switching state with three midpoint potential deviations in each vector space region, three division modes of the vector space region are proposed, and by constructing the objective function of the midpoint current, a division mode in which the midpoint current is closest to the expected midpoint current is selected, thereby realizing active regulation of the midpoint potential. At the same time, according to the regional division mode, the number of switching tube actions of the present invention is only 6 or 8 times, while the number of switching actions of the traditional low common-mode voltage VSVPWM algorithm in any region is greater than or equal to 8 times. While realizing the midpoint potential balance and common-mode voltage suppression of the NPC three-level inverter, the present invention effectively reduces the switching frequency of the inverter and reduces the switching loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic diagram of the process of this application method; Figure 2 It is the circuit diagram of NPC three-level inverter; Figure 3 It is the basic voltage space vector diagram of NPC three-level inverter; Figure 4 is the equivalent circuit diagram of the independent switching state of each basic voltage vector, where a is the equivalent circuit diagram of the large vector PNN; b is the equivalent circuit diagram of the zero vector OOO; c is the equivalent circuit diagram of the medium vector PON; d is the equivalent circuit diagram of the small vector OON; Figure 5 Schematic diagram of three division modes of this application; Figure 6 It is a schematic diagram for comparing the average switching times in any switching cycle of the five-segment PWM modulation method of the present invention and the RCMV_VSVPWM algorithm based on the virtual voltage vector under multiple modulation indices; Figure 7 Schematic diagram of steady-state waveform of the method of the present invention; Figure 8 A schematic diagram of a common mode voltage waveform of the method of the present invention; Fig. 9 It is a schematic diagram of the dynamic process of eliminating the midpoint potential deviation of the present invention. DETAILED DESCRIPTION

[0016] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings.

[0017] See also Figure 1 This embodiment provides a method for balancing the midpoint potential of an SVPWM inverter and modulating a low common mode voltage. The specific implementation steps are as follows: S1. Determine a basic voltage vector based on different switching states of the NPC three-level inverter, and divide the vector space into regions according to the basic voltage vector; like Figure 2 , Figure 3 As shown, the NPC three-level inverter determines the basic voltage vector according to the switching state of the power devices of each phase bridge arm, and the basic voltage vector includes a zero vector, a small vector, a medium vector and a large vector. Among them, the zero vector is represented by PPP, OOO, NNN; the small vector is represented by POO and ONN, PPO and OON, OPO and NON, OPP and NOO, OOP and NNO, POP and NON; the medium vector is represented by PON, OPN, NPO, NOP, ONP, PNO; the large vector is represented by PNN, PPN, NPN, NPP, NNP, PNP.

[0018] The vector space is divided into regions according to the basic voltage vector, with the zero vector as the center and the α axis as the reference. The area between two adjacent large vectors is a region, which is divided into 6 regions in the counterclockwise direction, namely: Figure 3 In which Ⅰ, Ⅱ, Ⅲ, Ⅳ, Ⅴ and Ⅵ represent each vector space region respectively.

[0019] S2, respectively determining the midpoint current of the NPC three-level inverter in the independent switching state for each basic voltage vector, and determining the basic voltage vector causing the midpoint potential shift based on the midpoint current; like Figure 2 As shown, the power device of the NPC three-level inverter is provided with a clamping diode. Due to the existence of the clamping diode, the NPC three-level inverter has the ability to output zero level, but at the same time, it also causes the DC side capacitor to charge and discharge, causing the midpoint potential to shift.

[0020] The basic voltage vector causing the midpoint potential shift is determined based on the midpoint current, specifically in the following manner: Determining an equivalent circuit of the switching state of each basic voltage vector based on the independent switching state of each basic voltage vector; Based on the equivalent circuit diagram of each basic voltage vector, determine the corresponding midpoint current; According to the midpoint current, the basic voltage vector whose midpoint current is not zero is screened out, that is, the basic voltage vector causing the midpoint potential shift.

[0021] This application takes the basic voltage vectors PNN, PON, OON and OOO in the large sector area I as an example. Figure 4 As shown, Figure 4 (a) Equivalent circuit of large vector PNN Figure 3 None of the phases are connected to the midpoint potential, and the midpoint current is 0; Figure 4(b) is the equivalent circuit diagram of the zero vector 000. Assuming the three-phase load is balanced, the midpoint current i NP = i A + i B + i C =0; Figure 4 (c) and (d) are the equivalent circuit diagrams of the middle vector PON and the small vector OON, respectively. It can be seen from the figure that one or two phases are connected to the midpoint potential, and the current flowing through the midpoint potential is not 0, which causes the DC side capacitor to charge and discharge. According to the volt-ampere characteristics of the capacitor, the voltage on both sides of the capacitor will change, so the middle vector and the small vector affect the midpoint voltage offset.

[0022] At the same time, the common-mode voltage u CMV , which is defined as: , In the formula, u AO , u BO , u CO Respectively represent the voltage difference between phase A, phase B, phase C and the midpoint of the DC side.

[0023] Combination Figure 3 , taking the large sector area I as an example, the low common mode voltage switching states affecting the midpoint voltage in the large sector area I include small vectors POO, OON, and a medium vector PON. Similarly, the low common mode voltage switching states affecting the midpoint voltage offset in other large sector areas also include two small vectors and one medium vector.

[0024] S3. The basic voltage vector that causes the midpoint potential shift in a single vector space region is used as an independent switch state, and is combined with a large vector and a zero vector to perform a mode in a single vector space region, specifically: S3.1. Take the ends of the large vectors in the single vector space area as vertices, connect the vertices with the ends of the small vectors on the opposite sides as dividing lines, divide the single vector space area into two triangular areas, and obtain a first dividing mode and a second dividing mode; S3.2. Divide the single vector space region into two triangular regions using the mid vector as a dividing line, thereby obtaining a third division mode.

[0025] This application takes vector space region I as an example. Figure 5 As shown in the figure, in the vector space region I, the basic voltage vectors that affect the midpoint potential are POO, PON, and OON, and the midpoint currents generated by them in the switching state are-i A , i B , -i C Therefore, the modes of vector space region I are divided according to the above method and named as mode 1, mode 2 and mode 3 respectively. Each mode contains a basic voltage vector for adjusting the midpoint potential, and combines it with the large vector and the zero vector to realize the synthesis of the reference voltage.

[0026] S4, determining the expected current according to the capacitor voltage on the DC side of the NPC three-level inverter, and constructing an objective function based on the expected current; The expected current is determined according to the capacitor voltage on the DC side of the NPC three-level inverter, and the formula is: , in, i NP * is the expected current, T s represents the switching period; u c1 , u c2 The DC side capacitors are c 1. c 2The voltage across the terminals; C for c 1. c 2, c1 and c2 are the same capacitance.

[0027] when i NP * <0: u c2 > u c1 , then it is necessary to reasonably increase u c1 and reduce u c2 , that is, removing charge from the midpoint to reduce the deviation of the midpoint potential; when i NP * <0: u c2 < u c1 , the midpoint charge should be increased.

[0028] At the same time, the objective function for midpoint potential control is constructed according to the expected current, and its formula is: , In the formula, i X , dX Represents the voltage vector U X The corresponding midpoint current and duty cycle; f is the objective function value.

[0029] According to the constructed objective function, the midpoint current and duty cycle in different division modes of a single vector space area are calculated respectively, and the difference is made with the expected current. Based on the difference, the optimal division mode with the smallest difference between the midpoint current and the expected current is determined. The zero vector and large vector in this division mode are combined with the basic voltage vector (small vector or medium vector) of the independent switching state to jointly participate in the modulation to achieve the optimal midpoint potential control.

[0030] S5. Performing regional judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter, and determining the corresponding optimal division mode based on the objective function, obtaining each basic voltage vector and the corresponding duty cycle of the synthetic voltage vector, and determining the switching sequence to obtain a PWM (Pulse Width Modulation) wave; The specific method of performing region judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter is as follows: S5.1.1. Determine the vector space region to which the synthetic voltage vector of the NPC three-level inverter belongs; According to the abscissa and ordinate of the composite voltage vector of the NPC three-level inverter in the rectangular coordinate system, the vector space region to which the composite voltage vector belongs is determined.

[0031] S5.1.2. Perform coordinate transformation on the synthetic voltage vector to determine the coordinate value of the synthetic voltage vector in a 60° coordinate system; This application takes vector space region I as an example, and performs coordinate transformation on the synthetic voltage vector. The component of the synthetic voltage vector on the gh axis in the 60° coordinate system is: , In the formula, u a , u b Represent the resultant voltage vector U ref The horizontal and vertical coordinates in the rectangular coordinate system; u dc Indicates the DC side voltage value.

[0032] S5.1.3. Perform region judgment according to the division boundaries of the three division modes of the vector space region to which it belongs, and determine the region where the synthetic voltage vector under different division modes is located; In vector space region I, the division boundaries of the three division modes l1. l 2. l 3 are respectively expressed as: , , , According to the division boundaries of the three division modes, it is possible to determine the specific regional positions of the synthetic voltage vector under different division modes. Similarly, other large sector areas can be obtained by rotating the large sector area I.

[0033] According to the determined area where the synthetic voltage vector of the NPC three-level inverter is located, the corresponding optimal division mode is determined based on the objective function, and the specific method is as follows: S5.2.1. determining a basic voltage vector for synthesizing the voltage vector according to the area where the synthesized voltage vector is located in different division modes; This application is Figure 5 Taking the three division modes of vector space region I as an example, the synthetic voltage vector is divided into region R1.1. The basic voltage vector of region R1.1 includes U OOO , U POO , U PPN , S5.2.2, respectively calculating the duty ratio of the synthesized voltage vector of the determined basic voltage vectors under different division modes; According to the volt-second balance principle, the equation can be established: , In the formula, d 1 , d 2 , d 3 Respectively expressed as voltage vector U OOO , U POO , U PPN Duty cycle; U ref represents the resultant voltage vector.

[0034] The above formula is expressed in the gh coordinate system as: , From the above formula, we can get: .

[0035] Similarly, the duty cycle of the basic voltage vector when the reference vector is located in the area under other division modes can be calculated.

[0036] S5.2.3. Substitute the calculated basic voltage vector and duty cycle under different division modes into the objective function, and determine the optimal division mode according to the objective function value of each division mode.

[0037] The specific method of determining the optimal partitioning mode according to the objective function value of each partitioning mode is as follows: The duty cycle of the basic voltage vector of each division mode is multiplied by the corresponding midpoint current to obtain the offset values ​​of the midpoint potential of different division modes in the same vector space area; Determine the offset value of the point potential and the differential value of the expected current in the three division modes of the same vector space region according to the objective function; The differential mode values ​​of the three division modes are compared, and the division mode with the smallest differential mode value is selected as the optimal division mode.

[0038] According to the determined optimal division mode, the basic voltage vector and the corresponding duty cycle required for synthesizing the voltage vector are obtained, the switching sequence is determined, and the PWM wave is generated based on the switching sequence.

[0039] When determining the switching sequence, it also includes that the switch states P and N cannot be directly switched to prevent the upper and lower bridge arms from being directly connected, so as to improve the stability of the inverter system; and the number of power device switch tube actions of each phase bridge arm of the NPC three-level inverter is the least, thereby reducing switching losses. This application takes vector space region I as an example, and the optimal switching sequence of the vector space region I is shown in the following table:

[0040] Once the duty cycle, optimal division mode and switching sequence of each synthetic voltage vector are determined, a PWM wave modulation signal can be generated.

[0041] Figure 6 It is a schematic diagram comparing the average number of switches in any switching cycle under multiple modulation indices between the five-segment PWM modulation method (FS_SVPWM) provided by the present invention and the RCMV_VSVPWM method based on a virtual voltage vector. It can be seen that the method of the present invention effectively reduces the number of switch tube actions of the inverter.

[0042] Figure 7 , Figure 8 and Fig. 9 This is an experimental waveform diagram of the FS_SVPWM of the present invention when the DC side voltage is 200V. It can be seen that the present invention can well suppress the midpoint potential fluctuation of the NPC three-level inverter, effectively reduce the common-mode voltage amplitude, and can quickly eliminate the midpoint potential deviation.

[0043] In addition, the present invention also provides a SVPWM inverter midpoint potential balance and low common mode voltage modulation system, comprising: A basic vector module is used to determine a basic voltage vector based on different switching states of the NPC three-level inverter, and to divide the vector space into regions according to the basic voltage vector; A midpoint potential module is used to determine the midpoint current of the NPC three-level inverter of each basic voltage vector in an independent switching state, and determine the basic voltage vector causing the midpoint potential shift based on the midpoint current; A mode division module is used to take the basic voltage vector causing the midpoint potential shift in a single vector space region as an independent switch state, and combine it with a large vector and a zero vector to perform mode division in a single vector space region; A function building module, used for determining a desired current according to a capacitor voltage on a DC side of the NPC three-level inverter, and building an objective function based on the desired current; The modulation module is used to make regional judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter, determine the corresponding optimal division mode based on the objective function, obtain the basic voltage vectors and corresponding duty cycle of the synthetic voltage vector, and determine the switching sequence to obtain the PWM wave.

[0044] Finally, a device based on SVPWM inverter midpoint potential balance and low common-mode voltage modulation is also provided, including a processor and a memory, wherein the processor implements the above-mentioned method based on SVPWM inverter midpoint potential balance and low common-mode voltage modulation when executing the program data stored in the memory.

Claims

1. A method for balancing the midpoint potential and modulating the low common mode voltage of an SVPWM inverter, characterized in that: include: S1. Determine a basic voltage vector based on different switching states of the NPC three-level inverter, and divide the vector space into regions according to the basic voltage vector; S2, respectively determining the midpoint current of the NPC three-level inverter in the independent switching state for each basic voltage vector, and determining the basic voltage vector causing the midpoint potential shift based on the midpoint current; S3, taking the basic voltage vector causing the midpoint potential shift in the single vector space region as an independent switch state, and combining it with the large vector and the zero vector to perform pattern division of the single vector space region; S4, determining the expected current according to the capacitor voltage on the DC side of the NPC three-level inverter, and constructing an objective function based on the expected current; S5. Perform regional judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter, determine the corresponding optimal division mode based on the objective function, obtain each basic voltage vector and the corresponding duty cycle of the synthetic voltage vector, and determine the switching sequence to obtain the PWM wave.

2. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 1, characterized in that: The pattern division of a single vector space region described in S3 is specifically as follows: S3.

1. Take the ends of the large vectors in the single vector space area as vertices, connect the vertices with the ends of the small vectors on the opposite sides as dividing lines, divide the single vector space area into two triangular areas, and obtain a first dividing mode and a second dividing mode; S3.

2. Divide the single vector space region into two triangular regions using the mid vector as a dividing line, thereby obtaining a third division mode.

3. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 1, characterized in that: The specific formula of the objective function described in S4 is: ， In the formula, i X , d X Represents the voltage vector U X The corresponding midpoint current and duty cycle; i NP * is the expected current; f is the objective function value.

4. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 3 is characterized in that: The formula for the desired current is: ， in, i NP * is the expected current, T s represents the switching period; u c1 , u c2 The DC side capacitors are c 1. c 2The voltage across the terminals; C for c 1. c 2, c1 and c2 are the same capacitance.

5. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 1, characterized in that: The specific method of performing region judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter in S5 is as follows: S5.1.

1. Determine the vector space region to which the synthetic voltage vector of the NPC three-level inverter belongs; S5.1.

2. Perform coordinate transformation on the synthetic voltage vector to determine the coordinate value of the synthetic voltage vector in a 60° coordinate system; S5.1.

3. Perform region judgment based on the division boundaries of the three division modes of the vector space region to which it belongs, and determine the region where the synthetic voltage vector under different division modes is located.

6. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 1, characterized in that: The specific method of determining the corresponding optimal partitioning mode based on the objective function in S5 is: S5.2.

1. determining a basic voltage vector for synthesizing the voltage vector according to the area where the synthesized voltage vector is located in different division modes; S5.2.2, respectively calculating the duty ratio of the synthesized voltage vector of the determined basic voltage vectors under different division modes; S5.2.

3. Substitute the calculated basic voltage vector and duty cycle under different division modes into the objective function, and determine the optimal division mode according to the objective function value of each division mode.

7. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 6, characterized in that: The specific method of determining the optimal partitioning mode according to the objective function value of each partitioning mode is as follows: The duty cycle of the basic voltage vector of each division mode is multiplied by the corresponding midpoint current to obtain the offset values ​​of the midpoint potential of different division modes in the same vector space area; Determine the offset value of the point potential and the differential value of the expected current in the three division modes of the same vector space region according to the objective function; The differential mode values ​​of the three division modes are compared, and the division mode with the smallest differential mode value is selected as the optimal division mode.

8. The method for balancing the midpoint potential and modulating the low common mode voltage based on the SVPWM inverter according to claim 1, characterized in that: The basic voltage vector causing the midpoint potential shift is determined based on the midpoint current in S2, specifically: Determining an equivalent circuit of the switching state of each basic voltage vector based on the independent switching state of each basic voltage vector; Based on the equivalent circuit diagram of each basic voltage vector, determine the corresponding midpoint current; According to the midpoint current, the basic voltage vector whose midpoint current is not zero is screened out, that is, the basic voltage vector causing the midpoint potential shift.

9. A system for SVPWM inverter midpoint potential balance and low common mode voltage modulation that implements the SVPWM inverter midpoint potential balance and low common mode voltage modulation method according to any one of claims 1 to 8, characterized in that: include: A basic vector module is used to determine a basic voltage vector based on different switching states of the NPC three-level inverter, and to divide the vector space into regions according to the basic voltage vector; A midpoint potential module is used to determine the midpoint current of the NPC three-level inverter of each basic voltage vector in an independent switching state, and determine the basic voltage vector causing the midpoint potential shift based on the midpoint current; A mode division module is used to take the basic voltage vector causing the midpoint potential shift in a single vector space region as an independent switch state, and combine it with a large vector and a zero vector to perform mode division in a single vector space region; A function building module, used for determining a desired current according to a capacitor voltage on a DC side of the NPC three-level inverter, and building an objective function based on the desired current; The modulation module is used to make regional judgment according to the synthetic voltage vector required to be output by the NPC three-level inverter, determine the corresponding optimal division mode based on the objective function, obtain the basic voltage vectors and corresponding duty cycle of the synthetic voltage vector, and determine the switching sequence to obtain the PWM wave.

10. A device based on SVPWM inverter midpoint potential balance and low common mode voltage modulation, characterized in that: It comprises a processor and a memory, wherein when the processor executes the program data stored in the memory, it implements the SVPWM inverter neutral point potential balance and low common mode voltage modulation method as described in any one of claims 1 to 8.

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