A method for sending large data packets in Gigabit network multicast based on FPGA

Through the method of splitting and adding headers of the FPGA transit station, the packet loss problem of DSP and CPU processors sending large packet data in the radar system is solved, and the reliability and efficiency of network data are improved.

CN117640270BActive Publication Date: 2025-08-08CNGC INST NO 206 OF CHINA ARMS IND GRP +1
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Patent Information

Application Number
CN202311492507.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-09
Publication Date
2025-08-08
Estimated Expiration
2043-11-09

AI Technical Summary

Technical Problem

In radar systems, when using DSP, CPU and other processors to multicast and send large packet data in network, packet loss occurs, especially when adapted to domestic operating systems, which affects the reliability and efficiency of network transmission.

Method used

FPGA is used as a transit station, by splitting large packet data into multiple small packets, adding UDP, IP and Ethernet headers layer by layer, and using the internal hard-core TEMAC of FPGA to send data, achieving flexible control of each packet of data, ensuring reliable transmission of data at all layers.

Benefits of technology

It improves the stability and efficiency of sending large packet data in network multicast, avoids the instability of DSP and CPU processors during the operating system adaptation process, and improves the reliability and efficiency of data transmission.

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Abstract

The present invention relates to a method for sending large-packet data via gigabit network multicast based on FPGA, and belongs to the field of gigabit network data transmission for radar systems. The method is used to solve the problem of occasional packet loss when some projects use domestic chips such as DSP and CPU to adapt to domestic operating systems to send large-packet data over the network. When sending large-packet data via FPGA network multicast, there is no need to run an operating system. The user first splits the large-packet data into multiple small packets, and then adds a UDP header, an IP header, and an Ethernet header to the application layer data of each small packet layer by layer to form the network's transport layer, network layer, and data link layer data, so that each layer can be controlled. At the same time, the sending time of each packet of data can be flexibly controlled. Finally, with the help of the hard-core TEMAC inside the FPGA, the final network data is sent to the physical layer. Using FPGA multicast to send large-packet data ensures the reliability and effectiveness of network transmission.
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Description

Technical Field

[0001] The invention belongs to the field of gigabit network data transmission of radar systems, and mainly relates to a method for sending large package data through network multicast based on FPGA. Background Art

[0002] In radar systems, network transmission of data is often used. For radar signal processing systems, it is often necessary to receive control instructions from a terminal or central control machine through the network, and then transmit signal processing trace information, original video information, status information, etc. to other subsystems through the network. For network data transmission between multiple subsystems, the commonly used network transmission method is multicast. The trace information and original video information of the signal processing subsystem often exceed 1472 bytes per time, and even reach 64K bytes. Therefore, they need to be sent in the format of large network packets to improve network transmission efficiency.

[0003] Current radar signal processing systems primarily utilize processors such as DSPs, FPGAs, and CPUs, placing high demands on domestically produced chips and operating systems. However, DSPs and CPUs almost always require an operating system to transmit data over the network. During the adaptation process for these operating systems, some projects have encountered instabilities during debugging, primarily resulting in packet loss when sending large packets through network multicast. DSP and CPU network packet transmission occurs at the lower level, obscuring the control mechanisms. However, using FPGAs to send large network packets through multicast eliminates the need for an operating system, allowing users to clearly understand the transmission information at each layer, facilitating design mastery. Furthermore, the timing of each packet's transmission can be flexibly controlled. Therefore, for signal processing systems that require DSPs to transmit large packets over the network, an FPGA can be considered as a data forwarding hub. The FPGA receives the DSP data via SRIO and then multicasts the large packets over the network, eliminating the need for the DSP to directly transmit network data and improving the reliability of the system's network data transmission. Furthermore, sending large packets through network multicast improves transmission efficiency compared to sending multiple independent packets. Summary of the Invention

[0004] The technical problems to be solved by the present invention are:

[0005] To avoid the problem of occasional packet loss when DSPs and CPUs send large network packets via multicast, the present invention provides a method for sending large network packets via multicast based on FPGA. The method uses FPGA as a transit station to send large network packets via multicast, thereby improving the stability and efficiency of network packet sending.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0007] A method for sending large data packets via Gigabit network multicast based on FPGA, characterized by the following steps:

[0008] Step 1: Determine the destination MAC and IP address when the FPGA network multicasts data. According to IANA regulations, the upper 24 bits of the IPv4 multicast MAC address are 0x01005E, the 25th bit is 0, and the lower 23 bits are the lower 23 bits of the IPv4 multicast IP address. Also determine the destination port. The source MAC address, source IP address, and source port can be set in the FPGA.

[0009] Step 2: Split the large packet into multiple small packets based on the number of bytes of the large packet data to be sent by the application layer. The first packet is 1472 bytes, the second to M-1 packets are 1480 bytes, and the last packet is N-1472-(M-2)*1480 bytes. Where N is the number of bytes of the large packet data and M is the number of small packets.

[0010] Step 3: For the split data packets, only add the UDP header before the first packet data to form the transport layer data; the UDP header contains 8 bytes, namely: source port 2 bytes, destination port 2 bytes, data packet length 2 bytes, checksum 2 bytes; the UDP checksum calculation consists of three parts: UDP pseudo header, UDP header, and data part;

[0011] Step 4: Add an IP header. An IP header must be added before each packet of data to form network layer data. The IP header consists of 20 bytes.

[0012] Step 5: Add an Ethernet header. An Ethernet header must be added before each data packet to form the data link layer data. The Ethernet header contains 14 bytes.

[0013] Step 6: Use the FPGA hard-core TEMAC to send each packet of data through the physical layer.

[0014] A further technical solution of the present invention is as follows: the method for unpacking the large package data in step 2, the total number of small packages after unpacking, and the number of bytes of each small package are all determined strictly according to the maximum number of bytes transmitted by the network.

[0015] A further technical solution of the present invention: When adding an IP header before each small packet data in step 4, special attention should be paid to the setting of the 7th and 8th bytes, and the correct setting of the flag and the fragment offset, so that each small packet data can be restored to large packet data at the network receiving end.

[0016] A further technical solution of the present invention is to add 20 bytes of IP header information, specifically:

[0017] The first and second bytes are fixed to 16'h4500;

[0018] The third and fourth bytes are the sum of the length of the IP header and the data part. The header is fixed at 20 bytes. The data part of packets 1 to 44 is 1480 bytes, and the 45th packet is 395 bytes. Therefore, the two bytes of the first to 44th packets are 16'h05dc, and the two bytes of the 45th packet are 16'h019F.

[0019] The 5th and 6th byte counter values are initialized to 0 after the system is powered on. Each time a large packet of data is sent, the counter value increases by 1. The counter values of each small packet in the large packet are the same.

[0020] The 7th and 8th bytes are the flag bits [15:13] and the fragment offset bits [12:0]. Bit

[13] is MF. MF = 1 indicates "further fragments"; MF = 0 indicates the last fragment. Bit

[14] is DF. Fragmentation is allowed only when DF = 0. Bit

[15] is not used. Bits [12:0] are the fragment offset, which refers to the relative position of a fragment in the original packet after fragmentation. The fragment offset is in units of 8 bytes; the fragment offset for each packet is 1480 / 8*(n-1), where n is 1 to 45.

[0021] The 9th byte is the generation time, which is fixed at 8'h80 here;

[0022] The 10th byte is the protocol type, which is UDP protocol and type 17;

[0023] Numbers 11 and 12 are the IP header checksum. Here, we take packet 45 as an example to calculate the IP header checksum.

[0024] A computer system, characterized in that it includes: one or more processors, and a computer-readable storage medium for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the above-mentioned method.

[0025] A computer-readable storage medium is characterized by storing computer-executable instructions, which are used to implement the above method when executed.

[0026] The beneficial effects of the present invention are:

[0027] The present invention provides an FPGA-based method for sending large-packet data over a gigabit network through multicast. This method can replace the solutions in some projects that use processors such as DSPs and CPUs for network multicast sending of large-packet data. FPGA network packet sending can be controlled by users at every layer, from the application layer, transport layer, network layer, and data link layer, and the timing of sending data packets can be flexibly controlled. In particular, in the early stages of adaptation of domestically produced chips and domestically produced operating systems, there is a certain degree of instability in the sending of large-packet data by DSPs and CPUs, while FPGAs do not have these risks. Furthermore, sending large-packet data also improves network transmission efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings are only for the purpose of illustrating particular embodiments and are not to be considered limiting of the present invention. Like reference symbols denote like parts throughout the drawings.

[0029] Figure 1 Mapping between IPv4 multicast IP addresses and IPv4 multicast MAC addresses.

[0030] Figure 2 Schematic diagram of the FPGA multicast process for sending large data packets.

[0031] Figure 3 UDP header checksum calculation component.

[0032] Figure 4 IP header.

[0033] Figure 5 The UDP header checksum calculation component of the embodiment of the present invention. DETAILED DESCRIPTION

[0034] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only intended to illustrate the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0035] Radar systems frequently use networks for data transmission. Using FPGA gigabit multicast to send large packets can address the occasional packet loss problem experienced by some projects using domestically produced chips such as DSPs and CPUs adapted to domestic operating systems. FPGA network multicast for sending large packets eliminates the need to run an operating system. Users first split the large data packet into multiple smaller packets and then add the UDP, IP, and Ethernet headers to each application layer, layer by layer, to construct the network's transport, network, and data link layers. This allows for control at every layer and allows for flexible control of the timing of each packet's transmission. Finally, the FPGA's internal hardcore TEMAC (Telecommunications and Access Control) core is used to transmit the final network data to the physical layer. Using FPGA multicast to send large packets ensures both reliable and efficient network transmission.

[0036] The embodiment of the present invention provides a method for sending large data packets via Gigabit multicast based on FPGA, comprising the following steps:

[0037] Step 1: Determine the destination MAC and IP address when the FPGA network multicasts data. According to IANA regulations, the upper 24 bits of the IPv4 multicast MAC address are 0x01005E, the 25th bit is 0, and the lower 23 bits are the lower 23 bits of the IPv4 multicast IP address. Also determine the destination port. The source MAC address, source IP address, and source port can be set in the FPGA.

[0038] Step 2: Split the large packet into multiple small packets (M) based on the number of bytes (N) of the large packet data to be sent by the application layer. The first packet is 1472 bytes, the second to M-1 packets are 1480 bytes, and the last packet is N-1472-(M-2)*1480 bytes.

[0039] Step 3: For the split data packets, only add the UDP header before the first packet data to form the transport layer data. The UDP header contains 8 bytes: 2 bytes for the source port, 2 bytes for the destination port, 2 bytes for the packet length, and 2 bytes for the checksum. The UDP checksum calculation consists of three parts: the UDP pseudo header, the UDP header, and the data portion.

[0040] Step 4: Add an IP header. Each packet must be preceded by an IP header to form the network layer data. The IP header contains 20 bytes. When sending small packets that are split from a large packet, pay special attention to the flags in bytes 7 and 8 and the fragment offset information. It is precisely because of the association of this information that multiple small packets can be combined into a large packet.

[0041] Step 5: Add an Ethernet header. An Ethernet header must be added before each data packet to form the data link layer data. The Ethernet header contains 14 bytes.

[0042] Step 6: Use the FPGA hard-core TEMAC to send each packet of data through the physical layer.

[0043] The above steps are as follows:

[0044] Step 1: Set the destination MAC, destination IP, source MAC, source IP, destination port, and source port for the FPGA multicast. Set the destination MAC to 01-00-5E-05-06-1A, the destination IP to E6-05-06-1A, the source MAC to 00-11-22-33-44-55, the source IP to 10-00-02-01, the destination port to 16'd6026, and the source port to 16'd49607.

[0045] Step 2: The large packet sent is set to 65507 bytes, with the first byte set to 8'h50 and the remaining 65504 bytes set to 8'h33. The data is split into 45 packets, with the first packet containing 1472 bytes, packets 2 to 44 containing 1480 bytes, and packet 45 containing 395 bytes.

[0046] Step 3: Add 8 bytes of UDP header information. In order: source port, destination port, data length, checksum. The data length is the total number of bytes of data to be sent (65507) plus the number of bytes of UDP header (8), which is 65515. The specific calculation of the checksum is as follows: Figure 5 As shown:

[0047] Step 1: Calculate the pseudo header 0x1000+0x0201+0xe605+0x061a+0x0011+0xffeb=0x1fe1c;

[0048] Step 2: Calculate the header 0xc1c7+0x178a+0xffeb+0x0000=0x1d93c;

[0049] Step 3: Calculate the data part 0x5033+0x3333*0x7ff0+0x3300=0x1996d003;

[0050] step4: 0x0001+0xfe1c+0x0001+0xd93c+0x1996+0xd003=0x2c0f3;

[0051] step5: 0x0002+0xc0f3=0xc0f5;

[0052] Step 6: Invert the checksum to get 0x3f0a.

[0053] The final 8-byte UDP header information is: c1 c7 17 8a ff eb 3f 0a.

[0054] Step 4: Add the IP header 20 bytes of information.

[0055] The first and second bytes are fixed to 16'h4500;

[0056] The third and fourth bytes are the sum of the length of the IP header and the data part. The header is fixed at 20 bytes. The data part of packets 1 to 44 is 1480 bytes, and the 45th packet is 395 bytes. Therefore, the two bytes of the first to 44th packets are 16'h05dc, and the two bytes of the 45th packet are 16'h019F.

[0057] The 5th and 6th byte counter values are initialized to 0 after the system is powered on. Each time a large packet of data is sent, the counter value increases by 1. The counter values of each small packet in the large packet are the same.

[0058] The 7th and 8th bytes are the flag bits [15:13] and the fragment offset bits [12:0]. Bit

[13] is MF. MF = 1 indicates "further fragments"; MF = 0 indicates the last fragment. Bit

[14] is DF. Fragmentation is allowed only when DF = 0. Bit

[15] is not used. Bits [12:0] are the fragment offset, which refers to the relative position of a fragment in the original packet after fragmentation. The fragment offset is in units of 8 bytes; the fragment offset for each packet is 1480 / 8*(n-1), where n is 1 to 45.

[0059] The 9th byte is the generation time, which is fixed at 8'h80 here;

[0060] The 10th byte is the protocol type, which is UDP protocol and type 17;

[0061] Bytes 11 and 12 are the IP header checksum. Here, we take packet 45 as an example to calculate the IP header checksum. Assuming that the counter values of bytes 5 and 6 are 0x02d0 at this moment, the checksum is calculated as follows:

[0062] step1:

[0063] 0x4500+0x019f+0x02d0+0x1fcc+0x8011+0x0000+0x1000+0x0201+0xe605+0x061a=0x1e76c;

[0064] step2: 0x0001+0xe76c=0xe76d;

[0065] Step 3: Invert the checksum to get 0x1892.

[0066] Bytes 13 to 16 are the source IP address, 32'h10_00_02_01;

[0067] Bytes 17 to 20 are the destination IP address, 32'he6_05_06_1a.

[0068] Therefore, the IP header of packet 45 is: 45 00 01 9f 02d0 1f cc 80 11 18 92 10 00 0201e6 05 061a.

[0069] Step 5: Add the 14-byte Ethernet header, including the destination MAC, source MAC, and type. The 14-byte information is: 01 005e 05 06 1a 00 11 22 33 44 55 08 00.

[0070] Step 6: Use the TEMAC hard core inside the FPGA to send the combined data link layer packet data to the physical layer.

[0071] The above description is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with this technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present invention, and these modifications or replacements should all be included in the scope of protection of the present invention.

Claims

1. A method for sending large data packets in a gigabit network multicast based on FPGA, characterized in that Here are the steps: Step 1: Determine the destination MAC and IP address when the FPGA network multicasts data. According to IANA regulations, the upper 24 bits of the IPv4 multicast MAC address are 0x01005E, the 25th bit is 0, and the lower 23 bits are the lower 23 bits of the IPv4 multicast IP address. Also determine the destination port. The source MAC address, source IP address, and source port can be set in the FPGA. Step 2: Split the large packet into multiple small packets based on the number of bytes of the large packet data to be sent by the application layer. The first packet is 1472 bytes, the second to M-1 packets are 1480 bytes, and the last packet is N-1472-(M-2)*1480 bytes. Where N is the number of bytes of the large packet data and M is the number of small packets. Step 3: For the split data packets, only add the UDP header before the first packet data to form the transport layer data; the UDP header contains 8 bytes, namely: source port 2 bytes, destination port 2 bytes, data packet length 2 bytes, checksum 2 bytes; the UDP checksum calculation consists of three parts: UDP pseudo header, UDP header, and data part; Step 4: Add an IP header. An IP header must be added before each packet of data to form the network layer data. The IP header contains 20 bytes. When adding an IP header before each packet of data in step 4, special attention must be paid to the settings of bytes 7 and 8, the correct setting of flags and fragment offsets, so that each packet of data can be restored to a large packet at the receiving end of the network. The 20-byte information of the added IP header is specifically as follows: The first and second bytes are fixed to 16'h4500; The third and fourth bytes are the sum of the length of the IP header and the data part. The header is fixed at 20 bytes. The data part of packets 1 to 44 is 1480 bytes, and the 45th packet is 395 bytes. Therefore, the two bytes of the first to 44th packets are 16'h05dc, and the two bytes of the 45th packet are 16'h019F. The 5th and 6th byte counter values are initialized to 0 after the system is powered on. Each time a large packet of data is sent, the counter value increases by 1. The counter values of each small packet in the large packet are the same. The 7th and 8th bytes are the flag bit[15:13] and the fragment offset bit[12:0]. Bit[13] is MF. MF=1 means "there are more fragments" and MF=0 means the last fragment. Bit[14] is DF. Fragmentation is allowed only when DF=0. Bit[15] is not used. Bit[12:0] is the fragment offset, which refers to the relative position of a fragment in the original packet after the fragmentation of a longer packet. The fragment offset is in units of 8 bytes. The fragment offset of each packet is 1480 / 8*(n-1), where n is 1 to 45. The 9th byte is the generation time, which is fixed at 8'h80 here; The 10th byte is the protocol type, which is UDP protocol and type 17; 11 and 12 are the IP header checksums. Here we take the 45th packet as an example to calculate the IP header checksum. Step 5: Add an Ethernet header. An Ethernet header must be added before each data packet to form the data link layer data. The Ethernet header contains 14 bytes. Step 6: Use the FPGA hard-core TEMAC to send each packet of data through the physical layer.

2. The method for sending large data packets via Gigabit network multicast based on FPGA according to claim 1, wherein: The method for unpacking the large packet data in step 2, the total number of small packets after unpacking, and the number of bytes of each small packet are all determined strictly according to the maximum number of bytes transmitted by the network.

3. A computer system, characterized in that include: One or more processors, and a computer-readable storage medium for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors are enabled to implement the method of claim 1.

4. A computer-readable storage medium, characterized in that Computer-executable instructions are stored, and when the instructions are executed, they are used to implement the method of claim 1.

Citation Information

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