A multi-frequency equal-amplitude non-harmonic electric prospecting signal sending device and method

Abstract

The application discloses a kind of multi-frequency equal amplitude harmonic-free electric prospecting signal sending device, including single-chip microcomputer, single-chip microcomputer is connected with the input of FPGA, the output of FPGA is connected with the input of DAC digital-analog conversion module, the output of DAC digital-analog conversion module is connected with the input of several isolation amplification circuits, the output of each isolation amplification circuit is connected with the input of a differential amplification module, the output of each differential amplification module is connected with the input of a digital power amplification circuit, the output of several digital power amplification circuits is cascaded and output to ground electrode A, B, and forms a loop with ground;The input of sensor module is connected with digital power amplification circuit, and the output of sensor module is connected with single-chip microcomputer.The electric (magnetic) prospecting signal output by the device is significantly different from the signal generated by the full-bridge inverter transmitter, only the main frequency, without harmonic components, can effectively suppress electromagnetic coupling interference.

Description

Technical Field

[0001] This invention relates to the field of electrical exploration, and in particular to a multi-frequency constant amplitude harmonic-free electrical exploration signal transmission device and method. Background Technology

[0002] Based on their measurement principles, frequency-domain induced polarization (IP) methods can be categorized into frequency conversion methods, odd harmonic methods, dual-frequency IPI methods, and pseudo-random IPI methods. Commonly used IPI signals include frequency conversion signals, dual-frequency rectangular wave signals, and pseudo-random combined rectangular wave signals. The frequency conversion method transmits and receives rectangular wave signals of a single frequency each time, measuring by sequentially changing the frequencies of the transmitted and received signals. The odd harmonic method transmits a rectangular wave signal formed by the superposition of the fundamental wave and a series of odd harmonics. It can receive observations of the fundamental wave and multiple harmonics, enabling simultaneous measurement of multiple frequencies. However, analysis of the rectangular wave's spectrum reveals that the amplitude of each harmonic decreases with increasing order. Therefore, the odd harmonic method can only measure the fundamental wave and harmonics less than 13th orders (such as the 3rd and 5th harmonics) to ensure the signal-to-noise ratio of the observed signal. The pseudo-random signal scheme is used for... n Encoding a sequence of pseudo-random multi-frequency signals involves simultaneously feeding n different frequencies underground, allowing the extraction of responses from all n frequencies in a single operation. Dual-frequency signals can be considered a special case of pseudo-random signals. Spectral analysis reveals a small difference in amplitude between the two dominant frequencies of the dual-frequency signal. Because the fundamental wave of the higher-frequency rectangular wave contains a higher-order harmonic component of the lower-frequency rectangular wave, the received amplitudes of the dual-frequency signals are not equal.

[0003] Since the application of frequency-domain induced polarization (EPD) methods, electromagnetic induction coupling has been one of the main factors affecting the exploration results. Experimental studies have found that electromagnetic coupling interference occurs at the instant the electrical exploration signal is switched on or off. The induced coupling waveform in the time domain is characterized by a high spike formed at the waveform transition edge, mainly caused by high-order harmonic components in the electrical exploration signal. However, current electrical and electromagnetic exploration transmitters generally use drive signals to control the switching on and off of bridge inverter switches, converting the external DC power supply of the transmitter into the required rectangular wave current output. Specifically, existing electrical (magnetic) exploration transmitters can only transmit transitional rectangular wave signals, which contain abundant harmonic components. These harmonic components ultimately become interference sources at the receiver, forming electromagnetic coupling spikes and harmonic pollution, affecting the quality and accuracy of the observation data. Furthermore, when using rectangular wave current to supply power to the ground, although the power conversion efficiency of the inverter in the transmitter output stage is relatively high, only the fundamental component of the rectangular wave is often used when receiving signals, and the actual utilization rate of the transmitter output energy is not very high.

[0004] In the field of electrical (magnetic) exploration, high-voltage harmonic-free dual-frequency equal-amplitude or multi-frequency equal-amplitude signals are recognized as ideal artificial source signals in the field. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a simple multi-frequency equal-amplitude harmonic-free electrical resistivity tomography (ERT) signal transmitting device and a method for transmitting multi-frequency equal-amplitude harmonic-free ERT signals.

[0006] The technical solution of this invention to solve the above problems is: a multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device, comprising a microcontroller, an FPGA, a DAC digital-to-analog converter module, an isolation amplifier circuit, a differential amplifier module, a digital power amplifier circuit, and a sensor module. The microcontroller is connected to the input terminal of the FPGA, the output terminal of the FPGA is connected to the input terminal of the DAC digital-to-analog converter module, the output terminal of the DAC digital-to-analog converter module is connected to the input terminals of several isolation amplifier circuits, the output terminal of each isolation amplifier circuit is connected to the input terminal of a differential amplifier module, the output terminal of each differential amplifier module is connected to the input terminal of a digital power amplifier circuit, and the output terminals of several digital power amplifier circuits are cascaded and output to ground electrodes A and B, forming a loop with the ground. The input terminal of the sensor module is connected to the digital power amplifier circuit, and the output terminal of the sensor module is connected to the microcontroller. The FPGA outputs sinusoidal signals with multiple frequency combinations as digital signals. The DAC (Digital-to-Analog Converter) module converts the digital signals into analog signals. After processing, the desired signal source is obtained. The signal source is then isolated and amplified by an isolation amplifier circuit. Next, the voltage range of the signal source is adjusted by a differential amplifier module to ensure that the voltage output range of the preceding stage perfectly matches the input voltage range of the following stage. After power amplification by a power amplifier module, the signal source outputs artificial source electrical resistivity tomography signals to the ground via grounding electrodes A and B in a single-channel, multi-channel parallel, or multi-channel cascade manner.

[0007] The aforementioned multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device also includes an LCD display module, an SD card storage module, an audible and visual alarm module, and a GPS synchronization module. The LCD display module, SD card storage module, audible and visual alarm module, and GPS synchronization module are all connected to a microcontroller.

[0008] The aforementioned multi-frequency constant amplitude harmonic-free electrical resistivity tomography (EPT) signal transmitting device also includes an overvoltage, overcurrent, and overheat protection module, independent power supplies, and normally open relays. Each independent power supply is connected to one normally open relay, and each normally open relay has two sets of normally open contacts, which control the on / off state of the positive and negative power supplies in one independent power supply, respectively. Each normally open relay is connected to a digital power amplifier circuit to power the digital power amplifier circuit. The input terminal of the overvoltage, overcurrent, and overheat protection module is connected to a microcontroller, and the output terminal of the overvoltage, overcurrent, and overheat protection module is connected to several normally open relays.

[0009] The aforementioned multi-frequency constant amplitude harmonic-free electrical resistivity tomography signal transmitting device, when outputting in a cascaded manner with 4 output terminals, has an output voltage of 400Vpp and an output current of over 1.5A.

[0010] The aforementioned multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device, when outputting in parallel with 4 output terminals, has an output voltage of 100Vpp and an output current of over 6A.

[0011] The aforementioned multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device uses a voltage transformer ZMPT101B, a current sensor ACS712ELCTPR, and a temperature sensor DS18B20 as its sensor module.

[0012] The aforementioned multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device also includes a keyboard module, which is connected to a microcontroller and an FPGA.

[0013] The aforementioned multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device uses an STM32F103ZET6 microcontroller, an EP4CE10E22C8N FPGA, an AD9767ASTZ main chip for the DAC digital-to-analog converter module, an ISO124U isolation amplifier chip, and a TDA8920CTH power amplifier.

[0014] The aforementioned multi-frequency equal-amplitude harmonic-free electrical exploration signal transmitting device is also suitable for transmitting electromagnetic exploration signals. In the fields of electrical and electromagnetic exploration, this device can be used to generate high-voltage single-frequency, dual-frequency equal-amplitude, or multi-frequency equal-amplitude harmonic-free artificial source signals.

[0015] A method for transmitting multi-frequency, constant-amplitude, harmonic-free electrical resistivity tomography signals includes the following steps: (1) FPGA initialization, system clock signal reset; (2) Define the DA data output clock and the port type of the output channel; (3) Define the frequency control word and the phase control word; (4) Definition of registers, including the definition of the accumulator register, phase register, and ROM register; (5) Instantiate the lookup table and store the data table containing signal waveform information in the ROM for easy subsequent calls; (6) Generate a phase accumulator, which accumulates the phase every clock cycle, and controls the frequency of the generated signal by changing the value of the frequency control word through the button. (7) Generate the lookup table address, call the ROM and change the value of the phase control word by pressing the button to control the initial phase of the generated signal; (8) Wait for the DDS enable command. If the condition statement is true, output a digital signal. If it is false, remain in the waiting state. (9) Wait for the DA clock signal. When the first rising edge of the clock signal arrives, the digital signal output in the previous step is acquired. After all data acquisition is completed, the digital signal is converted into an analog signal and the analog signal is output when the falling edge arrives. This completes the generation of single-frequency or dual-frequency equal-amplitude or multi-frequency equal-amplitude sine signals. If the DA clock signal is not received, digital signal acquisition cannot be performed, and the waiting state is maintained.

[0016] The beneficial effects of this invention are as follows: 1. The device of the present invention can output high-precision, high-power high-voltage sine wave or combined sine wave signal. Typical examples are frequency conversion sine wave, dual-frequency combined sine wave and multi-frequency combined sine wave signal, such as five-frequency combined sine wave signal.

[0017] 2. The electrical or electromagnetic exploration signals output by the device of the present invention are significantly different from the signals generated by the full-bridge inverter transmitter. They only contain the main frequency and do not contain any harmonic components, which can effectively suppress electromagnetic coupling interference.

[0018] 3. The electrical or electromagnetic exploration signals output by the device of the present invention have equal amplitudes at each main frequency in the spectrum diagram, and the energy distribution is uniform. Sufficient response can be obtained without increasing the current, which improves the signal-to-noise ratio of the received signal in exploration work and improves the data acquisition quality.

[0019] 4. The dual-frequency or multi-frequency harmonic-free electrical exploration signal or the low-to-medium frequency harmonic-free electromagnetic exploration signal output by the device of the present invention has equal amplitude of each main frequency, which can eliminate the receiver normalization calibration process, simplify the receiver circuit design, and make construction easier.

[0020] 5. The electrical exploration signal output by the device of the present invention has undergone both analog differential amplification and digital power amplification, and the output voltage range can be flexibly adjusted. The entire instrument is lightweight and portable, and is suitable for exploration occasions with complex terrain. Attached Figure Description

[0021] Figure 1 This is a block diagram of the overall structure of the present invention.

[0022] Figure 2 This is a schematic diagram of the single-channel signal output circuit of the present invention.

[0023] Figure 3 This is a schematic diagram of the isolation amplifier circuit of the present invention.

[0024] Figure 4 This is a schematic diagram of the digital power amplifier circuit of the present invention.

[0025] Figure 5 This is a flowchart of the method of the present invention.

[0026] Figure 6 This is a single-frequency signal waveform diagram of the present invention, wherein... Figure 6 (a) shows a single-frequency rectangular wave and its spectrum. Figure 6 (b) shows the single-frequency sinusoidal signal and its spectrum of the present invention.

[0027] Figure 7 This is a waveform diagram of the dual-frequency signal of the present invention, wherein... Figure 7 (a) shows a dual-frequency rectangular wave and its spectrum. Figure 7 (b) shows the dual-frequency sinusoidal signal and its spectrum diagram of the present invention.

[0028] Figure 8 This is a waveform diagram of the five-frequency signal of the present invention, wherein... Figure 8 (a) shows a traditional five-frequency rectangular wave and its spectrum. Figure 8 (b) shows the five-frequency sinusoidal signal waveform and its spectrum diagram of the present invention. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0030] like Figure 1As shown, a multi-frequency, constant-amplitude, harmonic-free electrical resistivity tomography (EDT) signal transmitting device includes a microcontroller 1, an FPGA 2, a DAC (digital-to-analog converter) module 3, an isolation amplifier circuit 4, a differential amplifier module 5, a digital power amplifier circuit 6, a sensor module, an LCD display module, an SD card storage module, an audible and visual alarm module, a GPS synchronization module, an overvoltage, overcurrent, and overheat protection module, an independent power supply, a normally open relay, and a keyboard module. The microcontroller 1 is connected to the input terminal of the FPGA 2, and the keyboard module is connected to both the microcontroller 1 and the FPGA 2 to generate the signal source. The output terminal of the FPGA 2 is connected to the DAC (digital-to-analog converter) module. The input terminal of the analog-to-analog converter module 3 is connected to the input terminal of the DAC digital-to-analog converter module 3, and the output terminal of the DAC digital-to-analog converter module 3 is connected to the input terminal of the four isolation amplifier circuits 4 to prevent mutual interference between the preceding and following stages; the output terminal of each isolation amplifier circuit 4 is connected to the input terminal of a differential amplifier module 5, and the output terminal of each differential amplifier module 5 is connected to the input terminal of a digital power amplifier circuit 6. The output terminals of the four digital power amplifier circuits 6 are cascaded and output to ground electrodes A and B, forming a loop with the ground; the input terminal of the sensor module is connected to the digital power amplifier circuit 6, and the output terminal of the sensor module is connected to the microcontroller 1.

[0031] The device of this invention uses DDS technology to generate the required waveform in an FPGA+DAC mode. FPGA2 outputs a sine wave signal composed of multiple frequency combinations as a digital signal. In dual-channel mode, the DAC digital-to-analog converter module 3 has 14-bit binary digital input terminals (14 lines) of each channel connected to FPGA2 to receive digital signals. Both can convert digital signals into analog signals and output a smooth and clean sine wave. The DAC digital-to-analog converter module 3 includes a current-to-voltage conversion circuit and a voltage amplification circuit, which converts the differential current signal output by the DAC chip into a voltage signal and can adjust the output range of the output voltage signal. In this invention, the DAC can simultaneously output two signals. The signal processing section obtains the desired signal source. To meet the high voltage and large current output requirements of electrical exploration, a multi-stage cascaded digital power amplifier is used for external output. An isolation amplifier circuit 4 is designed to achieve electrical isolation between the signal source and the subsequent circuits. The isolated amplified signal is differentially amplified according to the requirements of the digital power amplifier devices. The voltage range of the signal source is adjusted so that the voltage output range of the preceding stage perfectly matches the input voltage range of the following stage. The signal is then amplified by a power amplifier module and directly connected to grounding electrodes A and B to form a loop with the ground. Alternatively, the outputs of multiple digital power amplifiers can be cascaded to supply power to the ground, thus realizing the transmission and output of the entire multi-frequency, constant-amplitude, harmonic-free electrical (magnetic) exploration signal. It features real-time monitoring of voltage, current, and temperature, audible and visual alarms, and overvoltage, overcurrent, and overheat protection functions.

[0032] The LCD display module, SD card storage module, audible and visual alarm module, and GPS synchronization module are all connected to the microcontroller 1. The LCD display shows the transmitter's current temperature, time, output voltage, current value, and remaining storage capacity on the SD card. The SD card storage module saves information such as the output signal voltage, current, and temperature of each signal transmission in the form of a file. The GPS module ensures the frequency accuracy of the transmitter's multi-channel output signals and maintains precise synchronization with the receiver equipped with a GPS module. Each independent power supply is connected to a normally open relay, and each normally open relay has two sets of normally open contacts, which control the on / off state of the positive and negative power supplies in one independent power supply. Each normally open relay is connected to a digital power amplifier circuit 6 to power the digital power amplifier circuit 6. The input terminal of the overvoltage, overcurrent, and overheat protection module is connected to the microcontroller 1, and the output terminal of the overvoltage, overcurrent, and overheat protection module is connected to several normally open relays.

[0033] When the device outputs in a cascaded configuration of 4 output channels, the output voltage reaches 400Vpp and the output current exceeds 1.5A. When the device outputs in a parallel configuration of 4 output channels, the output voltage reaches 100Vpp and the output current exceeds 6A.

[0034] The sensor module employs a voltage transformer ZMPT101B, a current sensor ACS712ELCTPR, and a temperature sensor DS18B20. The input terminals of the voltage transformer and the current transformer are connected to a digital power amplifier circuit, while the temperature sensor is positioned close to the digital power amplifier circuit. The DS18B20 temperature sensor can be considered as a TO92 plastic packaged sensor used to sense the temperature of a heat source.

[0035] The microcontroller 1 uses the STM32F103ZET6 chip, the FPGA 2 uses the EP4CE10E22C8N chip, the main chip of the DAC digital-to-analog converter module 3 is AD9767ASTZ, the isolation amplifier chip is ISO124U, and the power amplifier model is TDA8920CTH.

[0036] Under GPS or wired synchronization, this device can output a 400Vpp, 1.5A combined sinusoidal current in a cascaded configuration of four output channels. Cascading the outputs of two such devices can output 800Vpp, 1.5A current. This invention has the potential to further increase the output voltage and current. The transmitted artificial source electro-magnetic (EMT) exploration signal contains no harmonic components, effectively suppressing electromagnetic coupling spikes and harmonic interference when using rectangular wave output in traditional frequency domain EMT and EMT methods, and significantly reducing voltage spikes and harmonic pollution during receiver signal reception.

[0037] like Figure 1As shown, the device of this invention uses the ARM32-bit STM32 microcontroller as the main control chip. After powering on, the STM32 microcontroller is first started to initialize the system clock, LCD display module, SD card storage module, and GPS synchronization module of the device, and then enters standby mode. After pressing the work button, the device enters the working mode. The LCD display module will display information such as signal type selection, start transmission time, end transmission time, transmission voltage, output current, digital power amplifier temperature, SD card storage status, and current time. The user can select the type, frequency, and phase of the signal to be transmitted by the FPGA using the buttons, and then press the start button to transmit the signal. After the work is completed, press the button to end the transmission. After receiving the level signal of the transmitted signal, the FPGA sends the specified digital signal according to the command requirements, which is converted into an analog signal by the DAC digital-to-analog converter module. The signal obtained at this time is a low voltage signal. After being isolated and amplified by the linear isolation amplifier circuit 4, the voltage range of the signal is adjusted by the differential amplifier module and adapted to the input voltage range of the digital power amplifier module. The adjusted signal is input to the power amplifier module. After power amplification, the output voltage waveform signal of the multi-frequency equal amplitude harmonic-free electromagnetic (magnetic) exploration signal transmitter of the present invention is obtained. The output terminal of the transmitter is connected to the ground electrode A and the ground electrode B respectively to form a transmission circuit and supply power to the ground.

[0038] Reference Figure 2 ,like Figure 2 The diagram shows the schematic of a single-channel signal output circuit. This invention can output multi-frequency, equal-amplitude, harmonic-free electromagnetic (magnetic) exploration signals via a single channel, or it can cascade four isolated amplification channels to output high-voltage artificial-source electromagnetic (magnetic) exploration signals. The circuit design of the four isolated amplification channels is exactly the same as that of the single channel. The following explanation, based on the schematic diagram of the single-channel signal generation and isolated amplification output circuit, illustrates the generation principles of a single-frequency sine wave signal, a 4Hz and 4 / 13Hz dual-frequency combined sine wave signal, and a five-frequency combined sine wave signal.

[0039] The FPGA+DAC mode generates different types of sinusoidal or combined sinusoidal signals. If it is a single-frequency sinusoidal signal, the FPGA only outputs one digital signal to one digital input channel of the DAC, and no signal is generated on the other channel. If it is a dual-frequency signal, the FPGA outputs a 4Hz signal and a 4 / 13Hz signal to the two digital input channels of the DAC, respectively. If it is a five-frequency signal, the FPGA outputs a combined digital signal of two frequencies to one digital input channel of the DAC, and outputs a combined digital signal of three frequencies to the other digital input channel of the DAC. The DAC converts the digital signal into an analog signal and outputs it from the two output terminals of the DAC. The output terminals of the DAC are connected to the left ends of R1 and R2, and the two signals are sent to the inverting amplifier circuit composed of R1, R2, R3, R4 and operational amplifier U1. The right end of resistor R1 is connected to the inverting input of operational amplifier U1, the right end of resistor R2 is connected to the non-inverting input of operational amplifier U1, the upper end of resistor R3 is connected to the non-inverting input of operational amplifier U1, and the lower end of resistor R3 is grounded. The left end of resistor R4 is connected to the inverting input of operational amplifier U1, and the right end of resistor R4 is connected to the output of operational amplifier U1. Operational amplifier U1 is powered by a dual power supply of +5V and -5V. Signals 1 and 2 pass through the operational circuit and output a dual-frequency sine wave signal of 4Hz and 4 / 13Hz from the output of operational amplifier U1. After isolation and amplification, the signal flows in from the left end of resistor R5. A differential amplifier circuit composed of resistors R5, R6, R7, R8 and operational amplifiers U3 and U4 completes the differential conversion of the signal to obtain a signal that conforms to the voltage input range of the power amplifier chip. After passing through a digital power amplifier circuit, the output voltage and output current that meet the requirements of electrical prospecting are obtained. Power is supplied to the ground through grounding electrodes A and B.

[0040] refer to Figure 3 ,like Figure 3The diagram shows the isolation amplifier circuit of the device of this invention. The main chip is the ISO124 high-precision linear isolation amplifier, which enables the signal to be transmitted digitally through a 2pF differential capacitor isolation layer. The differential current signal is output from the DAC circuit within the chip and converted into a voltage signal by a current-to-voltage conversion circuit. The input signal of the isolation amplifier circuit is input from the pin marked VIN of the ISO124 chip. After being isolated and amplified by the chip, the signal flows into the subsequent signal conditioning circuit. The subsequent conditioning circuit is a voltage follower composed of resistors R1 and R2 and operational amplifier U2. The signal output from pin 13 of the ISO124 is connected to the left end of resistor R1, and the right end of resistor R1 is connected to the non-inverting input of the operational amplifier. The left end of resistor R2 is connected to the inverting input of the operational amplifier, and the right end of R2 is connected to the output of the operational amplifier. The isolated and amplified signal is output to the next stage circuit (differential amplifier circuit) from the pin marked VOUT (i.e., the output of the operational amplifier). Both the ISO124 and the operational amplifier are powered by a dual power supply of ±5V.

[0041] Reference Figure 4 , Figure 4 The diagram shows the digital power amplifier circuit of this invention. The digital power amplifier section of this invention consists of a TDA8920CTH chip and its peripheral circuitry. Specifically, the chip is powered by a ±30V power supply. VDDP is connected to the +30V power supply, VDDA is connected to VDDP via resistor R4, VSSP is connected to the -30V power supply, and VSSA is connected to VSSP via resistor R5. Pin 6 is the chip's mode selection pin, which, together with resistors R1 and R2, capacitor C1, and terminal J1, puts the chip into the corresponding operating mode. Terminal J1 is the startup voltage input terminal, connected to the +5V power supply. Pin 4 of the chip is the negative audio input terminal of the on-chip power amplifier 2, pin 5 is the positive audio input terminal of the on-chip power amplifier 2, pin 9 is the negative audio input terminal of the on-chip power amplifier 1, pin 8 is the positive audio input 1 of the on-chip power amplifier 1, and J2 is the signal input terminal of the digital power amplifier. This invention adopts a single-channel signal input. The positive input terminal of the on-chip power amplifier 2 is connected to the negative input terminal of the power amplifier 1 and connected to pin 1 of the signal input terminal J2. The negative input terminal of the power amplifier 2 is connected to the positive input terminal of the power amplifier 1 and connected to pin 2 of the signal input terminal J2. Pins 21 and 16 are the differential current output terminals after power amplification.

[0042] The aforementioned multi-frequency equal-amplitude harmonic-free electrical exploration signal transmitting device is also suitable for transmitting electromagnetic exploration signals. In the fields of electrical and electromagnetic exploration, this device can be used to generate high-voltage single-frequency, dual-frequency equal-amplitude, or multi-frequency equal-amplitude harmonic-free artificial source signals.

[0043] Reference Figure 5 The device of this invention adopts the DDS principle, and the software flowchart of signal generation by FPGA+DAC is as follows. Figure 5 As shown, it includes the following steps: (1) FPGA initialization, system clock signal reset; (2) Define the DA data output clock and the port type of the output channel; (3) Define the frequency control word and the phase control word; (4) Definition of registers, including the definition of the accumulator register, phase register, and ROM register; (5) Instantiate the lookup table and store the data table containing signal waveform information in the ROM for easy subsequent calls; (6) Generate a phase accumulator, which accumulates the phase every clock cycle, and controls the frequency of the generated signal by changing the value of the frequency control word through the button. (7) Generate the lookup table address, call the ROM and change the value of the phase control word by pressing the button to control the initial phase of the generated signal; (8) Wait for the DDS enable command. If the condition statement is true, output a digital signal. If it is false, remain in the waiting state. (9) Wait for the DA clock signal. When the first rising edge of the clock signal arrives, the digital signal output in the previous step is acquired. After all data acquisition is completed, the digital signal is converted into an analog signal and the analog signal is output when the falling edge arrives. This completes the generation of single-frequency or dual-frequency equal-amplitude or multi-frequency equal-amplitude sine signals. If the DA clock signal is not received, digital signal acquisition cannot be performed, and the waiting state is maintained.

[0044] Reference Figure 6 , Figure 6 (a) shows the waveform and spectrum of a single-frequency rectangular wave. Figure 6 (b) shows the waveform and spectrum of the sine wave generated by this invention. By comparing the spectrum diagrams, it can be concluded that the rectangular wave is formed by superimposing a sine wave as the main frequency with other multiple harmonics. This invention directly generates a single-frequency sinusoidal current output without harmonic components.

[0045] Reference Figure 7 , Figure 7 (a) shows the waveform and spectrum of the dual-frequency combined rectangular wave. Figure 7 (b) shows the waveform and spectrum of the dual-frequency combined sine wave generated by this invention. By comparing the spectrum diagrams, it can be concluded that the dual-frequency combined rectangular wave is formed by the superposition of the fundamental wave and its odd harmonics of two rectangular waves of different frequencies. This invention directly generates two single-frequency sinusoidal current outputs without harmonic components.

[0046] Reference Figure 8 , Figure 8 (a) shows the waveform and spectrum of a five-frequency combined rectangular wave. Figure 8 (b) shows the waveform and spectrum of the five-frequency combined sine wave generated by this invention. By comparing the spectrum diagrams, it can be concluded that the five-frequency combined rectangular wave is formed by superimposing the fundamental wave and its odd harmonics of five rectangular waves. This invention directly generates five single-frequency sinusoidal current outputs with no harmonic components, and the amplitudes of the five single frequencies are completely identical.

Claims

1. A multi-frequency, constant-amplitude, harmonic-free electrical resistivity tomography signal transmitting device, characterized in that: The system includes a microcontroller, an FPGA, a DAC (Digital-to-Analog Converter) module, isolation amplifier circuits, differential amplifier modules, digital power amplifier circuits, and a sensor module. The microcontroller is connected to the input of the FPGA, the output of the FPGA is connected to the input of the DAC, the output of the DAC is connected to the input of several isolation amplifier circuits, the output of each isolation amplifier circuit is connected to the input of a differential amplifier module, and the output of each differential amplifier module is connected to the input of a digital power amplifier circuit. The outputs of the digital power amplifier circuits are cascaded and connected to ground electrodes A and B, forming a loop with the ground. The input of the sensor module is connected to the digital power amplifier circuit, and the output of the sensor module is connected to the microcontroller. The FPGA outputs sinusoidal signals with multiple frequency combinations as digital signals. The DAC (Digital-to-Analog Converter) module converts the digital signals into analog signals. After processing, the desired signal source is obtained. The signal source is then isolated and amplified by an isolation amplifier circuit. Next, the voltage range of the signal source is adjusted by a differential amplifier module to ensure that the voltage output range of the preceding stage perfectly matches the input voltage range of the following stage. After power amplification by a power amplifier module, the signal source outputs artificial source electrical resistivity tomography signals to the ground via grounding electrodes A and B in a single-channel, multi-channel parallel, or multi-channel cascade manner.

2. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: It also includes an LCD display module, an SD card storage module, an audible and visual alarm module, and a GPS synchronization module, all of which are connected to a microcontroller.

3. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: It also includes an overvoltage, overcurrent, and overheat protection module, an independent power supply, and normally open relays. Each independent power supply is connected to a normally open relay, and each normally open relay has two sets of normally open contacts, which control the on / off state of the positive and negative power supplies in one independent power supply respectively. Each normally open relay is connected to a digital power amplifier circuit to power the digital power amplifier circuit. The input terminal of the overvoltage, overcurrent, and overheat protection module is connected to a microcontroller, and the output terminal of the overvoltage, overcurrent, and overheat protection module is connected to several normally open relays.

4. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: When the device outputs in a 4-channel cascade configuration, the output voltage reaches 400Vpp and the output current exceeds 1.5A.

5. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: When the device outputs in parallel with 4 output terminals, the output voltage reaches 100Vpp and the output current is over 6A.

6. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: The sensor module uses a voltage transformer ZMPT101B, a current sensor ACS712ELCTPR, and a temperature sensor DS18B20.

7. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: It also includes a keyboard module, which is connected to the microcontroller and FPGA.

8. The multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to claim 1, characterized in that: It is also suitable for transmitting electromagnetic exploration signals. In the fields of electrical and electromagnetic exploration, this device can be used to generate high-voltage single-frequency, dual-frequency equal-amplitude, or multi-frequency equal-amplitude harmonic-free artificial source signals.

9. A method for transmitting multi-frequency equal-amplitude harmonic-free electrical resistivity tomography (EPT) signals using a multi-frequency equal-amplitude harmonic-free electrical resistivity tomography signal transmitting device according to any one of claims 1-8, characterized in that, Includes the following steps: (1) FPGA initialization, system clock signal reset; (2) Define the DA data output clock and the port type of the output channel; (3) Define the frequency control word and the phase control word; (4) Definition of registers, including the definition of the accumulator register, phase register, and ROM register; (5) Instantiate the lookup table and store the data table containing signal waveform information in the ROM for easy subsequent calls; (6) Generate a phase accumulator, which accumulates the phase every clock cycle, and controls the frequency of the generated signal by changing the value of the frequency control word through the button. (7) Generate the lookup table address, call the ROM and change the value of the phase control word by pressing the button to control the initial phase of the generated signal; (8) Wait for the DDS enable command. If the condition statement is true, output a digital signal. If it is false, remain in the waiting state. (9) Wait for the DA clock signal. When the first rising edge of the clock signal arrives, the digital signal output in the previous step is acquired. After all data acquisition is completed, the digital signal is converted into an analog signal and the analog signal is output when the falling edge arrives. This completes the generation of single-frequency or dual-frequency equal-amplitude or multi-frequency equal-amplitude sine signals. If the DA clock signal is not received, digital signal acquisition cannot be performed, and the waiting state is maintained.

Images