A method for manufacturing a quartz substrate microfluid channel

Abstract

The application discloses a quartz substrate micro-channel preparation method, which comprises the following steps: S1, laser drilling technology is used to manufacture micro-channel inlets and micro-channel outlets of a quartz glass substrate, laser-induced modification is performed according to the diameters of the through holes at the positions of the inlets and the outlets, then the quartz glass substrate subjected to the laser-induced modification is subjected to wet etching by using a hydrofluoric acid etching solution, so that the micro-channel inlets and the micro-channel outlets in the vertical direction are obtained; and S2, a dry etching process is used to etch a micro-channel groove on the surface of the quartz glass substrate according to a preset micro-channel layout design, the micro-channel groove being connected with the micro-channel inlets and the micro-channel outlets. The quartz substrate micro-channel preparation method disclosed by the application uses laser drilling, dry etching and chemical deposition of silicon dioxide to manufacture the micro-channel, and finally realizes chip heat dissipation in the micro-channel mode.

Description

Technical Field

[0001] This invention belongs to the field of packaging technology, specifically relating to a method for preparing microchannels on a quartz substrate for heterogeneous integrated packaging of optoelectronic chips. Background Technology

[0002] With the advent of the information age, 2.5D / 3D integration of semiconductor devices has made significant progress in various applications. In the face of the increasing application requirements for high performance, high integration and miniaturization of chip integration, efficient cooling performance is crucial to its development.

[0003] Currently, microchannel cooling technology has been proven to be an effective cooling method, exhibiting extremely low thermal resistance, a large heat transfer coefficient, and excellent heat dissipation. Extensive research has been conducted on using microchannel cooling technology for heterogeneous chip integration, primarily focusing on embedded microchannel TSV adapter board technology to provide technical solutions for high-power three-dimensional integrated heat dissipation. This invention provides a method for fabricating microchannels on a quartz substrate. Summary of the Invention

[0004] The main objective of this invention is to provide a method for fabricating microchannels on a quartz substrate, which uses laser drilling, dry etching, and chemical deposition of silicon dioxide to create microchannels, ultimately achieving chip heat dissipation via microchannels.

[0005] To achieve the above objectives, the present invention provides a method for preparing microchannels on a quartz substrate, comprising the following steps:

[0006] Step S1: Using laser drilling technology, the microchannel inlet and microchannel outlet of the quartz glass substrate are fabricated. Specifically, at the inlet and outlet positions of the channel, laser-induced modification is performed according to the diameter of the through hole. Then, the laser-modified quartz glass substrate is wet-etched using hydrofluoric acid etching solution to obtain the vertical microchannel inlet and microchannel outlet.

[0007] Step S2: Using a dry etching process, according to the preset microchannel layout design, etch microchannel grooves connecting the microchannel inlet and microchannel outlet on the surface of the quartz glass substrate;

[0008] Step S3: Using plasma-enhanced chemical vapor deposition (PECVD) process, silica is deposited on a quartz glass substrate to seal the microchannel grooves, thereby forming a horizontal flow channel; at the same time, silica deposition seals the upper port of the vertical microchannel inlet and the upper port of the microchannel outlet, forming an open flow channel structure connecting the microchannel inlet and the microchannel outlet.

[0009] Step S4: Use laser drilling technology to create TGV through holes. At the location of the TGV through holes, laser-induced modification is performed according to the diameter of the through holes. Then, the laser-modified quartz glass substrate is wet-etched using hydrofluoric acid etching solution to obtain vertical TGV blind holes.

[0010] Step S5: Deposit an adhesive Ti-Cu seed layer on the inner wall of the TGV blind via using physical vapor deposition (PVD); plate the TGV blind via on the quartz glass substrate with copper using deep hole electroplating to form vertical interconnects for electrical signals.

[0011] Step S6: Planarize the TGV blind via surface, redefine the upper surface with a metal interconnect layer (RDL), and after temporary bonding, grinding to thin the exposed copper, fabrication of the bottom RDL and debonding, the wiring layer achieves planar interconnection of electrical signals in the X and Y directions;

[0012] Step S7: Integrate the chip on the quartz glass substrate to achieve chip heat dissipation through microfluidic channels.

[0013] As a further preferred technical solution to the above technical solution, in step S1, the diameter of the microchannel inlet and microchannel outlet made by laser drilling is 500μm to 1mm.

[0014] As a further preferred technical solution of the above technical solution, in step S3, the depth-to-width ratio of the microchannel groove is greater than 5:1, thereby ensuring that the upper opening is closed when the silicon dioxide layer is deposited, leaving the unfilled flow channel. The width range of the etched microchannel groove is 40μm to 100μm, and the depth is more than 5 times the width.

[0015] As a further preferred technical solution of the above technical solution, in step S3, the microchannel layout is etched. The number and shape of the horizontal microchannels are not limited to the arrangement. The distribution of the horizontal etched microchannels is designed according to the specific heat dissipation requirements.

[0016] As a further preferred technical solution to the above technical solution, the specific steps of the dry etching process in step S2 are as follows: depositing metallic Cr on the surface of a quartz substrate using physical vapor deposition (PVD) as a mask layer structure; depositing silicon dioxide using chemical vapor deposition (PECVD) as a mask layer structure; spin-coating photoresist and performing photolithography according to a preset microchannel pattern; sequentially etching silicon dioxide, metallic Cr, and the quartz substrate using plasma etching (ICP); removing the metallic Cr mask layer; and obtaining a microchannel groove structure.

[0017] As a further preferred technical solution of the above technical solution, for step S5, PDMS material (polydimethylsiloxane) is cured to obtain a sheet (thickness 3-5mm), and then two sheets of the same suitable area are cut to cover the microchannel inlet and microchannel outlet.

[0018] A hole is punched in the middle to obtain a through hole (the diameter of the through hole is 1mm to 2mm, and it is required to be larger than the inlet and outlet of the microchannel for easy alignment).

[0019] Using plasma activation, the activated quartz glass substrate has a side surface with microchannel inlet and microchannel outlet, as well as the surface of the cut sheet structure. Then, the two sheet structures are aligned with the microchannel inlet and microchannel outlet respectively and bonded together.

[0020] A flexible tube made of rubber is inserted into the microchannel inlet and outlet respectively, and deionized water is introduced through the other end of the flexible tube at the microchannel outlet using a syringe or pump, thereby achieving the purpose of cooling the chip by circulating water through the microchannel.

[0021] As a further preferred technical solution of the above technical solution, the results of step S1 are checked by using a microscope to observe whether the condition of the corroded microchannel inlet and microchannel outlet meets the requirements (including size, morphology, etc.). If they meet the requirements, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements.

[0022] The results of step S2 are checked by using a scanning electron microscope (SEM) to observe the etching effect of the microchannel grooves (including width, depth, morphology, etc.). If they meet the requirements, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements.

[0023] The results of step S4 are checked by using a microscope to observe whether the condition of the corroded TGV blind holes meets the requirements (including size, morphology, etc.). If they meet the requirements, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements.

[0024] Check the results of step S5 to see if water flows out of the microchannel inlet and outlet, and whether there is any leakage.

[0025] The beneficial effects of this invention are as follows:

[0026] 1. The microchannel structure is integrated with the TGV via within the adapter board, with the microchannel located directly beneath the chip, enabling excellent heat dissipation for the chip.

[0027] 2. Microchannels are fabricated using laser drilling, dry etching, and chemical deposition of silicon dioxide. Attached Figure Description

[0028] Figure 1 This is a side view of a quartz substrate used in a method for preparing a quartz substrate microchannel according to the present invention.

[0029] Figure 2 This is a top view of a quartz substrate used in a method for preparing a microchannel on a quartz substrate according to the present invention.

[0030] Figure 3 This is a schematic diagram of a quartz glass substrate after etching microchannel grooves in a method for preparing microchannels on a quartz substrate according to the present invention.

[0031] Figure 4 This is a schematic diagram of a quartz glass substrate with a closed flow channel formed after silica deposition and covering, according to a method for preparing microchannels on a quartz substrate according to the present invention.

[0032] Figure 5 This is a schematic diagram of the TGV blind hole in a method for preparing a quartz substrate microchannel according to the present invention.

[0033] Figure 6 This is a schematic diagram of a method for preparing a quartz substrate microchannel according to the present invention.

[0034] The reference numerals in the attached figures include: 1. Microchannel inlet; 2. Microchannel outlet; 3. Quartz glass substrate; 4. Silica; 5. TGV through-hole; 6. Microchannel groove; 7. TGV blind hole; 8. Sheet structure; 9. Through-hole; 10. Tube. Detailed Implementation

[0035] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0036] In the preferred embodiments of the present invention, those skilled in the art should note that the quartz glass and the like involved in the present invention can be considered as prior art.

[0037] Preferred embodiment.

[0038] like Figure 1-6 As shown, this invention discloses a method for preparing microchannels on a quartz substrate, comprising the following steps:

[0039] Step S1: Using laser drilling technology, the microchannel inlet 1 and microchannel outlet 2 of the quartz glass substrate are fabricated. Specifically, at the inlet and outlet positions of the channel, laser-induced modification is performed according to the diameter of the through hole. Then, the laser-modified quartz glass substrate 3 is wet-etched using hydrofluoric acid etching solution to obtain the vertical microchannel inlet 1 and microchannel outlet 2.

[0040] Step S2: Using a dry etching process, according to the preset microchannel layout design, the microchannel groove 6 connecting the microchannel inlet 1 and the microchannel outlet 2 is etched on the surface of the quartz glass substrate.

[0041] Step S3: Using plasma-enhanced chemical vapor deposition (PECVD), silica 4 is deposited on a quartz glass substrate 3 to seal the microchannel grooves 6, thereby forming a horizontal flow channel; at the same time, the silica 4 deposition seals the upper port of the vertical microchannel inlet 1 and the upper port of the microchannel outlet 2, forming an open flow channel structure connecting the microchannel inlet 1 and the microchannel outlet 2.

[0042] Step S4: Using laser drilling technology, TGV through holes 5 are made. At the position of TGV through holes 5, laser-induced modification is performed according to the diameter of the through holes. Then, the laser-modified quartz glass substrate 3 is wet-etched with hydrofluoric acid etching solution to obtain vertical TGV blind holes 7.

[0043] Step S5: An adhesive Ti-Cu seed layer is deposited on the inner wall of the TGV blind via 7 using a physical vapor deposition (PVD) process; copper is plated onto the TGV blind via 7 on the quartz glass substrate using a deep hole electroplating process to form vertical interconnects for electrical signals.

[0044] Step S6: Planarize the TGV blind via surface, redefine the upper surface with a metal interconnect layer (RDL), and after temporary bonding, grinding to thin the exposed copper, fabrication of the bottom RDL and debonding, the wiring layer achieves planar interconnection of electrical signals in the X and Y directions;

[0045] Step S7: Integrate the chip on the quartz glass substrate to achieve chip heat dissipation through microfluidic channels.

[0046] Specifically, in step S1, the diameters of the microchannel inlet and outlet created by laser drilling are 500 μm to 1 mm.

[0047] Furthermore, in step S3, the depth-to-width ratio of the microchannel groove is greater than 5:1, thereby ensuring that the upper opening is closed during the deposition of the silicon dioxide layer, leaving unfilled channels. The width of the etched microchannel groove ranges from 40μm to 100μm, and the depth is more than 5 times the width.

[0048] Furthermore, in step S3, the microchannel pattern is etched. The number and shape of the horizontal microchannels are not limited to the arrangement. The distribution of the horizontal etched microchannels is designed according to the specific heat dissipation requirements.

[0049] Preferably, the dry etching process in step S2 includes the following steps: depositing metallic Cr on the surface of a quartz substrate using physical vapor deposition (PVD) as a mask layer structure; depositing silicon dioxide using chemical vapor deposition (PECVD) as a mask layer structure; spin-coating photoresist and performing photolithography according to a preset microchannel pattern; sequentially etching silicon dioxide, metallic Cr, and the quartz substrate using plasma etching (ICP); removing the metallic Cr mask layer; and obtaining a microchannel groove structure.

[0050] Preferably, such as Figure 6 As shown, in step S5, PDMS material (polydimethylsiloxane) is cured to obtain a sheet (thickness 3-5 mm), and then two sheets of the same suitable area are cut out to cover the microchannel inlet 1 and the microchannel outlet 2.

[0051] A hole is punched in the middle to obtain a through hole 9 (the diameter of the through hole 9 is 1mm to 2mm, and it is required to be larger than the inlet and outlet of the microchannel for easy alignment).

[0052] Using plasma activation, the activated quartz glass substrate 3 has a side surface with a microchannel inlet 1 and a microchannel outlet 2, as well as the surface of a cut sheet structure 8. Then, the two sheet structures 8 are aligned with the microchannel inlet 1 and the microchannel outlet 2 respectively and bonded together.

[0053] A flexible tube 10 made of rubber is inserted into the microchannel inlet 1 and the microchannel outlet 2 respectively. Deionized water is introduced through the other end of the flexible tube at the microchannel outlet 1 using a syringe or pump, thereby achieving the purpose of cooling the chip by introducing water through the microchannel.

[0054] Preferably, the results of step S1 are checked by using a microscope to observe whether the condition of the corroded microchannel inlet and outlet meets the requirements (including size, morphology, etc.). If they meet the requirements, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements.

[0055] The results of step S2 are checked by using a scanning electron microscope (SEM) to observe the etching effect of the microchannel grooves (including width, depth, morphology, etc.). If they meet the requirements, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements.

[0056] The results of step S4 are checked by using a microscope to observe whether the condition of the corroded TGV blind holes meets the requirements (including size, morphology, etc.). If they meet the requirements, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements.

[0057] Check the results of step S5 to see if water flows out of the microchannel inlet and outlet, and whether there is any leakage.

[0058] It is worth mentioning that the technical features such as quartz glass involved in this patent application should be regarded as prior art. The specific structure, working principle, and possible control methods and spatial arrangement of these technical features can be adopted using conventional choices in the field, and should not be regarded as the inventive point of this patent. This patent will not be further elaborated in detail.

[0059] For those skilled in the art, modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the protection scope of this invention.

Claims

1. A method for preparing microchannels on a quartz substrate, characterized in that, Includes the following steps: Step S1: Using laser drilling technology, the microchannel inlet and microchannel outlet of the quartz glass substrate are fabricated. At the inlet and outlet positions, laser-induced modification is performed according to the diameter of the through hole. Then, the laser-modified quartz glass substrate is wet-etched using hydrofluoric acid etching solution to obtain the vertical microchannel inlet and microchannel outlet. Step S2: Using a dry etching process, according to the preset microchannel layout design, etch microchannel grooves connecting the microchannel inlet and microchannel outlet on the surface of the quartz glass substrate; Step S3: Using plasma-enhanced chemical vapor deposition, silica is deposited on a quartz glass substrate to seal the microchannel grooves, thereby forming a horizontal flow channel; at the same time, silica deposition seals the upper port of the vertical microchannel inlet and the upper port of the microchannel outlet, forming an open flow channel structure connecting the microchannel inlet and the microchannel outlet. Step S4: Use laser drilling technology to create TGV through holes. At the location of the TGV through holes, laser-induced modification is performed according to the diameter of the through holes. Then, the laser-modified quartz glass substrate is wet-etched using hydrofluoric acid etching solution to obtain vertical TGV blind holes. Step S5: Deposit an adhesive Ti-Cu seed layer on the inner wall of the TGV blind via using physical vapor deposition; plate the TGV blind via on the quartz glass substrate with copper using deep hole electroplating to form vertical interconnects for electrical signals. Step S6: Planarize the TGV blind via surface, rewire the metal interconnect layer on the upper surface, and after temporary bonding, grinding to thin the exposed copper, fabrication of the bottom RDL and debonding, the wiring layer realizes planar interconnection of electrical signals in the X and Y directions; Step S7: Integrate the chip on the quartz glass substrate to achieve chip heat dissipation through microfluidic channels.

2. The method of claim 1, wherein the quartz substrate is a wafer. In step S1, the diameters of the microchannel inlet and outlet fabricated by laser drilling are 500 μm to 1 mm.

3. The method for preparing a quartz substrate microchannel according to claim 1, characterized in that, In step S3, the depth-to-width ratio of the microchannel groove is greater than 5:1, thereby ensuring that the upper opening is closed during the deposition of the silicon dioxide layer, leaving unfilled channels. The width of the etched microchannel groove ranges from 40μm to 100μm, and the depth is more than 5 times the width.

4. The method for preparing a quartz substrate microchannel according to claim 1, characterized in that, In step S3, the microchannel pattern is etched. The number and shape of the horizontal microchannels are not limited to the arrangement. The distribution of the horizontal etched microchannels is designed according to the specific heat dissipation requirements.

5. The method for preparing a quartz substrate microchannel according to claim 1, characterized in that, The specific steps of the dry etching process in step S2 are as follows: depositing metallic Cr on the surface of a quartz substrate using physical vapor deposition as a mask layer structure; depositing silicon dioxide using chemical vapor deposition as a mask layer structure; spin-coating photoresist and performing photolithography according to a preset microchannel pattern; sequentially plasma etching silicon dioxide, metallic Cr, and the quartz substrate; removing the metallic Cr mask layer; and obtaining a microchannel groove structure.

6. The method for preparing a quartz substrate microchannel according to claim 1, characterized in that, For step S5, the PDMS material is cured to obtain a sheet, and then two sheets of the same suitable area are cut out to cover the microchannel inlet and microchannel outlet. A hole is punched in the middle using a hole puncher to obtain a through hole; Using plasma activation, the activated quartz glass substrate has a side surface with microchannel inlet and microchannel outlet, as well as the surface of the cut sheet structure. Then, the two sheet structures are aligned with the microchannel inlet and microchannel outlet respectively and bonded together. A flexible tube made of rubber is inserted into the microchannel inlet and outlet respectively, and deionized water is introduced through the other end of the flexible tube at the microchannel outlet using a syringe or pump, thereby achieving the purpose of cooling the chip by circulating water through the microchannel.

7. The method for preparing a quartz substrate microchannel according to claim 6, characterized in that: The results of step S1 are checked by using a microscope to observe whether the condition of the corroded microchannel inlet and outlet meets the requirements. If it does, the subsequent steps are continued; otherwise, improvements are made until it meets the requirements. The results of step S2 are checked by observing the etching effect of the microchannel grooves using a scanning electron microscope. If the results are satisfactory, the subsequent steps are continued; otherwise, improvements are made until the results are satisfactory. The results of step S4 are checked by using a microscope to observe whether the condition of the corroded TGV blind holes meets the requirements. If they do, the subsequent steps are continued; otherwise, improvements are made until they meet the requirements. Check the results of step S5 to see if water flows out of the microchannel inlet and outlet, and whether there is any leakage.

Images