A hot plug system and method for a PCIE device

Abstract

The application provides a hot plug system and method for a PCIE device, comprising: a mainboard, wherein a control chip and a PCIE bridge chip are assembled on the mainboard, the mainboard is connected with the PCIE device through the PCIE bridge chip, and an isolation chip is assembled between the PCIE bridge chip and the PCIE device; the isolation chip is used for transmitting signals between the PCIE bridge chip and the PCIE device during normal operation of the PCIE device, and isolating signals between the PCIE bridge chip and the PCIE device during hot plug of the PCIE device; a power supply is used for supplying power for the mainboard, the PCIE device and the isolation chip; the control chip is used for controlling the power supply to stop supplying power for the PCIE device and the isolation chip in response to a detected hot plug operation for the PCIE device, and controlling the power supply to resume supplying power for the PCIE device and the isolation chip in response to a detected hot plug operation for the PCIE device.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of consensus, in particular to a hot plug system and method for PCIE device. BACKGROUND

[0002] PCIE (peripheral component interconnect expres, high-speed serial computer expansion bus standard) hot plug technology refers to: the system takes out the PCIE device or replaces part of the PCIE device unit under the condition of uninterrupted power supply, thereby improving the fault recovery capability, flexibility and expansibility of the device and the like. Especially in the airborne storage system, the PCIE device is part of the system, when a single task is completed or the device is full, the PCIE device needs to be taken out from the device to the unloading device for data unloading, and a new PCIE device is inserted, preparing for the next task. At this time, the PCIE hot plug technology can improve the efficiency of replacing the PCIE device.

[0003] In the related art, the PCIE device supporting the PCIE hot plug technology is often designed with a gold finger long-short needle. The main advantage of this design is that there is an electrostatic discharge path during the plugging process, which ensures that the devices at both ends will not be damaged due to plugging static electricity. However, the structure of the gold finger is not suitable for occasions with high requirements for the number of plugging times. Moreover, the long-short needle design is not suitable for all PCIE devices. For PCIE devices that do not support long-short needle design, there is no way to effectively protect against static electricity, which may cause damage to the devices at both ends due to plugging. SUMMARY

[0004] Therefore, the present application provides a hot plug system and method for PCIE device to solve the problems in the related art.

[0005] Specifically, the present application is realized by the following technical solutions:

[0006] According to a first aspect of the present application, a hot plug system for PCIE device is provided, which comprises:

[0007] a mainboard, the mainboard is equipped with a control chip and a PCIE bridge chip, the mainboard is connected with the PCIE device through the PCIE bridge chip, and an isolation chip is arranged between the PCIE bridge chip and the PCIE device;

[0008] the isolation chip is used for transmitting signals between the PCIE bridge chip and the PCIE device during normal operation of the PCIE device, and isolating signals between the PCIE bridge chip and the PCIE device during hot plugging of the PCIE device;

[0009] a power supply, configured to supply power for the mainboard, the PCIE device and the isolation chip;

[0010] The control chip is configured to, in response to a detected hot-plug operation for the PCIE device, control the power supply to stop supplying power for the PCIE device and the isolation chip, so that the isolation chip isolates signals between the PCIE bridge chip and the PCIE device; and in response to a detected hot-plug operation for the PCIE device, control the power supply to resume supplying power for the PCIE device and the isolation chip, so that the PCIE device operates normally.

[0011] According to a second aspect of the present application, a hot-plug method for a PCIE device is provided, which is applied to a control chip on a mainboard, the mainboard being connected with a PCIE device, the mainboard being equipped with a PCIE bridge chip, and an isolation chip being equipped between the PCIE bridge chip and the PCIE device, the system comprising:

[0012] In response to a detected hot-plug operation for the PCIE device, the control chip controls a power supply connected with the mainboard to send a power-off instruction to stop supplying power for the PCIE device and the isolation chip, so that the isolation chip isolates signals between the PCIE bridge chip and the PCIE device.

[0013] In response to a detected hot-plug operation for the PCIE device, the control chip controls the power supply to resume supplying power for the PCIE device and the isolation chip, so that the PCIE device operates normally.

[0014] According to a third aspect of the present application, an electronic device is provided, comprising:

[0015] a processor;

[0016] a memory for storing processor-executable instructions;

[0017] The processor implements the method of the first aspect by running the executable instructions.

[0018] According to a fourth aspect of the present application, a computer-readable storage medium is provided, which stores a computer program, the program being executed by a processor to implement the steps of the method of the first aspect.

[0019] The technical solution provided by the embodiments of the present application can have the following beneficial effects:

[0020] In the embodiment of the present application, in one aspect, by setting an isolation chip between the PCIE device and the PCIE bridge chip, and stopping the power supply for the isolation chip during the hot plug of the PCIE device, the isolation chip can isolate the signals between the PCIE bridge chip and the PCIE device during the hot plug of the PCIE device, so as to avoid the generation of plug-in static electricity, and protect the safety of the device; in another aspect, during the normal operation of the PCIE device, the isolation chip can be used to transmit the signals between the PCIE bridge chip and the PCIE device, so that the normal operation of the PCIE device will not be affected, so as to balance the operation status of the device and the safety of the device. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0022] Figure 1 is an architecture diagram of a hot plug system for a PCIE device shown by the disclosed embodiment of the present application;

[0023] Figure 2 is a schematic diagram of an isolation chip shown by the disclosed embodiment of the present application;

[0024] Figure 3 is a schematic diagram of a detection module shown by the disclosed embodiment of the present application;

[0025] Figure 4 is a flow chart of a hot plug method for a PCIE device shown by the disclosed embodiment of the present application;

[0026] Figure 5 is a schematic structural diagram of an electronic device shown by the disclosed embodiment of the present application;

[0027] Figure 6 is a block diagram of a hot plug device for a PCIE device shown by the disclosed embodiment of the present application. DETAILED DESCRIPTION

[0028] The exemplary embodiments will be described in detail herein with reference to the drawings. Unless otherwise indicated, the same numbers on the drawings indicate the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all the embodiments consistent with the present application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the present application.

[0029] The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used in the present disclosure and the appended claims, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and / or," as used herein, refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0030] It is to be understood that, although the terms first, second, third, etc. can be used herein to describe various information, the information should not be limited to these terms. These terms are only used to distinguish one piece of information from another. For example, a first information can also be termed a second information, and, similarly, a second information can also be termed a first information, without departing from the scope of the present disclosure. The word "if' as used herein means "when" or "responsive to the determination" or "in response to the determination" or "upon the determination" or "when it is determined" or "upon it being determined" or "when the determination is made" or "upon the determination being made" or "when, responsive to the determination, " or "in response to the determination, " etc., depending on the context.

[0031] Embodiments of a hot plug system and method for a PCIE device are described in detail below with reference to the accompanying drawings.

[0032] PCIE (peripheral component interconnect express, a high-speed serial computer expansion bus standard) hot plug technology refers to: the system takes out the PCIE device or replaces part of the PCIE device unit under the condition of uninterrupted power supply, thereby improving the fault recovery capability, flexibility, expansibility and the like of the device. Especially in the airborne storage system, the PCIE device is part of the system, and after a single task is completed or the device is full, the PCIE device needs to be taken out from the device to the unloading device for data unloading, and a new PCIE device is inserted, preparing for the next task. At this time, the PCIE hot plug technology can improve the efficiency of replacing the PCIE device.

[0033] In the related art, the PCIE devices supporting the PCIE hot plug technology are all designed with gold finger long and short pins. The main advantage of this type of design is that there is an electrostatic discharge path during the plugging process, which ensures that the devices at both ends will not be damaged due to plugging static electricity. However, the structure of the gold finger is not suitable for occasions with high requirements for the number of plugging times. Moreover, the long and short pin design is not suitable for all PCIE devices. For PCIE devices that do not support the long and short pin design, there is no way to effectively protect against static electricity, which may cause damage to the devices at both ends due to plugging.

[0034] To solve the problems in the related art, the present specification proposes a hot plug system for a PCIE device.

[0035] Figure 1is a schematic diagram of a hot plug system for a PCIE device according to an exemplary embodiment of the present disclosure, as shown in Figure 1 The schematic diagram includes a mainboard 10, a PCIE device 20, an isolation chip 30, and a power supply 40.

[0036] The mainboard 10 can be a mainboard of a computer, which is one of the most basic and important components of a computer. The mainboard is the core of the computer hardware system, and can be assembled with chips for implementing different functions. The mainboard can implement different functional logic based on the assembled chips. The mainboard 10 is assembled with a control chip. As shown in Figure 1 The mainboard 10 is assembled with a control chip 101 and a PCIE bridge chip 102. The control chip 101 is configured with various processing logic for controlling the operation of the device, and the PCIE bridge chip 102 is used to connect different PCIE buses and convert the data transmission between them into an appropriate format. The mainboard 10 is connected with the PCIE device 20 through the PCIE bridge chip 102.

[0037] The PCIE device 20 can be a PCIE-supported computer peripheral device, which can include a graphics card, a solid state disk (PCIE interface form), a wireless network card, a wired network card, a sound card, a video capture card, etc. The present specification does not limit the specific PCIE device.

[0038] The PCIE bridge chip 102 and the PCIE device 20 are assembled with the isolation chip 30. In one case, the isolation chip 30 can be assembled at one end of the mainboard 10 as a functional chip on the mainboard 10, in which case the control chip 101 can more efficiently control the isolation chip. In another case, the isolation chip 30 can be assembled at one end of the PCIE device 20 as a functional chip on the PCIE device 20, in which case the isolation chip 30 can more effectively block the signal. The present specification does not limit the specific position of the isolation chip 30.

[0039] The isolation chip 30 is used to transmit the signal between the PCIE bridge chip 102 and the PCIE device 20 during the normal operation of the PCIE device 20, and to isolate the signal between the PCIE bridge chip 102 and the PCIE device 20 during the hot plug of the PCIE device 20.

[0040] The power supply 40 is controlled by the control chip 101 assembled on the host 10, and is used to supply power to the host board 10 (including various chips assembled on the host board 10), the isolation chip 30 and the PCIE device. Specifically, the control chip 101 can send specific power-on and power-off instructions to the power supply 40, for example: the control chip 101 can send a power-off instruction for the PCIE device 20 to the power supply 40, and the power supply 40 can recognize the received instruction and stop supplying power to the PCIE device 20; or the control chip 101 can send a power-on instruction for the isolation chip 30 to the power supply 40, and the power supply 40 can recognize the received instruction and start supplying power to the isolation chip 30.

[0041] The control chip 101, in response to the detected hot plug operation for the PCIE device 20, controls the power supply to stop supplying power to the PCIE device 20 and the isolation chip 30, so that the isolation chip 30 isolates the signals between the PCIE bridge chip 102 and the PCIE device 20.

[0042] In the related art, during the PCIE device hot plug, the signals between the PCIE bridge chip and the PCIE device are still transmitted, such as clock signals, PCIE device in-place signals, etc. The transmission of these signals means that at least part of the units of the PCIE device and the PCIE bridge chip are still powered by the power supply during the PCIE device hot plug, and based on this, the hot plug operation of the PCIE device will cause plug-in static electricity.

[0043] And the present application sets an isolation chip 30 between the PCIE bridge chip 102 and the PCIE device 20, and stops supplying power to the isolation chip 30 and the PCIE device 20 during the PCIE device 20 hot plug, which makes the signals between the PCIE device 20 and the PCIE bridge chip 102 completely isolated, and there is no condition to generate plug-in static electricity, thereby avoiding the damage caused by plug-in static electricity to the device.

[0044] In response to the detected hot plug operation for the PCIE device 20, the control power supply 40 resumes supplying power to the PCIE device 20 and the isolation chip 30, so that the PCIE device 20 operates normally.

[0045] After the PCIE device 20 is reset, the power supply 40 can resume supplying power to the PCIE device 20 and the isolation chip 30, so that the PCIE device 20 is powered and the isolation chip 30 can transmit the signals between the PCIE device 20 and the PCIE bridge chip 102, thereby ensuring the normal operation of the PCIE device 20.

[0046] Based on the hot plug system of the PCIE device, on one hand, by setting the isolation chip between the PCIE device and the PCIE bridge chip, and stopping the power supply for the isolation chip during the hot plug of the PCIE device, the isolation chip can isolate the signals between the PCIE bridge chip and the PCIE device during the hot plug of the PCIE device, so as to avoid the generation of plug-in static electricity, and protect the safety of the device; on the other hand, during the normal operation of the PCIE device, the isolation chip can be used to transmit the signals between the PCIE bridge chip and the PCIE device, so that the normal operation of the PCIE device will not be affected, so that the operation status of the device and the safety of the device are taken into account.

[0047] In an embodiment, the isolation chip comprises a PCIE clock driver, a PCIE repeater and a general input and output isolation chip; the PCIE clock driver is configured to isolate the clock signals between the PCIE bridge chip and the PCIE device during the hot plug of the PCIE device; the PCIE repeater is configured to isolate the digital signals between the PCIE bridge chip and the PCIE device during the hot plug of the PCIE device; and the general input and output isolation chip is configured to isolate the general signals between the PCIE bridge chip and the PCIE device during the hot plug of the PCIE device, the general signals comprising the PCIE reset signal and the PCIE device in signal.

[0048] As shown in Figure 2 The isolation chip 30 comprises a PCIE clock driver 301, a PCIE repeater 302 and a general input and output isolation chip 303. The PCIE clock driver 301 is configured to isolate the clock signals between the PCIE bridge chip 102 and the PCIE device 20 during the hot plug of the PCIE device 20, and the clock signals are used for the data synchronization of the PCIE device 20 and the mainboard 10. The PCIE repeater 302 is configured to isolate the PCIE digital signals between the PCIE bridge chip 102 and the PCIE device 20 during the hot plug of the PCIE device 20. The general input and output isolation chip 303 is configured to isolate the general signals between the PCIE bridge chip 102 and the PCIE device 20 during the hot plug of the PCIE device 20, and the general signals comprise the PCIE reset signal and the PCIE device in signal. The PCIE reset signal is the initialization signal sent by the mainboard to the PCIE device, and the PCIE device in signal is used to represent whether the PCIE device 20 is connected with the mainboard 10. Of course, the general signals are not limited to this, and the present specification does not limit the general signals.

[0049] In this embodiment, three different isolation chips (PCIe clock driver, PCIe repeater, and general purpose input / output isolation chip) are used to isolate three types of signals (clock signal, digital signal, and general purpose signal) between the PCIe device and the PCIe bridge chip, so that no static electricity is generated during the hot-swapping of the PCIe device, thereby protecting the safety of the device.

[0050] In one embodiment, the system further includes: a barrier, the barrier being disposed outside the PCIe device to protect the PCIe device from interference from the external environment; a switch device is mounted on the barrier, and a switch detection module and an in-situ detection module are also configured on the motherboard; the control chip is further configured to determine that a hot-plug operation for the PCIe device has been detected when the switch detection module detects that the switch device is turned on and the in-situ detection module detects that the PCIe device is in-situ; the control chip is further configured to determine that a hot-plug operation for the PCIe device has been detected when the switch detection module detects that the switch device is turned off and the in-situ detection module detects that the PCIe device changes from being in-situ to being in-situ.

[0051] like Figure 3 As shown, the switch detection module 103 can send a switch signal to the control chip 101 so that the control chip 101 can identify the received switch signal and determine whether the rotary switch on the gate is turned on.

[0052] Furthermore, the switch detection module is a light-sensing detection device, and the switch device is a rotary switch; wherein, when the rotary switch is rotated to the open position, the light-sensing signal detected by the light-sensing detection device changes from 1 to 0; when the rotary switch is rotated to the closed position, the light-sensing signal detected by the light-sensing detection device changes from 0 to 1. The switch signal is the light-sensing signal. Of course, in addition to the above 0 and 1, the light-sensing signal can also be set to other recognition logic, and this specification does not limit this.

[0053] The presence detection module 104 can send a presence signal to the control chip 101, enabling the control chip 101 to recognize the received presence signal and determine whether the PCIe device is connected to the motherboard 10. Furthermore, the presence detection module 104 can be a pin on the motherboard 10, with one end grounded and the other end connected to the PCIe device. When the PCIe device is present, the ground circuit of this pin is short-circuited, and a low-level signal (present signal) is sent to the control chip; when the PCIe device is not present, the ground circuit of this pin is not short-circuited, and a high-level signal (absent signal) is sent to the control chip.

[0054] In this embodiment, the hot plug operation of the PCIE device is determined by two conditions, i.e., whether the rotary switch on the door is opened and whether the PCIE device is in place, so as to prevent the plug static generated by the hot plug of the PCIE device.

[0055] In an embodiment, the control chip is further configured to, in response to the detected hot plug operation of the PCIE device, close application software associated with the PCIE device and unload a file system and underlying drivers associated with the PCIE device.

[0056] After detecting the hot plug operation of the PCIE device 20, the control chip 101 can first close the application software associated with the PCIE device 20, for example, in the case of a PCIE device being a graphics card, video playback software or live broadcast software is associated with the graphics card, if the program corresponding to such software is in a running state at this time, the running can be stopped; or, in the case of a PCIE device being a sound card, radio software or sound recognition software is associated with the sound card, if the program corresponding to such software is in a running state at this time, the running can be stopped.

[0057] After closing the application software, the control chip 101 can also unload the file system associated with the PCIE device, for example, in the case of a PCIE device being a solid state disk (SSD), the database system managed by the solid state disk needs to be unloaded.

[0058] The closing of the application software and the unloading of the file system both belong to the disk unloading processing of the application layer, after the disk unloading processing of the application layer is completed, the control chip 101 can control the disk unloading processing completed by the underlying, such as unloading NVME (Non Volatile Memory Host Controller Interface Specification Express) driver and PCIE driver, etc.

[0059] After the above disk unloading processing is completed, the control chip 101 can control the power supply 40 to stop supplying power to the PCIE device 20 and the isolation chip 30.

[0060] In this embodiment, before cutting off the power supply of the PCIE device, the disk unloading processing is completed in one step, so that the running program, system and driver will not be affected by the pulling out of the PCIE device.

[0061] In an embodiment, the system further comprises an indicator light for receiving a light signal of the control chip and displaying light according to the received light signal; the control chip is further configured to send a red light flashing signal to the indicator light in response to a detected hot-plug operation or hot-plug operation for the PCIE device; send a light-off signal to the indicator light in response to a detected absence of the PCIE device; and send a green light constant signal to the indicator light in response to a detected normal operation of the PCIE device.

[0062] This embodiment displays different lights in different situations to facilitate the user to understand the operation of the PCIE device. Of course, the display effect of the light is not limited to this, for example, a yellow light can be displayed when the PCIE device is not in place, or a red constant light can be displayed during the hot-plug operation of the PCIE device, and this specification does not limit this.

[0063] In an embodiment, the PCIE device is equipped with an equal-length aviation connector.

[0064] As described above, in the related art, the PCIE device supporting the PCIE hot-plug technology is often designed with a gold finger long and short pin, but the structure of the gold finger is not suitable for occasions with high requirements for the number of plug-in and plug-out. The structure of the equal-length pin is suitable for occasions with high number of plug-in and plug-out. Since the hot-plug system proposed in the present application has isolated the signals between the PCIE bridge chip and the PCIE device, no plug-in and plug-out static electricity will be generated, and there is no need to set up an electrostatic discharge path. Compared with the gold finger long and short pin design, the equal-length pin aviation connector is suitable for more occasions.

[0065] Figure 4 is a flowchart of a hot-plug method for a PCIE device disclosed in an exemplary embodiment of the present application. The method is applied to a control chip on a mainboard, the mainboard is connected with a PCIE device, the mainboard is equipped with a PCIE bridge chip, and an isolation chip is arranged between the PCIE bridge chip and the PCIE device. Specifically, the method can include the following steps:

[0066] Step 402, in response to a detected hot-plug operation for the PCIE device, controlling a power supply connected with the mainboard to send a power-off instruction to stop power supply to the PCIE device and the isolation chip, so that the isolation chip isolates the signals between the PCIE bridge chip and the PCIE device;

[0067] Step 404, in response to a detected hot-plug operation for the PCIE device, controlling the power supply to resume power supply to the PCIE device and the isolation chip, so that the PCIE device operates normally.

[0068] In this embodiment, on the one hand, by setting an isolation chip between the PCIe device and the PCIe bridge chip, and stopping power supply to the isolation chip during the hot-swapping of the PCIe device, the isolation chip can isolate the signal between the PCIe bridge chip and the PCIe device during the hot-swapping process, thereby avoiding the generation of static electricity during plugging and unplugging and protecting the device safety. On the other hand, during the normal operation of the PCIe device, the isolation chip can be used to transmit the signal between the PCIe bridge chip and the PCIe device, so that the normal operation of the PCIe device will not be affected, thus taking into account both the device operation status and device safety.

[0069] As previously described, the isolation chip includes a PCIe clock driver, a PCIe repeater, and a general-purpose input / output isolation chip; the PCIe clock driver is used to isolate the clock signal between the PCIe bridge chip and the PCIe device during the hot-swapping of the PCIe device; the PCIe repeater is used to isolate the digital signal between the PCIe bridge chip and the PCIe device during the hot-swapping of the PCIe device; the general-purpose input / output isolation chip is used to isolate general-purpose signals between the PCIe bridge chip and the PCIe device during the hot-swapping of the PCIe device, the general-purpose signals including the PCIe reset signal and the PCIe device in-place signal.

[0070] As mentioned above, a barrier can be installed outside the PCIe device to protect it from external environmental interference. A switch is mounted on the barrier, and the motherboard is also equipped with a switch detection module and an on-premises detection module. The control chip is further configured to determine that a hot-plug operation has been detected on the PCIe device when the switch detection module detects that the switch is turned on and the on-premises detection module detects that the PCIe device is in place. The control chip is also configured to determine that a hot-plug operation has been detected on the PCIe device when the switch detection module detects that the switch is turned off and the on-premises detection module detects that the PCIe device has changed from being out of place to being in place.

[0071] As mentioned above, the switch detection module is a light-sensing detection device, and the switch device is a rotary switch; wherein, when the rotary switch is rotated to the open position, the light-sensing signal detected by the light-sensing detection device changes from 1 to 0; when the rotary switch is rotated to the closed position, the light-sensing signal detected by the light-sensing detection device changes from 0 to 1.

[0072] As previously mentioned, the control chip is also configured to, in response to a detected hot-plug operation on the PCIE device, close the application software associated with the PCIE device and uninstall the file system and underlying drivers associated with the PCIE device.

[0073] As mentioned above, an indicator light can also be set on the motherboard or PCIe device to receive the light signal from the control chip and display the light according to the received light signal; the control chip is also used to send a red flashing signal to the indicator light in response to a detected hot-swapping or hot-plugging operation of the PCIe device; to send a light-off signal to the indicator light in response to a detected absence of the PCIe device; and to send a solid green light signal to the indicator light in response to a detected normal operation of the PCIe device.

[0074] As previously mentioned, the PCIe device is equipped with aviation connectors with pins of equal length.

[0075] Corresponding to the embodiments of the foregoing methods, the present invention also provides embodiments of electronic devices and apparatuses.

[0076] Figure 5 This is a schematic structural diagram of an electronic device according to an embodiment of the present invention. Please refer to it. Figure 5 At the hardware level, the device includes a processor 501, a network interface 502, memory 503, non-volatile memory 504, and an internal bus 505, and may also include other hardware required for business operations. One or more embodiments of the present invention can be implemented in software, for example, the processor 501 reads the corresponding computer program from the non-volatile memory 504 into memory 503 and then runs it. Of course, in addition to software implementation, one or more embodiments of the present invention do not exclude other implementation methods, such as logic devices or a combination of hardware and software, etc. That is to say, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.

[0077] Figure 6 This invention illustrates a block diagram of a hot-swappable device for PCIe devices. Please refer to... Figure 6 This device can be applied to, for example Figure 6 The device shown includes a control chip applied to a motherboard connected to a PCIe device. A PCIe bridge chip is mounted on the motherboard, and an isolation chip is mounted between the PCIe bridge chip and the PCIe device to implement the technical solution described in this invention. The device comprises:

[0078] The first control unit 602 is configured to, in response to a detected hot-swapping operation of the PCIe device, control the power supply connected to the motherboard to send a power-off command to stop supplying power to the PCIe device and the isolation chip, so that the isolation chip isolates the signal between the PCIe bridge chip and the PCIe device;

[0079] The second control unit 604 is configured to, in response to a detected hot-plugging operation of the PCIe device, control the power supply to restore power to the PCIe device and the isolation chip so that the PCIe device can operate normally.

[0080] While this invention contains numerous specific details, these should not be construed as limiting the scope of any invention or the scope of the claims, but rather are primarily intended to describe features of specific embodiments of particular inventions. Certain features described in the multiple embodiments of this invention may also be implemented in combination in a single embodiment. On the other hand, various features described in a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. Furthermore, while features may function in certain combinations as described above and even initially claimed in this way, one or more features from a claimed combination may be removed from that combination in some cases, and a claimed combination may refer to a sub-combination or a variation of a sub-combination.

[0081] Similarly, although the operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring these operations to be performed in the specific order shown or sequentially, or requiring all illustrated operations to be performed to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above embodiments should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0082] Thus, specific embodiments of the subject matter have been described. Other embodiments are within the scope of the appended claims. In some cases, the actions recited in the claims may be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings are not necessarily shown in a specific order or sequence to achieve the desired result. In some implementations, multitasking and parallel processing may be advantageous.

[0083] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A hot-swappable system for PCIe devices, characterized in that, The system includes: A motherboard, on which a control chip and a PCIe bridge chip are mounted, the motherboard is connected to the PCIe device through the PCIe bridge chip, and an isolation chip is mounted between the PCIe bridge chip and the PCIe device; The isolation chip is used to transmit signals between the PCIe bridge chip and the PCIe device during normal operation of the PCIe device, and to isolate signals between the PCIe bridge chip and the PCIe device during hot-swapping of the PCIe device. A power supply for supplying power to the motherboard, the PCIe device, and the isolation chip; The control chip is configured to, in response to a detected hot-plugging operation of the PCIe device, control the power supply to stop supplying power to the PCIe device and the isolation chip, so that the isolation chip isolates the signal between the PCIe bridge chip and the PCIe device; and in response to a detected hot-plugging operation of the PCIe device, control the power supply to restore power to the PCIe device and the isolation chip, so that the PCIe device can operate normally.

2. The system according to claim 1, characterized in that, The isolation chip includes a PCIe clock driver, a PCIe repeater, and a general-purpose input / output isolation chip; The PCIe clock driver is used to isolate the clock signal between the PCIe bridge chip and the PCIe device during the hot-swapping of the PCIe device. The PCIe repeater is used to isolate digital signals between the PCIe bridge chip and the PCIe device during hot-swapping of the PCIe device. The general-purpose input / output isolation chip is used to isolate general-purpose signals between the PCIe bridge chip and the PCIe device during the hot-swapping of the PCIe device. The general-purpose signals include the PCIe reset signal and the PCIe device in-place signal.

3. The system according to claim 1, characterized in that, The system also includes: A barrier is provided on the outside of the PCIe device to protect the PCIe device from interference from the external environment; the barrier is equipped with a switch device, and the motherboard is also equipped with a switch detection module and an in-situ detection module; The control chip is also configured to determine that a hot-plug operation for the PCIE device has been detected when the switch detection module detects that the switch device is turned on and the presence detection module detects that the PCIE device is in place. The control chip is further configured to determine that a hot-plug operation for the PCIe device has been detected when the switch detection module detects that the switch device is turned off and the presence detection module detects that the PCIe device has changed from being out of place to being in place.

4. The system according to claim 3, characterized in that, The switch detection module is a light-sensing detection device, and the switch device is a rotary switch; wherein, when the rotary switch is rotated to the open position, the light-sensing signal detected by the light-sensing detection device changes from 1 to 0; when the rotary switch is rotated to the closed position, the light-sensing signal detected by the light-sensing detection device changes from 0 to 1.

5. The system according to claim 1, characterized in that, The control chip is also configured to, in response to a detected hot-plug operation on the PCIE device, close the application software associated with the PCIE device and uninstall the file system and underlying drivers associated with the PCIE device.

6. The system according to claim 1, characterized in that, The system also includes: Indicator lights are used to receive light signals from the control chip and display lights according to the received light signals; The control chip is also configured to send a red flashing signal to the indicator light in response to a detected hot-plugging or hot-swapping operation of the PCIe device; send a light-off signal to the indicator light in response to a detected absence of the PCIe device; and send a solid green light signal to the indicator light in response to a detected normal operation of the PCIe device.

7. The system according to claim 1, characterized in that, The PCIe device is equipped with aviation connectors with pins of equal length.

8. A hot-swapping method for PCIe devices, characterized in that, A control chip applied on a motherboard, the motherboard being connected to a PCIe device, a PCIe bridge chip mounted on the motherboard, and an isolation chip mounted between the PCIe bridge chip and the PCIe device, the method comprising: In response to a detected hot-swapping operation of the PCIe device, a power-off command is sent to the power supply connected to the motherboard to stop power supply to the PCIe device and the isolation chip, so that the isolation chip isolates the signal between the PCIe bridge chip and the PCIe device; In response to a detected hot-plugging operation of the PCIe device, the power supply is controlled to restore power to the PCIe device and the isolation chip so that the PCIe device can operate normally.

9. An electronic device, characterized in that, include: processor; Memory used to store processor-executable instructions; The processor implements the method as described in claim 8 by executing the executable instructions.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps of the method as described in claim 8.

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