Information storage method, device, equipment and storage medium

Abstract

The present invention relates to an information storage method, device, equipment and storage medium, the information storage method comprising: receiving current response information, the current response information comprising a target identifier of a target queue pair having a data receiving and sending processing function; obtaining status information corresponding to the target identifier, the status information being used to record parameter information of a previous response information generated by the target queue pair and stored in a first storage space, the first storage space being used to store multiple response information of multiple queue pairs; determining a target storage address of the current response information in the first storage space based on the status information, and storing the current response information at the target storage address. The method provided by the present disclosure effectively reduces storage resource consumption while storing response information quickly and orderly.

Description

Technical Field

[0001] The present invention relates to the field of information processing technology, and in particular to an information storage method, device, equipment and storage medium. Background Art

[0002] With the widespread application of network technology, in order to improve the utilization rate of network channels, the Remote Direct Memory Access (RDMA) protocol adopts an Acknowledgment (ACK) aggregation mechanism. The ACK aggregation mechanism refers to a mechanism in which the receiving end selectively reduces the sending of response packets without affecting the sending end's judgment on the reception status of the sent packets at the receiving end. That is, the intermediate response packets are directly aggregated into the latest necessary response packet, instead of sending each response packet separately, thereby reducing the data flow of the response packet and improving the transmission efficiency of the network channel.

[0003] RDMA is a queue pair (QP)-based protocol for sending and receiving services. Each QP queue pair can send and receive data. Currently, when multiple queue pairs generate response packet request information at the same time, the response packet request information of each queue pair will be stored in a separate random access memory (RAM), resulting in large consumption of storage resources. Summary of the invention

[0004] In order to solve the above technical problems, the embodiments of the present disclosure provide an information storage method, apparatus, device and storage medium, which effectively reduce storage resource consumption while quickly and orderly storing response information.

[0005] In a first aspect, an embodiment of the present disclosure provides an information storage method, including:

[0006] receiving current response information, wherein the current response information includes a target identifier of a target queue pair having a data receiving and sending processing function;

[0007] Acquire status information corresponding to the target identifier, the status information being used to record parameter information of a previous response message generated by the target queue pair and stored in a first storage space, the first storage space being used to store multiple response messages of multiple queue pairs;

[0008] A target storage address of the current response information in the first storage space is determined based on the state information, and the current response information is stored at the target storage address.

[0009] In a second aspect, an embodiment of the present disclosure provides an information storage device, including:

[0010] A receiving unit, used for receiving current response information, wherein the current response information includes a target identifier of a target queue pair having a data sending and receiving processing function;

[0011] an acquisition unit, configured to acquire status information corresponding to the target identifier, wherein the status information is used to record parameter information of a previous response information generated by the target queue pair and stored in a first storage space, wherein the first storage space is used to store multiple response information of multiple queue pairs;

[0012] A storage unit is used to determine a target storage address of the current response information in the first storage space based on the state information, and store the current response information at the target storage address.

[0013] In a third aspect, an embodiment of the present disclosure provides an electronic device, including:

[0014] Memory;

[0015] Processor; and

[0016] Computer programs;

[0017] The computer program is stored in the memory and is configured to be executed by the processor to implement the information storage method as described above.

[0018] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the information storage method described above are implemented.

[0019] An embodiment of the present disclosure provides an information storage method, including: receiving current response information, the current response information including a target identifier of a target queue pair having a data receiving and sending processing function; obtaining status information corresponding to the target identifier, the status information being used to record parameter information of a previous response information generated by the target queue pair and stored in a first storage space, the first storage space being used to store multiple response information of multiple queue pairs; determining a target storage address of the current response information in the first storage space based on the status information, and storing the current response information at the target storage address. The method provided by the present disclosure, by deploying a first storage space capable of storing multiple response information generated by multiple queue pairs, and recording the storage status information of each queue pair in the first storage space, can quickly and orderly store response information, while effectively reducing storage resource consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0022] Figure 1 A schematic diagram of response packet aggregation and network packet loss provided in an embodiment of the present disclosure;

[0023] Figure 2 A flowchart of an information storage method provided by an embodiment of the present disclosure;

[0024] Figure 3 A flowchart of another information storage method provided by an embodiment of the present disclosure;

[0025] Figure 4 A block diagram of an information processing structure provided by an embodiment of the present disclosure;

[0026] Figure 5 A schematic diagram of the structure of an information storage device provided by an embodiment of the present disclosure;

[0027] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0029] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0030] Specifically, RDMA is a QP-based sending and receiving service processing protocol. Each QP queue pair can perform data sending and receiving processing, and the message processing order of the same QP follows the order-preserving rule (that is, if the request information order is 1 to N, then the processing order is also 1 to N), and there is no requirement for the message processing order between different QPs. Specifically, each QP consists of two queues, namely the send queue (Send queue, SQ) and the receive queue (Recv queue, RQ).

[0031] In the RDMA protocol processing, for reliable connection services such as Reliable Connection (RC), Extended Reliable Connection (XRC) and Reliable Datagram (RD), in order to confirm that the receiving end has received the message, the receiving end must reply with a corresponding response packet for each service request sent by the sending end. In the RDMA system, the data path for replying the response packet is the same as the data path for the SQ to actively send the request information, and there is a competition and waiting situation for the data transmission between the two. Therefore, affected by the channel bandwidth and scheduling requirements, the RDMA system needs to cache the response packet.

[0032] Among them, the response packet, as a guarantee mechanism for reliable connection service, mainly includes the following types of messages.

[0033] (1) Response message (read response): corresponds to the read request, and is responsible for carrying the data requested by the read request; specifically includes normal read request response packets and repeated read request response packets.

[0034] (2) Atomic ACK: corresponds to the atomic request and is responsible for carrying atomic response data; specifically includes atomic CmpSwap ACK and atomic FetchAdd ACK.

[0035] (3) Acknowledgement (ACK): corresponds to the send and write operations, and is responsible for informing the sender that the request message has been correctly received; specifically includes send ACK and write ACK.

[0036] (4) Negative acknowledgment (NAK): NAK exists in all operation types of reliable connection services, that is, when an error occurs in reception, a NAK packet will be responded to; it includes ordinary NAK and RNR NAK; RNR NAK means that the receiving end is not ready to receive the resources required for data, but no error has occurred; ordinary NAK means that there is an error in the data packet, and the NAK data frame contains an error code.

[0037] (5) Congestion Notification Message (CNP): corresponds to the data packet with ECN congestion mark and is used to notify the other end to slow down the packet sending.

[0038] At present, in order to improve the utilization rate of network channels, the RDMA protocol adopts a mechanism called ACK aggregation, that is, when the receiving end replies to the request of the sending end, it can choose to reply only to the latest necessary response packet. For the intermediate response packets, they are directly aggregated into the latest necessary response packet and no longer sent separately, thereby reducing the data traffic of the response packet. When the sending end receives the latest response packet, it can infer the aggregated response packet through the packet sequence number (PSN), message sequence number (MSN) and operation type, and then judge the reception status of the request message at the receiving end. This aggregation method can only aggregate ACK, that is, the response packet containing error information cannot be aggregated, so it is called ACK aggregation.

[0039] ACK aggregation refers to a mechanism in which the receiving end selectively reduces the number of response packets sent without affecting the sending end's judgment of the receiving end's reception of the sent packets. ACK aggregation follows the following principles:

[0040] 1) The aggregated data packets must be ACK response packets. Response packets with error information such as normal NAK and RNR NAK cannot be aggregated, otherwise the sender will not be able to determine the reception status of the data packets; response packets carrying data information such as Atomic ACK and read response cannot be aggregated, otherwise the business data will be lost; when ACK is aggregated, the old ACK is discarded and the latest response packet is retained.

[0041] 2) ACKs with the AckReq flag cannot be aggregated.

[0042] For example, see Figure 1 , Figure 1 A schematic diagram of response packet aggregation and network packet loss provided in an embodiment of the present disclosure is provided. Figure 1 It is used to illustrate the situation in which the sending end (requester) determines the data received by the receiving end (reponder). Figure 1In the figure, r (request) represents request and a (response) represents response. As can be seen from the figure, the sender sent 4 requests in succession, namely send (r1), send (r2), read (r3) and send (r4). The receiver received all requests correctly and completed the response, and the ACK positive responses of the first two send requests r1 and r2 were aggregated and processed, and the ACK of these two requests was implicitly confirmed by the read response. However, due to network packet loss, the sender did not receive the read response (a3) ​​responded by the receiver, but received the ACK (a4) of the fourth request (r4). In this case, the sender's judgment after receiving a4 is: 1) Receiving a4 indicates that all previous packets have been correctly received by the receiver. 2) The ACK of the send request type sent by the sender can be aggregated, while the ACK of the read response cannot be aggregated. Therefore, the ACK of r1 and r2 can be aggregated by the read response of r3. Therefore, even if a1 and a2 are not received, it can be implicitly confirmed that the tasks of r1 and r2 have been completed correctly. 3) Since read responses cannot be aggregated, r3 is implicitly confirmed to be erroneous and needs to be resent. 4) Based on the message order preservation mechanism, the sender needs to resend r3 and r4. The order preservation mechanism is to ensure the order in which the sender sends each request to the receiver.

[0043] Generally speaking, if multiple QPs generate response packet request information at the same time, the response packet request information will be processed as follows: each QP's response packet is stored in a separate RAM, and the corresponding relationship between the RAM and the QP is recorded; each RAM needs to have an address maintenance mechanism to ensure its first-in-first-out, achieving the effect of a first-in-first-out storage structure (FIFO); each time a response packet is written to the RAM, the type of the response packet needs to be recorded; each time a response packet arrives, it is necessary to first determine whether the last request type can be aggregated, if it can be aggregated, write the last address, otherwise write the new address to complete the aggregation function; the RAM maintenance mechanism needs to provide RAM storage status and read interfaces to the outside.

[0044] However, the above-mentioned method of requesting information for response packets has the following problems: each QP corresponds to a separate RAM, which consumes a large amount of storage resources; each QP has an address maintenance mechanism, which leads to a large consumption of registers; when outputting a response packet to the sending end, the request information between multiple QPs cannot determine the order of precedence.

[0045] In response to the above technical problems, the embodiments of the present disclosure provide an information storage method, which can receive various response packet request information such as ACK, NAK, Atomic ACK, read response, etc., that is, it can store various types of response information. Secondly, a first storage space is constructed that can sequentially store multiple response packet request information (hereinafter referred to as response information) generated by multiple QPs, and the status information of the latest response information stored in the first storage space by each QP is recorded, that is, while completing the response information caching work, according to the response packet aggregation mechanism, the response packet ACK aggregation processing is realized, that is, a coalesce RAM and a state RAM that can be shared by multiple QPs at the same time are constructed, and the ACK aggregation function is completed while saving storage resources. In addition, a storage status and storage read interface are provided to the outside. Through the above processing, the needs of multiple QPs to generate response packet request information at the same time can be met, and the consumption of storage resources and registers can be reduced. It is described in detail through one or more of the following embodiments.

[0046] Figure 2 A flowchart of an information storage method provided by an embodiment of the present disclosure is applied to a terminal or a server. In the following embodiment, a logic block (RAM ctrl) is deployed on the server. In the scenario where the response information is stored in the first storage space, the aggregation processing function of all QPs is realized based on RAM ctrl, which effectively reduces the control consumption of logic resources, specifically including the following: Figure 2 Steps S201 to S203 shown:

[0047] S201. Receive current response information, where the current response information includes a target identifier of a target queue pair having a data receiving and sending processing function.

[0048] It can be understood that the response packet request information sent by the receiving end (receiving queue) in the receiving target queue pair is recorded as the current response information. The target queue pair refers to a QP with data receiving and sending functions, wherein the current response information refers to the reply information generated after the receiving end receives the request information (sending packet) sent by the sending end (sending queue) in the target queue pair, which is used to characterize the reception status of the sending packet at the receiving end. The current response information can be any type of the above-mentioned response packet information types, and the current response information includes the target identifier of the target queue pair. The target identifier can be a QP sequence number or other identifiers that can identify the queue pair, which are not limited here.

[0049] S202: Obtain status information corresponding to the target identifier.

[0050] The state information is used to record parameter information of the last response information generated by the target queue pair and stored in the first storage space, and the first storage space is used to store multiple response information of multiple queue pairs.

[0051] It can be understood that based on the above S201, a third storage space is pre-constructed. The third storage space can be understood as a state storage RAM (hereinafter referred to as state RAM), which is used to record the state information of each queue to the latest response information stored in the first storage space. It can be indexed according to the target identifier (QP number) in the third storage space. The latest response information refers to the response information stored in the first storage space, which can be specifically understood as the previous response information of the current response information.

[0052] Among them, the status information includes an effect identifier, a storage address of the previous response information in the first storage space, and an information type of the previous response information. The effect identifier is used to identify whether the response information generated by the target queue pair is stored in the first storage space. The effect identifier is an invalid identifier or a valid identifier.

[0053] It can be understood that the status information specifically includes the information type of the latest response information, the storage address in the first storage space, and the effect identifier used to characterize the storage status of the queue in the first storage space, which are correspondingly recorded as last_type / last_addr / last_vld. The status information is used to assist in completing ACK aggregation. Among them, last_type represents the information type of the latest response information, which is used to determine whether the response information can be aggregated. Specifically, the information type last_type=1 indicates that it can be aggregated, and last_type=0 indicates that it cannot be aggregated; the storage address last_addr represents the storage address (storage location) of the latest response information in the first storage space (coalesce RAM). If the latest response information can be aggregated, the current response information can be directly stored in the storage location and aggregated with the latest response information; the effect flag last_vld represents whether the latest response information is valid, that is, whether the QP that generates the latest response information exists in the coalesce RAM, that is, whether the first storage space stores the response information of the QP. Specifically, last_vld=1 indicates that the response information of the QP exists in the coalesce RAM, and the effect flag is a valid flag at this time. Last_vld=0 indicates that the response information of the QP does not exist in the coalesce RAM, and the effect flag is an invalid flag.

[0054] S203: Determine a target storage address of the current response information in the first storage space based on the status information, and store the current response information at the target storage address.

[0055] It is understandable that, based on the above S202, the target storage address of the current response information in the first storage space is determined based on the above parameter information included in the status information. In one possible case, if it is determined that the current response information can be aggregated, the target storage address is the storage address of the previous response information in the first storage space. In another possible case, the current response information is an information type that cannot be aggregated, such as the NAK type, then the address to be allocated in the first storage space is determined as the target storage address. The address to be allocated refers to the address in the first storage space that can be allocated to store any response information. After determining the target storage address, the current response information is stored at the target storage address.

[0056] It is understandable that a third register is pre-constructed, and the third register is used to temporarily store the current response information after receiving the current response information and before determining the target storage address. Accordingly, the current response information is read from the third register to the target storage address. Alternatively, a handshake mechanism is adopted, and after determining the target storage address, the handshake successfully stores the current response information at the target storage address.

[0057] In one embodiment, the address to be allocated is recorded as wr_addr. Starting from wr_addr=0, each time a response message is written in the first storage space, the wr_addr address is increased by 1, and wr_addr=1 is used as the address that can be allocated for the next response message. And so on, until wr_addr is equal to the maximum value, storage starts again from wr_addr=0. The maximum value can be understood as the last storable address in the first storage space. For example, there are 10 storable addresses in the first storage space, and wr_addr=9 indicates that a cycle of storage is completed, and the response information stored in the first storage space is read out based on the storage order (0-9 order), so the storage of the next cycle can continue from 0.

[0058] Optionally, determining the target storage address of the current response information in the first storage space based on the state information in S203 may be implemented by the following steps:

[0059] When the effect identifier is an invalid identifier, the address to be allocated of the first storage space is obtained, and the address to be allocated is used as the target storage address; or, when the effect identifier is a valid identifier, the target storage address is determined according to the storage address of the previous response information and the information type of the previous response information.

[0060] Understandably, according to the aggregation mechanism, determining the target storage address of the response information in the first storage space specifically includes the following process: when the effect flag is determined to be an invalid flag, that is, last_vld=0, that is, there is no response information of the QP in the coalesceRAM. In this case, the address to be allocated is used as the target storage address, that is, the current response information is written to wr_addr in the coalesce RAM, and the address to be allocated is updated at the same time, that is, wr_addr is increased by 1. When the effect flag is determined to be a valid flag, that is, last_vld=1, that is, the response information of the QP is stored in the coalesce RAM. In this case, the process of determining the target storage address is as follows.

[0061] Optionally, the above-mentioned determining the target storage address according to the storage address of the previous response information and the information type of the previous response information can be specifically implemented through the following steps:

[0062] Determine the information type of the current response information, wherein the information type is an aggregatable type or a non-aggregatable type; when the information type of the current response information is the same as the information type of the previous response information, and the information type is an aggregatable type, use the storage address of the previous response information as the target storage address; or, when the information type of the current response information is different from the information type of the previous response information, use the address to be allocated as the target storage address.

[0063] Understandably, the information type of the current response information is determined, and the information type is an aggregated type or a non-aggregated type. If the information type is an aggregated type, that is, last_type=1, that is, the current response information is an aggregated ACK, then the storage address of the previous response information in the coalesce RAM is used as the target storage address, that is, last_addr is the target storage address, and is written into the coalesce RAM. Alternatively, if the information type is a non-aggregated type, that is, last_type=0, that is, the current response information is a non-aggregated ACK, the address to be allocated is written into the coalesce RAM as the target storage address, and wr_addr is increased by 1.

[0064] In a possible embodiment, the above-mentioned determination of the target storage address according to the storage address of the previous response information and the information type of the previous response information can be specifically implemented through the following steps:

[0065] When the information type of the previous response information is an aggregatable type, the storage address of the previous response information is used as the target storage address; or, when the information type of the previous response information is a non-aggregatable type, the address to be allocated is used as the target storage address.

[0066] It is understandable that if the information type of the previous response information is an aggregatable type, the storage address of the previous response information can be directly used as the target storage address, and the current response information can overwrite the previous response information stored at the target storage address. In this case, the sender's judgment after receiving the current response information is: Receiving the current response information indicates that all request packets sent previously have been correctly received by the receiving end.

[0067] Optionally, after determining the target storage address of the current response information in the first storage space, updating the status information can be specifically implemented by the following steps:

[0068] The effect identifier in the status information is set to a first parameter value, wherein the first parameter value indicates that the effect identifier is a valid identifier; and the status information is updated according to the target storage address, the information type of the current response information, and the first parameter value.

[0069] It can be understood that after determining the target storage address or completing the storage of the current response information, the status information of the target queue pair recorded in the third storage space is updated, that is, the current response information is used as the latest response information of the target queue pair, and the latest response information related information is written into the status RAM. Specifically, the target storage address used when writing the current status information into the coalesce RAM is written into the last_addr of the status RAM; the information type of the current status information is written into last_type, that is, the current response information can be aggregated, then last_type is set to the first parameter value, otherwise last_type is set to the second parameter value, preferably, the first parameter value is 1, and the second parameter value is 0; the valid status of the response information of the QP stored in the coalesce RAM is written into last_vld, that is, last_vld is set to 1.

[0070] An information storage method provided by an embodiment of the present disclosure receives response information, caches the response information to a coalesce RAM, and performs ACK aggregation processing in the coalesce RAM. The method provided by the present disclosure completes the cache processing of response information based on a coalesce RAM shared by multiple QPs, and there is no need to allocate RAM separately for each QP, which effectively reduces resource consumption, and at the same time realizes the ACK aggregation function of the response information, improving the network channel utilization. And a state RAM is constructed for address maintenance, and there is no need to set an address maintenance mechanism for each QP, which effectively reduces register consumption.

[0071] Based on the above embodiments, Figure 4 A flow chart of another information storage method provided by an embodiment of the present disclosure, after storing the current response information at the target storage address, reading the response information stored in the first storage space into the second storage space, specifically including the following steps: Figure 4 The following steps S401 to S402 are shown:

[0072] The second storage space includes multiple parallel subspaces, each subspace stores response information generated by a queue pair at the same time, and the second storage space has a first-in-first-out storage structure and provides storage status and reading interfaces to the outside.

[0073] Understandably, a second storage space is pre-built, and the second storage space can be understood as a parallel FIFO. The second storage space includes multiple parallel subspaces, that is, the parallel FIFO is a multiple parallel FIFO storage structure, which stores the response information from the first storage space, and each FIFO only stores the response information of one QP at the same time, that is, there is only one channel for the response information to be transferred from the coalesce RAM to the parallel FIFO. The parallel FIFO has a first-in-first-out storage structure, and can provide storage status and read interface to the outside (sending end).

[0074] S401: Obtain an address to be read in the first storage space.

[0075] It is understandable that the address to be read of the first storage space is obtained. The address to be read refers to the next address to be read from the first storage space to the second storage space, which is recorded as rd_addr. The update method of rd_addr and wr_addr is the same, starting from rd_addr=0, and each time a response message is read, the rd_addr address is increased by one, that is, rd_addr=1, as the address for the next data read. It is understandable that according to the writing and reading order of 0-9, in the same cycle, rd_addr must be less than or equal to wr_addr, that is, data can be read only after it is stored. In different cycles, that is, rd_addr is in the previous cycle and wr_addr is in the latest cycle. In this case, the sizes of rd_addr and wr_addr are uncertain.

[0076] S402: When the address to be read is the same as the target storage address, read the current response information into a second storage space.

[0077] It can be understood that based on the above S401, when the address to be read and the target storage address are the same, that is, after the current response information is written to the target storage address, the current response information must be read out. This situation may be that the current response information has been aggregated, or it may be that the address to be read and the address to be allocated are the same, that is, writing and reading are synchronized, and the current response information is read into the second storage space.

[0078] The second storage space further includes at least one first register and a second register, wherein the first register is used to record the correspondence between the queue pair and the subspace, and the second register is used to temporarily store the response information before determining the subspace corresponding to the response information.

[0079] Optionally, in S402, the current response information is read into the second storage space, which can be implemented by the following steps:

[0080] When the to-be-allocated address of the first storage space is different from the to-be-read address, the current response information is read into the second register; according to the corresponding relationship, a target subspace is determined among the multiple subspaces, and the current response information is read from the second register to the target subspace.

[0081] It can be understood that the coalesce RAM is judged to be empty or full by the address to be allocated and the address to be read. If the address to be allocated is different from the address to be read, that is, wr_addr! = rd_addr, it means that the coalesce RAM is not empty in the area from rd_addr to wr_addr, that is, there is response information that has not been read in the coalesce RAM. If the address to be allocated is different from the address to be read, and wr_addr = rd_addr-1, it means that the coalesce RAM is full, that is, writing is one cycle more than reading, and there is still a large amount of unread response information in the coalesce RAM. When the coalesce RAM is not empty, that is, there is response information that can be moved to the second storage space, and the response information is the current response information. In this case, the response information at rd_addr (current response information) is read and temporarily stored in the second register. According to the corresponding relationship between the subspace recorded in each first register and the QP, the target subspace is determined in multiple subspaces, and the current response information is moved from the second register to the target subspace. At this time, there is no current response information in the first storage space. It is understandable that each subspace has a corresponding first register, or multiple subspaces correspond to one first register, that is, the correspondence between QP and subspace is implemented in the form of a register array, each first register will record the QP number stored in it, and each subspace can also be understood as a queue. It is understandable that the target subspace follows the first-in-first-out principle, that is, the response information stored in the subspace first will be obtained by the sender first. Specifically, the sender obtains the response information in the corresponding subspace through the read interface of the second memory.

[0082] It is understandable that the response information in the coalesce RAM participates in the aggregation, and the response information that has been read (moved) to the parallel FIFO does not participate in the aggregation, and can be directly read sequentially into the FIFO corresponding to the QP. For different response information, the write operation and the read operation for the first storage space can be performed simultaneously.

[0083] Optionally, the determining of the target subspace in the multiple subspaces according to the corresponding relationship may be specifically implemented through the following steps:

[0084] Determine whether there is an initial subspace in the second storage space according to the corresponding relationship, wherein the initial subspace is used to store previous response information of the target queue pair; if the initial subspace exists in the second storage space and the storage space of the initial subspace is not full, determine the initial subspace as the target subspace; or, if the initial subspace does not exist in the second storage space and there is a free subspace in the second storage space, determine the free subspace as the target subspace.

[0085] It can be understood that, according to the first register recording the correspondence between the subspace and the queue pair, it is determined whether there is an initial subspace in the multiple subspaces, and the initial subspace refers to the subspace storing the previous response information of the target queue pair, that is, by comparing the first register of the correspondence between the parallel FIFO queue and the QP, it is determined whether the response information of the QP is previously stored in the parallel FIFO. If there is an initial subspace in the second storage space and the storage space of the initial subspace is not full, the initial subspace is determined as the target subspace, that is, the parallel FIFO queue has the response information of the QP, and the queue is not full, then the response information is directly written into the queue; or, if there is no initial subspace in the second storage space and there is an idle subspace in the second storage space, the idle subspace is determined as the target subspace, that is, the parallel FIFO does not store the response information of the QP, and there is an idle queue in the parallel FIFO, then the response information is directly written into an idle queue, and the correspondence between the QP and the idle queue is recorded, that is, the QP sequence number is written into the first register corresponding to the idle queue.

[0086] Optionally, the method further includes:

[0087] When the initial subspace exists in the second storage space and the storage space of the initial subspace is full, or when there is no free subspace in the second storage space, the reading operation of reading response information from the first storage space to the second storage space is suspended, and the current response information is temporarily stored in the second register.

[0088] It is understandable that when there is an initial subspace in the second storage space and the storage space of the initial subspace is full, that is, the current response information cannot be written into the queue, or when there is no free subspace in the second storage space, that is, all queues in the parallel FIFO have stored the response information of each QP. In this case, the reading operation of reading the response information from the first storage space to the second storage space is suspended, that is, the back pressure read data operation (pause operation), and the current response information is temporarily stored in the second register until the storage space of the initial subspace is not full, or there is a free subspace in the second storage space, and the current response information is written into the parallel FIFO.

[0089] Optionally, when the address to be read is different from the target storage address, that is, the next response information to be read is not the current response information, the state RAM information needs to be updated immediately, which can be specifically achieved by the following steps:

[0090] Determine the first queue pair that generates the first response information stored at the address to be read; when the storage address of the previous response information recorded in the status information corresponding to the first queue pair is the same as the storage address of the first storage space and the address to be read, set the effect identifier in the status information corresponding to the first queue pair to a second parameter value, and the second parameter value indicates that the effect identifier is an invalid identifier.

[0091] It can be understood that the first queue pair that generates the first response information stored at the address to be read is determined. When the storage address of the previous response information recorded in the status information corresponding to the first queue pair in the first storage space is the same as the address to be read, that is, the last_addr and rd_addr of the first response information recorded in the state RAM are equal, indicating that coalesceRAM has no response information of the QP, that is, the last response information (first response information) stored by the first queue pair in the first storage space is moved to the second storage space. In this case, last_vld is set to the second parameter value, which can be 0. The second parameter value indicates that the target is represented as an invalid mark, otherwise the state RAM is not updated.

[0092] An information storage method provided by an embodiment of the present disclosure constructs a parallel FIFO to improve the parallelism of response packet processing and prevent mutual blocking between QPs. After receiving the response information, it is first stored in the coalesce RAM and then in the parallel FIFO, which occupies less parallel FIFO storage, that is, less storage resources. And when the response information is output from the parallel FIFO, the order of output of the response information is retained due to the first-in-first-out order of the coalesce RAM.

[0093] Based on the above embodiments, for example, see Figure 4 , Figure 4The present invention provides a structural block diagram of an information storage system according to an embodiment of the present invention. The information storage system includes a first storage space (coalesce RAM), a second storage space (parallel FIFO), a third storage space (state RAM), and a processing logic control block (RAM ctrl). The coalesce RAM is used to initially store the response information of multiple QPs, and implement the ACK aggregation function of multiple QPs during the storage process. The parallel FIFO is used to store the response information and provide the response information of multiple QPs to the outside. The state RAM is used to store information such as last_type / last_addr / last_vld, and the state information is used to assist in completing ACK aggregation. The RAM ctrl is used to execute the above-mentioned information storage method, specifically to allocate a storage address in the coalesce RAM for the response information, record the read address in the coalesce RAM, record the empty and full status of the coalesce RAM, and move the response information stored in the coalesce RAM to the parallel FIFO. A RAM ctrl with control processing logic is set, which is simple to control and can achieve the effect of pipeline processing, and can effectively improve the processing speed of the response information.

[0094] It can be understood that the workflow of writing response information into coalesce RAM is as follows: 1) Initialization: Initialize the state RAM, set the initial values ​​of all state RAM parameters to 0, and set wr_addr in RAM ctrl to zero. 2) Receive response information and query the state information in the state RAM according to the QP sequence number. 3) According to the aggregation mechanism, write the response information into the coalesce RAM and perform cache and aggregation processing. 4) Update the state RAM.

[0095] It is understandable that the workflow of the response information from the coalesce RAM to the parallel FIFO is as follows: 1) Initialization: rd_addr in the RAM ctrl is set to zero, the register that records the correspondence between the parallel FIFO queue and the QP is cleared, the parallel FIFO is reset, and the coalesce RAM read enable strobe signal is set to 1 and is not empty. It is understandable that there is only one strobe signal for transmission between the coalesce RAM and the parallel FIFO. When writing the response information to the FIFO queue, the coalesce RAM read enable strobe signal is pulled high to support the next read operation. 2) Read the response information stored in the coalesce RAM. 3) Write the read response information to the parallel FIFO. 4) Update the status RAM information.

[0096] It is understandable that the specific implementation steps of the above writing process and reading process refer to the above embodiments and will not be described in detail here.

[0097] Figure 5The information storage device provided by the embodiment of the present disclosure can execute the processing flow provided by the information storage method embodiment, such as Figure 5 As shown, the information storage device 500 includes a receiving unit 501, an acquiring unit 502 and a storage unit 503, wherein:

[0098] The receiving unit 501 is used to receive current response information, where the current response information includes a target identifier of a target queue pair having a data receiving and sending processing function;

[0099] an acquisition unit 502, configured to acquire status information corresponding to the target identifier, wherein the status information is used to record parameter information of a previous response information generated by the target queue pair and stored in a first storage space, wherein the first storage space is used to store multiple response information of multiple queue pairs;

[0100] The storage unit 503 is used to determine a target storage address of the current response information in the first storage space based on the state information, and store the current response information at the target storage address.

[0101] Optionally, the status information in device 500 includes an effect identifier, a storage address of the previous response information in the first storage space, and an information type of the previous response information, wherein the effect identifier is used to identify whether the response information generated by the target queue pair is stored in the first storage space, and the effect identifier is an invalid identifier or a valid identifier.

[0102] Optionally, the storage unit 503 is used for:

[0103] When the effect flag is an invalid flag, obtaining the address to be allocated of the first storage space, and using the address to be allocated as the target storage address; or

[0104] When the effect identifier is a valid identifier, the target storage address is determined according to the storage address of the previous response information and the information type of the previous response information.

[0105] Optionally, the storage unit 503 is used for:

[0106] Determine the information type of the current response information, wherein the information type is an aggregatable type or a non-aggregatable type;

[0107] When the information type of the current response information is the same as the information type of the previous response information, and the information type is an aggregatable type, the storage address of the previous response information is used as the target storage address; or, when the information type of the current response information is different from the information type of the previous response information, the address to be allocated is used as the target storage address.

[0108] Optionally, the device 500 is further used for:

[0109] Setting the effect identifier in the state information to a first parameter value, wherein the first parameter value indicates that the effect identifier is a valid identifier;

[0110] The state information is updated according to the target storage address, the information type of the current response information and the first parameter value.

[0111] Optionally, the device 500 is further used for:

[0112] Acquire the to-be-read address of the first storage space, and when the to-be-read address is the same as the target storage address, read the current response information into the second storage space;

[0113] The second storage space includes multiple parallel subspaces, each subspace stores response information generated by a queue pair at the same time, and the second storage space has a first-in-first-out storage structure and provides storage status and reading interfaces to the outside.

[0114] Optionally, the second storage space in the device 500 also includes at least one first register and a second register, the first register is used to record the correspondence between the queue pair and the subspace, and the second register is used to temporarily store the response information before determining the subspace corresponding to the response information.

[0115] Optionally, the device 500 is further used for:

[0116] When the address to be allocated of the first storage space is different from the address to be read, reading the current response information into the second register;

[0117] According to the corresponding relationship, a target subspace is determined in the multiple subspaces, and the current response information is read from the second register to the target subspace.

[0118] Optionally, the device 500 is further used for:

[0119] Determine whether the second storage space has an initial subspace according to the corresponding relationship, wherein the initial subspace is used to store previous response information of the target queue pair;

[0120] If the initial subspace exists in the second storage space and the storage space of the initial subspace is not full, determining the initial subspace as the target subspace; or,

[0121] In the case that the initial subspace does not exist in the second storage space and there is a free subspace in the second storage space, the free subspace is determined as the target subspace.

[0122] Optionally, the device 500 is further used for:

[0123] When the initial subspace exists in the second storage space and the storage space of the initial subspace is full, or when there is no free subspace in the second storage space, the reading operation of reading response information from the first storage space to the second storage space is suspended, and the current response information is temporarily stored in the second register.

[0124] Optionally, the device 500 is further used for:

[0125] Determine a first queue pair for generating first response information stored at the address to be read;

[0126] When the storage address of the last response information recorded in the status information corresponding to the first queue pair is the same as the address to be read in the first storage space, the effect identifier in the status information corresponding to the first queue pair is set to a second parameter value, and the second parameter value indicates that the effect identifier is an invalid identifier.

[0127] Figure 5 The information storage device of the illustrated embodiment can be used to execute the technical solution of the above-mentioned method embodiment, and its implementation principle and technical effect are similar and will not be described in detail here.

[0128] Figure 6 This is a schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure. Figure 6 , which shows a schematic diagram of the structure of an electronic device 600 suitable for implementing the embodiment of the present disclosure. The electronic device 600 in the embodiment of the present disclosure may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle terminals (such as vehicle navigation terminals), wearable electronic devices, etc., and fixed terminals such as digital TVs, desktop computers, smart home devices, etc. Figure 6 The electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0129] like Figure 6As shown, the electronic device 600 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 601, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 602 or a program loaded from a storage device 608 to a random access memory (RAM) 603 to implement the information storage method of the embodiment described in the present disclosure. In the RAM 603, various programs and data required for the operation of the electronic device 600 are also stored. The processing device 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0130] Typically, the following devices may be connected to the I / O interface 605: an input device 606 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 607 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 608 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 609. The communication device 609 may allow the electronic device 600 to communicate with other devices wirelessly or by wire to exchange data. Although Figure 6 The electronic device 600 is shown with various devices, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead.

[0131] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart, thereby implementing the information storage method as described above. In such an embodiment, the computer program can be downloaded and installed from the network through the communication device 609, or installed from the storage device 608, or installed from the ROM 602. When the computer program is executed by the processing device 601, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed.

[0132] It should be noted that the computer-readable medium disclosed above may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in combination with an instruction execution system, device or device. In the present disclosure, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, in which a computer-readable program code is carried. This propagated data signal may take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. The computer readable signal medium may also be any computer readable medium other than a computer readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.

[0133] In some embodiments, the client and the server may communicate using any currently known or future developed network protocol such as HTTP (HyperText Transfer Protocol), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), an internet (e.g., the Internet), and a peer-to-peer network (e.g., an ad hoc peer-to-peer network), as well as any currently known or future developed network.

[0134] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device.

[0135] Optionally, when the above one or more programs are executed by the electronic device, the electronic device may also execute other steps described in the above embodiments.

[0136] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including, but not limited to, object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0137] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0138] The units involved in the embodiments described in the present disclosure may be implemented by software or hardware, wherein the name of a unit does not, in some cases, limit the unit itself.

[0139] The functions described above herein may be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), and the like.

[0140] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0141] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or gateway that includes a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also includes elements inherent to such process, method, article or gateway. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or gateway that includes the elements.

[0142] The above description is only a specific embodiment of the present disclosure, so that those skilled in the art can understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to the embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An information storage method, characterized in that: include: receiving current response information, wherein the current response information includes a target identifier of a target queue pair having a data receiving and sending processing function; Acquire status information corresponding to the target identifier, the status information being used to record parameter information of a previous response message generated by the target queue pair and stored in a first storage space, the first storage space being used to store multiple response messages of multiple queue pairs; Determine a target storage address of the current response information in the first storage space based on the parameter information of the previous response information included in the status information, and store the current response information at the target storage address; After storing the current response information at the target storage address, the method includes: Obtaining an address to be read from the first storage space; When the address to be read is the same as the target storage address, reading the current response information into the second storage space; The second storage space includes a plurality of parallel subspaces, each subspace stores response information generated by a queue pair at the same time, and the second storage space has a first-in-first-out storage structure and provides storage status and a reading interface to the outside.

2. The method according to claim 1, characterized in that The status information includes an effect identifier, a storage address of the last response information in the first storage space, and an information type of the last response information, wherein the effect identifier is used to identify whether the first storage space stores the response information generated by the target queue pair, and the effect identifier is an invalid identifier or a valid identifier. The determining, based on the state information, a target storage address of the current response information in the first storage space comprises: When the effect flag is an invalid flag, obtaining the address to be allocated of the first storage space, and using the address to be allocated as the target storage address; or When the effect identifier is a valid identifier, the target storage address is determined according to the storage address of the previous response information and the information type of the previous response information.

3. The method according to claim 2, characterized in that The determining the target storage address according to the storage address of the previous response information and the information type of the previous response information includes: Determine the information type of the current response information, wherein the information type is an aggregatable type or a non-aggregatable type; When the information type of the current response information is the same as the information type of the previous response information, and the information type is an aggregatable type, the storage address of the previous response information is used as the target storage address; or, when the information type of the current response information is different from the information type of the previous response information, the address to be allocated is used as the target storage address.

4. The method according to claim 1, characterized in that: After determining the target storage address of the current response information in the first storage space, the method further includes: Setting the effect identifier in the state information to a first parameter value, wherein the first parameter value indicates that the effect identifier is a valid identifier; The state information is updated according to the target storage address, the information type of the current response information and the first parameter value.

5. The method according to claim 1, characterized in that The second storage space further includes at least one first register and a second register, the first register being used to record the correspondence between the queue pair and the subspace, and the second register being used to temporarily store the response information before determining the subspace corresponding to the response information; The step of reading the current response information into the second storage space includes: When the address to be allocated of the first storage space is different from the address to be read, reading the current response information into the second register; According to the corresponding relationship, a target subspace is determined in the multiple subspaces, and the current response information is read from the second register to the target subspace.

6. The method according to claim 5, characterized in that Determining a target subspace in the multiple subspaces according to the corresponding relationship includes: Determine whether the second storage space has an initial subspace according to the corresponding relationship, wherein the initial subspace is used to store previous response information of the target queue pair; If the initial subspace exists in the second storage space and the storage space of the initial subspace is not full, determining the initial subspace as the target subspace; or, In the case that the initial subspace does not exist in the second storage space and there is a free subspace in the second storage space, the free subspace is determined as the target subspace.

7. The method according to claim 6, characterized in that The method further comprises: When the initial subspace exists in the second storage space and the storage space of the initial subspace is full, or when there is no free subspace in the second storage space, the reading operation of reading response information from the first storage space to the second storage space is suspended, and the current response information is temporarily stored in the second register.

8. The method according to claim 4, characterized in that In the case where the to-be-read address is different from the target storage address, the method further includes: Determine a first queue pair for generating first response information stored at the address to be read; When the storage address of the last response information recorded in the status information corresponding to the first queue pair is the same as the address to be read in the first storage space, the effect identifier in the status information corresponding to the first queue pair is set to a second parameter value, and the second parameter value indicates that the effect identifier is an invalid identifier.

9. An information storage device, characterized in that: include: A receiving unit, used for receiving current response information, wherein the current response information includes a target identifier of a target queue pair having a data sending and receiving processing function; an acquisition unit, configured to acquire status information corresponding to the target identifier, wherein the status information is used to record parameter information of a previous response information generated by the target queue pair and stored in a first storage space, wherein the first storage space is used to store multiple response information of multiple queue pairs; a storage unit, configured to determine a target storage address of the current response information in the first storage space based on the parameter information of the previous response information included in the status information, and store the current response information at the target storage address; Wherein, the device is also used for: Obtain the address to be read of the first storage space; when the address to be read is the same as the target storage address, read the current response information into the second storage space; wherein the second storage space includes multiple parallel subspaces, each subspace stores the response information generated by a queue pair at the same time, and the second storage space has a first-in-first-out storage structure, and provides a storage status and a read interface to the outside.

10. An electronic device, characterized in that: include: Memory; processor; as well as Computer programs; The computer program is stored in the memory and is configured to be executed by the processor to implement the information storage method as claimed in any one of claims 1 to 8.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the information storage method according to any one of claims 1 to 8 are implemented.

Images